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LAB EXERCISE #6

:
CONNECTING THE FORWARDING AND HAZARD DETECTION UNIT TO
THE PIPELINED PROCESSOR
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Name:
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1. PROBLEM STATEMENT
Connect the forwarding and hazard detection unit created in the previous lab to the pipelined
processor. You have to use the tables of the previous lab also to know the locations of the
forwarding multiplexers and the inputs they have.

2. DESIGN STEPS
1. Create a symbol of the forwarding and hazard detection unit verilog file.
2. Insert the symbol in the pipelined processor bdf file.
3. Create the multiplexers needed using megawizard and insert them in the proper points in
the datapath.
4. Connect the proper sources to every forwarding multiplexer using the tables created in
the previous lab.
5. Connect the inputs and the output of the FHD unit using the tables created in the
previous lab.
6. Connect the enable of the PC Flipflop, the enable of the IF/ID pipeline registers to the
invert of the stall signal. And connect the synchronous clear signal of the ID/IE pipeline
registers to the stall signal without inverting it.
7. Write a code that check two forwarding conditions and one stall condition in an MIF file
and insert it to the Instructions memory.
8. Test the design by simulating it using a vector waveform file.

3. WHAT TO SUBMIT
1. The exercise sheet.
2. The implementation file.
3. The MIF file.
4. The vector waveform simulation file.