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1 2 3 4 5 6 7 8

PCB STACK UP
8L
LE9( E43) BLOCK DIAGRAM 01
LAYER 1 : TOP CPU CPU THERMAL
SENSOR
LAYER 2 : SGND1 CPU CORE ISL6266A
Penryn 14.318MHz
A PAGE 40 PAGE 4 A
LAYER 3 : IN1
478P (uPGA)/35W
LAYER 4 : IN2 PAGE 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
VCCP +1.5V AND GMCH CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 5 : VCC 1.05V(RT8204) DREFCLK,DREFCLK# ICS9LPRS365BGLFT
PAGE 38 FSB 667/800/1066
/TSSOP64PIN
LAYER 6 : IN3 DREFSSCLK,DREFSSCLK#
PAGE 2
LAYER 7 : SGND2
LAYER 8 : BOT
27MHz
VGACORE(1.025V)Oz8118
NORTH BRIDGE PAGE 41
DDRII-SODIMM1 DDRII 667/800 MHz

DDR II SMDDR_VTERM PAGE 10,11 Cantiga GM/PM/GL NVIDIA


1.8V/1.8VSUS(TPS51116REGR)
PAGE 37 NB9M-NS CRT
DDRII-SODIMM2 DDRII 667/800 MHz
B B
PCI-Express PAGE 22
PAGE 10,11 16X
PAGE 12~17
PAGE 5~9 533p Dual Link
LCD CONN
32.768KHz PAGE 23
DMI LINK NBSRCCLK, NBSRCCLK#

SATA - HDD
SATA0 150MB USB2.0
PAGE 30
USB2.0 Ports X3 Finger print Mini PCI-E Card x1
SOUTH BRIDGE Express Card x1
SATA - CD-ROM
SATA1 150MB PAGE 30 PAGE 33 PAGE 31

PAGE 30 PCI
ICH-9M 24.576Hz
PCI-E
SYSTEM POWER ISL6237IRZ-T X1 X1 X1 X1
C
PAGE 39 Azalia C

PAGE18,19,20,21 Mini PCI-E LAN Express RICOH


Card BROADCOM Card R5C833
AUDIO BCM 5906M/
(NEW CARD)
(Wireless LAN) 5784M
CODEC
32.768KHz LPC Conexant (10/100/1G LAN)
MDC CONN CX20561-12Z PAGE 31 PAGE 31 PAGE28
PAGE 24
Conexant PAGE 26
CX20548
PAGE 26
Keyboard/Touch Pad AUDIO
RJ45 25MHz
IEEE1394 Memory
PAGE 33 ITE 8502E-L
Amplifier connect for CardReader
Discrete
TPA6017A2 only
RJ11 PAGE 25
SYSTEM CHARGER(ISL6251AHAZ-T) PAGE 27 PAGE 28 PAGE 29
PAGE 32
PAGE 36
PAGE 25 PCI DEVICES IRQ ROUTING
D
DEVICE IDSEL # REQ/GNT # PCI_INT D
CardBus/1394 AD21 0 E,F
/Card Reader

FAN SPI ROM INT Audio Jacks Jack to


microphone PROJECT :LE9
GMT G9931P1U (Phone/ MIC) Speaker
PAGE 34 PAGE 33 PAGE 27 PAGE 27 PAGE 27 Quanta Computer Inc.
Size Document Number Rev
Custom Block Diagram 3A

Date: Saturday, May 10, 2008 Sheet 1 of 42


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
CLK Discrete / UMA UMA & Discrete setting

02
+3V
----------------------------------
RP30/RP32 NC 0
RP29 33 NC
L22 +CK_VDD_MAIN
HCB1608KF-181T15_6 RP31 0 NC
R_DREFSSCLK RP29 2 1 4P2R-S-33@EV 27M_NONSS (14)
C363 C396 C364 C404 C353 C356 U11 R_DREFSSCLK# 4 3 27M_SS (14)
10U/6.3V/X5R_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 B-TEST
+CK_VDD_MAIN 16 54
VDDPLL3 CPUCLKT0 CLK_CPU_BCLK (3)
9 VDD48 CPUCLKC0 53 CLK_CPU_BCLK# (3)
2
61
VDDPCI
VDDREF
CK505 CPUCLKT1 51 CLK_MCH_BCLK (5)
A L30 VDDCPU 39 50 A
VDDSRC CPUCLKC1 CLK_MCH_BCLK# (5)
HCB1608KF-181T15_6 VDDCPU 55 VDDCPU CPU_ITP
CPUT2_ITP/SRCT8 47 TP40
C414 C403 +CK_VDD_MAIN2 12 46 CPU_ITP#
10U/6.3V/X5R_8 0.1U/10V_4 VDD96I/O CPUT2_ITP/SRCC8 TP39
20 VDDPLL3I/O
26 13 R_DOT96 RP30 2 1 *4P2R-S-0@IV
VDDSRCI/O DOTT_96/SRCT0 DREFCLK (6)
45 14 R_DOT96# 4 3
VDDSRCI/O DOTC_96/SRCC0 DREFCLK# (6)
36 VDDSRCI/O
17 R_DREFSSCLK RP32 2 1 *4P2R-S-0@IV
27MHz_Nonss/SRCCLK1/SE1 DREFSSCLK (6)
L29 +CK_VDD_MAIN2 49 18 R_DREFSSCLK# 4 3
VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2 DREFSSCLK# (6)
HCB1608KF-181T15_6 48 NC
SRCCLKT2/SATACL 21 CLK_PCIE_SATA (18)
SRCCLKC2/SATACL 22 CLK_PCIE_SATA# (18)
C410 C402 C400 C401 C354 C355 C357 CG_XIN 60
10U/6.3V/X5R_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 CG_XOUT X1 R_CLK_PCIE_VGA RP31 2
59 X2 SRCCLKT3/CR#_C 24 1 4P2R-S-0@EV CLK_PCIE_VGA (12)
25 R_CLK_PCIE_VGA# 4 3
SRCCLKC3/CR#_D CLK_PCIE_VGA# (12)

SRCCLKT4 27 CLK_PCIE_LAN (24)


SRCCLKC4 28 CLK_PCIE_LAN# (24)

(20) CK_PWG 56 CK_PWRGD/PD# PCI_STOP# 38 PM_STPPCI# (20)


CPU_BSEL1 57 37
FSLB/TEST_MODE CPU_STOP# PM_STPCPU# (20)
QV-TEST DEL R214
SRCCLKT6 41 CLK_PCIE_ICH (19)
Y3 SRCCLKC6 40 CLK_PCIE_ICH# (19)
+3V QV-TEST DEL R215
CG_XIN 1 2 CG_XOUT (10,11,31) CGCLK_SMB CGCLK_SMB 64 44
SCLK SRCCLKT7/CR#_F CLK_PCIE_MINI (31)
(10,11,31) CGDAT_SMB CGDAT_SMB 63 43
SDATA SRCCLKC7/CR#_E CLK_PCIE_MINI# (31)
14.318MHZ+/- 10ppm
C412 30
B 27P/50V_4 SRCCLKT9 CLK_PCIE_3GPLL (6) B
R178 C411 15 31
27P/50V_4 GND SRCCLKC9 CLK_PCIE_3GPLL# (6)
10K_4 19 QV-TEST DEL RP33
C406 GND R_CLK_PCIE_NEW_C
11 GND48 SRCCLKT10 34 CLK_PCIE_NEW_C (31)
*27P/50V@NC 52 35 R_CLK_PCIE_NEW_C#
GNDCPU SRCCLKC10 CLK_PCIE_NEW_C# (31)
8 GNDPCI
PCLK_5C833 +3V for EMI 58 33 NEW-CARD_CLK_REQ#_R R205 475_4 NEW-CARD_CLK_REQ#
GNDREF SRCCLKT11/CR#_H R194 NEW-CARD_CLK_REQ# (31)
23 32 CLK_3GPLLREQ#_R 475_4 CLK_MCH_OE#
GNDSRC SRCCLKC11/CR#_G CLK_MCH_OE# (6)
29 GNDSRC
42 GNDSRC
B-TEST
R179 1 PCI_ICH R196 33_4 PCI_CLK_SIO
PCICLK0/CR#_A PCI_CLK_SIO (34)
*4.7K_4@NC R208 R200 3 PCIE_LANREQ#_R R188 475_4 PCIE_LANREQ#
PCICLK1/CR#_B PCIE_LANREQ# (24)
10K_4 10K_4 4 PCLK_5C833 R187 33_4 PCI_CLK_5C833 B-TEST
PCICLK2/TME PCI_CLK_5C833 (28)
2

5 PCLK_MINI_LPC R185 33_4 PCLK_LPC_DEBUG


PCICLK3 PCLK_LPC_DEBUG (31)
6 FCTSEL1 R175 33_4 PCLK_LPC_8512
PCICLK4/27_SELECT PCLK_LPC_8512 (32)
3 1 CGDAT_SMB
(20) PDAT_SMB
Q13
2N7002 7 ITP_EN R174 33_4 PCLK_ICH
PCI_F5/ITP_EN PCLK_ICH (19)
R173 33_4 CLK_48M_USB
CLK_48M_USB (20)
0=overclocking +3V
USB_48MHZ/FSLA 10 FSA
FSC
R172
R222
2.2K_4
10K_4
CPU_BSEL0
CPU_BSEL2
of CPU and 62 R213 22_4 CLK_14M_ICH
FSLC/TST_SL/REF CLK_14M_ICH (20)
2

SRC Allowed R218 33_4 CLK_SIO_14M


CLK_SIO_14M (34)
ICS9LPRS365BGLFT/SLG8SP512T B-TEST
3 1 CGCLK_SMB
(20) PCLK_SMB
1 = overclocking (4,6,9,10,11,12,14,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
Q10
of CPU and SRC 2N7002
(3,4,5,6,8,9,18,21,35,38,40) +1.05V

not Allowed
C C
+3V
GCLK_SEL = FCTSEL1
+3V
FCTSEL1 PIN13 PIN14 PIN17 PIN18
CLK_MCH_OE# R197 10K_4
(PIN13)
NEW-CARD_CLK_REQ# R201 10K_4
R176 0=UMA DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
10K_4@EV PCIE_LANREQ# R180 10K_4

1 = External
FCTSEL1 SRCT0 SRCC0 27Mout-NSS 27Mout-SS
VGA
R183 C373 *27P/50V@NC PCI_CLK_SIO
*10K_4@IV
C351 *27P/50V@NC PCI_CLK_5C833

C345 *27P/50V@NC PCLK_ICH


CPU Clock select
PCI4/27_Select: FSC FSB FSA CPU SRC PCI C346 *27P/50V@NC PCLK_LPC_DEBUG
CPU_BSEL0 R165 0_4 B-TEST
1=27MHz,0=SRC_100MHz (3) CPU_BSEL0 MCH_BSEL0 (6)
C344 27P/50V CLK_48M_USB
of Pin17 & Pin18.
1 0 1 100 100 33
0 0 1 133 100 33 C399 *27P/50V@NC CLK_14M_ICH
R166 *1K_4@NC
0 1 1 166 100 33 C405 *27P/50V@NC CLK_SIO_14M
CPU_BSEL1 R226 0_4
(3) CPU_BSEL1 MCH_BSEL1 (6)
0 1 0 200 100 33 C348 *27P/50V@NC PCLK_LPC_8512
D D
ITP_EN 0 0 0 266 100 33 for EMI
+1.05V R225 *1K_4@NC

CPU_BSEL2 R227 0_4


1 0 0 333 100 33
(3) CPU_BSEL2 MCH_BSEL2 (6)
R182 1 1 0 400 100 33
10K_4

R233 *1K_4@NC
1 1 1 RSVD 100 33 PROJECT :LE9
Disable ITP +1.05V
QV-TEST no_stuff
Quanta Computer Inc.
Size Document Number Rev
Custom 3B
CLOCK GENERATOR
Date: Tuesday, May 27, 2008 Sheet 2 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1

03
(2,4,5,6,8,9,18,21,35,38,40) +1.05V

U20A
(5) H_A#[35:3] TP65
H_A#3 J4 H1
A[3]# ADS# H_ADS# (5) (5) H_D#[63:0] H_D#[63:0]
H_A#4 L5 E2 U20B
A[4]# BNR# H_BNR# (5)
H_A#5 H_D#0 H_D#32

ADDR GROUP 0
L4 A[5]# BPRI# G5 H_BPRI# (5) E22 D[0]# D[32]# Y22
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_D#2 D[1]# D[33]# H_D#34
M3 A[7]# DEFER# H5 H_DEFER# (5) E26 D[2]# D[34]# V24
H_A#8 N2 F21 H_D#3 G22 V26 H_D#35
A[8]# DRDY# H_DRDY# (5) D[3]# D[35]#
H_A#9 J1 E1 H_D#4 F23 V23 H_D#36
A[9]# DBSY# H_DBSY# (5) D[4]# D[36]#
D H_A#10 N3 H_D#5 G25 T22 H_D#37 D
H_A#11 A[10]# H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 HBREQ#0 (5) E25 D[6]# D[38]# U25
H_A#12 H_D#7 H_D#39

DATA GRP 0

DATA GRP 2
P2 A[12]# E23 D[7]# D[39]# U23
H_A#13

CONTROL
L2 A[13]# IERR# D20 H_IERR# R12 56.2/F_4 +1.05V H_D#8 K24 D[8]# D[40]# Y25 H_D#40
H_A#14 P4 B3 H_D#9 G24 W22 H_D#41
A[14]# INIT# H_INIT# (18) D[9]# D[41]#
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# (5) J23 D[11]# D[43]# W24
M1 H_D#12 H22 W25 H_D#44
(5) H_ADSTB#0 ADSTB[0]# H_CPURST# (5) D[12]# D[44]#
C1 H_D#13 F26 AA23 H_D#45
(5) H_REQ#[4:0] RESET# D[13]# D[45]#
H_REQ#0 K3 F3 H_RS#0 H_D#14 K22 AA24 H_D#46
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_D#15 D[14]# D[46]# H_D#47
H2 REQ[1]# RS[1]# F4 H23 D[15]# D[47]# AB25
H_REQ#2 K2 G3 H_RS#2 H_RS#[2:0] (5) J26 Y26
REQ[2]# RS[2]# (5) H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 (5)
H_REQ#3 J3 G2 H26 AA26
REQ[3]# TRDY# H_TRDY# (5) (5) H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 (5)
H_REQ#4 L1 H25 U22
H_A#[35:3] REQ[4]# (5) H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 (5)
HIT# G6 H_HIT# (5)
H_A#17 Y2 E4 H_D#[63:0] H_D#[63:0]
A[17]# HITM# H_HITM# (5)
H_A#18 U5 H_D#16 N22 AE24 H_D#48
H_A#19 A[18]# ITP_BPM#0 H_D#17 D[16]# D[48]# H_D#49

ADDR GROUP 1
R3 A[19]# BPM[0]# AD4 TP2 K25 D[17]# D[49]# AD24
H_A#20 W6 AD3 ITP_BPM#1 H_D#18 P26 AA21 H_D#50
A[20]# BPM[1]# TP62 D[18]# D[50]#
H_A#21 ITP_BPM#2 H_D#19 H_D#51

XDP/ITP SIGNALS
U4 A[21]# BPM[2]# AD1 TP63 R23 D[19]# D[51]# AB22
H_A#22 Y5 AC4 ITP_BPM#3 H_D#20 L23 AB21 H_D#52
A[22]# BPM[3]# TP1 D[20]# D[52]#
H_A#23 U1 AC2 ITP_BPM#4 H_D#21 M24 AC26 H_D#53
A[23]# PRDY# TP64 D[21]# D[53]#
H_A#24 ITP_BPM#5 H_D#22 H_D#54

DATA GRP 1

DATA GRP 3
R4 A[24]# PREQ# AC1 TP3 L22 D[22]# D[54]# AD20
H_A#25 T5 AC5 ITP_TCK H_D#23 M23 AE22 H_D#55
H_A#26 A[25]# TCK ITP_TDI H_D#24 D[23]# D[55]# H_D#56
T3 A[26]# TDI AA6 P25 D[24]# D[56]# AF23
H_A#27 W2 AB3 ITP_TDO H_D#25 P23 AC25 H_D#57
H_A#28 A[27]# TDO ITP_TMS H_D#26 D[25]# D[57]# H_D#58
W5 A[28]# TMS AB5 P22 D[26]# D[58]# AE21
H_A#29 Y4 AB6 ITP_TRST# H_D#27 T24 AD21 H_D#59
H_A#30 A[29]# TRST# H_D#28 D[27]# D[59]# H_D#60
U2 A[30]# DBR# C20 SYS_RST# (20) R24 D[28]# D[60]# AC22
H_A#31 V4 H_D#29 L25 AD23 H_D#61
C H_A#32 A[31]# R20 *0@NC +1.05V H_D#30 D[29]# D[61]# H_D#62 C
W3 A[32]# H_PROCHOT# (40) T25 D[30]# D[62]# AF22
H_A#33 AA4 THERMAL H_D#31 N25 AC23 H_D#63
H_A#34 A[33]# D[31]# D[63]#
AB2 A[34]# (5) H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 (5)
H_A#35 AA3 D21 H_PROCHOT#_R R17 68_4 +1.05V R363 M26 AF24
A[35]# PROCHOT# (5) H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 (5)
V1 A24 1K/F_4 N24 AC20
(5) H_ADSTB#1 ADSTB[1]# THERMDA H_THERMDA (4) (5) H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 (5)
THERMDC B25 H_THERMDC (4)
A6 H_GTLREF AD26 R26 COMP0 R365 27.4/F_4
(18) H_A20M# A20M# GTLREF COMP[0]
CPU_TEST1 COMP1
ICH
A5 C7 C23 MISC U26 R364 54.9/F_4
(18) H_FERR# FERR# THERMTRIP# PM_THRMTRIP# (6,18) TEST1 COMP[1]
C4 R362 CPU_TEST2 D25 AA1 COMP2 R2 27.4/F_4
(18) H_IGNNE# IGNNE# TEST2 COMP[2]
2K/F_4 CPU_TEST3 C24 Y1 COMP3 R3 54.9/F_4
TP14 TP10 TEST3 COMP[3]
D5 H CLK CPU_TEST4 AF26
(18) H_STPCLK# STPCLK# TP61 TEST4
C6 CPU_TEST5 AF1 E5
(18) H_INTR LINT0 TP60 TEST5 DPRSTP# H_DPRSTP# (6,18,40)
B4 A22 CPU_TEST6 A26 B5
(18) H_NMI LINT1 BCLK[0] CLK_CPU_BCLK (2) TP67 TEST6 DPSLP# H_DPSLP# (18)
A3 A21 CPU_TEST7 C3 D24
(18) H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# (2) TP11 TEST7 DPWR# H_DPWR# (5)
(2) CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD (18)
Quard Core Only (2) CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# (5)
TP7 M4 RSVD[01] (2) CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# (40)
TP6 N5 RSVD[02]
T2 Penryn
TP5 RSVD[03]
TP4 V3 RSVD[04]
B2 CPU_TEST2 R21 *1K/F_4@NC
TP66 RSVD[05]
TP12 D2 RSVD[06]
TP8 D22 RSVD[07]
D3 CPU_TEST1 R46 *1K/F_4@NC
TP13 RSVD[08]
TP9 F6 RSVD[09]

B B

Penryn

Populate ITP700Flex for bringup

+1.05V

ITP_TDI 54.9/F_4 R15

ITP_TMS 54.9/F_4 R10

ITP_TDO *54.9/F_4@NC R9

ITP_BPM#5 54.9/F_4 R1

A A
H_CPURST# *51/F_4@NC R44

ITP_TCK 54.9/F_4 R8
PROJECT :LE9
ITP_TRST# 54.9/F_4 R11
Quanta Computer Inc.
Size Document Number Rev
Custom Penryn 1/2 1A

Date: Monday, May 26, 2008 Sheet 3 of 42


5 4 3 2 1
5 4 3 2 1

04
(2,6,9,10,11,12,14,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
(2,3,5,6,8,9,18,21,35,38,40) +1.05V
(9,18,19,21,31,34,35,38) +1.5V
VCC_CORE VCC_CORE
(34,35,40) VCC_CORE
U20C
A7 AB20 U20D
VCC[001] VCC[068]
A9 VCC[002] VCC[069] AB7 A4 VSS[001] VSS[082] P6
VCC_CORE A10 AC7 A8 P21
VCC[003] VCC[070] VSS[002] VSS[083]
A12 VCC[004] VCC[071] AC9 A11 VSS[003] VSS[084] P24
A13 VCC[005] VCC[072] AC12 A14 VSS[004] VSS[085] R2
A15 VCC[006] VCC[073] AC13 A16 VSS[005] VSS[086] R5
A17 VCC[007] VCC[074] AC15 A19 VSS[006] VSS[087] R22
C61 C6 C56 C59 A18 AC17 A23 R25
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[008] VCC[075] VSS[007] VSS[088]
A20 VCC[009] VCC[076] AC18 AF2 VSS[008] VSS[089] T1
D B7 AD7 B6 T4 D
VCC[010] VCC[077] VSS[009] VSS[090]
B9 VCC[011] VCC[078] AD9 B8 VSS[010] VSS[091] T23
B10 VCC[012] VCC[079] AD10 B11 VSS[011] VSS[092] T26
B12 VCC[013] VCC[080] AD12 B13 VSS[012] VSS[093] U3
C7 C27 C3 C2 B14 AD14 B16 U6
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[014] VCC[081] VSS[013] VSS[094]
B15 VCC[015] VCC[082] AD15 B19 VSS[014] VSS[095] U21
B17 VCC[016] VCC[083] AD17 B21 VSS[015] VSS[096] U24
B18 VCC[017] VCC[084] AD18 B24 VSS[016] VSS[097] V2
B20 VCC[018] VCC[085] AE9 C5 VSS[017] VSS[098] V5
C9 VCC[019] VCC[086] AE10 C8 VSS[018] VSS[099] V22
C60 C22 C26 C25 C10 AE12 C11 V25
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[020] VCC[087] VSS[019] VSS[100]
C12 VCC[021] VCC[088] AE13 C14 VSS[020] VSS[101] W1
C13 VCC[022] VCC[089] AE15 C16 VSS[021] VSS[102] W4
C15 VCC[023] VCC[090] AE17 C19 VSS[022] VSS[103] W23
C17 VCC[024] VCC[091] AE18 C2 VSS[023] VSS[104] W26
C18 VCC[025] VCC[092] AE20 C22 VSS[024] VSS[105] Y3
C515 C516 C21 C513 D9 AF9 C25 Y6
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[026] VCC[093] VSS[025] VSS[106]
D10 VCC[027] VCC[094] AF10 D1 VSS[026] VSS[107] Y21
D12 VCC[028] VCC[095] AF12 D4 VSS[027] VSS[108] Y24
D14 VCC[029] VCC[096] AF14 D8 VSS[028] VSS[109] AA2
D15 VCC[030] VCC[097] AF15 D11 VSS[029] VSS[110] AA5
D17 VCC[031] VCC[098] AF17 D13 VSS[030] VSS[111] AA8
C62 C63 C510 C512 D18 AF18 D16 AA11
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[032] VCC[099] +1.05V VSS[031] VSS[112]
E7 VCC[033] VCC[100] AF20 D19 VSS[032] VSS[113] AA14
E9 VCC[034] D23 VSS[033] VSS[114] AA16
E10 VCC[035] VCCP[01] G21 D26 VSS[034] VSS[115] AA19
E12 VCC[036] VCCP[02] V6 E3 VSS[035] VSS[116] AA22
E13 VCC[037] VCCP[03] J6 E6 VSS[036] VSS[117] AA25

1
C518 C517 C9 C5 E15 K6 E8 AB1
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VCC[038] VCCP[04] + C19 VSS[037] VSS[118]
E17 VCC[039] VCCP[05] M6 E11 VSS[038] VSS[119] AB4
C E18 J21 330u_2.5V_7343 E14 AB8 C
VCC[040] VCCP[06] VSS[039] VSS[120]
E20 VCC[041] VCCP[07] K21 E16 VSS[040] VSS[121] AB11

2
F7 VCC[042] VCCP[08] M21 E19 VSS[041] VSS[122] AB13
F9 N21 +1.5V E21 AB16
C8 C4 C58 C57 VCC[043] VCCP[09] VSS[042] VSS[123]
F10 VCC[044] VCCP[10] N6 E24 VSS[043] VSS[124] AB19
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 F12 R21 F5 AB23
VCC[045] VCCP[11] VSS[044] VSS[125]
F14 VCC[046] VCCP[12] R6 F8 VSS[045] VSS[126] AB26
F15 VCC[047] VCCP[13] T21 F11 VSS[046] VSS[127] AC3
F17 VCC[048] VCCP[14] T6 F13 VSS[047] VSS[128] AC6
F18 V21 C521 C520 F16 AC8
C28 C24 C514 C23 VCC[049] VCCP[15] .01U/16V_4 10U/6.3V/X5R_8 VSS[048] VSS[129]
F20 VCC[050] VCCP[16] W21 F19 VSS[049] VSS[130] AC11
10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 AA7 F2 AC14
VCC[051] VSS[050] VSS[131]
AA9 VCC[052] VCCA[01] B26 F22 VSS[051] VSS[132] AC16
AA10 VCC[053] VCCA[02] C26 F25 VSS[052] VSS[133] AC19
AA12 VCC[054] G4 VSS[053] VSS[134] AC21
AA13 VCC[055] VID[0] AD6 CPU_VID0 (40) G1 VSS[054] VSS[135] AC24
+1.05V AA15 AF5 G23 AD2
VCC[056] VID[1] CPU_VID1 (40) VSS[055] VSS[136]
AA17 VCC[057] VID[2] AE5 CPU_VID2 (40) G26 VSS[056] VSS[137] AD5
AA18 VCC[058] VID[3] AF4 CPU_VID3 (40) H3 VSS[057] VSS[138] AD8
AA20 VCC[059] VID[4] AE3 CPU_VID4 (40) H6 VSS[058] VSS[139] AD11
AB9 VCC[060] VID[5] AF3 CPU_VID5 (40) H21 VSS[059] VSS[140] AD13
C12 C10 C31 C1 C13 C11 AC10 AE2 H24 AD16
VCC[061] VID[6] CPU_VID6 (40) VSS[060] VSS[141]
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 AB10 J2 AD19
VCC[062] VSS[061] VSS[142]
AB12 VCC[063] J5 VSS[062] VSS[143] AD22
AB14 VCC[064] VCCSENSE AF7 VCCSENSE (40) J22 VSS[063] VSS[144] AD25
AB15 VCC[065] J25 VSS[064] VSS[145] AE1
AB17 VCC[066] K1 VSS[065] VSS[146] AE4
AB18 VCC[067] VSSSENSE AE7 VSSSENSE (40) K4 VSS[066] VSS[147] AE8
K23 VSS[067] VSS[148] AE11
Penryn R4 R5 K26 AE14
B 100/F_4 VSS[068] VSS[149] B
. 100/F_4 L3 VSS[069] VSS[150] AE16
L6 VSS[070] VSS[151] AE19
L21 VSS[071] VSS[152] AE23
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
+3V M22 AF8
VCC_CORE VSS[075] VSS[156]
M25 VSS[076] VSS[157] AF11
B-TEST N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
B-TEST R28 P3 A25
+3V 0_4 VSS[081] VSS[162]
VSS[163] AF25
25mils
R37 R599 LM86VCC Penryn
Q4 10K/F_4 10K/F_4 .
2

2N7002
R34 R41 C39
(32) MB_CLK 3 1 10K/F_4 *10K/F_4@NC .1U/10V_4

U3

(15) MBCLK2 8 SCLK VCC 1


H_THERMDA (3)
(15) MBDATA2 7 SDA DXP 2
C43
+3V
6 3 100P/50V_4
ALERT# DXN
2

Q6
2N7002 4 5
A OVERT# GND H_THERMDC (3) A
(32) MB_DATA 3 1

LM95245CIMM NOPB
(20) PM_THRM# PM_THRM_R# R38 *0_4@NC ADDRESS: 98H
+3V
2

Q7
2N7002
SYS_SHDN-1#
PROJECT :LE9
(39,40) SYS_SHDN# 3 1
Quanta Computer Inc.
2 1 Size Document Number Rev
VGA_OVT# (15) Custom 2A
D4 Penryn & TH Monitor 2/2
*RB501V-40@NC
Date: Sunday, May 18, 2008 Sheet 4 of 42
5 4 3 2 1
5 4 3 2 1

AU48
AR48
U24I

VSS_1
VSS_2
VSS_100
VSS_101
AM36
AE36
BG21
L12
AW21
U24J
VSS_199
VSS_200
VSS_201
VSS_297
VSS_298
VSS_299
AH8
Y8
L8
(2,3,4,6,8,9,18,21,35,38,40) +1.05V
05
AL48 VSS_3 VSS_102 P36 AU21 VSS_202 VSS_300 E8
BB47 VSS_4 VSS_103 L36 AP21 VSS_203 VSS_301 B8
AW47 VSS_5 VSS_104 J36 AN21 VSS_204 VSS_302 AY7
AN47 F36 AH21 AU7 U24A
VSS_6 VSS_105 VSS_205 VSS_303 H_A#[35:3] (3)
AJ47 B36 AF21 AN7 A14 H_A#3
VSS_7 VSS_106 VSS_206 VSS_304 (3) H_D#[63:0] H_A#_3
AF47 AH35 AB21 AJ7 H_D#0 F2 C15 H_A#4
VSS_8 VSS_107 VSS_207 VSS_305 H_D#1 H_D#_0 H_A#_4 H_A#5
AD47 VSS_9 VSS_108 AA35 R21 VSS_208 VSS_306 AE7 G8 H_D#_1 H_A#_5 F16
D AB47 Y35 M21 AA7 H_D#2 F8 H13 H_A#6 D
VSS_10 VSS_109 VSS_209 VSS_307 H_D#3 H_D#_2 H_A#_6 H_A#7
Y47 VSS_11 VSS_110 U35 J21 VSS_210 VSS_308 N7 E6 H_D#_3 H_A#_7 C18
T47 T35 G21 J7 H_D#4 G2 M16 H_A#8
VSS_12 VSS_111 VSS_211 VSS_309 H_D#5 H_D#_4 H_A#_8 H_A#9
N47 VSS_13 VSS_112 BF34 BC20 VSS_212 VSS_310 BG6 H6 H_D#_5 H_A#_9 J13
L47 AM34 BA20 BD6 H_D#6 H2 P16 H_A#10
VSS_14 VSS_113 VSS_213 VSS_311 H_D#7 H_D#_6 H_A#_10 H_A#11
G47 VSS_15 VSS_114 AJ34 AW20 VSS_214 VSS_312 AV6 F6 H_D#_7 H_A#_11 R16
BD46 AF34 AT20 AT6 H_D#8 D4 N17 H_A#12
VSS_16 VSS_115 VSS_215 VSS_313 H_D#9 H_D#_8 H_A#_12 H_A#13
BA46 VSS_17 VSS_116 AE34 AJ20 VSS_216 VSS_314 AM6 H3 H_D#_9 H_A#_13 M13
AY46 W34 AG20 M6 H_D#10 M9 E17 H_A#14
VSS_18 VSS_117 VSS_217 VSS_315 H_D#11 H_D#_10 H_A#_14 H_A#15
AV46 VSS_19 VSS_118 B34 Y20 VSS_218 VSS_316 C6 M11 H_D#_11 H_A#_15 P17
AR46 A34 N20 BA5 H_D#12 J1 F17 H_A#16
VSS_20 VSS_119 VSS_219 VSS_317 H_D#13 H_D#_12 H_A#_16 H_A#17
AM46 VSS_21 VSS_120 BG33 K20 VSS_220 VSS_318 AH5 J2 H_D#_13 H_A#_17 G20
V46 BC33 F20 AD5 H_D#14 N12 B19 H_A#18
VSS_22 VSS_121 VSS_221 VSS_319 H_D#15 H_D#_14 H_A#_18 H_A#19
R46 VSS_23 VSS_122 BA33 C20 VSS_222 VSS_320 Y5 J6 H_D#_15 H_A#_19 J16
P46 AV33 A20 L5 H_D#16 P2 E20 H_A#20
VSS_24 VSS_123 VSS_223 VSS_321 H_D#17 H_D#_16 H_A#_20 H_A#21
H46 VSS_25 VSS_124 AR33 BG19 VSS_224 VSS_322 J5 L2 H_D#_17 H_A#_21 H16
F46 AL33 A18 H5 H_D#18 R2 J20 H_A#22
VSS_26 VSS_125 VSS_225 VSS_323 H_D#19 H_D#_18 H_A#_22 H_A#23
BF44 VSS_27 VSS_126 AH33 BG17 VSS_226 VSS_324 F5 N9 H_D#_19 H_A#_23 L17
AH44 AB33 BC17 BE4 H_D#20 L6 A17 H_A#24
VSS_28 VSS_127 VSS_227 VSS_325 H_D#21 H_D#_20 H_A#_24 H_A#25
AD44 VSS_29 VSS_128 P33 AW17 VSS_228 M5 H_D#_21 H_A#_25 B17
AA44 L33 AT17 BC3 H_D#22 J3 L16 H_A#26
Y44
U44
VSS_30
VSS_31
VSS_32
VSS_129
VSS_130
VSS_131
H33
N32
R17
M17
VSS_229
VSS_230
VSS_231
VSS VSS_327
VSS_328
VSS_329
AV3
AL3 +1.05V
H_D#23
H_D#24
N2
R1
H_D#_22
H_D#_23
H_D#_24
H_A#_26
H_A#_27
H_A#_28
C21
J17
H_A#27
H_A#28
VSS

T44 K32 H17 R3 H_D#25 N5 H20 H_A#29


VSS_33 VSS_132 VSS_232 VSS_330 H_D#26 H_D#_25 H_A#_29 H_A#30
M44 VSS_34 VSS_133 F32 C17 VSS_233 VSS_331 P3 N6 H_D#_26 H_A#_30 B18
F44 C32 F3 H_D#27 P13 K17 H_A#31
VSS_35 VSS_134 VSS_332 H_D#28 H_D#_27 H_A#_31 H_A#32
BC43 VSS_36 VSS_135 A31 BA16 VSS_235 VSS_333 BA2 N8 H_D#_28 H_A#_32 B20
AV43 AN29 AW2 H_D#29 L7 F21 H_A#33
VSS_37 VSS_136 VSS_334 R401 H_D#30 H_D#_29 H_A#_33 H_A#34
AU43 VSS_38 VSS_137 T29 AU16 VSS_237 VSS_335 AU2 N10 H_D#_30 H_A#_34 K21
AM43 N29 AN16 AR2 221/F_4 H_D#31 M3 L20 H_A#35
C VSS_39 VSS_138 VSS_238 VSS_336 H_D#32 H_D#_31 H_A#_35 C
J43 VSS_40 VSS_139 K29 N16 VSS_239 VSS_337 AP2 Y3 H_D#_32
C43 H29 K16 AJ2 H_SWING H_D#33 AD14 H12
VSS_41 VSS_140 VSS_240 VSS_338 H_D#_33 H_ADS# H_ADS# (3)
BG42 F29 G16 AH2 H_D#34 Y6 B16
VSS_42 VSS_141 VSS_241 VSS_339 H_D#_34 H_ADSTB#_0 H_ADSTB#0 (3)
AY42 A29 E16 AF2 H_D#35 Y10 G17
VSS_43 VSS_142 VSS_242 VSS_340 H_D#_35 H_ADSTB#_1 H_ADSTB#1 (3)
AT42 BG28 BG15 AE2 H_D#36 Y12 A9
VSS_44 VSS_143 VSS_243 VSS_341 H_D#_36 H_BNR# H_BNR# (3)
AN42 BD28 AC15 AD2 R402 C558 H_D#37 Y14 F11
VSS_45 VSS_144 VSS_244 VSS_342 H_D#_37 H_BPRI# H_BPRI# (3)
AJ42 BA28 W15 AC2 100/F_4 .1U/10V_4 H_D#38 Y7 G12
VSS_46 VSS_145 VSS_245 VSS_343 H_D#_38 H_BREQ# HBREQ#0 (3)
AE42 AV28 A15 Y2 H_D#39 W2 E9
VSS_47 VSS_146 VSS_246 VSS_344 H_D#_39 H_DEFER# H_DEFER# (3)
N42 AT28 BG14 M2 H_D#40 AA8 B10
VSS_48 VSS_147 VSS_247 VSS_345 H_D#_40 H_DBSY# H_DBSY# (3)
L42 AR28 AA14 K2 H_D#41 Y9 AH7

HOST
VSS_49 VSS_148 VSS_248 VSS_346 H_D#_41 HPLL_CLK CLK_MCH_BCLK (2)
BD41 AJ28 C14 AM1 H_D#42 AA13 AH6
VSS_50 VSS_149 VSS_249 VSS_347 H_D#_42 HPLL_CLK# CLK_MCH_BCLK# (2)
AU41 AG28 BG13 AA1 H_RCOMP H_D#43 AA9 J11
VSS_51 VSS_150 VSS_250 VSS_348 H_D#_43 H_DPWR# H_DPWR# (3)
AM41 AE28 BC13 P1 H_D#44 AA11 F9
VSS_52 VSS_151 VSS_251 VSS_349 H_D#_44 H_DRDY# H_DRDY# (3)
AH41 AB28 BA13 H1 H_D#45 AD11 H9
VSS_53 VSS_152 VSS_252 VSS_350 H_D#_45 H_HIT# H_HIT# (3)
AD41 Y28 H_D#46 AD10 E12
VSS_54 VSS_153 H_D#_46 H_HITM# H_HITM# (3)
AA41 P28 U24 R61 H_D#47 AD13 H11
VSS_55 VSS_154 VSS_351 H_D#_47 H_LOCK# H_LOCK# (3)
Y41 K28 AN13 U28 24.9/F_4 H_D#48 AE12 C9
VSS_56 VSS_155 VSS_255 VSS_352 H_D#_48 H_TRDY# H_TRDY# (3)
U41 H28 AJ13 U25 H_D#49 AE9
VSS_57 VSS_156 VSS_256 VSS_353 H_D#50 H_D#_49
T41 VSS_58 VSS_157 F28 AE13 VSS_257 VSS_354 U29 AA2 H_D#_50
M41 C28 N13 H_D#51 AD8
VSS_59 VSS_158 VSS_258 H_D#52 H_D#_51
G41 VSS_60 VSS_159 BF26 L13 VSS_259 AA3 H_D#_52
B41 AH26 G13 AF32 H_D#53 AD3 J8
VSS_61 VSS_160 VSS_260 VSS_NCTF_1 H_D#_53 H_DINV#_0 H_DINV#0 (3)
BG40 AF26 E13 AB32 H_D#54 AD7 L3
VSS_62 VSS_161 VSS_261 VSS_NCTF_2 H_D#_54 H_DINV#_1 H_DINV#1 (3)
BB40 AB26 BF12 V32 H_D#55 AE14 Y13
VSS_63 VSS_162 VSS_262 VSS_NCTF_3 H_D#_55 H_DINV#_2 H_DINV#2 (3)
AV40 AA26 AV12 AJ30 H_D#56 AF3 Y1
VSS_64 VSS_163 VSS_263 VSS_NCTF_4 H_D#_56 H_DINV#_3 H_DINV#3 (3)
AN40 C26 AT12 AM29 H_D#57 AC1
VSS_65 VSS_164 VSS_264 VSS_NCTF_5 H_D#58 H_D#_57
H40 VSS_66 VSS_165 B26 AM12 VSS_265 VSS_NCTF_6 AF29 AE3 H_D#_58 H_DSTBN#_0 L10 H_DSTBN#0 (3)
E40 BH25 AA12 AB29 H_D#59 AC3 M7 H_DSTBN#1 (3)
VSS NCTF

VSS_67 VSS_166 VSS_266 VSS_NCTF_7 H_D#60 H_D#_59 H_DSTBN#_1


AT39 VSS_68 VSS_167 BD25 J12 VSS_267 VSS_NCTF_8 U26 AE11 H_D#_60 H_DSTBN#_2 AA5 H_DSTBN#2 (3)
AM39 BB25 A12 U23 H_D#61 AE8 AE6
VSS_69 VSS_168 VSS_268 VSS_NCTF_9 H_D#_61 H_DSTBN#_3 H_DSTBN#3 (3)
B AJ39 AV25 BD11 AL20 H_D#62 AG2 B
VSS_70 VSS_169 VSS_269 VSS_NCTF_10 H_D#63 H_D#_62
AE39 VSS_71 VSS_170 AR25 BB11 VSS_270 VSS_NCTF_11 V20 AD6 H_D#_63 H_DSTBP#_0 L9 H_DSTBP#0 (3)
N39 VSS_72 VSS_171 AJ25 AY11 VSS_271 VSS_NCTF_12 AC19 H_DSTBP#_1 M8 H_DSTBP#1 (3)
L39 VSS_73 VSS_172 AC25 AN11 VSS_272 VSS_NCTF_13 AL17 H_DSTBP#_2 AA6 H_DSTBP#2 (3)
B39 Y25 AH11 AJ17 H_SWING C5 AE5
VSS_74 VSS_173 VSS_273 VSS_NCTF_14 H_SWING H_DSTBP#_3 H_DSTBP#3 (3)
BH38 N25 AA17 H_RCOMP E3
VSS_75 VSS_174 VSS_NCTF_15 H_RCOMP H_REQ#[4:0] (3)
BC38 L25 Y11 U17 B15 H_REQ#0
VSS_76 VSS_175 VSS_275 VSS_NCTF_16 H_REQ#_0 H_REQ#1
BA38 VSS_77 VSS_176 J25 N11 VSS_276 H_REQ#_1 K13
AU38 G25 G11 F13 H_REQ#2
VSS_78 VSS_177 VSS_277 +1.05V H_REQ#_2 H_REQ#3
AH38 E25 C11 BH48 B13
VSS SCB

VSS_79 VSS_178 VSS_278 VSS_SCB_1 H_REQ#_3 H_REQ#4


AD38 VSS_80 VSS_179 BF24 BG10 VSS_279 VSS_SCB_2 BH1 (3) H_CPURST# C12 H_CPURST# H_REQ#_4 B14
AA38 VSS_81 VSS_180 AD12 AV10 VSS_280 VSS_SCB_3 A48 (3) H_CPUSLP# E11 H_CPUSLP# H_RS#[2:0] (3)
Y38 AY24 AT10 C1 R72 B6 H_RS#0
VSS_82 VSS_181 VSS_281 VSS_SCB_4 TP15 H_RS#_0
U38 AT24 AJ10 A3 1K/F_4 F12 H_RS#1
VSS_83 VSS_182 VSS_282 VSS_SCB_5 H_RS#_1 H_RS#2
T38 VSS_84 VSS_183 AJ24 AE10 VSS_283 H_RS#_2 C8
J38 AH24 AA10 E1 H_AVREF A11
VSS_85 VSS_184 VSS_284 NC_26 H_AVREF
F38 VSS_86 VSS_185 AF24 M10 VSS_285 NC_27 D2 B11 H_DVREF
C38 AB24 BF9 C3 R70
VSS_87 VSS_186 VSS_286 NC_28 2K/F_4 C569 CANTIGA@MV
BF37 VSS_88 VSS_187 R24 BC9 VSS_287 NC_29 B4
BB37 L24 AN9 A5 .1U/10V_4
VSS_89 VSS_188 VSS_288 NC_30
AW37 VSS_90 VSS_189 K24 AM9 VSS_289 NC_31 A6
AT37 VSS_91 VSS_190 J24 AD9 VSS_290 NC_32 A43
AN37 VSS_92 VSS_191 G24 G9 VSS_291 NC_33 A44
AJ37 F24 B9 B45 H_AVREF
NC

VSS_93 VSS_192 VSS_292 NC_34


H37 VSS_94 VSS_193 E24 BH8 VSS_293 NC_35 C46
C37 VSS_95 VSS_194 BH23 BB8 VSS_294 NC_36 D47
BG36 VSS_96 VSS_195 AG23 AV8 VSS_295 NC_37 B47
BD36 VSS_97 VSS_196 Y23 AT8 VSS_296 NC_38 A46
AK15 VSS_98 VSS_197 B23 NC_39 F48
AU36 VSS_99 VSS_198 A23 NC_40 E48
A AJ6 C48 A
VSS_199 NC_41
NC_42 B48 (2,3,4,6,8,9,18,21,35,38,40) +1.05V
CANTIGA@MV
CANTIGA@MV

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom Cantiga Host & VSS 1/5 1A
Date: Tuesday, May 20, 2008 Sheet 5 of 42
5 4 3 2 1
5 4 3 2 1

06
(2,4,9,10,11,12,14,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V PEG_TX#[15:0]
(8,9,10,34,35,37,38,41) 1.8VSUS PEG_TX#[15:0] (12)
(2,3,4,5,8,9,18,21,35,38,40) +1.05V PEG_TX[15:0]
(2,3,4,5,8,9,18,21,35,38,40) +1.05V_PEG PEG_TX[15:0] (12)
PEG_RX#[15:0]
PEG_RX#[15:0] (12)
MCH_CFG_5 DMIx2 selection UMA & Discrete setting
PEG_RX[15:0]
PEG_RX[15:0] (12)
Low: DMIx2 LVDS Discrete / UMA U24C
U24B
High: DMIx4 (Default) R128 NC 10K +1.05V_PEG
M36 R135 NC 10K

DDR CLK/ CONTROL/COMPENSATION


MCH_CFG_16 FSB Dynamic ODT RSVD1
N36 RSVD2 SA_CK_0 AP24 M_A_CLK0 (10) (23) INT_DPST_PWM L32 L_BKLT_CTRL
Low: Dynamic ODT disabled R33 AT21 G32 T37 PEG_COMP R132 49.9/F_4
RSVD3 SA_CK_1 M_A_CLK1 (10) (23) INT_LVDS_BLON L_BKLT_EN PEG_COMPI
T33 AV24 R128 *10K_4@IV L_CTRL_CLK M32 T36
High: Dynamic ODT enabled (Default) RSVD4 SB_CK_0 M_B_CLK0 (10) L_CTRL_CLK PEG_COMPO
AH9 RSVD5 SB_CK_1 AU20 M_B_CLK1 (10) +3V
D MCH_CFG_9 PCI Express Graphic Lane AH10 R135 *10K_4@IV L_CTRL_DATA M33 D
RSVD6 L_CTRL_DATA PEG_RX#0
AH12 RSVD7 SA_CK#_0 AR24 M_A_CLK0# (10) (23) INT_EDIDCLK K33 L_DDC_CLK PEG_RX#_0 H44
Low: Reverse Lane AH13 AR21 J33 J46 PEG_RX#1
RSVD8 SA_CK#_1 M_A_CLK1# (10) (23) INT_EDIDDATA L_DDC_DATA PEG_RX#_1
K12 AU24 L44 PEG_RX#2
High: Normal operation(Default) RSVD9 SB_CK#_0 M_B_CLK0# (10) (23) INT_DISP_ON PEG_RX#_2
AV20 L40 PEG_RX#3
SB_CK#_1 M_B_CLK1# (10) PEG_RX#_3
MCH_CFG_19 DMI Lane Reversal LVDS Discrete / UMA M29 L_VDD_EN PEG_RX#_4 N41 PEG_RX#4
BC28 R442 *2.37K/F_4@IV LVDS_IBG C44 P48 PEG_RX#5
Low: Normal (Default)
SA_CKE_0
AY28
M_A_CKE0 (10,11) R442 NC 2.37K LVDS_VBG B43 LVDS_IBG PEG_RX#_5
N44 PEG_RX#6
SA_CKE_1 M_A_CKE1 (10,11) TP76 LVDS_VBG PEG_RX#_6

RSVD
T24 AY36 UMA & Discrete setting E37 T43 PEG_RX#7
High: Lane Reserved RSVD14 SB_CKE_0 M_B_CKE0 (10,11) LVDS_VREFH PEG_RX#_7
BB36 E38 U43 PEG_RX#8
SB_CKE_1 M_B_CKE1 (10,11) LVDS_VREFL PEG_RX#_8 PEG_RX#9

LVDS
MCH_CFG_6 iTPM Host Interface B31 RSVD15 (23) LA_CLK# C41 LVDSA_CLK# PEG_RX#_9 Y43
B2 BA17 C40 Y48 PEG_RX#10
RSVD16 SA_CS#_0 M_A_CS#0 (10,11) (23) LA_CLK LVDSA_CLK PEG_RX#_10
Low: iTPM Host Interface enabled M1 AY16 B37 Y36 PEG_RX#11
RSVD17 SA_CS#_1 M_A_CS#1 (10,11) TP72 LVDSB_CLK# PEG_RX#_11
AV16 A37 AA43 PEG_RX#12
High: iTPM Host Interface disabled (Default) SB_CS#_0 M_B_CS#0 (10,11) TP71 LVDSB_CLK PEG_RX#_12
AR13 AD37 PEG_RX#13
SB_CS#_1 M_B_CS#1 (10,11) PEG_RX#_13
MCH_CFG_7 Intel (R) Management Engine Crypto AY21 (23) LA_DATAN0 H47 AC47 PEG_RX#14
RSVD20 LVDSA_DATA#_0 PEG_RX#_14 PEG_RX#15
SA_ODT_0 BD17 M_A_ODT0 (10,11) (23) LA_DATAN1 E46 LVDSA_DATA#_1 PEG_RX#_15 AD39
Low: Intel (R) Management Engine Crypto SA_ODT_1 AY17 M_A_ODT1 (10,11) (23) LA_DATAN2 G40 LVDSA_DATA#_2
LA_DATAN3 PEG_RX0

GRAPHICS
TLS cipher suite with no confidentiality SB_ODT_0 BF15 M_B_ODT0 (10,11) TP73 A40 LVDSA_DATA#_3 PEG_RX_0 H43
BG23 AY13 1.8VSUS J44 PEG_RX1
High: Intel (R) Management Engine Crypto RSVD22 SB_ODT_1 M_B_ODT1 (10,11) PEG_RX_1
BF23 (23) LA_DATAP0 H48 L43 PEG_RX2
RSVD23 SM_RCOMP R98 80.6/F_4 LVDSA_DATA_0 PEG_RX_2 PEG_RX3
TLS cipher suite with no confidentiality (Default) BH18 RSVD24 SM_RCOMP BG22 (23) LA_DATAP1 D45 LVDSA_DATA_1 PEG_RX_3 L41
BF18 BH21 SM_RCOMP# R99 80.6/F_4 (23) LA_DATAP2 F40 N40 PEG_RX4
RSVD25 SM_RCOMP# LA_DATAP3 LVDSA_DATA_2 PEG_RX_4 PEG_RX5
MCH_CFG_10 PCIe Lookback Enable B40 LVDSA_DATA_3 PEG_RX_5 P47
BF28 SM_RCOMP_VOH TP75 N43 PEG_RX6
SM_RCOMP_VOH SM_RCOMP_VOL DREFCLK R168 0_4@EV PEG_RX_6 PEG_RX7
Low: Enabled SM_RCOMP_VOL BH28 TP77 A41 LVDSB_DATA#_0 PEG_RX_7 T42
DREFCLK# R167 0_4@EV H38 U42 PEG_RX8
High: Disabled (Default) TP38 LVDSB_DATA#_1 PEG_RX_8
SM_VREF AV42 +0.9VSMVREF_MCH DREFSSCLK R171 0_4@EV
TP33 G37 LVDSB_DATA#_2 PEG_RX_9 Y42 PEG_RX9
MCH_CFG_12/13 XOR/ALLZ/CLOCK Un-gating SM_PWROK AR36 SW_PWROK_NB R136 10K_4 DREFSSCLK# R170 0_4@EV
TP31 J37 LVDSB_DATA#_3 PEG_RX_10 W47 PEG_RX10
SM_REXT BF17 SM_REXT R91 499/F_4 UMA & Discrete setting PEG_RX_11 Y37 PEG_RX11
MCH_CFG_13 MCH_CFG_12 Configuration SM_DRAMRST# BC36 TP_SM_DRAMRST# TP32 Discrete DREFCLK/ DREFCLK# 0 TP74 B42 LVDSB_DATA_0 PEG_RX_12 AA42 PEG_RX12
G38 AD36 PEG_RX13
DREFCLK
Discrete DREFSSCLK/ DREFSSCLK# 0 TP37 LVDSB_DATA_1 PEG_RX_13 PEG_RX14
0 0 Reserved B38 F37 AC48

PCI-EXPRESS
DPLL_REF_CLK DREFCLK (2) UMA DREFCLK/ DREFCLK# NC TP34 LVDSB_DATA_2 PEG_RX_14
A38 DREFCLK# K37 AD40 PEG_RX15
DPLL_REF_CLK# DREFCLK# (2) TP36 LVDSB_DATA_3 PEG_RX_15
1 0 XOR Mode enabled E41 DREFSSCLK Discrete DREFSSCLK/ DREFSSCLK# NC
C DPLL_REF_SSCLK DREFSSCLK# DREFSSCLK (2) C
J41 C_PEG_TX#0 PEG_TX#0
ME JTAG

F41 C313 .1U/10V_4@EV


CLK
TP35 DPLL_REF_SSCLK# DREFSSCLK# (2) PEG_TX#_0
0 1 All-Z Mode enabled AL34 ME_JTAG_TCK PEG_TX#_1 M46 C_PEG_TX#1 C315 .1U/10V_4@EV PEG_TX#1
F43 R108 0_4@MV F25 M47 C_PEG_TX#2 C321 .1U/10V_4@EV PEG_TX#2
PEG_CLK CLK_PCIE_3GPLL (2) TVA_DAC PEG_TX#_2
1 1 Normal operation (Default) TP28 AK34 E43 R105 0_4@MV H25 M40 C_PEG_TX#3 C296 .1U/10V_4@EV PEG_TX#3
ME_JTAG_TDI PEG_CLK# CLK_PCIE_3GPLL# (2) TVB_DAC PEG_TX#_3
R109 0_4@MV K25 M42 C_PEG_TX#4 C311 .1U/10V_4@EV PEG_TX#4
TVC_DAC PEG_TX#_4
TP27 R48 C_PEG_TX#5 PEG_TX#5

TV
AN35 C318 .1U/10V_4@EV
ME_JTAG_TDO PEG_TX#_5
DMI_TXN[3:0] (19) H24 TV_RTN PEG_TX#_6 N38 C_PEG_TX#6 C298 .1U/10V_4@EV PEG_TX#6
TP25 AM35 AE41 DMI_TXN0 T40 C_PEG_TX#7 C300 .1U/10V_4@EV PEG_TX#7
ME_JTAG_TMS DMI_RXN_0 DMI_TXN1 PEG_TX#_7
DMI_RXN_1 AE37 PEG_TX#_8 U37 C_PEG_TX#8 C302 .1U/10V_4@EV PEG_TX#8
AE47 DMI_TXN2 U40 C_PEG_TX#9 C303 .1U/10V_4@EV PEG_TX#9
DMI_RXN_2 DMI_TXN3 TV_DCONSEL0 PEG_TX#_9
DMI_RXN_3 AH39 R130 *0_4@IV C31 TV_DCONSEL_0 PEG_TX#_10 Y40 C_PEG_TX#10 C319 .1U/10V_4@EV PEG_TX#10
R129 *0_4@IV TV_DCONSEL1 E32 AA46 C_PEG_TX#11 C306 .1U/10V_4@EV PEG_TX#11
DMI_TXP[3:0] (19) TV_DCONSEL_1 PEG_TX#_11
AE40 DMI_TXP0 AA37 C_PEG_TX#12 C309 .1U/10V_4@EV PEG_TX#12
(2) MCH_BSEL0 DMI_RXP_0 PEG_TX#_12
T25 AE38 DMI_TXP1 AA40 C_PEG_TX#13 C323 .1U/10V_4@EV PEG_TX#13
(2) MCH_BSEL1 CFG_0 DMI_RXP_1 PEG_TX#_13
R25 AE48 DMI_TXP2 AD43 C_PEG_TX#14 C325 .1U/10V_4@EV PEG_TX#14
(2) MCH_BSEL2 CFG_1 DMI_RXP_2 PEG_TX#_14
P25 AH40 DMI_TXP3 B-TEST AC46 C_PEG_TX#15 C307 .1U/10V_4@EV PEG_TX#15
MCH_CFG_3 CFG_2 DMI_RXP_3 PEG_TX#_15
P20
DMI

TP16 CFG_3 DMI_RXN[3:0] (19)


TP22 MCH_CFG_4 P24 AE35 DMI_RXN0 INT_CRT_BLU E28 J42 C_PEG_TX0 C314 .1U/10V_4@EV PEG_TX0
CFG_4 DMI_TXN_0 (22) INT_CRT_BLU CRT_BLUE PEG_TX_0
R414 *2.2K_4@NC MCH_CFG_5 C25 AE43 DMI_RXN1 R116 0_4@MV L46 C_PEG_TX1 C316 .1U/10V_4@EV PEG_TX1
R111 *2.2K_4@NC MCH_CFG_6 CFG_5 DMI_TXN_1 DMI_RXN2 INT_CRT_GRN PEG_TX_1
N24 CFG_6 DMI_TXN_2 AE46 (22) INT_CRT_GRN G28 CRT_GREEN PEG_TX_2 M48 C_PEG_TX2 C322 .1U/10V_4@EV PEG_TX2
R110 *2.2K_4@NC MCH_CFG_7 M24 AH42 DMI_RXN3 R123 0_4@MV M39 C_PEG_TX3 C295 .1U/10V_4@EV PEG_TX3
MCH_CFG_8 CFG_7 DMI_TXN_3 INT_CRT_RED PEG_TX_3
TP19 E21 CFG_8 DMI_RXP[3:0] (19) (22) INT_CRT_RED J28 CRT_RED PEG_TX_4 M43 C_PEG_TX4 C312 .1U/10V_4@EV PEG_TX4
R97 *2.2K_4@NC MCH_CFG_9
CFG

DMI_RXP0 R119 0_4@MV

VGA
C23 CFG_9 DMI_TXP_0 AD35 PEG_TX_5 R47 C_PEG_TX5 C317 .1U/10V_4@EV PEG_TX5
R104 *2.2K_4@NC MCH_CFG_10 C24 AE44 DMI_RXP1 G29 N37 C_PEG_TX6 C297 .1U/10V_4@EV PEG_TX6
MCH_CFG_11 CFG_10 DMI_TXP_1 DMI_RXP2 CRT_IRTN PEG_TX_6
N21 AF46 T39 C_PEG_TX7 C299 .1U/10V_4@EV PEG_TX7
R101 *2.2K_4@NC TP20 MCH_CFG_12 P21
CFG_11 DMI_TXP_2
AH43 DMI_RXP3 H32
PEG_TX_7
U36 C_PEG_TX8 C301 .1U/10V_4@EV PEG_TX8
CFG_12 DMI_TXP_3 (22) INT_CRT_DDCCLK CRT_DDC_CLK PEG_TX_8
R100 *2.2K_4@NC MCH_CFG_13 T21 J32 U39 C_PEG_TX9 C304 .1U/10V_4@EV PEG_TX9
CFG_13 (22) INT_CRT_DDCDAT CRT_DDC_DATA PEG_TX_9
TP17 MCH_CFG_14 R20 R117 *33_4@IV HSYNC_INT J29 Y39 C_PEG_TX10 C320 .1U/10V_4@EV PEG_TX10
CFG_14 (22) INT_HSYNC CRT_HSYNC PEG_TX_10
TP18 MCH_CFG_15 M20 R124 0_4@MV CRTIREF E29 Y46 C_PEG_TX11 C305 .1U/10V_4@EV PEG_TX11
R102 *2.2K_4@NC MCH_CFG_16 CFG_15 R121 *33_4@IV VSYNC_INT CRT_TVO_IREF PEG_TX_11
L21 CFG_16 (22) INT_VSYNC L29 CRT_VSYNC PEG_TX_12 AA36 C_PEG_TX12 C310 .1U/10V_4@EV PEG_TX12
MCH_CFG_17 H21 AA39 C_PEG_TX13 C324 .1U/10V_4@EV PEG_TX13
TP21 CFG_17 PEG_TX_13
GRAPHICS VID

MCH_CFG_18 P29 AD42 C_PEG_TX14 C326 .1U/10V_4@EV PEG_TX14


TP24 CFG_18 PEG_TX_14
R114 *2.2K_4@NC MCH_CFG_19 R28 AD46 C_PEG_TX15 C308 .1U/10V_4@EV PEG_TX15
R113 *2.2K_4@NC MCH_CFG_20 CFG_19 GFXVR_VID_0 PEG_TX_15
+3V T28 CFG_20 GFX_VID_0 B33 TP70
B B32 GFXVR_VID_1 B
GFX_VID_1 TP68
G33 GFXVR_VID_2 UMA & Discrete setting CANTIGA@MV
GFX_VID_2 TP26
GFX_VID_3 F33 GFXVR_VID_3
TP29 CRT/TV Discrete / UMA 1.8VSUS
R29 E33 GFXVR_VID_4
(20) PM_SYNC#
B7
PM_SYNC# GFX_VID_4 TP30 ---------------------------
(3,18,40) H_DPRSTP# PM_DPRSTP#
(10,11) PM_EXTTS#0
PM_EXTTS#0 N33 R108 0 75
PM_EXTTS#1 PM_EXT_TS#_0
PM

(11) PM_EXTTS#1 P32 PM_EXT_TS#_1 R105 0 75


AT40 C34 GFXVR_EN R127
(20,40) DELAY_VR_PWRGOOD
R78 100/F_4 RST_IN#_MCH AT11 PWROK GFX_VR_EN TP69 R109 0 75
(12,19) PLT_RST-R# RSTIN#
(3,18) PM_THRMTRIP#
R94 PM_THRMTRIP#_R T20
THERMTRIP#
R130 NC 0 1K/F_4
*0_4@NC R32 +1.05V
(20,40) DPRSLPVR DPRSLPVR R129 NC 0 SM_RCOMP_VOH
B-TEST AH37 R116 0 150
CL_CLK CL_CLK0 (20)

1
CL_DATA AH36 CL_DATA0 (20)
R155 R123 0 150 C223
BG48 AN36 0.35 V 1K/F_4 C220
NC_1 CL_PWROK ECPWROK (20,32) R119 0 150 .01U/16V_4 2.2U/6.3V_6 R125
BF48 AJ35
ME

NC_2 CL_RST# CL_RST#0 (20)


+3V BD48 AH34 MCH_CLVREF R117 NC 33 3.01K/F_4
NC_3 CL_VREF
BC48 NC_4 R121 NC 33

2
BH47
BG47
NC_5 C294 R156 R124 0 1.02K SM_RCOMP_VOL
R134 10K_4 PM_EXTTS#0 NC_6 DDPC_CTRLCLK .1U/10V_4 499/F_4
BE47 NC_7 DDPC_CTRLCLK N28 TP23
BH46 NC_8 DDPC_CTRLDATA M28 R118 *4.7K_4@NC
+3V
C252
R131 10K_4 PM_EXTTS#1 BF46 G36 R417 *4.7K_4@NC C228 R120
NC_9 SDVO_CTRLCLK
NC

BG45 NC_10 SDVO_CTRLDATA E36 R413 *4.7K_4@NC .01U/16V_4 2.2U/6.3V_6


BH44 K36 1K/F_4
MISC

NC_11 CLKREQ# CLK_MCH_OE# (2)


BH43 NC_12 ICH_SYNC# H36 MCH_ICH_SYNC# (20)
BH6 +1.05V
NC_13
BH5 NC_14
BG4 B12 MCH_TSATN R77 56.2/F_4
NC_15 TSATN#
BH3 NC_16
BF3 NC_17
BH2 NC_18
BG2 B28 TP102
C-TEST
NC_19 HDA_BCLK 1.8VSUS
BE2 NC_20 HDA_RST# B30 TP103
A
BG1 NC_21 HDA_SDI B29 TP105 A
BF1 C29
HDA

NC_22 HDA_SDO TP104


BD1 NC_23 HDA_SYNC A28 TP106
BC1 R149
NC_24 *1K/F_4@NC
F1 NC_25
A47 NC_26
CANTIGA@MV +0.9VSMVREF_MCH R150 0_4
+0.9VSMVREF (10,37)
C289
C282 R142 PROJECT :LE9
.1U/10V_4 470P/50V_4 *1K/F_4@NC
Quanta Computer Inc.
Size Document Number Rev
Custom Cantiga DMI/DISP 2/5 3A

Date: Tuesday, May 20, 2008 Sheet 6 of 42


5 4 3 2 1
5 4 3 2 1

07
D D

(10) M_A_DQ[63:0]
U24D
(10) M_B_DQ[63:0]
M_A_DQ0 AJ38 BD21 U24E
SA_DQ_0 SA_BS_0 M_A_BS#0 (10,11)
M_A_DQ1 AJ41 BG18 M_B_DQ0 AK47 BC16
SA_DQ_1 SA_BS_1 M_A_BS#1 (10,11) SB_DQ_0 SB_BS_0 M_B_BS#0 (10,11)
M_A_DQ2 AN38 AT25 M_B_DQ1 AH46 BB17
SA_DQ_2 SA_BS_2 M_A_BS#2 (10,11) SB_DQ_1 SB_BS_1 M_B_BS#1 (10,11)
M_A_DQ3 AM38 M_B_DQ2 AP47 BB33
SA_DQ_3 SB_DQ_2 SB_BS_2 M_B_BS#2 (10,11)
M_A_DQ4 AJ36 BB20 M_B_DQ3 AP46
SA_DQ_4 SA_RAS# M_A_RAS# (10,11) SB_DQ_3
M_A_DQ5 AJ40 BD20 M_B_DQ4 AJ46
SA_DQ_5 SA_CAS# M_A_CAS# (10,11) SB_DQ_4
M_A_DQ6 AM44 AY20 M_B_DQ5 AJ48 AU17
SA_DQ_6 SA_WE# M_A_WE# (10,11) SB_DQ_5 SB_RAS# M_B_RAS# (10,11)
M_A_DQ7 AM42 M_B_DQ6 AM48 BG16
SA_DQ_7 SB_DQ_6 SB_CAS# M_B_CAS# (10,11)
M_A_DQ8 AN43 M_B_DQ7 AP48 BF14
SA_DQ_8 SB_DQ_7 SB_WE# M_B_WE# (10,11)
M_A_DQ9 AN44 M_B_DQ8 AU47
M_A_DQ10 SA_DQ_9 M_B_DQ9 SB_DQ_8
AU40 SA_DQ_10 M_A_DM[7:0] (10) AU46 SB_DQ_9
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ10 BA48
M_A_DQ12 SA_DQ_11 SA_DM_0 M_A_DM1 M_B_DQ11 SB_DQ_10
AN41 SA_DQ_12 SA_DM_1 AT41 AY48 SB_DQ_11 M_B_DM[7:0] (10)
M_A_DQ13 AN39 AY41 M_A_DM2 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ14 SA_DQ_13 SA_DM_2 M_A_DM3 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AU44 SA_DQ_14 SA_DM_3 AU39 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ15 AU42 BB12 M_A_DM4 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ16 SA_DQ_15 SA_DM_4 M_A_DM5 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AV39 SA_DQ_16 SA_DM_5 AY6 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ17 AY44 AT7 M_A_DM6 M_B_DQ16 BC46 BG11 M_B_DM4

B
SA_DQ_17 SA_DM_6 SB_DQ_16 SB_DM_4
M_A_DQ18
M_A_DQ19
BA40
BD43
SA_DQ_18
SA_DQ_19
A SA_DM_7 AJ5 M_A_DM7
M_A_DQS[7:0] (10)
M_B_DQ17
M_B_DQ18
BC44
BG43
SB_DQ_17
SB_DQ_18
SB_DM_5
SB_DM_6
BA3
AP1
M_B_DM5
M_B_DM6
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ19 BF43 AK2 M_B_DM7
M_A_DQ21 SA_DQ_20 SA_DQS_0 M_A_DQS1 M_B_DQ20 SB_DQ_19 SB_DM_7
AY43 SA_DQ_21 SA_DQS_1 AT44 BE45 SB_DQ_20 M_B_DQS[7:0] (10)
M_A_DQ22 BB41 BA43 M_A_DQS2 M_B_DQ21 BC41 AL47 M_B_DQS0

MEMORY
SA_DQ_22 SA_DQS_2 SB_DQ_21 SB_DQS_0
MEMORY
M_A_DQ23 BC40 BC37 M_A_DQS3 M_B_DQ22 BF40 AV48 M_B_DQS1
M_A_DQ24 SA_DQ_23 SA_DQS_3 M_A_DQS4 M_B_DQ23 SB_DQ_22 SB_DQS_1 M_B_DQS2
AY37 SA_DQ_24 SA_DQS_4 AW12 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ25 BD38 BC8 M_A_DQS5 M_B_DQ24 BG38 BG37 M_B_DQS3
C M_A_DQ26 SA_DQ_25 SA_DQS_5 M_A_DQS6 M_B_DQ25 SB_DQ_24 SB_DQS_3 M_B_DQS4 C
AV37 SA_DQ_26 SA_DQS_6 AU8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ27 AT36 AM7 M_A_DQS7 M_B_DQ26 BH35 BB2 M_B_DQS5
SA_DQ_27 SA_DQS_7 M_A_DQS#[7:0] (10) SB_DQ_26 SB_DQS_5
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ27 BG35 AU1 M_B_DQS6
M_A_DQ29 SA_DQ_28 SA_DQS#_0 M_A_DQS#1 M_B_DQ28 SB_DQ_27 SB_DQS_6 M_B_DQS7
BB38 SA_DQ_29 SA_DQS#_1 AT43 BH40 SB_DQ_28 SB_DQS_7 AN6 M_B_DQS#[7:0] (10)
M_A_DQ30 AV36 BA44 M_A_DQS#2 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ31 SA_DQ_30 SA_DQS#_2 M_A_DQS#3 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AW36 SA_DQ_31 SA_DQS#_3 BD37 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ32 BD13 AY12 M_A_DQS#4 M_B_DQ31 BH34 BH41 M_B_DQS#2
M_A_DQ33 SA_DQ_32 SA_DQS#_4 M_A_DQS#5 M_B_DQ32 SB_DQ_31 SB_DQS#_2 M_B_DQS#3
AU11 SA_DQ_33 SA_DQS#_5 BD8 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ34 BC11 AU9 M_A_DQS#6 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ35 SA_DQ_34 SA_DQS#_6 M_A_DQS#7 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
BA12 AM8 BH11 BC2

SYSTEM
SYSTEM

M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ35 SB_DQ_34 SB_DQS#_5 M_B_DQS#6


AU13 SA_DQ_36 M_A_A[14:0] (10,11) BG8 SB_DQ_35 SB_DQS#_6 AT2
M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ36 BH12 AN5 M_B_DQS#7
M_A_DQ38 SA_DQ_37 SA_MA_0 M_A_A1 M_B_DQ37 SB_DQ_36 SB_DQS#_7
BD12 SA_DQ_38 SA_MA_1 BC24 BF11 SB_DQ_37 M_B_A[14:0] (10,11)
M_A_DQ39 BC12 BG24 M_A_A2 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ40 SA_DQ_39 SA_MA_2 M_A_A3 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BB9 SA_DQ_40 SA_MA_3 BH24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ41 BA9 BG25 M_A_A4 M_B_DQ40 BC5 BC25 M_B_A2
M_A_DQ42 SA_DQ_41 SA_MA_4 M_A_A5 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
AU10 SA_DQ_42 SA_MA_5 BA24 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ43 AV9 BD24 M_A_A6 M_B_DQ42 AY3 AW25 M_B_A4
M_A_DQ44 SA_DQ_43 SA_MA_6 M_A_A7 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
BA11 SA_DQ_44 SA_MA_7 BG27 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ45 BD9 BF25 M_A_A8 M_B_DQ44 BF6 AU28 M_B_A6
M_A_DQ46 SA_DQ_45 SA_MA_8 M_A_A9 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
AY8 SA_DQ_46 SA_MA_9 AW24 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ47 BA6 BC21 M_A_A10 M_B_DQ46 BA1 AT33 M_B_A8
M_A_DQ48 SA_DQ_47 SA_MA_10 M_A_A11 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9

DDR
AV5 BG26 BD3 BD33
DDR

M_A_DQ49 SA_DQ_48 SA_MA_11 M_A_A12 M_B_DQ48 SB_DQ_47 SB_MA_9 M_B_A10


AV7 SA_DQ_49 SA_MA_12 BH26 AV2 SB_DQ_48 SB_MA_10 BB16
M_A_DQ50 AT9 BH17 M_A_A13 M_B_DQ49 AU3 AW33 M_B_A11
M_A_DQ51 SA_DQ_50 SA_MA_13 M_A_A14 M_B_DQ50 SB_DQ_49 SB_MA_11 M_B_A12
AN8 SA_DQ_51 SA_MA_14 AY25 AR3 SB_DQ_50 SB_MA_12 AY33
M_A_DQ52 AU5 M_B_DQ51 AN2 BH15 M_B_A13
M_A_DQ53 SA_DQ_52 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU6 SA_DQ_53 AY2 SB_DQ_52 SB_MA_14 AU33
M_A_DQ54 AT5 M_B_DQ53 AV1
M_A_DQ55 SA_DQ_54 M_B_DQ54 SB_DQ_53
AN10 SA_DQ_55 AP3 SB_DQ_54
B M_A_DQ56 AM11 M_B_DQ55 AR1 B
M_A_DQ57 SA_DQ_56 M_B_DQ56 SB_DQ_55
AM5 SA_DQ_57 AL1 SB_DQ_56
M_A_DQ58 AJ9 M_B_DQ57 AL2
M_A_DQ59 SA_DQ_58 M_B_DQ58 SB_DQ_57
AJ8 SA_DQ_59 AJ1 SB_DQ_58
M_A_DQ60 AN12 M_B_DQ59 AH1
M_A_DQ61 SA_DQ_60 M_B_DQ60 SB_DQ_59
AM13 SA_DQ_61 AM2 SB_DQ_60
M_A_DQ62 AJ11 M_B_DQ61 AM3
M_A_DQ63 SA_DQ_62 M_B_DQ62 SB_DQ_61
AJ12 SA_DQ_63 AH3 SB_DQ_62
M_B_DQ63 AJ3
CANTIGA@MV SB_DQ_63
CANTIGA@MV

A A

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Cantiga DDR2 3/5
Date: Tuesday, May 13, 2008 Sheet 7 of 42
5 4 3 2 1
5 4 3 2 1

08
(6,9,10,34,35,37,38,41) 1.8VSUS
U24G
1.8VSUS +1.05V (2,3,4,5,6,9,18,21,35,38,40) +1.05V

AP33 VCC_SM_1 VCC_AXG_NCTF_1 W28 Ivcc_axg=6326.84mA


AN33 VCC_SM_2 VCC_AXG_NCTF_2 V28
BH32 VCC_SM_3 VCC_AXG_NCTF_3 W26

1
BG32 VCC_SM_4 VCC_AXG_NCTF_4 V26
BF32 W25 +
VCC_SM_5 VCC_AXG_NCTF_5 C189 C154 C78 C79 C332 C173 C164
BD32 VCC_SM_6 VCC_AXG_NCTF_6 V25
BC32 W24 C549 *.47U/6.3V_4@IV *1U/6.3V_4@IV *10U/6.3V/X5R_8@IV *10U/6.3V/X5R_8@IV *.1U/10V_4@IV *.1U/10V_4@IV
VCC_SM_7 VCC_AXG_NCTF_7

2
BB32 VCC_SM_8 VCC_AXG_NCTF_8 V24
BA32 W23 *390U/2.5V_6X5.8ESR10@IV *10U/6.3V/X5R_8@IV
VCC_SM_9 VCC_AXG_NCTF_9
AY32 VCC_SM_10 VCC_AXG_NCTF_10 V23
D AW32 AM21 D
VCC_SM_11 VCC_AXG_NCTF_11 U24F
AV32 VCC_SM_12 VCC_AXG_NCTF_12 AL21
AU32 VCC_SM_13 VCC_AXG_NCTF_13 AK21
VCC_SM 3000mA AT32 VCC_SM_14 VCC_AXG_NCTF_14 W21
AR32 VCC_SM_15 VCC_AXG_NCTF_15 V21 Ivcc=1930.4+508.12=2438.52mA
AP32 U21 AG34

POWER
VCC_SM_16 VCC_AXG_NCTF_16 +1.05V VCC_1
AN32 VCC_SM_17 VCC_AXG_NCTF_17 AM20 AC34 VCC_2
BH31 VCC_SM_18 VCC_AXG_NCTF_18 AK20 AB34 VCC_3

POWER
BG31 W20 + C85 AA34
VCC_SM_19 VCC_AXG_NCTF_19 C544 C333 C159 C171 C172 VCC_4
BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20 Y34 VCC_5
BG30 AM19 *330u_2.5V_7343@NC 10U/6.3V/X5R_8 10U/6.3V/X5R_8 .33U/16V/X7R_6 .33U/16V/X7R_6 .1U/10V_4 V34
VCC_SM_21 VCC_AXG_NCTF_21 VCC_6
BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19 U34 VCC_7
BG29 VCC_SM_23 VCC_AXG_NCTF_23 AK19 AM33 VCC_8
BF29 VCC_SM_24 VCC_AXG_NCTF_24 AJ19 AK33 VCC_9
BD29 VCC_SM_25 VCC_AXG_NCTF_25 AH19 QV-TEST change footprint for derating AJ33 VCC_10
BC29
BB29
VCC_SM_26 VCC SM VCC_AXG_NCTF_26 AG19
AF19
AG33
AF33
VCC_11
VCC_SM_27 VCC_AXG_NCTF_27 VCC_12
BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19
AY29 VCC_SM_29 VCC_AXG_NCTF_29 AB19 AE33 VCC_13
AW29 AA19 AC33

VCC CORE
VCC_SM_30 VCC_AXG_NCTF_30 VCC_14
AV29 VCC_SM_31 VCC_AXG_NCTF_31 Y19 AA33 VCC_15
AU29 VCC_SM_32 VCC_AXG_NCTF_32 W19 Y33 VCC_16
AT29 VCC_SM_33 VCC_AXG_NCTF_33 V19 W33 VCC_17
AR29 U19 1.8VSUS V33
VCC_SM_34 VCC_AXG_NCTF_34 VCC_18
AP29 VCC_SM_35 VCC_AXG_NCTF_35 AM17 U33 VCC_19
VCC_SM_36 VCC_AXG_NCTF_36 AK17 AH28 VCC_20
through BA36 VCC_SM_36/NC VCC_AXG_NCTF_37 AH17 AF28 VCC_21
BB24 AG17 AC28
VCC_SM_42 can BD16
VCC_SM_37/NC VCC_AXG_NCTF_38
AF17 C214 C227 C200 C188 C219 AA28
VCC_22
be left as NC for VCC_SM_38/NC VCC_AXG_NCTF_39 VCC_23
BB21 VCC_SM_39/NC VCC_AXG_NCTF_40 AE17 AJ26 VCC_24
C 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 10U/6.3V/X5R_8 .1U/10V_4 C
DDR2 desgins. AW16 VCC_SM_40/NC VCC_AXG_NCTF_41 AC17 AG26 VCC_25
AW13 VCC_SM_41/NC VCC_AXG_NCTF_42 AB17 AE26 VCC_26
AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17 AC26 VCC_27
VCC_AXG_NCTF_44 W17 AH25 VCC_28
+1.05V V17 AG25
VCC GFX NCTF

VCC_AXG_NCTF_45 VCC_29
VCC_AXG_NCTF_46 AM16 AF25 VCC_30
Y26 VCC_AXG_1 VCC_AXG_NCTF_47 AL16 AG24 VCC_31
AE25 AK16 AJ23 +1.05V
VCC_AXG_2 VCC_AXG_NCTF_48 VCC_32
AB25 VCC_AXG_3 VCC_AXG_NCTF_49 AJ16 AH23 VCC_33
AA25 VCC_AXG_4 VCC_AXG_NCTF_50 AH16 AF23 VCC_34
AE24 VCC_AXG_5 VCC_AXG_NCTF_51 AG16 VCC_NCTF_1 AM32
AC24 VCC_AXG_6 VCC_AXG_NCTF_52 AF16 T32 VCC_35 VCC_NCTF_2 AL32
AA24 VCC_AXG_7 VCC_AXG_NCTF_53 AE16 VCC_NCTF_3 AK32
Y24 VCC_AXG_8 VCC_AXG_NCTF_54 AC16 VCC_NCTF_4 AJ32
AE23 VCC_AXG_9 VCC_AXG_NCTF_55 AB16 VCC_NCTF_5 AH32
AC23 VCC_AXG_10 VCC_AXG_NCTF_56 AA16 VCC_NCTF_6 AG32
AB23 VCC_AXG_11 VCC_AXG_NCTF_57 Y16 VCC_NCTF_7 AE32
AA23 VCC_AXG_12 VCC_AXG_NCTF_58 W16 VCC_NCTF_8 AC32
AJ21 VCC_AXG_13 VCC_AXG_NCTF_59 V16 VCC_NCTF_9 AA32
AG21 VCC_AXG_14 VCC_AXG_NCTF_60 U16 VCC_NCTF_10 Y32
AE21 VCC_AXG_15 VCC_NCTF_11 W32
AC21 VCC_AXG_16 VCC_NCTF_12 U32
AA21 VCC_AXG_17 VCC_NCTF_13 AM30
Y21 VCC_AXG_18 VCC_NCTF_14 AL30
AH20 VCC_AXG_19 VCC_NCTF_15 AK30
AF20 VCC_AXG_20 VCC_NCTF_16 AH30
AE20 VCC_AXG_21 VCC_NCTF_17 AG30
AC20 VCC_AXG_22 VCC_NCTF_18 AF30
AB20 VCC_AXG_23 VCC_NCTF_19 AE30
AA20 VCC_AXG_24 VCC_NCTF_20 AC30
B T17 AB30 B
VCC_AXG_25 VCC_NCTF_21
T16 VCC_AXG_26 VCC_NCTF_22 AA30
AM15 VCC_AXG_27 VCC_NCTF_23 Y30
AL15 VCC_AXG_28 VCC_NCTF_24 W30
AE15 V30

VCC NCTF
VCC_AXG_29 VCC_NCTF_25
AJ15 VCC_AXG_30 VCC_NCTF_26 U30
AH15 VCC_AXG_31 VCC_NCTF_27 AL29
AG15 VCC_AXG_32 VCC_NCTF_28 AK29
AF15 VCC_AXG_33 VCC_NCTF_29 AJ29
AB15 VCC_AXG_34 VCC_NCTF_30 AH29
AA15 VCC_AXG_35 VCC_NCTF_31 AG29
VCC GFX

Y15 VCC_AXG_36 VCC_NCTF_32 AE29


V15 VCC_AXG_37 VCC_NCTF_33 AC29
U15 VCC_AXG_38 VCC_NCTF_34 AA29
AN14 VCC_AXG_39 VCC_NCTF_35 Y29
AM14 VCC_AXG_40 VCC_NCTF_36 W29
+1.05V U14 AV44 +VCCSM_LF1 V29
VCC_AXG_41 VCC_SM_LF1 +VCCSM_LF2 VCC_NCTF_37
VCC SM LF

T14 VCC_AXG_42 VCC_SM_LF2 BA37 VCC_NCTF_38 AL28


AM40 +VCCSM_LF3 AK28
VCC_SM_LF3 +VCCSM_LF4 VCC_NCTF_39
VCC_SM_LF4 AV21 VCC_NCTF_40 AL26
R87 AY5 +VCCSM_LF5 AK26
10_4 VCC_SM_LF5 +VCCSM_LF6 VCC_NCTF_41
VCC_SM_LF6 AM10 VCC_NCTF_42 AK25
BB13 +VCCSM_LF7 AK24
VCC_SM_LF7 VCC_NCTF_43
VCC_NCTF_44 AK23
C156 C126 C98 C193 C257 C254 C255
VCC_AXG_SENSE AJ14
VSS_AXG_SENSE VCC_AXG_SENSE .1U/10V_4 .1U/10V_4 .33U/6.3V/X5R_4 .33U/6.3V/X5R_4 .47U/6.3V/X5R_4 1U/6.3V/X5R_4 1U/6.3V/X5R_4
AH14 VSS_AXG_SENSE

R83
A 10_4 CANTIGA@MV A

CANTIGA@MV

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom Cantiga Vcc 4/5 1A

Date: Sunday, May 18, 2008 Sheet 8 of 42


5 4 3 2 1
5 4 3 2 1

09
UMA & Discrete setting UMA & Discrete setting (2,3,4,5,6,8,18,21,35,38,40) +1.05V
PLL Discrete / UMA CRT Discrete / UMA (2,4,6,10,11,12,14,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
--------------------------- --------------------------- VCCA_CRT_DAC 73mA (4,18,19,21,31,34,35,38) +1.5V
(6,8,10,34,35,37,38,41) 1.8VSUS
L18 NC 10uH R421 NC 0 +3V R421 *0_6@IV +3V_A_CRT_DAC
(2,3,4,5,6,8,18,21,35,38,40) +1.05V_PEG
C338 NC 220U C583 0 0.1U +1.05V
U24H VTT 852mA
C330 0 0.1U C582 NC 0.01U C583 C582
L20 NC 10uH 0_4@MV *.01U/16V_4@IV
VTT_1 U13
C337 NC 220U VTT_2 T13

1
B27 U12
C329 0 0.1U A26
VCCA_CRT_DAC_1 VTT_3
T12 C125 C144 C77 C143 +
VCCA_CRT_DAC_2 VTT_4
VCCA_DAC_BG 5mA VTT_5 U11 .47U/6.3V/X5R_4 2.2U/6.3V/X5R_6 4.7U/6.3V/X5R_6 4.7U/6.3V/X5R_6 C566
+1.05V T11 *390U/2.5V_6X5.8ESR10@NC
VTT_6

2
D VCCA_DPLLA/B 64.8mA +1.05V_DPLLA +3V R420 *0_6@IV +3V_A_DAC_BG A25 U10 D

CRT
VCCA_DAC_BG VTT_7
B25 VSSA_DAC_BG VTT_8 T10
L18 UMA & Discrete setting C580 C581
VTT_9 U9
*10uH/100MA_8@IV CRT Discrete / UMA 0_4@MV *.01U/16V_4@IV T9
VTT_10
1

--------------------------- VTT_11 U8 VCC_AXF 321.35mA


C338 + C330 +1.05V_DPLLA F47 T8
*220U/2.5V_3528@IV 0_4@MV R420 NC 0 VCCA_DPLLA VTT_12 +1.05V_AXF
U7 +1.05V

VTT
+1.05V_DPLLB VTT_13
C580 0 0.1U L48 VCCA_DPLLB VTT_14 T7
2

U6 QV-TEST DEL R408


+1.05V_DPLLB C581 NC 0.01U +1.05V_HPLL AD1
VTT_15
T6

PLL
VCCA_HPLL VTT_16 C575 C574
VTT_17 U5
L20 +1.05V_MPLL AE1 T5 1U/6.3V/X5R_4 10U/6.3V/X5R_8
*10uH/100MA_8@IV VCCA_MPLL VTT_18
V3
UMA & Discrete setting VTT_19
1

U3
C337 + C329 LVDS Discrete / UMA +1.8VSUS_TX_LVDS J48
VTT_20
V2
*220U/2.5V_3528@IV 0_4@MV --------------------------- C331 VCCA_LVDS VTT_21
U2

A LVDS
*1000P/50V_4@IV VTT_22
C331 NC 1000P J47 VSSA_LVDS VTT_23 T2
2

V1 VCC_SM_CK 124mA 1.8VSUS


VTT_24 L11
VTT_25 U1
VCCA_PEG_BG 0.414mA +1.8VSUS_SM_CK
+1.05V B-TEST R157 0_6 +1.5V_PEG_BG AD48 1uH/300mA_8
+1.05V_HPLL +1.5V VCCA_PEG_BG
VCCA_HPLL 24mA C288
L8 0_6 .1U/10V_4 R82

A PEG
1/F_6
C226 .1U/10V_4 +1.05V_PEGPLL AA48 C157 C206
C89 C115 +1.05V VCCA_PEG_PLL 10U/6.3V_8 .1U/10V_4 +1.8VSUS_SM_CK_L
4.7U/6.3V/X5R_6 .1U/10V_4 VCCA_SM 720mA
+1.05V_A_SM AR20 C141
VCCA_SM_1 10U/6.3V_8
AP20 VCCA_SM_2
C B-TEST QV-TEST DEL R93 C162 C197 AN20 C
+1.05V_MPLL
+
10U/6.3V/X5R_8 10U/6.3V/X5R_8 AR17
AP17
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
POWER
L9 HCB1608KF-181T15_6 VCCA_MPLL 139.2mA C106 AN17 VCC_TX_LVDS 132mA 1.8VSUS
VCCA_SM_6
AT16 VCCA_SM_7
*220U/2.5V_3528@NC C179 C192 AR16 +1.8VSUS_TX_LVDS L19 UMA & Discrete setting

A SM
VCCA_SM_8
VCCD_HPLL 157.2mA 10U/6.3V/X5R_8 4.7U/6.3V/X5R_6 C169 AP16 VCCA_SM_9
*1uH/300mA_8@IV CRT Discrete / UMA
C335
+1.05V_MCH_PLL R67 0.5/F_6 1U/6.3V/X5R_4 C340 C336 ---------------------------
0_4@MV *10U/6.3V/X5R_8@IV *10U/6.3V/X5R_8@IV L19 NC 1uH
+1.05V C335 0 0.1U
C109 C100 VCCA_SM_CK 124mA
10U/6.3V/X5R_8 .1U/10V_4 C340 NC 10U
+1.05V_A_SM_CK AP28 VCCA_SM_CK_1
C336 NC 10U
AN28 VCCA_SM_CK_2 VCC_AXF_1 B22
QV-TEST DEL R115 AP25 B21

AXF
C218 C222 C208 VCCA_SM_CK_3 VCC_AXF_2
AN25 VCCA_SM_CK_4 VCC_AXF_3 A21
2.2U/6.3V/X5R_6 10U/6.3V/X5R_8 .1U/10V_4 AN24 VCCA_SM_CK_5 +1.05V
AM28 VCCA_SM_CK_NCTF_1
AM26

A CK
VCCA_SM_CK_NCTF_2

2
AM25 VCCA_SM_CK_NCTF_3
+1.5V VCCD_TVDAC 35mA AL25 BF21 D5
VCCA_SM_CK_NCTF_4 VCC_SM_CK_1
UMA & Discrete setting AM24 BH20 RB501V-40

SM CK
VCCA_SM_CK_NCTF_5 VCC_SM_CK_2
R106 0_6 +1.5V_TVDAC TV Discrete / UMA +3V AL24 VCCA_SM_CK_NCTF_6 VCC_SM_CK_3 BG20
--------------------------- VCCA_TV_DAC 79mA AM23 VCCA_SM_CK_NCTF_7 VCC_SM_CK_4 BF20

1
AL23 +1.05V_HV_MCH
C198 C217 C578 0 0.1U L39 +3V_A_TV_DAC VCCA_SM_CK_NCTF_8 +3V_HV
.1U/10V_4 .022U/16V_4 C577 NC 10U *HCB1608KF-181T15_6@IV R96
C577 K47 VCC_HV 105.3mA 10_4
L39 NC HCB1608KF-181 C578 B24
VCC_TX_LVDS +3V_HV +3V
B VCCA_TV_DAC_1 B
VCCD_QDAC 0.5mA *10U/6.3V/X5R_8@IV 0_4@MV A24 VCCA_TV_DAC_2 VCC_HV_1 C35
L13 +1.5V_QDAC

TV
VCC_HV_2 B35
*HCB1608KF-181T15_6@IV C209 UMA & Discrete setting A35

HV
VCC_HV_3
*.1U/10V_4@IV HDA Discrete / UMA VCC_HDA 50mA QV-TEST DEL R439
C210 C212 R429 +1.5V_HDA A32 C592 C593
0_4@MV C213 *1U/6.3V/X5R_4@IV --------------------------- +1.5V *0_6 VCC_HDA .1U/10V_4 .1U/10V_4

HDA
VCC_PEG_1 V48
*.022U/16V_4@IV C587 0 0 C587 U48
0_4 VCC_PEG_2 +1.05V_PEG +1.05V
R429 NC NC B-TEST V47

PEG
VCC_PEG_3
VCC_PEG_4 U47 VCC_PEG 1782mA
UMA & Discrete setting +1.5V_TVDAC

D TV/CRT
M25 VCCD_TVDAC VCC_PEG_5 U46
QDAC Discrete / UMA

1
B-TEST +1.5V_QDAC L28 C224 QV-TEST DEL L21
--------------------------- VCCD_QDAC
AH48 +1.05V_RXR_DMI 4.7U/6.3V/X5R_6 + C247
L13 NC HCB1608KF-181 +1.05V_MPLL VCC_DMI_1 10U/6.3V/X5R_8
AF1 VCCD_HPLL VCC_DMI_2 AF48
C209 NC 0.1U AH47 C347

DMI
VCC_DMI_3

2
C96 +1.05V_PEGPLL AA47 AG47
C210 0 0.1U .1U/10V_4 VCCD_PEG_PLL VCC_DMI_4 *330u_2.5V_7343@NC
C213 NC 0.022U C253
C212 NC 1U .1U/10V_4 M38 VCCD_LVDS_1 VCC_DMI 456mA
+VTTLF_CAP1 +1.05V
LVDS

L37 VCCD_LVDS_2 VTTLF1 A8


L1 +VTTLF_CAP2
VTTLF2
VCCD_LVDS 60.31mA +VTTLF_CAP3

VTTLF
VTTLF3 AB2

1.8VSUS R122 +1.8VSUS_GMCH_VCCD C293 QV-TEST DEL L17


+1.05V_PEGPLL *0_6@IV .1U/10V_4
CANTIGA@MV
+1.05V C216 C230
L14 VCCA/D_PEG_PLL 100mA UMA & Discrete setting
HCB1608KF-181T15_6 LVDS Discrete / UMA 0_4@MV *10U/6.3V/X5R_8@IV +VTTLF_CAP1
+VTTLF_CAP2
A --------------------------- +VTTLF_CAP3 A
R126 R122 NC 0
1/F_6 C216 0 0.1U
C551 C102 C564
C230 NC 10U
.47U/10V/X7R_6 .47U/6.3V/X5R_4 .47U10V/X7R_6
C221
10U/6.3V/X5R_8 PROJECT :LE9
QV-TEST change footprint for derating Quanta Computer Inc.
Size Document Number Rev
Custom Cantiga Power 5/5 3B
Date: Tuesday, May 27, 2008 Sheet 9 of 42
5 4 3 2 1
5 4 3 2 1

1.8VSUS 1.8VSUS
M_B_DM[0..7]
M_B_DQ[0..63]
M_B_DQS[0..7]
M_B_DM[0..7] (7)
M_B_DQ[0..63] (7)
M_B_DQS[0..7] (7)
M_A_DM[0..7]
M_A_DQ[0..63]
M_A_DQS[0..7]
M_A_DM[0..7] (7)
M_A_DQ[0..63] (7)
M_A_DQS[0..7] (7)
10

103
104
111
112
117
118

103
104
111
112
117
118
M_B_DQS#[0..7] M_A_DQS#[0..7]

81
82
87
88
95
96

81
82
87
88
95
96
M_B_A[14..0] M_B_DQS#[0..7] (7) M_A_A[14..0] M_A_DQS#[0..7] (7)
CN14 CN13
M_B_A[14..0] (7,11) M_A_A[14..0] (7,11)
M_B_A0 102 5 M_B_DQ1 M_A_A0 102 5 M_A_DQ1

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
M_B_A1 A0 DQ0 M_B_DQ5 M_A_A1 A0 DQ0 M_A_DQ5
101 A1 DQ1 7 101 A1 DQ1 7
M_B_A2 100 17 M_B_DQ7 M_A_A2 100 17 M_A_DQ3 M_B_CLK0 M_A_CLK0
A2 DQ2 A2 DQ2 M_B_CLK0 (6) M_A_CLK0 (6)
M_B_A3 99 19 M_B_DQ3 M_A_A3 99 19 M_A_DQ2 M_B_CLK0# M_A_CLK0#
A3 DQ3 A3 DQ3 M_B_CLK0# (6) M_A_CLK0# (6)
M_B_A4 98 4 M_B_DQ4 M_A_A4 98 4 M_A_DQ0 M_B_CLK1 M_A_CLK1
A4 DQ4 A4 DQ4 M_B_CLK1 (6) M_A_CLK1 (6)
M_B_A5 97 6 M_B_DQ0 M_A_A5 97 6 M_A_DQ4 M_B_CLK1# M_A_CLK1#
A5 DQ5 A5 DQ5 M_B_BS#[0..2] M_B_CLK1# (6) M_A_BS#[0..2] M_A_CLK1# (6)
M_B_A6 94 14 M_B_DQ6 M_A_A6 94 14 M_A_DQ6
A6 DQ6 A6 DQ6 M_B_ODT[0..1] M_B_BS#[0..2] (7,11) M_A_ODT[0..1] M_A_BS#[0..2] (7,11)
M_B_A7 92 16 M_B_DQ2 M_A_A7 92 16 M_A_DQ7
A7 DQ7 A7 DQ7 M_B_ODT[0..1] (6,11) M_A_ODT[0..1] (6,11)
D M_B_A8 93 23 M_B_DQ9 M_A_A8 93 23 M_A_DQ9 D
M_B_A9 A8 DQ8 M_B_DQ8 M_A_A9 A8 DQ8 M_A_DQ8 M_B_CKE[0..1] M_A_CKE[0..1]
91 A9 DQ9 25 91 A9 DQ9 25 M_B_CKE[0..1] (6,11) M_A_CKE[0..1] (6,11)
M_B_A10 105 35 M_B_DQ14 M_A_A10 105 35 M_A_DQ14 M_B_CS#[0..1] M_A_CS#[0..1]
A10 DQ10 A10 DQ10 M_B_CS#[0..1] (6,11) M_A_CS#[0..1] (6,11)
M_B_A11 90 37 M_B_DQ10 M_A_A11 90 37 M_A_DQ15
M_B_A12 A11 DQ11 M_B_DQ13 M_A_A12 A11 DQ11 M_A_DQ12 M_B_RAS# M_A_RAS#
89 A12 DQ12 20 89 A12 DQ12 20 M_B_RAS# (7,11) M_A_RAS# (7,11)
M_B_A13 116 22 M_B_DQ12 M_A_A13 116 22 M_A_DQ13 M_B_CAS# M_A_CAS#
A13 DQ13 A13 DQ13 M_B_CAS# (7,11) M_A_CAS# (7,11)
M_B_A14 86 36 M_B_DQ11 M_A_A14 86 36 M_A_DQ10 M_B_WE# M_A_WE#
A14 DQ14 A14 DQ14 M_B_WE# (7,11) M_A_WE# (7,11)
84 38 M_B_DQ15 84 38 M_A_DQ11
A15 DQ15 M_B_DQ21 A15 DQ15 M_A_DQ16
DQ16 43 DQ16 43
M_B_BS#0 107 45 M_B_DQ17 M_A_BS#0 107 45 M_A_DQ20 CGCLK_SMB
BA0 DQ17 BA0 DQ17 CGCLK_SMB (2,11,31)
M_B_BS#1 106 55 M_B_DQ19 M_A_BS#1 106 55 M_A_DQ18 CGDAT_SMB
BA1 DQ18 BA1 DQ18 CGDAT_SMB (2,11,31)
M_B_BS#2 85 57 M_B_DQ23 M_A_BS#2 85 57 M_A_DQ19
BA2 DQ19 M_B_DQ20 BA2 DQ19 M_A_DQ21
DQ20 44 DQ20 44
M_B_DM0 10 46 M_B_DQ16 M_A_DM0 10 46 M_A_DQ17
M_B_DM1 DM0 DQ21 M_B_DQ18 M_A_DM1 DM0 DQ21 M_A_DQ23
26 DM1 DQ22 56 26 DM1 DQ22 56
M_B_DM2 52 58 M_B_DQ22 M_A_DM2 52 58 M_A_DQ22
M_B_DM3 DM2 DQ23 M_B_DQ28 M_A_DM3 DM2 DQ23 M_A_DQ25
67 DM3 DQ24 61 67 DM3 DQ24 61
M_B_DM4 130 63 M_B_DQ24 M_A_DM4 130 63 M_A_DQ24
M_B_DM5 DM4 DQ25 M_B_DQ26 M_A_DM5 DM4 DQ25 M_A_DQ27
147 DM5 DQ26 73 147 DM5 DQ26 73
M_B_DM6 170 75 M_B_DQ27 M_A_DM6 170 75 M_A_DQ26 C290 +0.9VSMVREF_DIM R148 0_6
DM6 DQ27 DM6 DQ27 +0.9VSMVREF (6,37)
M_B_DM7 185 62 M_B_DQ29 M_A_DM7 185 62 M_A_DQ28 470P/50V_4
DM7 DQ28 M_B_DQ25 DM7 DQ28 M_A_DQ29
DQ29 64 DQ29 64
M_B_DQS0 13 74 M_B_DQ31 M_A_DQS0 13 74 M_A_DQ31 R146 R147 1.8VSUS
M_B_DQS1 DQS0 DQ30 M_B_DQ30 M_A_DQS1 DQS0 DQ30 M_A_DQ30 *10K/F_4@NC *10K/F_4@NC
31 DQS1 DQ31 76 31 DQS1 DQ31 76
M_B_DQS2 51 123 M_B_DQ36 M_A_DQS2 51 123 M_A_DQ37
M_B_DQS3 DQS2 DQ32 M_B_DQ33 M_A_DQS3 DQS2 DQ32 M_A_DQ33
70 DQS3 DQ33 125 70 DQS3 DQ33 125
M_B_DQS4 131 135 M_B_DQ35 M_A_DQS4 131 135 M_A_DQ38
M_B_DQS5 DQS4 DQ34 M_B_DQ39 M_A_DQS5 DQS4 DQ34 M_A_DQ39
148 DQS5 DQ35 137 148 DQS5 DQ35 137
M_B_DQS6 169 124 M_B_DQ37 M_A_DQS6 169 124 M_A_DQ32
M_B_DQS7 DQS6 DQ36 M_B_DQ32 M_A_DQS7 DQS6 DQ36 M_A_DQ36
188 DQS7 DQ37 126 188 DQS7 DQ37 126
C 134 M_B_DQ34 134 M_A_DQ35 1.8VSUS C
M_B_DQS#0 11
DQ38
136 M_B_DQ38 M_A_DQS#0 11
DQ38
136 M_A_DQ34 Place these Caps near So-Dimm1.
M_B_DQS#1 DQS0 DQ39 M_B_DQ41 M_A_DQS#1 DQS0 DQ39 M_A_DQ40
29 DQS1 DQ40 141 29 DQS1 DQ40 141
M_B_DQS#2 49 143 M_B_DQ40 M_A_DQS#2 49 143 M_A_DQ41
M_B_DQS#3 DQS2 DQ41 M_B_DQ42 M_A_DQS#3 DQS2 DQ41 M_A_DQ46
68 DQS3 DQ42 151 68 DQS3 DQ42 151
M_B_DQS#4 129 153 M_B_DQ43 M_A_DQS#4 129 153 M_A_DQ42
M_B_DQS#5 DQS4 DQ43 M_B_DQ45 M_A_DQS#5 DQS4 DQ43 M_A_DQ45 C571 C570
146 DQS5 DQ44 140 146 DQS5 DQ44 140
M_B_DQS#6 167 142 M_B_DQ44 M_A_DQS#6 167 142 M_A_DQ44 2.2U/6.3V/X5R_6 C562 C556 C546 C532 C68 C76 C88 C113 C131 .1U/10V_4
M_B_DQS#7 DQS6 DQ45 M_B_DQ46 M_A_DQS#7 DQS6 DQ45 M_A_DQ43
186 DQS7 DQ46 152 186 DQS7 DQ46 152
154 M_B_DQ47 154 M_A_DQ47 2.2U/6.3V/X5R_6 2.2U/6.3V/X5R_6 .1U/10V_4 .1U/10V_4 .1U/10V_4
DQ47 M_B_DQ53 DQ47 M_A_DQ48 2.2U/6.3V/X5R_6 2.2U/6.3V/X5R_6 .1U/10V_4 .1U/10V_4
DQ48 157 DQ48 157
M_B_CLK0 30 159 M_B_DQ49 M_A_CLK0 30 159 M_A_DQ49
M_B_CLK0# CK0 DQ49 M_B_DQ55 M_A_CLK0# CK0 DQ49 M_A_DQ51
32 CK0 DQ50 173 32 CK0 DQ50 173
M_B_CLK1 164 175 M_B_DQ54 M_A_CLK1 164 175 M_A_DQ55 +0.9VSMVREF_DIM +3V
M_B_CLK1# CK1 DQ51 M_B_DQ48 M_A_CLK1# CK1 DQ51 M_A_DQ53
166 CK1 DQ52 158 166 CK1 DQ52 158
160 M_B_DQ52 160 M_A_DQ52
M_B_CKE0 DQ53 M_B_DQ51 M_A_CKE0 DQ53 M_A_DQ50
79 CKE0 DQ54 174 79 CKE0 DQ54 174 SO-DIMM BYPASS PLACEMENT :
M_B_CKE1 80 176 M_B_DQ50 M_A_CKE1 80 176 M_A_DQ54
CKE1 DQ55 M_B_DQ57 CKE1 DQ55 M_A_DQ56 C284 C287 C17 C16
DQ56 179 DQ56 179 Place these Caps near So-Dimm1.
M_B_RAS# 108 181 M_B_DQ60 M_A_RAS# 108 181 M_A_DQ57 .1U/10V_4 2.2U/6.3V/X5R_6 .1U/10V_4
M_B_CAS# RAS DQ57 M_B_DQ58 M_A_CAS# RAS DQ57 M_A_DQ62
113 CAS DQ58 189 113 CAS DQ58 189 No Vias Between the Trace of PIN to CAP.
M_B_WE# 109 191 M_B_DQ59 M_A_WE# 109 191 M_A_DQ63 2.2U/6.3V/X5R_6
M_B_CS#0 WE DQ59 M_B_DQ56 M_A_CS#0 WE DQ59 M_A_DQ61
110 180 110 180
SO-DIMM

SO-DIMM
M_B_CS#1 S0 DQ60 M_B_DQ61 M_A_CS#1 S0 DQ60 M_A_DQ60
115 S1 DQ61 182 115 S1 DQ61 182
192 M_B_DQ63 192 M_A_DQ58
M_B_ODT0 DQ62 M_B_DQ62 M_A_ODT0 DQ62 M_A_DQ59
114 ODT0 DQ63 194 114 ODT0 DQ63 194
M_B_ODT1 119 M_A_ODT1 119 1.8VSUS
ODT1
NC1 50 PM_EXTTS#0 (6,11)
ODT1
NC1 50 PM_EXTTS#0 Place these Caps near So-Dimm2.
DIM2_SA0 198 69 DIM1_SA0 198 69
(Rvs)

(Rvs)
DIM2_SA1 SA0 NC2 DIM1_SA1 SA0 NC2
200 SA1 NC3 83 200 SA1 NC3 83
B 120 120 B
CGDAT_SMB NC4 CGDAT_SMB NC4
195 SDA NC/TEST 163 195 SDA NC/TEST 163
CGCLK_SMB 197 CGCLK_SMB 197 C573 C555 C541
SCL SCL 2.2U/6.3V/X5R_6 C550 C561 C560 C554 C565 C568 C572 .1U/10V_4
C543
+3V 199 VDDspd +3V 199 VDDspd 2.2U/6.3V/X5R_6 2.2U/6.3V/X5R_6 .1U/10V_4 .1U/10V_4 .1U/10V_4
1 196 1 196 2.2U/6.3V/X5R_6 2.2U/6.3V/X5R_6 .1U/10V_4 .1U/10V_4
+0.9VSMVREF_DIM VREF VSS56 +0.9VSMVREF_DIM VREF VSS56
VSS55 193 VSS55 193
2 VSS0 VSS54 190 2 VSS0 VSS54 190
3 187 3 187 +0.9VSMVREF_DIM +3V
VSS1 VSS53 VSS1 VSS53
8 VSS2 VSS52 184 8 VSS2 VSS52 184
9 VSS3 VSS51 183 9 VSS3 VSS51 183
12 VSS4 VSS50 178 12 VSS4 VSS50 178 SO-DIMM BYPASS PLACEMENT :
15 VSS5 VSS49 177 15 VSS5 VSS49 177
18 172 18 172 C283 C286 C18 C15 Place these Caps near So-Dimm2
VSS6 VSS48 VSS6 VSS48 .1U/10V_4 2.2U/6.3V/X5R_6 .1U/10V_4
21 VSS7 VSS47 171 21 VSS7 VSS47 171
24 VSS8 VSS46 168 24 VSS8 VSS46 168 No Vias Between the Trace of PIN to CAP.
27 165 27 165 2.2U/6.3V/X5R_6
VSS9 VSS45 VSS9 VSS45
28 VSS10 VSS44 162 28 VSS10 VSS44 162
33 VSS11 VSS43 161 33 VSS11 VSS43 161
34 VSS12 VSS42 156 34 VSS12 VSS42 156
39 VSS13 VSS41 155 39 VSS13 VSS41 155
40 VSS14 VSS40 150 40 VSS14 VSS40 150
41 VSS15 VSS39 149 41 VSS15 VSS39 149
42 145 DIM2_SA0 R367 10K_4 42 145 R6 10K_4 DIM1_SA0
VSS16 VSS38 DIM2_SA1 R366 10K_4 VSS16 VSS38 R7 10K_4 DIM1_SA1
47 VSS17 VSS37 144 +3V 47 VSS17 VSS37 144
48 VSS18 VSS36 139 48 VSS18 VSS36 139
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

53 VSS19 VSS35 138 SMbus address A4 53 VSS19 VSS35 138 SMbus address A0
54 VSS20 VSS34 133 54 VSS20 VSS34 133
A FOX=AS0A426-M2S-TR FOX=AS0A426-MAS-TR A
59
60
65
66
71
72
77
78
121
122
127
128
132

59
60
65
66
71
72
77
78
121
122
127
128
132

H 9.2
H 5.2 PROJECT :LE9
Quanta Computer Inc.
(6,8,9,34,35,37,38,41) 1.8VSUS Size Document Number Rev
(2,4,6,9,11,12,14,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V Custom 1A
DDR2 DIMM
Date: Tuesday, May 27, 2008 Sheet 10 of 42
5 4 3 2 1
5 4 3 2 1

(34,35,37) SMDDR_VTERM
(2,4,6,9,10,12,14,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
11
DDRII DUAL CHANNEL A,B.
D D

DDRII B CHANNEL
DDRII A CHANNEL

SMDDR_VTERM SMDDR_VTERM

C70 C86 C114 C64 C87 C127 C55 C107 C75 C119 C151 C84 C94 C80
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4

SMDDR_VTERM
SMDDR_VTERM

C117 C72 C90 C97 C53 C67


C49 C139 C81 C118 C136 C99 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4

C C

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

RP11 1 2 56X2 SMDDR_VTERM


(7,10) M_B_RAS#
M_A_A13 RP3 1 2 56X2 M_B_A0 3 4
SMDDR_VTERM M_B_A3 RP13
(6,10) M_A_CS#0 3 4 1 2 56X2
M_A_A9 RP19 1 2 56X2 M_B_A1 3 4
M_A_A5 3 4 M_B_A8 RP17 1 2 56X2
M_A_A3 RP14 1 2 56X2 M_B_A5 3 4
M_A_A1 3 4
M_B_A2 RP15 1 2 56X2
RP24 1 2 56X2 M_B_A4 3 4
(6,10) M_A_CKE1
M_A_A12 3 4 M_B_A12 RP21 1 2 56X2
RP10 1 2 56X2 3 4
(7,10) M_A_BS#0 (7,10) M_B_BS#2
M_A_A10 3 4 M_B_A7 RP18 1 2 56X2
M_A_A7 RP20 1 2 56X2 M_B_A6 3 4
M_A_A11 3 4 M_B_A9 RP25 1 2 56X2
M_A_A4 RP16 1 2 56X2 (6,10) M_B_CKE0 3 4
M_A_A2 3 4
(6,10) M_B_ODT0 RP7 1 2 56X2
(6,10) M_A_ODT0 RP8 1 2 56X2 3 4
(7,10) M_B_BS#1
3 4 (7,10) M_B_CAS# RP5 1 2 56X2
(7,10) M_A_BS#1
M_A_A6 RP22 1 2 56X2 (7,10) M_B_WE# 3 4
M_A_A8 3 4 M_B_A10 RP9 1 2 56X2
B RP6 1 2 56X2 3 4 B
(7,10) M_A_WE# (7,10) M_B_BS#0
(7,10) M_A_CAS# 3 4
RP12 1 2 56X2
(7,10) M_A_RAS#
M_A_A14 R80 56.2/F_4 M_A_A0 3 4
M_B_A13 RP4 1 2 56X2
M_B_A14 R68 56.2/F_4 (6,10) M_B_CS#0 3 4
(6,10) M_B_ODT1 RP1 1 2 56X2
(6,10) M_B_CS#1 3 4
RP2 1 2 56X2
(6,10) M_A_CS#1
(6,10) M_A_ODT1 3 4
M_B_A11 RP23 1 2 56X2
(6,10) M_B_CKE1 3 4
+3V RP26 1 2 56X2
Uninstall (7,10) M_A_BS#2
(6,10) M_A_CKE0 3 4

R18 C511
*200_4@NC *.01U/16V_4@NC M_B_A[14..0]
M_B_A[14..0] (7,10)
U1
M_A_A[14..0]
M_A_A[14..0] (7,10)
1

(2,10,31) CGCLK_SMB CGCLK_SMB 8 1 LM86_3V


SCLK VCC DDR_THERMDA Q18
2
CGDAT_SMB 7 2 *MMBT3904-7-F@NC
(2,10,31) CGDAT_SMB SDA DXP
3

(6,10) PM_EXTTS#0 PM_EXTTS#0 6 3


ALERT# DXN

(6) PM_EXTTS#1 R23 PM_EXTTS#1_D 4 5 DDR_THERMDC


OVERT# GND
*0_4@NC
A *LM86CIMM@NC A

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom DDR2 termination 1A

Date: Thursday, May 08, 2008 Sheet 11 of 42


5 4 3 2 1
5 4 3 2 1

NB9M-NS (G98)
(35,41) +VGACORE
(13,14,35,41) +VGA1.1V
(2,4,6,9,10,11,14,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
12
U23A
+VGA1.1V R440 0_4@EV
1/13 PCI_EXPRESS
T8 D17
AC9 PEX_IOVDD_01 RFU_6 AE9
AD7 AD9 VGA_RST# 1 2 PLT_RST-R#
PEX_IOVDD_02 PEX_RST* PLT_RST-R# (6,19)
AD8 *RB501V-40@NC
D
C272 C281 C205 C211 C204 C604 PEX_IOVDD_03 D
AE7 PEX_IOVDD_04
10U/6.3V/X5R_8@EV 4.7U/6.3V/X5R_6@EV 1U/6.3V/X5R_4@EV 1U/6.3V/X5R_4@EV .1U/10V_4@EV .1U/10V_4@EV AF7 AB10 CLK_PCIE_VGA R441
PEX_IOVDD_05 PEX_REFCLK CLK_PCIE_VGA (2)
AG7 AC10 CLK_PCIE_VGA# *100K/F_4@NC
PEX_IOVDD_06 PEX_REFCLK* CLK_PCIE_VGA# (2)
PEX_IOVDD/Q 1400mA AD10 C_PEG_RX0 C244 .1U/10V_4@EV
PEX_TX0 PEG_RX0 (6)
AB13 AD11 C_PEG_RX#0 C243 .1U/10V_4@EV
PEX_IOVDDQ_01 PEX_TX0* PEG_RX#0 (6)
AB16 AD12 C_PEG_RX1 C245 .1U/10V_4@EV
PEX_IOVDDQ_02 PEX_TX1 PEG_RX1 (6)
AB17 AC12 C_PEG_RX#1 C246 .1U/10V_4@EV
+VGA1.1V PEX_IOVDDQ_03 PEX_TX1* PEG_RX#1 (6)
AB7 AB11 C_PEG_RX2 C270 .1U/10V_4@EV
PEX_IOVDDQ_04 PEX_TX2 PEG_RX2 (6)
AB8 AB12 C_PEG_RX#2 C269 .1U/10V_4@EV
Near BGA AB9
PEX_IOVDDQ_05 PEX_TX2*
AD13 C_PEG_RX3 C242 .1U/10V_4@EV
PEG_RX#2 (6)
PEX_IOVDDQ_06 PEX_TX3 PEG_RX3 (6)
C202 AC13 AD14 C_PEG_RX#3 C241 .1U/10V_4@EV
PEX_IOVDDQ_07 PEX_TX3* PEG_RX#3 (6)
C276 C598 C599 C274 .1U/10V_4@EV C207 AC7 AD15 C_PEG_RX4 C249 .1U/10V_4@EV
PEX_IOVDDQ_08 PEX_TX4 PEG_RX4 (6)
AD6 AC15 C_PEG_RX#4 C248 .1U/10V_4@EV
PEX_IOVDDQ_09 PEX_TX4* PEG_RX#4 (6)
10U/6.3V/X5R_8@EV 4.7U/6.3V/X5R_6@EV 1U/6.3V/X5R_4@EV 1U/6.3V/X5R_4@EV C603 .1U/10V_4@EV AE6 AB14 C_PEG_RX5 C267 .1U/10V_4@EV
PEX_IOVDDQ_10 PEX_TX5 PEG_RX5 (6)
.1U/10V_4@EV AF6 AB15 C_PEG_RX#5 C268 .1U/10V_4@EV
PEX_IOVDDQ_11 PEX_TX5* PEG_RX#5 (6)
AG6 AC16 C_PEG_RX6 C266 .1U/10V_4@EV
PEX_IOVDDQ_12 PEX_TX6 PEG_RX6 (6)
AD16 C_PEG_RX#6 C265 .1U/10V_4@EV
PEX_TX6* PEG_RX#6 (6)
AD17 C_PEG_RX7 C251 .1U/10V_4@EV
PEX_TX7 PEG_RX7 (6)
AD18 C_PEG_RX#7 C250 .1U/10V_4@EV
PEX_TX7* PEG_RX#7 (6)
AC18 C_PEG_RX8 C264 .1U/10V_4@EV
PEX_TX8 PEG_RX8 (6)
AB18 C_PEG_RX#8 C263 .1U/10V_4@EV
PEX_TX8* PEG_RX#8 (6)
J10 AB19 C_PEG_RX9 C240 .1U/10V_4@EV
+VGACORE VDD_01 PEX_TX9 PEG_RX9 (6)
QV-TEST change footprint for derating VDD 11.57A J12 VDD_02 PEX_TX9* AB20 C_PEG_RX#9 C239 .1U/10V_4@EV
PEG_RX#9 (6)
J13 AD19 C_PEG_RX10 C238 .1U/10V_4@EV
PLACE NEAR BALLS Near BGA J9
VDD_03 PEX_TX10
AD20 C_PEG_RX#10 C237 .1U/10V_4@EV
PEG_RX10 (6)
VDD_04 PEX_TX10* PEG_RX#10 (6)
L9 AD21 C_PEG_RX11 C236 .1U/10V_4@EV
VDD_05 PEX_TX11 PEG_RX11 (6)
C194 M11 AC21 C_PEG_RX#11 C235 .1U/10V_4@EV
VDD_06 PEX_TX11* PEG_RX#11 (6)
C161 C184 C196 .1U/10V_4@EV M17 AB21 C_PEG_RX12 C262 .1U/10V_4@EV
VDD_07 PEX_TX12 PEG_RX12 (6)
C C149 M9 AB22 C_PEG_RX#12 C261 .1U/10V_4@EV C
VDD_08 PEX_TX12* PEG_RX#12 (6)
4.7U/6.3V/X5R_6@EV 1U/6.3V/X5R_4@EV .47U/10V/X7R_6@EV .1U/10V_4@EV C195 N11 AC22 C_PEG_RX13 C260 .1U/10V_4@EV
VDD_09 PEX_TX13 PEG_RX13 (6)
.1U/10V_4@EV N12 AD22 C_PEG_RX#13 C259 .1U/10V_4@EV
VDD_10 PEX_TX13* PEG_RX#13 (6)
N13 AD23 C_PEG_RX14 C234 .1U/10V_4@EV
VDD_11 PEX_TX14 PEG_RX14 (6)
N14 AD24 C_PEG_RX#14 C233 .1U/10V_4@EV
VDD_12 PEX_TX14* PEG_RX#14 (6)
N15 AE25 C_PEG_RX15 C232 .1U/10V_4@EV
VDD_13 PEX_TX15 PEG_RX15 (6)
C167 N16 AE26 C_PEG_RX#15 C231 .1U/10V_4@EV
VDD_14 PEX_TX15* PEG_RX#15 (6)
C203 C181 C170 .1U/10V_4@EV N17
C147 VDD_15
N19 VDD_16
4.7U/6.3V/X5R_6@EV 1U/6.3V/X5R_4@EV .1U/10V_4@EV .1U/10V_4@EV C166 N9
.1U/10V_4@EV VDD_17
P11 VDD_18
P12 VDD_19
P13 VDD_20
P14 VDD_21
C168 P15
C538 C535 C537 .1U/10V_4@EV VDD_22 PEG_TX0
P16 VDD_23 PEX_RX0 AE12 PEG_TX0 (6)
C533 P17 AF12 PEG_TX#0
VDD_24 PEX_RX0* PEG_TX#0 (6)
4.7U/6.3V/X5R_6@EV 1U/6.3V/X5R_4@EV .1U/10V_4@EV .1U/10V_4@EV C534 R11 AG12 PEG_TX1
VDD_25 PEX_RX1 PEG_TX1 (6)
.1U/10V_4@EV R12 AG13 PEG_TX#1
VDD_26 PEX_RX1* PEG_TX#1 (6)
R13 AF13 PEG_TX2
VDD_27 PEX_RX2 PEG_TX2 (6)
R14 AE13 PEG_TX#2
VDD_28 PEX_RX2* PEG_TX#2 (6)
R15 AE15 PEG_TX3
VDD_29 PEX_RX3 PEG_TX3 (6)
R16 AF15 PEG_TX#3
VDD_30 PEX_RX3* PEG_TX#3 (6)
+ R17 AG15 PEG_TX4
VDD_31 PEX_RX4 PEG_TX4 (6)
C527 C536 C187 C160 R9 AG16 PEG_TX#4
VDD_32 PEX_RX4* PEG_TX#4 (6)
*100U/10V_7343@NC .1U/10V_4@EV .1U/10V_4@EV .1U/10V_4@EV T11 AF16 PEG_TX5
VDD_33 PEX_RX5 PEG_TX5 (6)
T17 AE16 PEG_TX#5
VDD_34 PEX_RX5* PEG_TX#5 (6)
T9 AE18 PEG_TX6
VDD_35 PEX_RX6 PEG_TX6 (6)
U19 AF18 PEG_TX#6
VDD_36 PEX_RX6* PEG_TX#6 (6)
U9 AG18 PEG_TX7
B VDD_37 PEX_RX7 PEG_TX7 (6) B
W10 AG19 PEG_TX#7
VDD_38 PEX_RX7* PEG_TX#7 (6)
W12 AF19 PEG_TX8
VDD_39 PEX_RX8 PEG_TX8 (6)
W13 AE19 PEG_TX#8
VDD_40 PEX_RX8* PEG_TX#8 (6)
W18 AE21 PEG_TX9
VDD_41 PEX_RX9 PEG_TX9 (6)
W19 AF21 PEG_TX#9
VDD_42 PEX_RX9* PEG_TX#9 (6)
W9 AG21 PEG_TX10
VDD_43 PEX_RX10 PEG_TX10 (6)
AG22 PEG_TX#10
PEX_RX10* PEG_TX#10 (6)
AF22 PEG_TX11
PEX_RX11 PEG_TX11 (6)
T10 W15 AE22 PEG_TX#11
VDD_SENSE PEX_RX11* PEG_TX#11 (6)
T9 W16 AE24 PEG_TX12
+3V GND_SENSE PEX_RX12 PEG_TX12 (6)
AF24 PEG_TX#12
PEX_RX12* PEG_TX#12 (6)
AG24 PEG_TX13
PEX_RX13 PEG_TX13 (6)
A12 AF25 PEG_TX#13
VDD33_01 PEX_RX13* PEG_TX#13 (6)
B12 AG25 PEG_TX14
VDD33_02 PEX_RX14 PEG_TX14 (6)
C12 AG26 PEG_TX#14
VDD33_03 PEX_RX14* PEG_TX#14 (6)
C547 C548 C111 D12 AF27 PEG_TX15
VDD33_04 PEX_RX15 PEG_TX15 (6)
1U/6.3V/X5R_4@EV .1U/10V_4@EV .1U/10V_4@EV E12 AE27 PEG_TX#15
+VGA1.1V VDD33_05 PEX_RX15* PEG_TX#15 (6)
F12 VDD33_06
+PEX_PLLVDD 110mA
L42 10nH_6@EV +PEX_PLLVDD AF9 PEX_PLLVDD
C595
C280 C278 R133 *200/F_4@NC AE10
C591 4.7U/6.3V/X5R_6@EV 1U/6.3V/X5R_4@EV .1U/10V_4@EV C279 PEX_TSTCLK_OUT*
AF10 PEX_TSTCLK_OUT
4.7U/6.3V/X5R_6@EV .01U/16V_4@EV
T40 AG9 RFU_5
R430 2.49K/F_4@EV PEX_TERMP AG10 PEX_TERMP
A A

NB9M-NS@EV

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom 3B
NV9X (PCIE I/F) 1/5
Date: Tuesday, May 27, 2008 Sheet 12 of 42
5 4 3 2 1
5 4 3 2 1

(17) VMA_DQ[63..0]
VMA_DQ0
VMA_DQ1
D21
U23B
2/13 FRAME_BUFFER
FBA_D0
FBVDDQ_01
FBVDDQ_02
A13
B13
+1.8V
FBVDDQ 1720mA
(14,17,35,37) +1.8V

C130
13
(17) VMA_DM[7..0] C22 FBA_D1 FBVDDQ_03 C13
VMA_DQ2 B22 D13 C92 C185 C199 C165 C158 C152 C142 .1U/10V_4@EV C540
VMA_DQ3 FBA_D2 FBVDDQ_04 4700P/25V_4@EV 4700P/25V_4@EV 4700P/25V_4@EV .022U/10V_4@EV .022U/10V_4@EV .1U/10V_4@EV .1U/10V_4@EV C123 4.7U/6.3V/X5R_6@EV
(17) VMA_WDQS[7..0] A22 FBA_D3 FBVDDQ_05 D14
VMA_DQ4 C24 E13 1U/6.3V/X5R_4@EV
VMA_DQ5 FBA_D4 FBVDDQ_06
(17) VMA_RDQS[7..0] B25 FBA_D5 FBVDDQ_07 F13
VMA_DQ6 A25 F14
VMA_DQ7 FBA_D6 FBVDDQ_08
A26 FBA_D7 FBVDDQ_09 F15
D VMA_DQ8 D22 F16 D
VMA_DQ9 FBA_D8 FBVDDQ_10
E22 FBA_D9 FBVDDQ_11 F17
VMA_DQ10 E24 F19
VMA_DQ11 FBA_D10 FBVDDQ_12
D24 FBA_D11 FBVDDQ_13 F22
VMA_DQ12 D26 H23 C553
VMA_DQ13 FBA_D12 FBVDDQ_14 C148 C133 C121 C134 C132 C101 C112 .1U/10V_4@EV C539
D27 FBA_D13 FBVDDQ_15 H26
VMA_DQ14 C27 J15 4700P/25V_4@EV 4700P/25V_4@EV 4700P/25V_4@EV .022U/10V_4@EV .022U/10V_4@EV .1U/10V_4@EV .1U/10V_4@EV C545 4.7U/6.3V/X5R_6@EV
VMA_DQ15 FBA_D14 FBVDDQ_16 1U/6.3V/X5R_4@EV
B27 FBA_D15 FBVDDQ_17 J16
VMA_DQ16 D16 J18
VMA_DQ17 FBA_D16 FBVDDQ_18
E16 FBA_D17 FBVDDQ_19 J19
VMA_DQ18 D17 L19
VMA_DQ19 FBA_D18 FBVDDQ_20
F18 FBA_D19 FBVDDQ_21 L23
VMA_DQ20 D20 L26
VMA_DQ21 FBA_D20 FBVDDQ_22
F20 FBA_D21 FBVDDQ_23 M19
VMA_DQ22 E21 N22
VMA_DQ23 FBA_D22 FBVDDQ_24
F21 FBA_D23 FBVDDQ_25 U22
VMA_DQ24 C16 Y22
VMA_DQ25 FBA_D24 FBVDDQ_26
B18 FBA_D25
VMA_DQ26 C18
VMA_DQ27 FBA_D26
D18 FBA_D27
VMA_DQ28 C19 F26
FBA_D28 FBA_CMD0 VMA_MA3 (17)
VMA_DQ29 C21 J24
FBA_D29 FBA_CMD1 VMA_MA0 (17)
VMA_DQ30 B21 F25
FBA_D30 FBA_CMD2 VMA_MA2 (17)
VMA_DQ31 A21 M23
FBA_D31 FBA_CMD3 VMA_MA1 (17)
VMA_DQ32 P22 N27
FBA_D32 FBA_CMD4 VMA_MA3H (17)
VMA_DQ33 P24 M27
FBA_D33 FBA_CMD5 VMA_MA4H (17)
VMA_DQ34 R23 K26
FBA_D34 FBA_CMD6 VMA_MA5H (17)
VMA_DQ35 R24 J25
VMA_DQ36 FBA_D35 FBA_CMD7
T23 FBA_D36 FBA_CMD8 J27 VMA_CS0# (17)
VMA_DQ37 U24 G23
FBA_D37 FBA_CMD9 VMA_WE# (17)
C VMA_DQ38 V23 G26 R383 10K/F_4@EV VMA_ODT C
FBA_D38 FBA_CMD10 VMA_BA0 (17)
VMA_DQ39 V24 J23
FBA_D39 FBA_CMD11 VMA_CKE (17)
VMA_DQ40 N25 M25
FBA_D40 FBA_CMD12 VMA_ODT (17)
VMA_DQ41 N26 K27
FBA_D41 FBA_CMD13 VMA_MA2H (17)
VMA_DQ42 R25 G25
FBA_D42 FBA_CMD14 VMA_MA12 (17)
VMA_DQ43 R26 L24 R382 10K/F_4@EV VMA_CKE
FBA_D43 FBA_CMD15 VMA_RAS# (17)
VMA_DQ44 T25 K23
FBA_D44 FBA_CMD16 VMA_MA11 (17)
VMA_DQ45 V26 K24
FBA_D45 FBA_CMD17 VMA_MA10 (17)
VMA_DQ46 V25 G22
FBA_D46 FBA_CMD18 VMA_BA1 (17)
VMA_DQ47 V27 K25
FBA_D47 FBA_CMD19 VMA_MA8 (17)
VMA_DQ48 V22 H22
FBA_D48 FBA_CMD20 VMA_MA9 (17)
VMA_DQ49 W22 M26
FBA_D49 FBA_CMD21 VMA_MA6 (17)
VMA_DQ50 W23 H24 for DDR2 need use
FBA_D50 FBA_CMD22 VMA_MA5 (17)
VMA_DQ51 W24 F27
FBA_D51 FBA_CMD23 VMA_MA7 (17) CMD11(CKE) and
VMA_DQ52 AA22 J26
FBA_D52 FBA_CMD24 VMA_MA4 (17)
VMA_DQ53 AB23 G24
VMA_DQ54 FBA_D53 FBA_CMD25 VMA_CAS# (17) CMD12(ODT)
AB24 FBA_D54 FBA_CMD26 G27
VMA_DQ55 AC24 M24
FBA_D55 FBA_CMD27 FBA_CMD27 (17)
VMA_DQ56 W25 K22
VMA_DQ57 FBA_D56 FBA_CMD28
W26 FBA_D57
VMA_DQ58 W27
VMA_DQ59 FBA_D58
AA25 FBA_D59 RFU_3 J22
VMA_DQ60 AB25 L22
VMA_DQ61 FBA_D60 RFU_4
AB26 FBA_D61
VMA_DQ62 AD26
VMA_DQ63 FBA_D62 VMA_CLK0
AD27 FBA_D63 FBA_CLK0 F24 VMA_CLK0 (17)
F23 VMA_CLK0#
FBA_CLK0* VMA_CLK0# (17)
N24 VMA_CLK1
FBA_CLK1 VMA_CLK1 (17)
VMA_DM0 D23 N23 VMA_CLK1#
FBA_DQM0 FBA_CLK1* VMA_CLK1# (17)
VMA_DM1 C26
B VMA_DM2 FBA_DQM1 B
D19 FBA_DQM2
VMA_DM3 B19
VMA_DM4 FBA_DQM3
T24 FBA_DQM4
VMA_DM5 T26 B15 R387 30.1/F_4@EV +1.8V
VMA_DM6 FBA_DQM5 FB_CAL_PD_VDDQ
AA23 FBA_DQM6
VMA_DM7 AB27 A15 R388 30.1/F_4@EV
FBA_DQM7 FB_CAL_PU_GND
B16 FBA_DEBUG *60.4/F_4@NC R392
FB_CAL_TERM_GND
VMA_WDQS0 A24 FBA_DQS_WP0 For Debug only
VMA_WDQS1 C25
VMA_WDQS2 FBA_DQS_WP1 R86 10K_4@EV
E19 FBA_DQS_WP2 FBA_DEBUG M22 +1.8V
VMA_WDQS3 A19
VMA_WDQS4 FBA_DQS_WP3
T22 FBA_DQS_WP4
VMA_WDQS5 T27 +FB_PLLAVDD L43 HCB1608KF-181T15_6@EV +VGA1.1V
VMA_WDQS6 FBA_DQS_WP5
AA24 FBA_DQS_WP6
VMA_WDQS7 AA26 +FB_PLLAVDD 10mA
FBA_DQS_WP7 C174 C600
R19 .1U/10V_4@EV 4.7U/6.3V/X5R_6@EV
VMA_RDQS0 FB_PLLAVDD
B24 FBA_DQS_RN0
VMA_RDQS1 D25 T19
+1.8V VMA_RDQS2 FBA_DQS_RN1 FB_DLLAVDD
E18 FBA_DQS_RN2
VMA_RDQS3 A18
VMA_RDQS4 FBA_DQS_RN3
R22 FBA_DQS_RN4
VMA_RDQS5 R27 +FB_DLLAVDD L44 HCB1608KF-181T15_6@EV +VGA1.1V
R386 VMA_RDQS6 FBA_DQS_RN5
Y24 FBA_DQS_RN6
*1.02K/F_4@NC VMA_RDQS7 AA27 +FB_DLLAVDD 25mA
FBA_DQS_RN7 C186 C275 C601
15mils width 0.01U/16V_4@EV 1U/6.3V/X5R_4@EV 4.7U/6.3V/X5R_6@EV
+FB_VREF1 A16 FB_VREF
A A
R391 C552 NB9M-NS@EV
*1.02K/F_4@NC *.1U/10V_4@NC

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom NV9X (MEMORY I/F) 2/5 1A
Date: Monday, May 19, 2008 Sheet 13 of 42
5 4 3 2 1
5 4 3 2 1

+1.8V

L15
HCB1608KF-181T15_6@EV
+IFPAB_PLLVDD 100mA

+IFPAB_PLLVDD
100 mA
U23F
6/13 IFPAB
IFPA_TXD0*
IFPA_TXD0
V4
V5

AA4
EXT_TXLOUT0- (23)
EXT_TXLOUT0+ (23)
+3V

L41
HCB1608KF-181T15_6@EV
+DACA_VDD 130mA
+DACA_VDD AG2
U23C

3/13 DACA
DACA_VDD DACA_HSYNC AD2
AD1
CRT_HSYNC
CRT_VSYNC
R424
R415
22_4@EV
22_4@EV
14
EXT_HSYNC (22)
IFPA_TXD1* EXT_TXLOUT1- (23) DACA_VSYNC EXT_VSYNC (22)
C291 C215 AA5 EXT_TXLOUT1+ (23) DACA_VREF AF1
C292 IFPA_TXD1 C588 DACA_VREF
AD5 IFPAB_PLLVDD
4.7U/6.3V/X5R_6@EV 4700P/25V_4@EV 470P/50V_4@EV AB6 IFPAB_RSET A C590 C586 470P/50V_4@EV DACA_RSET AE1 DACA_RSET
Y4 EXT_TXLOUT2- (23) AE2 EXT_VGA_RED
IFPA_TXD2* DACA_RED EXT_VGA_RED (22)
R107 W4 EXT_TXLOUT2+ (23) 4.7U/6.3V/X5R_6@EV 4700P/25V_4@EV C584 AE3 EXT_VGA_GRN
IFPA_TXD2 DACA_GREEN EXT_VGA_GRN (22)
1K/F_4@EV .1U/10V_4@EV R426 AD3 EXT_VGA_BLU
DACA_BLUE EXT_VGA_BLU (22)
124/F_4@EV
AB5 R138 150/F_4@EV
IFPA_TXD3*
D IFPA_TXD3 AB4 D
R139 150/F_4@EV
DATA NB9M-NS@EV
+IFPAB_IOVDD 100mA IFPB_TXD4* V1 R140 150/F_4@EV
L12 +IFPAB_IOVDD W1
HCB1608KF-181T15_6@EV IFPB_TXD4 U23E Close to GPU
C176
C178 4700P/25V_4@EV W2 4/13 DACB
C177 IFPB_TXD5* DACB_VDD
IFPB_TXD5 W3 D7 DACB_VDD
4.7U/6.3V/X5R_6@EV 470P/50V_4@EV
B T5 G6 DACB_VREF DACB_CSYNC D6 T3
V3 AA3 R56
IFPA_IOVDD IFPB_TXD6*
IFPB_TXD6 AA2 T4 F8 DACB_RSET
V2 10K/F_4@EV F7
IFPB_IOVDD DACB_RED
DACB_GREEN E7
C183 C175 AA1 E6
IFPB_TXD7* DACB_BLUE
IFPB_TXD7 AB1
4700P/25V_4@EV 470P/50V_4@EV
NB9M-NS@EV
IFPA_TXC* AD4 EXT_TXLCLKOUT- (23)
A IFPA_TXC AC4 EXT_TXLCLKOUT+ (23)
CLOCK U23D
IFPB_TXC* AB2 5/13 DACC
B IFPB_TXC AB3 DACC_VDD W5 DACC_VDD DACC_HSYNC U6
DACC_VSYNC U4
NB9M-NS@EV T39 R6
R103 DACC_VREF
U23H
T7 V6 DACC_RSET
7/13 IFPC 10K/F_4@EV T5
DACC_RED
MXM DACC_GREEN T4
+IFPC_PLLVDD 160mA DVI DP
DACC_BLUE R4
+IFPC_PLLVDD P6 IFPC_PLLVDD
R5 IFPC_RSET NB9M-NS@EV
C C
G5 +VGA1.1V
R92 R95 IFPC_AUX*
IFPC_AUX G4
10K_4@EV *1K/F_4@NC L6 +NV_PLLVDD
HCB1608KF-181T15_6@EV
TXD0 TXD0 IFPC_L3* J4 DVI-I port output
H4 C120 C122
C TXD0 TXD0 IFPC_L3 4.7U/6.3V/X5R_6@EV C138 4700P/25V_4@EV
TXD1 TXD2 IFPC_L2* K4
L4 +VGA1.1V .1U/10V_4@EV
TXD1 TXD2 IFPC_L2
+IFPC_IOVDD 385mA TXD2 TXD1 M4 L5 +NV_VID_PLLVDD
+IFPC_IOVDD IFPC_L1* HCB1608KF-181T15_6@EV
J6 IFPC_IOVDD TXD2 TXD1 IFPC_L1 M5

TXC TXC N4 C104 C153 U23K 27M_SS


R79 IFPC_L0* 4.7U/6.3V/X5R_6@EV C105 4700P/25V_4@EV BXTALOUT
TXC TXC IFPC_L0 P4
10K_4@EV 12/13 XTAL_PLL
.1U/10V_4@EV
K5 R53 R57
+VGA1.1V PLLVDD
*10K/F_4@NC *10K/F_4@NC
NB9M-NS@EV K6
L10 VID_PLLVDD
U23G HCB1608KF-181T15_6@EV +NV_SP_PLLVDD L6 SP_PLLVDD
Install it when not connected to Spread spectrum device
8/13 IFPE C145 C155
MXM DVI DP 4.7U/6.3V/X5R_6@EV C146 4700P/25V_4@EV
+IFPE_PLLVDD N6 IFPE_PLLVDD
+IFPE_PLLVDD 160mA M6 IFPE_RSET
.1U/10V_4@EV D11 XTAL_SSIN
E9 BXTALOUT
R88 27M_SS XTAL_OUTBUFF
(2) 27M_SS
10K_4@EV R85 D4 XTALIN D10 E10
*1K/F_4@NC IFPE_AUX* XTAL_IN XTAL_OUT
IFPE_AUX D3
Display port output STUFF PDs on XTALSSIN and
XTALOUTBUFF WHEN EXT_SS NB9M-NS@EV
TXD0 TXD0 B4 IS NOT USED Y1
IFPE_L3*
B E TXD0 TXD0 IFPE_L3 B3 (2) 27M_NONSS
R48 0_4@EV 1 2 XTALOUT B

TXD1 TXD2 C4 *27MHZ@NC


IFPE_L2* C73 C74
TXD1 TXD2 IFPE_L2 C3
*18P/50V_4@NC *18P/50V_4@NC
TXD2 TXD1 IFPE_L1* D5
+IFPE_IOVDD 385mA +IFPE_IOVDD H6 TXD2 TXD1 E4
IFPE_IOVDD IFPE_L1

TXC TXC IFPE_L0* F4


R75 F5
10K_4@EV
TXC TXC IFPE_L0
SPREAD SPECTRUM
+3V +3V
+3V R39 27M_SS
NB9M-NS@EV *22_4@NC

GFX27M_L
R45 C47 R42
*10K/F_4@NC *10P/50V_4@NC *4.7_6@NC
R47
*10K/F_4@NC
U5
ICSS_PD 8 2 +3V_SSC
PD# VDD
BXTALOUT BXTALOUT_R 1 4
R52 *22_4@NC CLKIN CLKOUT
5 ICSS_RFO C71 C66 C51 C52
REFOUT R40
(15,23) EXT_EDIDCLK 7 SCL
6 3 *10K/F_4@NC *470P/50V_4@NC *.1U/10V_4@NC *4.7U/6.3V/X5R_6@NC *4.7U/6.3V/X5R_6@NC
(15,23) EXT_EDIDDATA SDA GND
*ICS91730AMLF-T@NC

(13,17,35,37) +1.8V
(2,4,6,9,10,11,12,15,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V

A
(12,13,35,41) +VGA1.1V
I2C ADDRESS: 0xD4H A

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom NV9X (DISPLAY) 3/5 1A

Date: Thursday, May 15, 2008 Sheet 14 of 42


5 4 3 2 1
5 4 3 2 1

15
I2C ADDRESS: 0x98H
U23M
9/13 I2C_GPIO_THERM_JTAG GPIO ASSIGNMENTS
I2CA_SCL R1 EXT_CRTDDCCLK (22) SEE Datasheet for details on G9x Straps!
I2CA_SDA T3 EXT_CRTDDCDAT (22)
*0_4@NC U21 *0_4@NC R2 R410 2.2K_4@EV
GPIO I/O ACTIVE USAGE
I2CB_SCL +3V
EXT_EDIDDATA R380 GFX_SDA 7 4 MAX6649_O# R381 VGA_OVT# GFX_THMD- D8 R3 R84 2.2K_4@EV
SDAT OVT THERMDN I2CB_SDA
EXT_EDIDCLK R390 GFX_SCL
*0_4@NC
8 SCLK
6 MAX6649_A# R379 ALERT GFX_THMD+ D9 A2 I2CC_SCL_G R403 33_4@EV EXT_EDIDCLK
0 IN N/A NVGEM HOTPLUG DETECT
ALERT THERMDP I2CC_SCL EXT_EDIDCLK (14,23)
MAX6649_V 1 I2CC_SDA_G EXT_EDIDDATA
+3V
R389
*200_4@NC VCC
2 GFX_THMD+
*0_4@NC
I2CC_SDA B1 R404 33_4@EV EXT_EDIDDATA (14,23) 1 IN N/A DVI/HDMI LINKC HOTPLUG DETECT
DXP JTAG_TCK AF3 N2 R409 2.2K_4@EV
2 OUT HIGH PANEL BACKLIGHT PWM

GND
C542 C531 JTAG_TMS JTAG_TCK I2CD_SCL R81 2.2K_4@EV
5 GND DXN 3 AF4 JTAG_TMS I2CD_SDA N3 +3V
*.1U/10V_4@NC *2200P/50V_4@NC JTAG_TDI
JTAG_TDO
AG4
AE4
JTAG_TDI
Y6 R435 2.2K_4@EV
3 OUT HIGH PANEL POWER ENABLE
T41 JTAG_TDO I2CE_SCL

9
D
*G799P8UF@NC GFX_THMD- JTAG_TRST# AG3 JTAG_TRST* I2CE_SDA W6 R436 2.2K_4@EV
4 OUT HIGH PANEL BACKLIGHT ENABLE D

THERMAL TRACE CONSTRAINTS N1


5 OUT HIGH NVVDD ALTV0
GPIO0 T38
VGA THERMAIL CIRCUIT Use 10MIL Guard(GND) Trace around THERMDC and THERMDA GPIO1 G1
C1
T32
EXT_DPST_PWM
6 OUT HIGH NVVDD ALTV1
GPIO2 EXT_DPST_PWM (23)
T1
GPIO3 M2
M3
EXT_LVDS_DIGON (23) 7 OUT HIGH FBVDD VID0
(4) MBCLK2 I2CS_SCL GPIO4 EXT_LVDS_BLON (23)
+3V (4) MBDATA2 T2 I2CS_SDA GPIO5 K3
K2
V_PWRCNTL (41) 8 IN LOW OVERTEMP ALERT
GPIO6 V_PWRCNTL1 (41)
JTAG_TMS R432 *10K/F_4@NC GPIO7 J2
C2
T35
VGA_OVT#
9 OUT LOW THERMAL ALERT
GPIO8 VGA_OVT# (4)
JTAG_TDI
VGA_OVT#
R431
R405
*10K/F_4@NC
10K/F_4@EV GPIO9 M1
D2
ALERT
10 OUT HIGH DYNAMIC FB VREF GDDR3(not used for DDR2)
GPIO10 T31
ALERT R407 10K/F_4@EV
GPIO11 D1
J3
T33 11 OUT HIGH SLI SYNC0(not used for GB1-64)
GPIO12 T34
JTAG_TCK
JTAG_TRST#
R438
R437
*10K/F_4@NC
10K/F_4@EV GPIO13 J1
K1
T36 12 IN N/A AC DETECT
GPIO14 T37
EXT_DPST_PWM R406 10K/F_4@EV
GPIO15 F3
G3
13 OUT LOW POWER SUPPLY CONTROL0
GPIO16
GPIO17 G2
F1
14 OUT HIGH POWER SUPPLY CONTROL1
GPIO18
GPIO19 F2 15 IN N/A HPD_E
NB9M-NS@EV
16 IN N/A DVI_E
17 IN N/A HDMI_E
18 IN N/A DVI_F(not used)
19 IN N/A HDMI_F(not used)

C C

+3V
PCI_DEVID[4]/SUBVENDOR +3V
NB9M-NS Straps
U23L
R397 NB9M-NS VRAM Configuration Table
R396 *2K/F_4@NC R55 11/13 MISC R393 R54
20K/F_4@EV 45.3K/F_4@EV *2K/F_4@NC R50 *2K/F_4@NC
ROM_SI VRAM CONFIG SET
B10 45.3K/F_4@EV
STRAP0 ROM_CS*
STRAP1
C7
B9
STRAP0
A10 ROM_SI
STRAP VALUE MEMORY Vendor
STRAP2 STRAP1 ROM_SI
A9 STRAP2 ROM_SO C10 ROM_SO
ROM_SCLK C9 ROM_SCLK
0 5K PD NOT USED
R395
*2K/F_4@NC
R398
10K/F_4@EV
R63
*2K/F_4@NC A3 HDCP_SCL R400 10K_4@EV R51
1 10K PD Samsung DDR2 16Mx16
I2CH_SCL +3V
R59 40.2K/F_4@EV STRAP_REF_3V3 F11 STRAP_REF_3V3 I2CH_SDA A4 HDCP_SDA R399 10K_4@EV R394
45.3K/F_4@EV
*2K/F_4@NC R62
15K/F_4@EV
2 15K PD Qmnd DDR2 16Mx16
R60 40.2K/F_4@EV STRAP_REF_MIOB F10 STRAP_REF_MIOB 3 20K PD HYNX DDR2 16Mx16
N5
B-TEST 4 25K PD NOT USED
BUFRST* T6
R74 *3.4K/F_4@NC F9 J5
5 30K PD Samsung DDR2 32Mx16
SPDIF RFU_8
F6
6 34.8K PD Qmnd DDR2 32Mx16
RFU_7
7 45.3K PD HYNX DDR2 32Mx16
TESTMODE AD25
C15 RFU_1
D15 RFU_2
AC6 R112
RFU_GND
10K_4@EV

NB9M-NS@EV
B B

U23I

10/13 HDAUDIO

HDA_BCLK A7

HDA_SYNC B7
HDA_SDI A6
HDA_SDO B6
HDA_RST* C6

R64
NB9M-NS@EV *10K_4@NC

A A

(2,4,6,9,10,11,12,14,18,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
C 2A
NV9X (GPIO & STRRAPS) 4/5
Date: Sunday, May 18, 2008 Sheet 15 of 42
5 4 3 2 1
5 4 3 2 1

U23J
13/13 GND_NC
NC_01 AA6
16
AC11 GND_01 NC_02 AC19
AC14 GND_02 NC_03 E15
AC17 GND_03 NC_04 T6
AC2 GND_04
AC20 GND_05
AC23 GND_06
D
AC26 GND_07 D
AC5 GND_08
AC8 GND_09
AF11 GND_10
AF14 GND_11
AF17 GND_12
AF2 GND_13
AF20 GND_14
AF23 GND_15
AF26 GND_16
AF5 GND_17
AF8 GND_18
B11 GND_19
B14 GND_20
B17 GND_21
B2 GND_22
B20 GND_23
B23 GND_24
B26 GND_25
B5 GND_26
B8 GND_27
E11 GND_28
E14 GND_29
E17 GND_30
E2 GND_31
E20 GND_32
E23 GND_33
E26 GND_34
E5 GND_35
C E8 GND_36
C
H2 GND_37
H5 GND_38
J11 GND_39
J14 GND_40
J17 GND_41
K19 GND_42
K9 GND_43
L11 GND_44
L12 GND_45
L13 GND_46
L14 GND_47
L15 GND_48
L16 GND_49
L17 GND_50
L2 GND_51
L5 GND_52
M12 GND_53
M13 GND_54
M14 GND_55
M15 GND_56
M16 GND_57
P19 GND_58
P2 GND_59
P23 GND_60
P26 GND_61
P5 GND_62
B
P9 GND_63 B
T12 GND_64
T13 GND_65
T14 GND_66
T15 GND_67
T16 GND_68
U11 GND_69
U12 GND_70
U13 GND_71
U14 GND_72
U15 GND_73
U16 GND_74
U17 GND_75
U2 GND_76
U23 GND_77
U26 GND_78
U5 GND_79
NB9M: VGACORE +0.9V ~ +1.0V V19 GND_80
V9 GND_81
W11 GND_82
W14 GND_83
power up sequence W17 GND_84
Y2 GND_85
Y23 GND_86
Y26 GND_87
Y5 GND_88
PXE 1.1VDD
NB9M-NS@EV
A I/O 3.3V A

NVCORE

1.8VFBDDQ
PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom NV9X GND 5/5 1A

Date: Thursday, May 08, 2008 Sheet 16 of 42


5 4 3 2 1
5 4 3 2 1

17
VMA_CLK0
(13) VMA_CLK0
U22
VMA_DQ1 B9 J2 VMREFA0 R385 1.02K/F_4@EV U7
UDQ7 VREF +1.8V
VMA_DQ6 B1 15mil VMA_DQ31 B9 J2 VMREFA0
VMA_DQ3 UDQ6 R384 1.02K/F_4@EV VMA_DQ28 UDQ7 VREF R43
D9 UDQ5 B1 UDQ6 15mil
VMA_DQ5 D1 VMA_DQ29 D9 475/F_4@EV
VMA_DQ7 UDQ4 C529 .1U/10V_4@EV VMA_DQ24 UDQ5
D3 UDQ3 VDD1 A1 D1 UDQ4
VMA_DQ0 D7 E1 VMA_DQ26 D3 A1
VMA_DQ4 UDQ2 VDD2 VMA_DQ27 UDQ3 VDD1 VMA_CLK0#
C2 UDQ1 VDD3 J9 D7 UDQ2 VDD2 E1 (13) VMA_CLK0#
VMA_DQ2 C8 M9 VMA_DQ25 C2 J9
VMA_DQ13 UDQ0 VDD4 VMA_DQ30 UDQ1 VDD3
F9 LDQ7 VDD5 R1 +1.8V C8 UDQ0 VDD4 M9
VMA_DQ11 F1 VMA_DQ19 F9 R1 VMA_CLK1
LDQ6 LDQ7 VDD5 +1.8V (13) VMA_CLK1
VMA_DQ15 H9 A9 VMA_DQ20 F1
VMA_DQ8 LDQ5 VDDQ1 VMA_DQ16 LDQ6
D
H1 LDQ4 VDDQ2 C1 H9 LDQ5 VDDQ1 A9 D
VMA_DQ9 H3 C3 VMA_DQ21 H1 C1
VMA_DQ14 LDQ3 VDDQ3 VMA_DQ23 LDQ4 VDDQ2
H7 LDQ2 VDDQ4 C7 H3 LDQ3 VDDQ3 C3
VMA_DQ10 G2 C9 VMA_DQ17 H7 C7 R137
VMA_DQ12 LDQ1 VDDQ5 VMA_DQ22 LDQ2 VDDQ4 475/F_4@EV
G8 LDQ0 VDDQ6 E9 G2 LDQ1 VDDQ5 C9
G1 VMA_DQ18 G8 E9
VMA_DM0 VDDQ7 LDQ0 VDDQ6 VMA_CLK1#
B3 UDM VDDQ8 G3 VDDQ7 G1 (13) VMA_CLK1#
VMA_DM1 F3 G7 VMA_DM3 B3 G3
LDM VDDQ9 VMA_DM2 UDM VDDQ8
VDDQ10 G9 F3 LDM VDDQ9 G7
VMA_WDQS0 B7 G9
VMA_RDQS0 UDQS VMA_WDQS3 VDDQ10
A8 UDQS B7 UDQS
VMA_WDQS1 F7 J1 VMA_RDQS3 A8
VMA_RDQS1 LDQS VDDL VMA_WDQS2 UDQS
E8 LDQS F7 LDQS VDDL J1
VMA_RDQS2 E8
VMA_CLK0 LDQS
J8 CK NC1 A2
VMA_CLK0# K8 E2 VMA_CLK0 J8 A2
CK NC2 VMA_CLK0# CK NC1
NC3 L1 FBA_CMD27 (13) K8 CK NC2 E2
VMA_BA1 L3 R3 L1
(13) VMA_BA1 BA1 NC4 NC3 FBA_CMD27 (13)
VMA_BA0 L2 R7 VMA_BA1 L3 R3
(13) VMA_BA0 BA0 NC5 BA1 NC4
R8 VMA_BA0 L2 R7
VMA_MA12 NC6 BA0 NC5
(13) VMA_MA12 R2 A12 NC6 R8
VMA_MA11 P7 VMA_MA12 R2
(13) VMA_MA11 A11 A12
VMA_MA10 M2 A3 VMA_MA11 P7
(13) VMA_MA10 A10 VSS1 A11
VMA_MA9 P3 E3 VMA_MA10 M2 A3
(13) VMA_MA9 A9 VSS2 A10 VSS1
VMA_MA8 P8 J3 VMA_MA9 P3 E3
(13) VMA_MA8 A8 VSS3 A9 VSS2
VMA_MA7 P2 N1 VMA_MA8 P8 J3
(13) VMA_MA7 A7 VSS4 A8 VSS3
VMA_MA6 N7 P9 VMA_MA7 P2 N1
(13) VMA_MA6 A6 VSS5 A7 VSS4
(13)
(13)
VMA_MA5
VMA_MA4
VMA_MA5
VMA_MA4
N3
N8
A5
A4 VSSQ1 A7
VMA_MA6
VMA_MA5
N7
N3
A6
A5
VSS5 P9
(By pass capacitor)
VMA_MA3 N2 B2 VMA_MA4 N8 A7
(13) VMA_MA3 A3 VSSQ2 A4 VSSQ1 +1.8V
C VMA_MA2 M7 B8 VMA_MA3 N2 B2 C
(13) VMA_MA2 A2 VSSQ3 A3 VSSQ2
VMA_MA1 M3 D2 VMA_MA2 M7 B8 C180 C528 C103 C530
(13) VMA_MA1 A1 VSSQ4 A2 VSSQ3
VMA_MA0 M8 D8 VMA_MA1 M3 D2
(13) VMA_MA0 A0 VSSQ5 A1 VSSQ4
E7 VMA_MA0 M8 D8 .1U/10V_4@EV .1U/10V_4@EV .1U/10V_4@EV .1U/10V_4@EV
VMA_ODT VSSQ6 A0 VSSQ5
(13) VMA_ODT K9 ODT VSSQ7 F2 VSSQ6 E7
VMA_CKE K2 F8 VMA_ODT K9 F2
(13) VMA_CKE CKE VSSQ8 ODT VSSQ7
VMA_CS0# L8 H2 VMA_CKE K2 F8
(13) VMA_CS0# CS VSSQ9 CKE VSSQ8
VMA_WE# K3 H8 VMA_CS0# L8 H2
(13) VMA_WE# WE VSSQ10 CS VSSQ9
VMA_RAS# K7 VMA_WE# K3 H8
(13) VMA_RAS# RAS WE VSSQ10
VMA_CAS# L7 J7 VMA_RAS# K7
(13) VMA_CAS# CAS VSSDL RAS +1.8V
VMA_CAS# L7 J7
H5PS5162FFR-25C@EV CAS VSSDL C559 C116 C563 C50
C-TEST H5PS5162FFR-25C@EV
C-TEST 1000P/50V_4@EV .01U/16V_4@EV .1U/10V_4@EV 4.7U/6.3V/X5R_6@EV

U8
VMA_DQ37 B9 J2 VMREFA1 R433 1.02K/F_4@EV U25
UDQ7 VREF +1.8V
VMA_DQ35 B1 15mil VMA_DQ59 B9 J2 VMREFA1
VMA_DQ38 UDQ6 R434 1.02K/F_4@EV VMA_DQ60 UDQ7 VREF
D9 UDQ5 B1 UDQ6 15mil +1.8V
VMA_DQ33 D1 VMA_DQ58 D9
VMA_DQ32 UDQ4 C597 .1U/10V_4@EV VMA_DQ62 UDQ5 C567 C191 C579 C258
D3 UDQ3 VDD1 A1 D1 UDQ4
VMA_DQ39 D7 E1 VMA_DQ63 D3 A1
VMA_DQ34 UDQ2 VDD2 VMA_DQ56 UDQ3 VDD1 1000P/50V_4@EV .01U/16V_4@EV .1U/10V_4@EV 4.7U/6.3V/X5R_6@EV
C2 UDQ1 VDD3 J9 D7 UDQ2 VDD2 E1
VMA_DQ36 C8 M9 VMA_DQ61 C2 J9
VMA_DQ44 UDQ0 VDD4 VMA_DQ57 UDQ1 VDD3
F9 LDQ7 VDD5 R1 +1.8V C8 UDQ0 VDD4 M9
VMA_DQ42 F1 VMA_DQ51 F9 R1
LDQ6 LDQ7 VDD5 +1.8V
VMA_DQ46 H9 A9 VMA_DQ53 F1
VMA_DQ40 LDQ5 VDDQ1 VMA_DQ48 LDQ6
H1 LDQ4 VDDQ2 C1 H9 LDQ5 VDDQ1 A9 +1.8V
VMA_DQ41 H3 C3 VMA_DQ52 H1 C1
VMA_DQ47 LDQ3 VDDQ3 VMA_DQ54 LDQ4 VDDQ2 C596 C95 C576 C271
B
H7 LDQ2 VDDQ4 C7 H3 LDQ3 VDDQ3 C3 B
VMA_DQ43 G2 C9 VMA_DQ50 H7 C7
VMA_DQ45 LDQ1 VDDQ5 VMA_DQ55 LDQ2 VDDQ4 1000P/50V_4@EV .01U/16V_4@EV .1U/10V_4@EV 4.7U/6.3V/X5R_6@EV
G8 LDQ0 VDDQ6 E9 G2 LDQ1 VDDQ5 C9
G1 VMA_DQ49 G8 E9
VMA_DM4 VDDQ7 LDQ0 VDDQ6
B3 UDM VDDQ8 G3 VDDQ7 G1
VMA_DM5 F3 G7 VMA_DM7 B3 G3
LDM VDDQ9 VMA_DM6 UDM VDDQ8
VDDQ10 G9 F3 LDM VDDQ9 G7 +1.8V
VMA_WDQS4 B7 G9
VMA_RDQS4 UDQS VMA_WDQS7 VDDQ10 C594 C229 C589 C54
A8 UDQS B7 UDQS
VMA_WDQS5 F7 J1 VMA_RDQS7 A8
VMA_RDQS5 LDQS VDDL VMA_WDQS6 UDQS 1000P/50V_4@EV .01U/16V_4@EV .1U/10V_4@EV 4.7U/6.3V/X5R_6@EV
E8 LDQS F7 LDQS VDDL J1
VMA_RDQS6 E8
VMA_CLK1 LDQS
J8 CK NC1 A2
VMA_CLK1# K8 E2 VMA_CLK1 J8 A2
CK NC2 VMA_CLK1# K8 CK NC1
NC3 L1 FBA_CMD27 (13) CK NC2 E2
VMA_BA1 L3 R3 L1
BA1 NC4 NC3 FBA_CMD27 (13)
VMA_BA0 L2 R7 VMA_BA1 L3 R3
BA0 NC5 VMA_BA0 BA1 NC4
NC6 R8 L2 BA0 NC5 R7
VMA_MA12 R2 R8
VMA_MA11 A12 VMA_MA12 NC6
P7 A11 R2 A12
VMA_MA10 M2 A3 VMA_MA11 P7
VMA_MA9 A10 VSS1 VMA_MA10 A11
P3 A9 VSS2 E3 M2 A10 VSS1 A3 (13) VMA_DQ[63..0]
VMA_MA8 P8 J3 VMA_MA9 P3 E3
VMA_MA7 A8 VSS3 VMA_MA8 A9 VSS2
P2 A7 VSS4 N1 P8 A8 VSS3 J3 (13) VMA_DM[7..0]
VMA_MA6 N7 P9 VMA_MA7 P2 N1
VMA_MA5H A6 VSS5 VMA_MA6 A7 VSS4
(13) VMA_MA5H N3 A5 N7 A6 VSS5 P9 (13) VMA_WDQS[7..0]
VMA_MA4H N8 A7 VMA_MA5H N3
(13) VMA_MA4H A4 VSSQ1 A5
VMA_MA3H N2 B2 VMA_MA4H N8 A7
(13) VMA_MA3H A3 VSSQ2 A4 VSSQ1 (13) VMA_RDQS[7..0]
VMA_MA2H M7 B8 VMA_MA3H N2 B2
(13) VMA_MA2H A2 VSSQ3 A3 VSSQ2
VMA_MA1 M3 D2 VMA_MA2H M7 B8
A1 VSSQ4 A2 VSSQ3 (13,14,35,37) +1.8V
A VMA_MA0 M8 D8 VMA_MA1 M3 D2 A
A0 VSSQ5 VMA_MA0 A1 VSSQ4
VSSQ6 E7 M8 A0 VSSQ5 D8
VMA_ODT K9 F2 E7
VMA_CKE ODT VSSQ7 VMA_ODT VSSQ6
K2 CKE VSSQ8 F8 K9 ODT VSSQ7 F2
VMA_CS0# L8 H2 VMA_CKE K2 F8
VMA_WE# CS VSSQ9 VMA_CS0# CKE VSSQ8
K3 WE VSSQ10 H8 L8 CS VSSQ9 H2
VMA_RAS# K7 VMA_WE# K3 H8
VMA_CAS# L7
RAS
CAS VSSDL J7 VMA_RAS# K7
WE
RAS
VSSQ10 PROJECT :LE9
VMA_CAS# L7 J7
H5PS5162FFR-25C@EV CAS VSSDL
H5PS5162FFR-25C@EV
Quanta Computer Inc.
C-TEST Size Document Number Rev
256Mb : AKD5FG-TW03/Hynix --HSPS5162FFR-25C C-TEST
Custom NV9X VRAM-1(GDDR2 BGA84) 3A
AKD5FG-T^03/Qimonda --YB18T512161B2F-25
Date: Saturday, May 10, 2008 Sheet 17 of 42
5 4 3 2 1
5 4 3 2 1

18
3VPCU (23,24,32,33,34,35,36,39)
5VPCU (35,36,37,38,39,40)
+3VRTC +3VRTC (21,32)
+3V (2,4,6,9,10,11,12,14,15,19,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41)
+1.5V (4,9,19,21,31,34,35,38)
+1.05V (2,3,4,5,6,8,9,21,35,38,40)
RB501V-40
3V_S5 (19,20,21,35)
D20 C637 1U/6.3V/X5R_4 C625
3VPCU
15P/50V_4

2
1
+3VRTC_2 D21 R484 20K/F_4
Y5 R469

1
RB501V-40 R536 180K_4 C632 G1 10M_4
32.768KHZ
U30A

1
D C659 1U/6.3V/X5R_4 D

3
4
R537 .1U/10V_4 G2 RTC_X1 C23 K5
RTCX1 FWH0/LAD0 LAD0 (31,32,34)

2
1K/F_4 C628 RTC_X2 C24 K4
RTCX2 FWH1/LAD1 LAD1 (31,32,34) +1.05V
15P/50V_4 L6
FWH2/LAD2 LAD2 (31,32,34)

2
*SHORT_ PAD1@NC RTC_RST# A25 K2
RTCRST# FWH3/LAD3 LAD3 (31,32,34)
*SHORT_ PAD1@NC SRTC_RST F20
SM_INTRUDER# SRTCRST#

RTC
LPC
C22 INTRUDER# FWH4/LFRAME# K3 LFRAME# (31,32,34)
1M/F_4 +1.05V
R260 ICH_INTVRMEN B22 J3
INTVRMEN LDRQ0# LPC_LDRQ0# (34)
2

LAN100_SLP A22 J1 ICH_DRQ#1 TP101 R244 R476


BT1 LAN100_SLP LDRQ1#/GPIO23 R304 10K_4 *56.2/F_4@NC *56.2/F_4@NC
+3V
RTC_BAT E25 N7 R471
GLAN_CLK A20GATE GATEA20 (32)
A20M# AJ27 H_A20M# (3) 56.2/F_4
1

C13 LAN_RSTSYNC
DPRSTP# AJ25 H_DPRSTP# (3,6,40)
F14 LAN_RXD0 DPSLP# AE23 H_DPSLP# (3)

LAN / GLAN
G13 LAN_RXD1
C2-TEST change footprint D14 AJ26 H_FERR#_R R474 56.2/F_4
LAN_RXD2 FERR# H_FERR# (3)
TP42
RTC_BAT_V D13 AD22
LAN_TXD0 CPUPWRGD H_PWRGD (3)
D12 LAN_TXD1 +1.05V
5VPCU
20MIL 20MIL E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# (3)
R299 10K_4 ICH_GPIO56

CPU
3V_S5 B10 GPIO56 INIT# AE22 H_INIT# (3)
R548 VCCRTC_1 VCCRTC_3 3 1 AG25
INTR H_INTR (3)
1.2K_4 R542 1K_4 +1.5V R230 24.9/F_4 GLAN_COMP B28 L3
GLAN_COMPI RCIN# RCIN# (32)
Q24 B27 R355 10K_4 +3V R240
R547 MMBT3904 GLAN_COMPO
NMI AF23 H_NMI (3) 56.2/F_4
2

ACZ_BCLK AF6 AF24


(26) ACZ_BCLK HDA_BIT_CLK SMI# H_SMI# (3)
4.7K_4 Notice: GPIO33 is also a ACZ_SYNC AH4
C HDA_SYNC C
strap pin(internal pull up STPCLK# AH27 H_STPCLK# (3)
20k). Don't pull -down. ACZ_RST# AE7
+3V HDA_RST# H_THERMTRIP_R R242 54.9/F_4
THRMTRIP# AG26 PM_THRMTRIP# (3,6)
(26) ACZ_SDIN0 AF4 HDA_SDIN0
R546 AG4 AG27 ICH_TP12 TP41
TP57 HDA_SDIN1 TP12
TP97 AH3 HDA_SDIN2
15K_4 C685

IHDA
ACZ_SDIN3 AE5 HDA_SDIN3
.1U/10V_4 R312 AH11
U35 10K_4 ACZ_SDOUT SATA4RXN
AG5 HDA_SDOUT SATA4RXP AJ11
5

SATA4TXN AG12
1 ICH_SATA_LED# GPIO33 AG7 AF12
TP56 HDA_DOCK_EN#/GPIO33 SATA4TXP
4 BT_COMBO_EN# AE8
(34) SATA_LED# TP52 HDA_DOCK_RST#/GPIO34
2 SATA5RXN AH9
QV-TEST Add U35 and C685 ICH_SATA_LED# AG8 AJ9
MC74VHC1G08DFT2G SATALED# SATA5RXP
SATA5TXN AE10
3

C453 .01U/16V_4 SATA_RXN0_C AJ16 AF10


(30) SATA_RXN0 SATA0RXN SATA5TXP
C455 .01U/16V_4 SATA_RXP0_C AH16
(30) SATA_RXP0 SATA0RXP
BT_COMBO_EN# C451 .01U/16V_4 SATA_TXN0_C AF17 AH18
(30) SATA_TXN0 CLK_PCIE_SATA# (2)

SATA
C449 .01U/16V_4 SATA_TXP0_C SATA0TXN SATA_CLKN
SATA HDD (30) SATA_TXP0 AG17 SATA0TXP SATA_CLKP AJ18 CLK_PCIE_SATA (2)
C472 .01U/16V_4 SATA_RXN1_C AH13 AJ7 SATA_RBIAS_PN
(30) SATA_RXN1 SATA1RXN SATARBIAS#
R316 C467 .01U/16V_4 SATA_RXP1_C AJ13 AH7
(30) SATA_RXP1 SATA1RXP SATARBIAS
C466 .01U/16V_4 SATA_TXN1_C AG14
*1K/F_4@NC
SATA ODD (30) SATA_TXN1
C460 .01U/16V_4 SATA_TXP1_C AF14
SATA1TXN ACZ_RST# R310 33_4
(30) SATA_TXP1 SATA1TXP ACZ_RST#_AUDIO (26)
R544 ACZ_SDOUT R327 33_4
ACZ_SDOUT_AUDIO (26)
ICH9M REV 1.0 24.9/F_4 ACZ_SYNC R567 33_4
ACZ_SYNC_AUDIO (26)
ACZ_BCLK

R315 C686 C491


B *2.2_6@NC B
*10P/50V_4@NC *10P/50V_4@NC
SB Strap XOR Chain Entrance Strap ICH9 Boot BIOS select for EMI
No Reboot Strap C482

ICH_TP3 HDA_SDOUT Description STRAP PCI_GNT0# SPI_CS#1 Low: Default *10P/50V_4@NC


ICH9-M Internal VR ICH9-M LAN100_SLP Strap SPI 0 1 ACZ_SPKR Hi: No reboot
0 0 RSVD
PCI 1 0
Enable strap (Internal VR for
(Internal VR for VccLAN1_05 and
Vccsus1_05,VccSus1_5 VccCL1.05) 0 1 Enter XOR Chain LPC 1 1 (default) +3V
and VccCL1_5)

1 0 Normal opration(Default) *1K/F_4@NC R325 R306


GNT0# (19,28)
Low = Internal VR disable Low = Internal VR disable *1K/F_4@NC
INTVRMEN High = Internal VR LAN100_SLP High = Internal VR *1K/F_4@NC R264 C-TEST
SPI_CS#1_R (19)
enable(Default) enable(Default) 1 1 Set PCIE port config bit 1
ACZ_SPKR (20,26)
+3V
+3VRTC +3VRTC
A16 swap override strap TPM physical presence
Low = A16 swap override enabled
R326 PCI_GNT#3 ICH_GPIO57 Low: Default
R488 R493
*1K/F_4@NC
Hi = Default
332K/F_4 332K/F_4

ACZ_SDOUT 3V_S5
ICH_INTVRMEN LAN100_SLP
A ICH_TP3 (20) A
*1K/F_4@NC R295
GNT3# (19)
R489 R495 R541
*0_4@NC *0_4@NC R501 *10K_4@NC

*1K/F_4@NC
ICH_GPIO57 (20)

R543
PROJECT :LE9
100K/F_4 Quanta Computer Inc.
Size Document Number Rev
Custom ICH9-M Host 1/4 3B

Date: Sunday, May 18, 2008 Sheet 18 of 42


5 4 3 2 1
19
5 4 3 2 1

(4,9,18,21,31,34,35,38) +1.5V
(2,4,6,9,10,11,12,14,15,18,20,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
(18,20,21,35) 3V_S5

C-TEST U30D
TP108 N29 PERN1 DMI0RXN V27 DMI_RXN0 (6)
TP107 N28 PERP1 DMI0RXP V26 DMI_RXP0 (6)

Direct Media Interface


TP110 P27 PETN1 DMI0TXN U29 DMI_TXN0 (6)
TP109 P26 PETP1 DMI0TXP U28 DMI_TXP0 (6)
PCIE_RXN1 L29 Y27
(31) PCIE_RXN1 PERN2 DMI1RXN DMI_RXN1 (6)
D PCIE_RXP1 L28 Y26 D
(31) PCIE_RXP1 PERP2 DMI1RXP DMI_RXP1 (6)
C420 .1U/10V_4 PCIE_TXN1_C M27 W29
EXPRESS CARD (NEW CARD)(31) PCIE_TXN1
C419 .1U/10V_4 PCIE_TXP1_C M26
PETN2 DMI1TXN
W28
DMI_TXN1 (6)
(31) PCIE_TXP1 PETP2 DMI1TXP DMI_TXP1 (6)
J29 PERN3 DMI2RXN AB27 DMI_RXN2 (6)
J28 PERP3 DMI2RXP AB26 DMI_RXP2 (6)

PCI-Express
K27 PETN3 DMI2TXN AA29 DMI_TXN2 (6)
K26 PETP3 DMI2TXP AA28 DMI_TXP2 (6)
C-TEST
PCIE_RXN0 G29 AD27
(31) PCIE_RXN0 PERN4 DMI3RXN DMI_RXN3 (6)
PCIE_RXP0 G28 AD26 +1.5V
(31) PCIE_RXP0 PERP4 DMI3RXP DMI_RXP3 (6)
C416 .1U/10V_4 PCIE_TXN0_C H27 AC29
MINI CARD PCI-E(WLAN) (31) PCIE_TXN0
C415 .1U/10V_4 PCIE_TXP0_C H26
PETN4 DMI3TXN
AC28
DMI_TXN3 (6)
(31) PCIE_TXP0 PETP4 DMI3TXP DMI_TXP3 (6)
E29 T26 R465
PERN5 DMI_CLKN CLK_PCIE_ICH# (2)
E28 PERP5 DMI_CLKP T25 CLK_PCIE_ICH (2) 24.9/F_4
F27 PETN5
F26 PETP5 DMI_ZCOMP AF29
AF28 DMI_IRCOMP_R
DMI_IRCOMP
(24) PCIE_RXN6_LAN C29 PERN6/GLAN_RXN
(24) PCIE_RXP6_LAN C28 PERP6/GLAN_RXP USBP0N AC5 USBP0- (30)
C418 .1U/10V_4 PCIE_TXN6_C D27 AC4 USB Connector
PCIE-LAN (24) PCIE_TXN6_LAN
C417 .1U/10V_4 PCIE_TXP6_C D26
PETN6/GLAN_TXN USBP0P
AD3
USBP0+ (30)
(24) PCIE_TXP6_LAN PETP6/GLAN_TXP USBP1N TP58
USBP1P AD2 TP59
SPI_CLK_R D23 AC1 USBP2- +3V
SPI_CLK USBP2N USBP2- (33)
SPI_CS#0_R D24 AC2 USBP2+ Finger Printer RP37
SPI_CS0# USBP2P USBP2+ (33)
F23 AA5 LOCK# 6 5
(18) SPI_CS#1_R SPI_CS1#/GPIO58/CLGPIO6 USBP3N
AA4 IRDY# 7 4 INTE#
SPI_MOSI USBP3P PERR# INTG#
D25 SPI_MOSI SPI USBP4N AB2 8 3
SPI_MISO E23 AB3 INTC# 9 2 INTB#
C SPI_MISO USBP4P REQ0# C
USBP5N AA1 +3V 10 1
USB_OC#0 N4 AA2
(30) USB_OC#0 OC0#/GPIO59 USBP5P
USB_OC#1 N5 W5 10P8R-8.2K
OC1#/GPIO40 USBP6N USBP6- (31)
USB_OC#2 N6 W4 NEW CARD
USBPWR_EN1# P6
OC2#/GPIO41 USB USBP6P
Y3
USBP6+ (31)
+3V
(30) USBPWR_EN1# OC3#/GPIO42 USBP7N
USB_OC#4 M1 Y2 RP34
USB_OC#5 OC4#/GPIO43 USBP7P REQ3#
N2 OC5#/GPIO29 USBP8N W1 USBP8- (30) 6 5
USB_OC#6 M4 W2 USB Connector STOP# 7 4 REQ1#
OC6#/GPIO30 USBP8P USBP8+ (30)
USBPWR_EN2# M3 V2 TRDY# 8 3 DEVSEL#
+3V (30) USBPWR_EN2# OC7#/GPIO31 USBP9N USBP9- (30)
USB_OC#8 N3 V3 USB Connector INTD# 9 2 FRAME#
(30) USB_OC#8 OC8#/GPIO44 USBP9P USBP9+ (30)
USB_OC#9 N1 U5 10 1 REQ2#
(30) USB_OC#9 OC9#/GPIO45 USBP10N USBP10- (31) +3V
USB_OC#10 P5 U4 WLAN Min-Card
OC10#/GPIO46 USBP10P USBP10+ (31)
USBPWR_EN3# P3 U1 10P8R-8.2K
(30) USBPWR_EN3# OC11#/GPIO47 USBP11N
USBP11P U2
USBRBIAS_PN AG2 +3V
C623 USBRBIAS RP35
AG1 USBRBIAS#
*.1U/10V_4@NC INTH# 6 5
ICH9M REV 1.0 SERR# 7 4
U26 INTA# 8 3
8 1 R463 *22_4@NC SPI_CS#0_R R582 INTF# 9 2
R464 VDD CE# R461 *22_4@NC SPI_CLK_R 22.6/F_4
SCK 6 +3V 10 1
5 R457 *22_4@NC SPI_MOSI
SPI_HOLD# SI R459 *22_4@NC SPI_MISO 10P8R-8.2K
7 HOLD# SO 2
*10K_4@NC
4 VSS WP# 3 SPI_WP# +3V 3V_S5
R455 *10K_4@NC RP36
*W25X40VSSIG@NC USB_OC#5 6 5
USB_OC#4 7 4 USB_OC#6
USBPWR_EN2# 8 3 USB_OC#10

B
512K byte SPI ROM USB_OC#0 9 2 USB_OC#1
USBPWR_EN3# B
U30B 3V_S5 10 1
(28) AD[0..31]
For HDCP only AD0 D11 AD0 REQ0# F1 REQ0#
REQ0# (28)
AD1 C8 G4 GNT0# Notice: GPIO55,53,51 10P8R-8.2K
AD2 D9
AD1 PCI GNT0#
B6 REQ1#
GNT0# (18,28)
signal has a week 3V_S5
AD3 AD2 REQ1#/GPIO50 GNT1#
E12 AD3 GNT1#/GPIO51 A7 TP92 internal pull-up 20k
AD4 E9 F13 REQ2# USB_OC#2 R353 8.2K_4
AD5 AD4 REQ2#/GPIO52 GNT2# for functional
C9 AD5 GNT2#/GPIO53 F12 TP49
AD6 E10 E6 REQ3# strap.Don't pull-down. USBPWR_EN1# R352 8.2K_4
AD7 AD6 REQ3#/GPIO54 GNT3#
B7 AD7 GNT3#/GPIO55 F6 GNT3# (18)
AD8 C7 USB_OC#8 R356 8.2K_4
AD9 AD8
C5 AD9 C/BE0# D8 C/BE0# (28)
AD10 G11 B4 USB_OC#9 R584 8.2K_4
AD10 C/BE1# C/BE1# (28)
AD11 F8 D6
AD11 C/BE2# C/BE2# (28)
AD12 F11 A5 PCI_PME# R583 *10K_4@NC
AD12 C/BE3# C/BE3# (28)
AD13 E7
AD14 AD13 IRDY#
A3 AD14 IRDY# D3 IRDY# (28)
AD15 D2 E3 +3V
AD15 PAR PAR (28)
AD16 F10 R1
AD16 PCIRST# PCIRST# (28)
AD17 D5 C6 DEVSEL#
AD17 DEVSEL# DEVSEL# (28)
AD18 D10 E4 PERR# B-TEST
AD18 PERR# PERR# (28)
AD19 B3 C2 LOCK#
AD20 AD19 PLOCK# SERR#
F7 AD20 SERR# J4 SERR# (28)
AD21 C3 A4 STOP# U29 C630
AD21 STOP# STOP# (28)
AD22 F3 F5 TRDY# *MC74VHC1G08DFT2G@NC *.1U/10V_4@NC
AD22 TRDY# TRDY# (28)
AD23 F4 D7 FRAME#
AD23 FRAME# FRAME# (28)

5
AD24 C1
AD25 AD24 PLT_RST-R# PLT_RST-R#
G7 AD25 PLTRST# C14 PLT_RST-R# (6,12) 1
AD26 H7 D4 4
AD26 PCICLK PCLK_ICH (2) PLTRST# (24,31,34)
AD27 D1 R2 PCI_PME# 2
AD27 PME# PCI_PME# (28)
AD28 G5
A AD29 AD28 R473 A
H6 AD29

3
AD30 G1 100K_4 R466
AD31 AD30 *100K_4@NC
H3 AD31
R467 0_4
INTA# J5
Interrupt I/F H4 INTE#
PIRQA# PIRQE#/GPIO2 INTE# (28)
PCI DEVICES IRQ ROUTING INTB#
INTC#
E1
J6
PIRQB# PIRQF#/GPIO3 K6
F2
INTF#
INTG#
INTF# (28)
PROJECT :LE9
PIRQC# PIRQG#/GPIO4
DEVICE IDSEL # REQ/GNT # PCI_INT INTD# C4 PIRQD# PIRQH#/GPIO5 G2 INTH#
Quanta Computer Inc.
CardBus/1394 AD21 0 E,F ICH9M REV 1.0
Size Document Number Rev
/Card Reader Custom ICH9-M PCIE 2/4 3A

Date: Monday, May 12, 2008 Sheet 19 of 42


5 4 3 2 1
5 4 3 2 1

(4,9,18,19,21,31,34,35,38)
(2,4,6,9,10,11,12,14,15,18,19,21,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41)
(18,19,21,35)
+1.5V
+3V
3V_S5
20
(26,31,32,35,40) 3VSUS

U30C
PCLK_SMB G16 SMBCLK AH23 BOARD_ID2
(2) PCLK_SMB SATA0GP/GPIO21
D PDAT_SMB A13 SMBDATA AF19 BOARD_ID1 D
(2) PDAT_SMB SATA1GP/GPIO19
SMB_LINK_ALERT# E17 AE21 BOARD_ID4
SMB_CLK_ME LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36 BOARD_ID5

SATA
C17 SMLINK0 AD20

GPIO
SMB_DATA_ME SATA5GP/GPIO37
B18 SMLINK1 SMB
CLK14 H1 CLK_14M_ICH (2)
PM_RI# F19 AF3
(34) PM_RI# RI# CLK48 CLK_48M_USB (2)

Clocks
R4 P1 SUSCLK TP99
(34) LPC_PD# SUS_STAT#/LPCPD# SUSCLK
SYS_RST# G19
(3) SYS_RST# SYS_RESET#
SLP_S3# C16 SUSB# (32)
(6) PM_SYNC# M6 PMSYNC#/GPIO0 SLP_S4# E16 SUSC# (32)
G17 SLP_S5# 3V_S5
SLP_S5# TP47
SMB_ALERT# A17 SMBALERT#/GPIO11 S4_STATE# SWI# R503 10K_4
S4_STATE#/GPIO26 C10 TP53
(2) PM_STPPCI# A14 STP_PCI#
E19 G20 PM_ICH_PWROK PM_RI# R289 10K_4
(2) PM_STPCPU# STP_CPU# PWROK

SYS GPIO
CLKRUN# L4 M2 SMB_CLK_ME R290 10K_4
(28,32,34) CLKRUN# CLKRUN# DPRSLPVR/GPIO16 DPRSLPVR (6,40)
PCIE_WAKE# E20 B13 PM_BATLOW# SMB_DATA_ME R523 10K_4
(24,31) PCIE_WAKE# WAKE# BATLOW#
SERIRQ

Power MGT
(28,32,34) SERIRQ M5 SERIRQ
PM_THRM# AJ23 R3 DNBSWON# DNBSWON# R585 10K_4
(4) PM_THRM# THRM# PWRBTN# DNBSWON# (32)
VR_PWRGO_CLKEN D21 D20 ICH_LAN_RST# PCLK_SMB R294 2.2K_4
VRMPWRGD LAN_RST#
ICH_TP11 A20 D22 RSMRST# QV-TEST DEL R277 PDAT_SMB R530 2.2K_4
TP82 TP11 RSMRST# RSMRST# (32)

TP45 ICH_GPIO1 AG19 R5 SMB_ALERT# R525 10K_4


GPIO1 CK_PWRGD CK_PWG (2)
Notice: GPIO20 signal KBSMI# AH21
(32) KBSMI# GPIO6
should not be pulled SCI# AG21 R6 ECPWROK PCIE_WAKE# R258 10K_4
(32) SCI# GPIO7 CLPWROK
C
high for functional SWI# A21 C
TP81 LAN_PHYPC GPIO8 ICH_SLP_M# 3V_S5 +3V PM_BATLOW# R538 8.2K_4
strap(internal pull TP50 C12 GPIO12 SLP_M# B16 TP85
ENERGY_DEC C21
down 20k). TP46 BOARD_ID0 GPIO13 SMB_LINK_ALERT# R292 10K_4
AE18 GPIO17 CL_CLK0 F24 CL_CLK0 (6)
B-TEST ICH_GPIO18 K1 B19
TP100 GPIO18 CL_CLK1 CL_CLK1 (31)
AF8 SYS_RST# R527 10K_4
(23) LCD_BK_OFF GPIO20
BOARD_ID3 AJ22 F22 R506 R248
SCLOCK/GPIO22 CL_DATA0 CL_DATA0 (6) +3V
WAN_OFF# A9 C19 *3.24K/F_4@NC 3.24K/F_4
TP91 GPIO27 CL_DATA1 CL_DATA1 (31)
0.405V

Controller Link
(31) WLAN_OFF# D19

GPIO
ICH_GPIO35 GPIO28 CL_VREF0_ICH
L1 SATACLKREQ#/GPIO35 CL_VREF0 C25
ICH_GPIO38 AE19 A19 CL_VREF1_ICH ICH_TP3 R500 *10K_4@NC
ICH_GPIO39 SLOAD/GPIO38 CL_VREF1
TP43 AG22 SDATAOUT0/GPIO39
Notice: GPIO49 is ICH_GPIO48 AF21 F21 C644 PM_THRM# R481 8.2K_4
TP44 SDATAOUT1/GPIO48 CL_RST0# CL_RST#0 (6)
also a strap ICH_GPIO49 AH24 D18 R250
TP78 GPIO49 CL_RST1# CL_RST#1 (31)
A8 C429 SERIRQ R305 10K_4
pin(internal pull (18) ICH_GPIO57 GPIO57/CLGPIO5
A16 BT_ON# TP87 R510 .1U/10V_4 453/F_4
up 20k). Don't MEM_LED/GPIO24 SUS_PWR_ACK *.1U/10V_4@NC CLKRUN# R307 8.2K_4
(18,26) ACZ_SPKR M7 SPKR GPIO10/SUS_PWR_ACK C18
pull-down. AJ24 C11 AC_PRESENT
(6) MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT TP51
ICH_TP3 B21 C20 ICH_WOL_EN R280 100K_4 *453/F_4@NC KBSMI# R496 10K_4
(18) ICH_TP3
MISC

ICH_TP8 TP3 WOL_EN/GPIO9


TP83 AH20 TP8
ICH_TP9 AJ20 SCI# R497 10K_4
TP80 TP9
ICH_TP10 AJ21
TP79 TP10 ICH_GPIO35 R586 10K_4
ICH9M REV 1.0

+3V

ICH_GPIO38 R279 10K_4

PR90 SUS_PWR_ACK R288 10K_4


B B
1K_4
RSMRST# R265 10K_4

VR_PWRGO_CLKEN
3

Q17
2N7002 R286 +3V
100K_4 Board ID ID3 ID2 ID1 ID0
2 R271 *10K_4@NC BOARD_ID1 R272 10K_4 For Function GPIO22 GPIO21 GPIO19 GPIO17
(40) VR_PWRGD_CK410#
Default 0 0 0 0
R482 *10K_4@NC BOARD_ID2 R483 10K_4
GL40 0 1 0 0
1

R480 *10K_4@NC BOARD_ID3 R479 10K_4 Without MDC 1 0 0 0


+3V 3VSUS
R287 *10K_4@NC BOARD_ID0 R285 10K_4
Board ID ID5 ID4
For Model GPIO37 GPIO36
C468 .1U/10V_4
R300 R275 10K_4 BOARD_ID4 R276 *10K_4@NC
*2K/F_4@NC LE6 0 0
U15
5

MC74VHC1G08DFT2G R274 10K_4 BOARD_ID5 R273 *10K_4@NC


(6,40) DELAY_VR_PWRGOOD 1 LE7 0 1
4 PM_ICH_PWROK
ECPWROK 2
(6,32) ECPWROK
LE8 1 0
A A
3

R296
10K_4 LE9 1 1
R297 *0_4@NC

PROJECT :LE9
Quanta Computer Inc.
Size Document Number Rev
Custom ICH9-M GPIO 3/4 3B

Date: Tuesday, May 27, 2008 Sheet 20 of 42


5 4 3 2 1
21
5 4 3 2 1

+3VRTC +1.05V U30E


C2-TEST change Value U30F VCC1_05 1.634A AA26 VSS[001] VSS[107] H5
+5V +3V A23 A15 AA27 J23
From 10 to 100 VCCRTC VCC1_05[01] (18,32) +3VRTC VSS[002] VSS[108]
VCC1_05[02] B15 (4,9,18,19,31,34,35,38) +1.5V AA3 VSS[003] VSS[109] J26

2
C635 C636 A6 C15 C461 C473 AA6 J27
D22 V5REF VCC1_05[03] (2,4,6,9,10,11,12,14,15,18,19,20,22,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V VSS[004] VSS[110]
VCC1_05[04] D15 (18,19,20,35) 3V_S5 AB1 VSS[005] VSS[111] AC22
R550 .1U/10V_4 .1U/10V_4 AE1 E15 .1U/10V_4 .1U/10V_4 AA23 K28
V5REF_SUS VCC1_05[05] (35) 5V_S5 VSS[006] VSS[112]
100_4 RB501V-40 F15 (22,27,29,30,32,33,34,35,36) +5V AB28 K29
VCC1_05[06] +1.5V VSS[007] VSS[113]
AA24 VCC1_5_B[01] VCC1_05[07] L11 (2,3,4,5,6,8,9,18,35,38,40) +1.05V AB29 VSS[008] VSS[114] L13

1
5V_S5 3V_S5 +5VREF AA25 L12 VCCDMIPLL 23mA AB4 L15
VCC1_5_B[02] VCC1_05[08] VSS[009] VSS[115]
AB24 VCC1_5_B[03] VCC1_05[09] L14 AB5 VSS[010] VSS[116] L2
C677 V5REF 2mA AB25 VCC1_5_B[04] VCC1_05[10] L16 +1.5V_ICH_VCCDMIPLL AC17 VSS[011] VSS[117] L26
2

1U/6.3V_4 AC24 L17 L50 AC26 L27


R588 VCC1_5_B[05] VCC1_05[11] 1uH/300mA_8 VSS[012] VSS[118]
AC25 VCC1_5_B[06] VCC1_05[12] L18 AC27 VSS[013] VSS[119] L5
D 100_4 D24 AD24 M11 C621 C618 AC3 L7 D
RB501V-40 VCC1_5_B[07] VCC1_05[13] VSS[014] VSS[120]
AD25 VCC1_5_B[08] VCC1_05[14] M18 AD1 VSS[015] VSS[121] M12
AE25 P11 .01U/16V_4 10U/6.3V/X5R_8 AD10 M13
VCC1_5_B[09] VCC1_05[15] VSS[016] VSS[122]
1

+5VREF_SUS AE26 P18 AD12 M14


VCC1_5_B[10] VCC1_05[16] VSS[017] VSS[123]
AE27 VCC1_5_B[11] VCC1_05[17] T11 AD13 VSS[018] VSS[124] M15
C703 5VREF_SUS 2mA AE28 T18 +1.05V AD14 M16
VCC1_5_B[12] VCC1_05[18] VSS[019] VSS[125]
1U/6.3V_4 AE29 VCC1_5_B[13] VCC1_05[19] U11 VCCDMI 48mA AD17 VSS[020] VSS[126] M17
+1.5V C2-TEST change Value F25 U18 AD18 M23
VCC1_5_B[14] VCC1_05[20] VSS[021] VSS[127]

CORE
From 0.1U to 1U G25 V11 +1.05V_ICH_DMI L33 AD21 M28
VCC1_5_B[15] VCC1_05[21] HCB1608KF-181T15_6 VSS[022] VSS[128]
H24 VCC1_5_B[16] VCC1_05[22] V12 AD28 VSS[023] VSS[129] M29
H25 V14 +1.05V AD29 N11
VCC1_5_B[17] VCC1_05[23] C440 VSS[024] VSS[130]
J24 VCC1_5_B[18] VCC1_05[24] V16 AD4 VSS[025] VSS[131] N12
B-TEST J25 VCC1_5_B[19] VCC1_05[25] V17 4.7U/6.3V/X5R_6 V_CPU_IO 2mA AD5 VSS[026] VSS[132] N13
VCC1_5B 646mA K24 VCC1_5_B[20] VCC1_05[26] V18 AD6 VSS[027] VSS[133] N14
K25 VCC1_5_B[21] AD7 VSS[028] VSS[134] N15
L51 +1.5V_PCIE_ICH L23 R29 QV-TEST DEL R278 AD9 N16
VCC1_5_B[22] VCCDMIPLL VSS[029] VSS[135]
1

HCB1608KF-181T15_6 L24 C435 C439 C445 AE12 N17


C620 C441 VCC1_5_B[23] VSS[030] VSS[136]
+ L25 VCC1_5_B[24] VCC_DMI[1] W23 AE13 VSS[031] VSS[137] N18
C444 C443 1U/6.3V/X5R_4 M24 Y23 .1U/10V_4 .1U/10V_4 4.7U/6.3V/X5R_6 AE14 N26
*220U/2.5V_3528@NC 10U/6.3V/X5R_8 2.2U/6.3V/X5R_6 VCC1_5_B[25] VCC_DMI[2] VSS[032] VSS[138]
M25 VCC1_5_B[26] AE16 VSS[033] VSS[139] N27
2

N23 AB23 +1.05V_CPU_IO AE17 P12


VCC1_5_B[27] V_CPU_IO[1] +3V VSS[034] VSS[140]
N24 VCC1_5_B[28] V_CPU_IO[2] AC23 AE2 VSS[035] VSS[141] P13
N25 VCC1_5_B[29] AE20 VSS[036] VSS[142] P14
P24 AG29 +3V_DMI_ICH AE24 P15
+1.5V VCC1_5_B[30] VCC3_3[01] VSS[037] VSS[143]
P25 VCC1_5_B[31] AE3 VSS[038] VSS[144] P16
VCCSATAPLL 47mA +3V_SATA_ICH

VCCA3GP
R24 VCC1_5_B[32] VCC3_3[02] AJ6 AE4 VSS[039] VSS[145] P17
R25 VCC1_5_B[33] AE6 VSS[040] VSS[146] P2
+1.5V_SATA_ICH L34 +1.5V_APLL_ICH R26 AC10 +3V_VCCPCORE_ICH AE9 P23
10uH/100MA_8 VCC1_5_B[34] VCC3_3[07] VSS[041] VSS[147]
R27 VCC1_5_B[35] AF13 VSS[042] VSS[148] P28
QV-TEST DEL R529 C458 T24 AD19 C474 C671 C624 QV-TEST DEL R468,R545,R301 AF16 P29
C457 1U/6.3V/X5R_4 VCC1_5_B[36] VCC3_3[03] VSS[043] VSS[149]
T27 VCC1_5_B[37] VCC3_3[04] AF20 AF18 VSS[044] VSS[150] P4
C 10U/6.3V/X5R_8 T28 AG24 .1U/10V_4 .1U/10V_4 .1U/10V_4 VCC3_3 308mA AF22 P7 C
VCC1_5_B[38] VCC3_3[05] VSS[045] VSS[151]

VCCP_CORE
T29 VCC1_5_B[39] VCC3_3[06] AC20 AH26 VSS[046] VSS[152] R11
U24 VCC1_5_B[40] AF26 VSS[047] VSS[153] R12
U25 B9 +3V_PCI_ICH AF27 R13
VCC1_5_B[41] VCC3_3[08] VSS[048] VSS[154]
VCC1_5_A 1.342A V24 VCC1_5_B[42] VCC3_3[09] F9 AF5 VSS[049] VSS[155] R14
V25 G3 C485 C479 C481 QV-TEST DEL R303 AF7 R15
VCC1_5_B[43] VCC3_3[10] VSS[050] VSS[156]
U23 VCC1_5_B[44] VCC3_3[11] G6 AF9 VSS[051] VSS[157] R16
C657 W24 J2 .1U/10V_4 .1U/10V_4 .1U/10V_4 AG13 R17
1U/6.3V/X5R_4 VCC1_5_B[45] VCC3_3[12] VSS[052] VSS[158]
W25 VCC1_5_B[46] VCC3_3[13] J7 AG16 VSS[053] VSS[159] R18

PCI
K23 VCC1_5_B[47] VCC3_3[14] K7 AG18 VSS[054] VSS[160] R28
Y24 VCC1_5_B[48] VCCHDA 11mA AG20 VSS[055] VSS[161] T12
Y25 AJ4 +1.5V_VCCHDA R552 0_6 +3V AG23 T13
VCC1_5_B[49] VCCHDA VSS[056] VSS[162]
VCCSUSHDA 11mA AG3 VSS[057] VSS[163] T14
AJ19 AJ3 VCCSUS_HDA R573 0_6 3V_S5 AG6 T15
VCCSATAPLL VCCSUSHDA VSS[058] VSS[164]
AG9 VSS[059] VSS[165] T16
C666 AC16 AC8 TP_VCCSUS1_05_ICH_1 TP54 C681 QV-TEST DEL R559 and +1.5V AH12 T17
1U/6.3V/X5R_4 VCC1_5_A[01] VCCSUS1_05[1] TP_VCCSUS1_05_ICH_2 .1U/10V_4 VSS[060] VSS[166]
AD15 VCC1_5_A[02] VCCSUS1_05[2] F17 TP48 AH14 VSS[061] VSS[167] T23
AD16 C690 AH17 B26
VCC1_5_A[03] TP_VCCSUS1_5_ICH_1 .1U/10V_4 VSS[062] VSS[168]
ARX

AE15 VCC1_5_A[04] VCCSUS1_5[1] AD8 TP55 AH19 VSS[063] VSS[169] U12


AF15 VCC1_5_A[05] AH2 VSS[064] VSS[170] U13
AG15 F18 +1.5VSUS_INT_ICH AH22 U14
VCC1_5_A[06] VCCSUS1_5[2] C450 VSS[065] VSS[171]
AH15 VCC1_5_A[07] AH25 VSS[066] VSS[172] U15
AJ15 VCC1_5_A[08] AH28 VSS[067] VSS[173] U16
A18 .1U/10V_4 3V_S5 AH5 U17
VCCSUS3_3[01] VSS[068] VSS[174]
AC11 VCC1_5_A[09] VCCSUS3_3[02] D16 AH8 VSS[069] VSS[175] AD23
VCCPSUS

AD11 VCC1_5_A[10] VCCSUS3_3[03] D17 AJ12 VSS[070] VSS[176] U26


AE11 E22 +3VS5_SB_1 AJ14 U27
VCC1_5_A[11] VCCSUS3_3[04] VSS[071] VSS[177]
ATX

QV-TEST DEL R345 AF11 VCC1_5_A[12] AJ17 VSS[072] VSS[178] U3


VCCUSBPLL 11mA AG10 VCC1_5_A[13]
QV-TEST DEL R259 AJ8 VSS[073] VSS[179] V1
+1.5V_USB_ICH AG11 AF1 C459 C437 B11 V13
VCC1_5_A[14] VCCSUS3_3[05] VSS[074] VSS[180]
AH10 VCC1_5_A[15] B14 VSS[075] VSS[181] V15
B B
VCC1_5_A 1.342A C505 AJ10 VCC1_5_A[16] VCCSUS3_3[06] T1 .1U/10V_4 .1U/10V_4 B17 VSS[076] VSS[182] V23
VCCSUS3_3[07] T2 B2 VSS[077] VSS[183] V28
.1U/10V_4 AC9 T3 B20 V29
VCC1_5_A[17] VCCSUS3_3[08] VSS[078] VSS[184]
VCCSUS3_3[09] T4 B23 VSS[079] VSS[185] V4
AC18 VCC1_5_A[18] VCCSUS3_3[10] T5 VCCSUS3_3 212mA B5 VSS[080] VSS[186] V5
AC19 T6 +3VS5_SB_2 B8 W26
VCC1_5_A[19] VCCSUS3_3[11] VSS[081] VSS[187]
VCCSUS3_3[12] U6 C26 VSS[082] VSS[188] W27
AC21 VCC1_5_A[20] VCCSUS3_3[13] U7 QV-TEST DEL R587 C27 VSS[083] VSS[189] W3
VCCPUSB

+3V C506 V6 C478 C477 C476 E11 Y1


VCCSUS3_3[14] VSS[084] VSS[190]
G10 VCC1_5_A[21] VCCSUS3_3[15] V7 E14 VSS[085] VSS[191] Y28
.1U/10V_4 G9 W6 .022U/16V_4 .022U/16V_4 .1U/10V_4 E18 Y29
VCC1_5_A[22] VCCSUS3_3[16] VSS[086] VSS[192]
VCCLAN3_3 78mA VCCSUS3_3[17] W7 E2 VSS[087] VSS[193] Y4
AC12 VCC1_5_A[23] VCCSUS3_3[18] Y6 E21 VSS[088] VSS[194] Y5
+3V_VCCPAUX AC13 Y7 E24 AG28
VCC1_5_A[24] VCCSUS3_3[19] VSS[089] VSS[195]
AC14 VCC1_5_A[25] VCCSUS3_3[20] T7 E5 VSS[090] VSS[196] AH6
QV-TEST DEL R293 E8 VSS[091] VSS[197] AF2
C471 AJ5 G22 +1.05V_CL_INT_ICH F16 B25
.1U/10V_4 VCCUSBPLL VCCCL1_05 VSS[092] VSS[198]
F28 VSS[093]
AA7 G23 +1.5V_CL_INT_ICH F29 A1
VCC1_5_A[26] VCCCL1_5 VSS[094] VSS_NCTF[01]
USB CORE

AB6 VCC1_5_A[27] G12 VSS[095] VSS_NCTF[02] A2


AB7 A24 +3V C432 C436 C442 G14 A28
+1.05V_LAN_ICH VCC1_5_A[28] VCCCL3_3[1] +3V_CL_ICH VSS[096] VSS_NCTF[03]
AC6 VCC1_5_A[29] VCCCL3_3[2] B24 G18 VSS[097] VSS_NCTF[04] A29
AC7 1U/6.3V/X5R_4 .1U/10V_4 .1U/10V_4 G21 AH1
VCC1_5_A[30] VSS[098] VSS_NCTF[05]
VCCCL3_3 19mA G24 VSS[099] VSS_NCTF[06] AH29
C483 A10 G26 AJ1
.1U/10V_4 VCCLAN1_05[1] VSS[100] VSS_NCTF[07]
A11 VCCLAN1_05[2]
QV-TEST DEL R477 G27 VSS[101] VSS_NCTF[08] AJ2
G8 VSS[102] VSS_NCTF[09] AJ28
A12 VCCLAN3_3[1] H2 VSS[103] VSS_NCTF[10] AJ29
+1.5V B12 H23 B1
VCCLAN3_3[2] VSS[104] VSS_NCTF[11]
H28 VSS[105] VSS_NCTF[12] B29
L31 1uH/300mA_8 +1.5V_ICH_GLANPLL A27 H29
A VCCGLANPLL VSS[106] A

VCCGLANPLL 23mA ICH9M REV 1.0


GLAN POWER

D28 VCCGLAN1_5[1]
C426 C422 D29
10U/6.3V/X5R_8 2.2U/6.3V/X5R_6 VCCGLAN1_5[2]
E26 VCCGLAN1_5[3]
E27 VCCGLAN1_5[4]
+1.5V_PCIE_ICH A26 VCCGLAN3_3 PROJECT :LE9
C427
+3V
VCCGLAN1_5 80mA ICH9M REV 1.0
Quanta Computer Inc.
4.7U/6.3V/X5R_6 Size Document Number Rev
+3V_GLAN_ICH Custom ICH9-M Power 4/4 3B

QV-TEST DEL R475 VCCGLAN3_3 1mA Date: Tuesday, May 20, 2008 Sheet 21 of 42

5 4 3 2 1
5 4 3 2 1

22
+5VCRT
(21,27,29,30,32,33,34,35,36) +5V
D12
(2,4,6,9,10,11,12,14,15,18,19,20,21,23,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
RB501V-40
C557
0.1U/10V_4

F1
2 1 CRT_VCC_R CRT PORT

17
+5V
CN12
FUSE1A6V_POLY
5 15
CRT_R_CON L7 BLM18BA470SN1 CRT_R1 10
4 14
D CRT_G_CON L4 BLM18BA470SN1 CRT_G1 9 D
3 13
CRT_B_CON L3 BLM18BA470SN1 CRT_B1 8
2 12
T2 7
R73 R58 R49 1 11
150/F_4 150/F_4 150/F_4 C129 C93 C83 C82 C91 C128 6
5.6P/50V_4 5.6P/50V_4 5.6P/50V_4 5.6P/50V_4 5.6P/50V_4 5.6P/50V_4
CRT SWITCH CRT_CONN

16
UMA & Discrete setting
R145 0_4@EV CRT_R_CON
(14) EXT_VGA_RED
LVDS Discrete / UMA +5V
R144 0_4@EV CRT_G_CON ------------------------------
(14) EXT_VGA_GRN
R143 0_4@EV CRT_B_CON R145 0 NC
(14) EXT_VGA_BLU
R144 0 NC C69
R425 0_4@EV HSYNC
(14) EXT_HSYNC R143 0 NC

1
0.1U/10V_4
R416 0_4@EV VSYNC R425 0 NC U6
(14) EXT_VSYNC
R416 0 NC
R411 0_4@EV CRTDCLK VSYNC 2 4
(15) EXT_CRTDDCCLK R411 0 NC
(15) EXT_CRTDDCDAT
R89 0_4@EV CRTDDAT R89 0 NC CRTVSYNC1 L2 HB-1T1608-121JT CRTVSYNC
R153 NC 0 AHCT1G125DCH CRTHSYNC1 L1 HB-1T1608-121JT CRTHSYNC
R153 *0_4@IV
(6) INT_CRT_RED R152 NC 0 C46 C65
(6) INT_CRT_GRN
R152 *0_4@IV R151 NC 0

1
*10P/50V_4@NC *10P/50V_4@NC
R151 *0_4@IV
R423 NC 0 U4
C (6) INT_CRT_BLU R422 NC 0 C

(6) INT_HSYNC
R423 *0_4@IV R412 NC 0 HSYNC 2 4

R422 *0_4@IV R90 NC 0


(6) INT_VSYNC
AHCT1G125DCH
R412 *0_4@IV +5VCRT
(6) INT_CRT_DDCCLK
R90 *0_4@IV +3V
(6) INT_CRT_DDCDAT

R33 R71 R35 R65


2.2K_4 2.2K_4 2.2K_4 2.2K_4

CRTDCLK 1 3 DDCCLK2 R36 0_6 DDCCLK3

Q3
2N7002K-T1-E3

2
+3V

2
Q8
2N7002K-T1-E3
CRTDDAT 1 3 DDCDAT2 R66 0_6 DDCDAT3

C40
C110
+3V *10P/50V_4@NC *10P/50V_4@NC
B B
D16
1 *CH204UPT@NC
CRT_R1
3

2
D14
1 *CH204UPT@NC
CRT_G1
3

2
D13
1 *CH204UPT@NC
CRT_B1
+5V 3

2
D11
1 *CH204UPT@NC
CRTVSYNC
3

2
D10
1 *CH204UPT@NC
CRTHSYNC
3

A 2 A
D9
1 *CH204UPT@NC
DDCCLK3
3

1
D15
*CH204UPT@NC
PROJECT :LE9
3
DDCDAT3 Quanta Computer Inc.
Size Document Number Rev
2 Custom 1A
CRT & S-VIDEO CON
Date: Thursday, May 08, 2008 Sheet 22 of 42
5 4 3 2 1
5 4 3 2 1

23
LVDS UMA & Discrete setting External VGA with @EV part,
(30,35,37,40,41) 5VSUS
(2,4,6,9,10,11,12,14,15,18,19,20,21,22,24,26,28,29,30,31,32,33,34,35,36,37,38,39,40,41) +3V
Internal VGA with @IV part. (35,37,39) +15V
*0X2@IV 2 1 RN8 TXLCLKOUT+
(6) LA_CLK (18,24,32,33,34,35,36,39) 3VPCU
4 3 TXLCLKOUT-
(6) LA_CLK# (34,35,36,37,38,39,40,41) VIN
UMA & Discrete setting
(6) LA_DATAN0 *0X2@IV 2 1 RN2 TXLOUT0-
(6) LA_DATAP0 4 3 TXLOUT0+ LVDS Discrete / UMA
---------------------
(6) LA_DATAP1 *0X2@IV 4 3 RN5 TXLOUT1+ RN8 NC 0
(6) LA_DATAN1 2 1 TXLOUT1- CN3
RN2 NC 0
(6) LA_DATAN2 *0X2@IV 4 3 RN4 TXLOUT2- RN5 NC 0 R32 0_8 +VIN_BLIGHT LCDVCC
VIN 1 2
2 1 TXLOUT2+ RN4 NC 0
(6) LA_DATAP2 +3V 3 4
D LCD_EDIDDATA D
0X2@EV 4 RN7
RN7 0 NC C42 C41 C44 5 6 LCD_EDIDCLK
(14) EXT_TXLCLKOUT+ 3 7 8
2 1 RN1 0 NC 0.1U/25V/Y5V_6 0.1U/25V/Y5V_6 *10U/25V/X6S_1206@NC VADJ_PWM
(14) EXT_TXLCLKOUT- 9 10
RN6 0 NC DISPON
0X2@EV 4 RN1 C36 11 12
(14) EXT_TXLOUT0- 3 RN3 0 NC 13 14
2 1 1000P/16V_4
(14) EXT_TXLOUT0+ 15 16
0X2@EV 2 RN6 TXLCLKOUT- 17 18 TXLOUT1-
(14) EXT_TXLOUT1+ 1 19 20
4 3 TXLCLKOUT+ TXLOUT1+
(14) EXT_TXLOUT1- 21 22
0X2@EV 2 RN3 TXLOUT0- 23 24 TXLOUT2-
(14) EXT_TXLOUT2- 1 25 26
4 3 TXLOUT0+ TXLOUT2+
(14) EXT_TXLOUT2+ 27 28
29 30

88242-3000-30P

+15V PANEL VCC CONTROL


+3V
+3V
R368
330K_4 R373
C526 2.2K_4

3
0.1U/10V_4
Q19
C AO3404 C
2 LCD_EDIDCLK R376 0_4@EV
EXT_EDIDCLK (14,15)
LCDVCC

LCDONG
C519
5VSUS
0.022U/25V_4 R377 *0_4@IV
INT_EDIDCLK (6)

1
UMA & Discrete setting R19 3 C522 +3V
100K_4 R14 C32
LVDS Discrete / UMA 22_08 10U/6.3V/X5R_8 0.1U/10V_4
R372
---------------------

LCDDISCHG
2 2.2K_4
R29 NC 0 Q2
R30 0 NC Q5 2N7002 LCD_EDIDDATA R374 0_4@EV
EXT_EDIDDATA (14,15)
3

PDTC144EU
1

(6) INT_DISP_ON R29 *0_4@IV 2

3
R375 *0_4@IV
INT_EDIDDATA (6)
R30 0_4@EV
(15) EXT_LVDS_DIGON
1

LCDON# 2 UMA & Discrete setting


Q1
2N7002 LVDS Discrete / UMA
R31 ---------------------
UMA & Discrete setting 10K_4@MV R376 0 NC
1

LVDS Discrete / UMA R377 NC 0


R374 0 NC
----------------------------
R375 NC 0
B R31 10K 100K B

3VPCU
R371 *0_4@NC VADJ_PWM
(32) BRIGHT_PWM
R369 *0_4@IV
(6) INT_DPST_PWM
R16
100K_4 R370 0_4@EV
(15) EXT_DPST_PWM

D2 D3 DISPON DISPON
(32,34) LID551#
RB501V-40 RB501V-40
C523
*47P/50V_4@NC

C29 R13
0.1U/10V_4 100K_4 C33
*47P/50V_4@NC

R27 *0_4@IV R26 1K_4


(6) INT_LVDS_BLON
R24 0_4@EV B-TEST
A (15) EXT_LVDS_BLON A
Q25
3

UMA & Discrete setting PDTC144EU


R25
UMA & Discrete setting 10K_4@MV LVDS Discrete / UMA 2 LCD_BK_OFF (20)
LVDS Discrete / UMA ----------------------------
--------------------- R25 10K 100K