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# PART 15 10100110010011

## DIGITAL ELECTRONICS DryCell

I. NUMBER SYSTEM

1. GENERALIZATIONS

## a. There is no number system with a base of 1.

b. The number of symbols in any number system is the radix or the base
c. The highest symbol in any number system is equal to radix 1.
d. The highest symbol plus 1 equals 0 with carry 1.

## 2. COMMON NUMBER SYSTEMS

a. Decimal System
Said to be of the base 10 because it uses 10 digits and the coefficients are
multiplied by powers of 10
Highest digit is 9

b. Binary System
There are only two possible values 0 and 1
Used in digital systems

c. Octal System
Highest digit is 7

Uses 15 characters of numbers (0 9) and letters(A F)

## a. Base (r) to Decimal

use the positional notation method as illustrated

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1 0 1. 01
2 2 = 0 . 2 5
2 1 = 0
20 = 1
21 = 0
22 = 4
5 .2 5
b. Decimal to any base (r)
For the integer part, divide the integer part repeatedly by base (r), then use the
remainder to form the required base (r) number in an up-ordered manner
For the fractional part, multiply the decimal part repeatedly by base (r) until you
find digits less significant, and then use the integer part to form the base (r)
fractional number. To illustrate:
0 .6 8 7 5 b in a r y
c o e ffic ie n t
1
0 .6 8 7 5 x 2 = 1 .3 7 5
0
0 .3 7 5 x 2 = 0 .7 5
0 .7 5 x 2 = 1 .5 1
0 .5 x 2 = 1 .0 1

0 .6 8 7 5 0 .1 0 1 1 2

c. Binary to Octal
group bits by three and convert each group to its equivalent
0 1 0 1 1 0 .1 1 1 0 1 1
2 6 . 7 3

d. Octal to binary
each Octal digit can be represented in its equivalent 3 bits.

group bits by four and convert each group to its equivalent hexadecimal
character. To illustrate:
0 0 0 1 0 1 1 0 .1 1 1 0 1 1 0 0
1 6 . E C

each hexadecimal character can be represented in its equivalent 4 bits

g. Other Conversion
if there is no direct conversion as shown previously, make a sequence
conversion or practically makes use of the calculator even for the conversions
given previously.

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4. COMPLEMENTS
Used in digital systems and computers for simplifying the subtraction
operations and for logical manipulations

## Types Binary Decimal

rs complement 2s 10s
(true complement)
(r-1)s complement 1s 9s

Note:
1. The 10s complement of a decimal number can be formed by leaving all the least
significant zeroes unchanged, subtracting the 1 st non-zero least significant digit from
10 and subtracting all other significant digit from 9.
Example:
9s complement 10s complement
2513 7486 7487

## 2. The 2s complement can be formed by leaving all least significant zeroes

unchanged and the 1st non zero unchanged and then replacing 1s by 0s and 0s by
1s in all other higher significant digits.
Example:
1s complement 2s complement
10100100 01011011 1011100

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## II. BOOLEAN ALGEBRA

A set of elements, set of operators and number of unapproved axioms or
postulates

## 1854 George Boole

Introduced a systematic treatment of logic and developed or this purpose an
algebraic system.
1938 C.E. Cannon
Introduced a 2-valued Boolean Algebra called Switching Algebra in which he
demonstrated that the properties of bistable electrical switching circuits that can
be represented by this Algebra.

## 2. BASIC THEOREMS and PROPERTIES of BOOLEAN ALGEBRA

a. Duality Principle
Every algebraic expression deducible from the postulates of Boolean Algebra
remains valid if the operators and identity elements are interchanged
If the dual of an algebraic expression is desired we simply interchange OR and
AND operators and replace 1s by 0s and 0s by 1s.
x+0 =x x1 = x
x + x = 1 xx = 0
x+x=x xx = x
x+1=1 x0 = 0
(x) = x (involution)
x +y = y + x (commutative)
x + (y + z) = (x + y) + z (associative)
x (y + z) = xy +xz (distributive)

b. De Morgans Theorem
A B = A B
A B = A +B

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Minterms
logical product of all the function variables that may or may not be
complemented

Product Terms
logical product of the function variables but not necessarily all the variables
that may or may not be complemented
Maxterms
sum of all the function variables that may or may not be complemented

Sum terms
sum of the function variables but not necessarily all the variables that may or
may not be complemented

Canonical Forms
Sum of Minterms: f (x,y,z) = xyz + x yz + x y z
Product of Maxterms: f(x,y,z) = (x + y +z)( x y z )
Standard Forms
Sum of Products: f (x,y,z) = xyz + y z + x y
Product of Sums: f (x,y,z) = (x+y)( x y z )

## 3. TRUTH TABLE and K-MAP

a. Truth Table
A table that describes a logic function by listing all possible combinations of the
inputs and indicating the logical output value

## b. K Map (Karnaugh Map)

Invented by Veitch
Patented by Karnaugh
The essence of the map is by means of overlapping subrectangles such that
the intersection represents a unique combination of logic variables

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xy
zw 00 01 11 10
00
01
11
10

4 -Variable

## Basic Rules in Grouping:

Group must be in the power of 2
Group must be in rectangular form
The group must be as large as possible and as few as possible

## Dont Care Conditions

Combination of input variables that never occur
As a result we dont care what the output function is to be for these combination
of the variables because they are guaranteed never to occur
Dont cares can be assumed to be either 0 or 1 and that depends if it can aids
to further simplification

## How to use Karnaugh map to simplify the logic circuits?

1. Enter a 1 on the K-map for each fundamental product that corresponds to 1
output in the truth table. Enter 0s elsewhere
2. Encircle the octets, quads and pairs. Remember to roll and overlap to get the
largest groups possible
3. If any isolated 1s remain encircle them
4. Eliminate any redundant groups if they exist
5. Write the Boolean equation by getting the logical products corresponding to
the encircled groups
6. Draw the equivalent logic circuits

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## III. LOGIC GATES AND OPERATIONS

1. LOGIC GATES
Block of hardware that produces a logic 1 or logic 0 output signal if input logic
requirements are satisfied
Used in digital and switching circuits
Follows the rule of Boolean Algebra

a. AND Gate
A logic circuit where output is high only when all inputs are high represented by
a dot in Boolean operation

b. OR Gate
Logic circuit whose output is high as long as one of its inputs is high and

c. NOT (Inversion)

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A gate with only one input and one output(complement) and is represented by a
prime or a bar in logical operation

d. NAND Gate
Complement of AND
Abbreviation of Not-AND

e. NOR gate
Complement of the OR function and its name is an abbreviation of Not-OR

f. Exclusive OR Gate
Similar to OR but excludes the combination of both inputs equal to 1

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## g. Equivalence or Exclusive NOR

A gate whose output is high if the inputs are equal or of the same state

h. Buffer
Produces the transfer function but does not produce any particular logic
operation since the binary value of the output is equal to the binary value of the
input.
An isolating device used to prevent a driven circuit from the influence of the
driving circuit

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Fan Out
Specifies the number of standard loads that the output of the gate can drive
without impairment of its normal operation
Fan In
Number of standard inputs
Power Dissipation
Power consumed by the gate which must be available from the power supply
Propagation Delay
The average transition delay time for the signal to propagate from input to
output when the signal change in value
Noise Margin
The limit of a noise voltage which may be present without impairing the proper
operation of the circuit.

2. UNIVERSAL GATES

a. Nand Gate

b. NOR Gate

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3. LOGIC FAMILIES

## a. Resistor-Transistor Logic (RTL)

Resistors and transistors are its circuit elements
Simple and inexpensive but sensitive to noise and have a low fan out ratios
Can be represented by NOR gate in terms of operation

## b. Diode Transistor Logic (DTL)

Uses diodes, transistor and resistors as circuit elements
It has a good noise rejection than RTL but low speed
Can be represented by NAND gate in terms of operation
A High Level DTL (HDTL) used in industry requires a higher supply voltage than
DTL typically 25 V

## c. Transistor-Transistor Logic (TTL)

Most widely used logic family
Uses multiple emitter transistor at the input
High speed but generates noise spikes
Can be represented by NAND gate in terms of operation

## d. Schottky TTL (STTL)

Basically uses Schottky or a hot carrier diode between base -collector junction
of its transistor
Faster but dissipates more power than TTL

## e. Emitter Coupled Logic (ECL)

Of all logic families, it is the fastest
Its operation is based on a differential amplifier

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## f. Positive Metal Oxide Semiconductor (PMOS)

Makes use of p-channel enhancement type MOSFET
0.1 mW approximate power per gate
Slow and delicate

## g. Negative MOS (NMOS)

Makes use of n-channel enhancement type MOSFET
0.1 mW approximate power per gate
Faster than PMOS

## h. Complementary Metal Oxide Semiconductor (CMOS)

Makes use of both p and n-channel enhancement type MOSFET
Low power consumption with only 10 nW power per gate
Delicate and sensitive to static electricity

## 1. COMBINATIONAL Logic Circuits

Consists of logic gates whose outputs at any time are determined directly from
the present combination of inputs without regard to previous output.

Performs addition of 2 binary inputs with two binary outputs including the sum
and the carry

A combinational circuit that performs the arithmetic addition of three input bits
(two binary inputs and the previous carry) producing an output that is the sum
digit and a new carry digit

c. Decoder
A combinational logic circuit that recognizes the presence of a specific binary
number or word
Converts binary information from n inputs to a maximum of 2 n unique output
lines

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d. Encoder
A digital function that produces a reverse operation from that of a decoder
Generates a number or code in response to an input

e. Multiplexer
Data selector switch
An electronic switch that permits any one of the number of inputs to be chosen
and routed to the output
Main function is to control the routing of data from one place to another

f. Demultiplexer
A combinational circuit that receives information on a single line and transmits
this information on 1 of 2n possible output lines

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## Employs memory elements(binary cells) in addition to logic gates

Their outputs are function of the inputs and the state of the memory elements
Two types of sequential circuit includes synchronous and asynchronous
Synchronous sequential circuits are clock controlled to achieve proper circuit
timing
Asynchronous sequential circuits has no clock input

a. Flip Flops
Are memory elements capable of storing a bit of information
Memory elements present in sequential circuits
Also called bistable multivibrator
An external can trigger the output
It has two outputs that are complement to each other

RS Flip Flop

D Flip Flop
D latch
Eliminate the possibility of race condition
Can be clocked or unclocked

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JK Flip Flop
Ideal memory element when it comes to circuit that counts
Also it eliminates the undefined state of the RS flip flop
Can be positive edge triggered or negative edge triggered

x dont care
T Flip Flop
Toggle Flip flop
JK Flip Flop with both inputs tied together

## b. Flip Flops Terminologies

Edge Triggering
Changing the output state of a flip flop on the rising and falling edge of a clock
pulse

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Hold Time
Minimum amount of time the input signals must be held constant after the clock
edge has struck
Set-up time
Minimum amount of time the inputs to a flip flop must be present before the
clock edge arrives
Propagation Delay time
Time it takes for the output of a gate or flip flop to change after the inputs have
changed
Level Clocking
Type of triggering in which the output of a F/F responds to the level of the clock
signal
Latch
Simplest type of F/F consisting of 2 cross coupled NAND and NOR latches

## Master Slave Triggering

Type of triggering using two cascaded latches
Master for half cycle and slave for the other half

c. Registers
Group of memory elements that work together as a unit
Primary purpose is to store a word

Buffer Registers
A register that temporarily stores a word during data processing

Shift Register
A register that can shift the stored bits one position to the left or to the right

## Controlled Shift Register

Has control inputs that determine what it does on the next clock pulse

Means storing a word in the shift register by entering 1 bit per clock pulse

Loading all bits of a word in parallel during one clock pulse

d. Counters
Register capable of counting the number of clock pulses that has arrived at its
clock input

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Controlled Counter
Count pulses only when commanded to do so

Synchronous Counters
A counter in which the clock drives each F/F to eliminate the ripple delay

Ring Counter
A counter producing words with 1 high bit which shifts one position per clock
pulse
UP/DOWN Counter
Bidirectional counter, can count up or down

Presettable Counter
A counter that allows you to preset a number from which the count begins

e. Memories
Where the programs and data are being stored before operations begin

Popularly known as Random Access Memory (RAM)
Uses bipolar or MOS F/Fs for static RAM (SRAM) wherein data will be retained
without the need of refreshing
Uses MOSFETS and capacitors for dynamic RAM (DRAM) whose time interval
to undertake a refresh operation is a bout 2 ms
Volatile memories-data is lost when power is turned off

Data is permanently stored by manufacturer and can be accessed whenever it
is needed
Hold fixed set of data in the circuit
Popularly known as ROM
Non volatile memories-data is not loss even the power is turned off
1. Programmable ROM (PROM)
Allows data to be written into the device by a programmer
Programmed by blowing fuse using a hardware called PROM programmer

## 2. Erasable Programmable ROM (EPROM)

ROM that can be reprogrammed
Data can be erased by ultraviolet light

## 3. Electrically Erasable Programmable ROM (EEPROM)

Non volatile like EPROM

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## Can be completely erased or have certain bytes changed using electrical

pulses

Bubble Memory
Sandwiches a thin film with magnetic material between two permanent bias
magnets
Logical 1s and 0s are represented by magnetic bubbles in the thin film

## Charge Couple Device

Solid state memory where 1s an d0s are being represented by the presence
and absence of a charge
Non Semiconductor Memories
Includes the magnetic core, magnetic disk, magnetic drum and even the CD-ROM

TEST YOURSELF 15
Review Questions

a. 10.24
b. 8.24
c. 8.5
d. 1.24

a. 67427
b. 56317

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c. 56327
d. 67437

Solution
7s KPL = 6666-1035 +1 = 5632

a. 64
b. 63
c. 128
d. 127

a. 2
b. 1
c. 3
d. 4

## 5. In a progression of 0, 1, 10, 11.what comes next after 11?

a. 12
b. 120
c. 110
d. 100

Note: The succeeding term is binary 1 + previous term of the progression

## 6. A logic gate is an electronic circuit which _____.

a. works on binary algebra
b. makes logical decision
c. alternates between 1 and 0
d. allow the flow of current in a single direction

a. 1
b. 0
c. 10
d. either 1 or 0

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a. 5A
b. nA
c. A
d. infinite

a. AND gate
b. NAND gate
c. NOR gate
d. OR gate

## 10. Which of the following is an inverter?

a. common base amplifier
b. common emitter amplifier
c. common collector amplifier
d. common gate amplifier

a. OR gate
b. NOR gate
c. NAND gate
d. Not gate

a. 2
b. 3
c. 4
d. 5

## 13. A half adder includes

a. a NAND gate with OR gate
b. a NAND gate with XOR gate
c. only AND gate
d. neither OR nor XOR nor AND gate

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## 14. A NAND gate is called a universal logic element because

a. it is used by everybody
b. any logic function can be realized by NAND gates alone
c. all the minimization techniques are applicable for optimum NAND gate realization
d. many digital computers use NAND gates

## 15. The expression AB + AB + AC + AC will be

a. 0
b. A
c. ABC
d. 1

16. The bubble or small circle on the output of a NAND gate and NOR gate represents;
b. subtraction
c. product
d. complementation

17. Current drawn when the number 8 is on the LED display is________.
a. 140 nA
b. 140A
c. 560 mA
d. 5.6 A

18. Current displayed for a four-digit liquid crystal display that reads the number 8888 is of the
order of
a. 560 nA
b. 560 A
c. 560 mA
d. 2.6 A

a. 2 TTL
b. 5 TTL

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c. 8 TTL
d. 10 TTL

a. weight
c. decimal
d. multiplier

## 21. The maximum propagation value in case of a 7400 NAND gates is

a. 1 second
b. 20 millisecond
c. less than 20 nanosecond
d. less than 20 picosecond

## 22. The refreshing rate of dynamic RAMs is in the range of

a. 2 microseconds
b. 2 milliseconds
c. 50 milliseconds
d. 500 milliseconds

## 23. TTL circuit configuration resembles what type of gate?

a. OR gate
b. NOR gate
c. AND gate
d. NAND gate

24. Emitter Coupled Logic (ECL) has a very fast switching speed as compared to the rest of logic
families, what is then its typical switching time?
a. 5 sec
b. 5 millisec
c. 5 microsec
d. 5 nanosec

25. Logic circuits can be sequential or combinational, what is the output of a sequential circuit?
a. present input states
b. past input states

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## c. future input states

d. past and the present input states

## Answer d. past and the present input states

26. For a TTL gate, the recommended and standard fan out is _____.
a. 5
b. 10
c. 15
d. 20

## 27. Phanastron is a ________.

a. speed circuit
b. toggle circuit
c. data circuit
d. delay circuit

## 28. To represent number 44 in binary, what is the number of bits required?

a. 4
b. 5
c. 6
d. 7

29. When a logic circuit rejects an unwanted signal, this is termed as______.
a. logic levels
b. noise margin
c. power consumption
d. propagation delay

30. In a system with MOS devices, the main bus loading factor is likely to be:
a. resistive
b. current
c. capacitive
d. inductive

a. encoder
b. decoder

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c. multiplexer
d. demultiplexer

32. Refers to the ability of a logic circuit to withstand noise superimposed on its input signal
a. low noise immunity
b. high noise immunity
c. noise immunity
d. noise figure

33. CMOS, NMOS and PMOS belong to MOS family, what is (are) their significance?
a. they have lower power dissipation than bipolar devices
b. they are slower than bipolar devices
c. they are most sensitive to electrostatic
d. all of the above

## 34. Another name for Universal Logic Module (ULM)

a. Multiplexer
b. decoder
c. Demultiplexer
d. shift register

35. It is an undesirable condition which may exist in a system when 2 or more inputs change
simultaneously.
a. race condition
b. contest
c. drive condition
d. noise immunity

36. What is the memory element used in clocked sequential logic circuit?
a. gates
b. Flip-flop
c. Static Ram

## 37. What is the function of flip-flop as logic element?

a. stores binary data
b. generates clock signal

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c. relay data
d. makes decision

## 38. ______is not a type of flip flop

a. RS
b. Latch
c. D
d. register

39. ______is a device that stay on once triggered and store one or two conditions as a digital
circuit.
a. gate
b. latch
c. integrator
d. differentiator

40. A flipflop whose output is the same as its input. This is sometimes used as a delay element.
a. RS flipflop
b. D flipflop
c. T flipflop
d. JK flipflop

41. Memory whose contents are lost when electrical power is removed.
a. non volatile
b. volatile
c. dynamic
d. static

## 42. Sequential access digital memory uses what storage circuit?

a. parallel register
b. shift register
c. dynamic RAM
d. EEPROM

a. ROM

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b. RAM
c. PROM
d. EPROM

44. In register index addressing mode the effective address is given by:
a. index register value
b. sum of the index register value and operand
c. the operand
d. difference of the index register value and the operand

## Answer b. sum of the index register value and operand

45. The Integration Injection Logic has higher density of integration than TTL because it
a. does not require transistors with high current gain
b. uses compact bipolar transistor
c. does nor require isolation diffusion
d. uses dynamic logic instead of static logic

## Answer b. uses compact bipolar transistor

46. Dynamic RAM uses capacitor as its data storage element, while static RAM uses_____.
a. inductor
b. register
c. flip flop
d. magnet

47. An electronic counter in which bistable units are cascaded to form a loop
a. ring counter
b. twisted ring counter
c. bistable counter
d. UP/DOWN counter

48. This type of memory sandwiches a thin film with magnetic material between two permanent
bias magnets
a. bubble memory
b. soap memory
c. magnetic memory
d. RAM

49. A memory circuit has 9 address inputs has how many storage locations?

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a. 255
b. 256
c. 512
d. 511

Solution
# of address = 2n = 29
= 512

## 50. The density of data stored on magnetic tape is expressed as

a. units per inch
b. tracks per inch
c. packs per inch
d. bytes per inch