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Nonlinear Analysis, Simulation

and Measurement of RF
Modeling a n amplifier's linear response (gain and input match) is common, as is
measurement of the finished circuit using vector network anabzers. Howevel; it is now
practical to simulate compression, distortion and other nonlinear efects in the design
phase, and find them in close agreement with the measurements made when the
amplifier is later built.

Joel Dunsmore odeling the linear response of R F and
Hewlett-Packard Company microwave amplifiers such as gain or in-
put match has been common practice
Santa Rosa, California from many years. Similarly, vector network analyz-
ers (VNAs) are used to measure the S-parameters,
allowing gain or input match to be displayed on a
Smith chart. However, with further integration of
systems, emphasis on lower cost, and lower-
powered RF circuits, it is increasingly important to
understand, predict, and measure compression,
distortion and other nonlinear effects in these cir-

New computer aided engineering programs
employ SPICE models to predict nonlinear as
well as linear perfiormance.

New computer aided engineering systems em-
ploy the traditional SPICE models of RF compo-
nents and apply a nonlinear analysis in the frequen-
cy domain to generate simulations such as power
compression, harmonic distortion and intermodu-
lation distortion. Enhanced presentation routines

vide models and measured data for their devices. Most impor. Generating the Circuit Models ulation and measurement using as an example the Suppliers of RF surface-mount amplifiers pro- Avantek MSA 0986 monolithic IC amplifier. quency microwave circuits. the 50 MHz low frequency limit frequency range of operation of the IC amplifier. This allows analysis of frequency analog and digital circuits. sion and harmonic distortion can be measured di. simulations. with the nonlinear Network analysis of surface-mount technology SPICE model for the device. l-dB Using the linear models. for comparison with predicted results. They even trace out T-V operating points of input power. ana. lyzed and measured for gain. This paper represents the state-of-the-art in R F rcctly over a swept power range. tended to surface-mount components such as in- ductors. the low end to 300 kHz by adding a second feedback loop. The the engineering phase. capacitors. before the network is actu. but dis- . and is written from the viewpoint sweeps allow adjustment of bias to view the effect that the prototype circuits should work the first on these measurements and the results can be time with very close to the design performance ex- stored to a disk or read directly into a CAE system pectations. Further. transistor beta. While normally limited at the low fre- modeling that their frequency use limits are quency to 50 MHz. mize power performance. as of the packaged IC amplifier was extended all will be seen from the following design example. not only facilitate circuit simulation. Power compres. power compression were modeled and measured ing variables such as bias point. This paper illustrates the basics of nonlinear sim. These tools sus frequency. input power generate data sheet-like curves from R F circuit design bridges the gap between low the model of the device. the way down to 300 KNz. nonlinear domain. The devices may be extended beyond their nominal approach is general to other manufacturers' prod. and output power and harmonics ver- a device in response to an R F signal. but also voltage waveforms as a function cluding harmonics and power compression versus of time. they provide The final portion of this paper illustrates nonlin- insight into how the inside of a circuit operatcs in ear measurements using a VNA. and high fre- nonlinear performance over a range of device proc. Careful modeling of surface-mount ucts in that the data sheet models can be used to components and printed circuit board (PCB) layout generate the linear and nonlinear subcircuits used permits precise prediction of circuit characteristics in the simulations. and with remarkable agreement. output power. range of usage. or at a constant design technique.signal. This is ex. simulated nonlincar performance of the amplifier ally built. the performance of the compression point and harmonic distortion. which al- RF VNAs can be configured to measure several lows the reader to determine the quality of the of the key nonlinear parameters. Careful modeling and component selection ensured that the high frequency response was un- Linear and nonlincar simulation may include compromised by this extension. Components are often ess and circuit variations. such as gain and match. The harmonies and varying device parameters and bias points. Sweep. and resistors and not only al- lows a design of a complete amplifier circuit but actually makes practical the extension of the useful In this example. they provide this insight into thc circuit at ments of harmonics and gain compression. Rcal time vices and circuits. and harmonic distortion can be simulated. Simple calibration the large. The simulation and anal. focuses on understanding the de- output power over a frequency range. will be compared to the measured data.can display not only the frequency response of the ysis may be presented in sevcral useful forms in- distortion. this design approach extended extended. power compression (SMT) components reveals numerous parasitics. A libraly of components and their detailed In this example a broadband PCB amplifier is equivalent circuits makes possible such precise designed. and the Complete characterizations have been performed operating point and circuit can be changed to opti- to generate an SMT library of parts. processes are used that result in real-time measure- tantly. PC board mounted like a lumped circuit.

desired. 2) Once the modeling is verified. The IC sitic~. How- sheet as readily available when the IC is used alone ever the surface-mount components do have para- was much less extensive than we desired. as at given input or output power are not shown. A circuit using the IC amplifier along with ideal 300 kHz Frequency 3 GHz h rn Figure 2. gain increase below 50 MHz. The response of the amplifier IC shows a large However. In this design. resistors and inductors was simulated as a starting wave techniques. Using the HP R F Design System. we were able tor. a simple feedback circuit consisting linear characteristics such as gain and input match. package in which it is will be seen. Reference to the pub- clude extensive modeling information including lished data indicates that is caused by the limited packaging effects. when the feedback network consists of nally. IC chip and its package parasitics is needed (Figure formance measured from the device is predictable. The results (Figure 1) reveal that the feed- power compression. When a low frequency feedback path is added. with the inductor to remove the second path when as well as evaluate the design for harmonics versus the internal feedback takes over. . ~ v e nto If the simulation matches measured results for obtain these simple. wish to have flat gain starting as low as 300 kHz. gain inherent in the IC chip is regained. Response of the example IC amplifier in an ideal equivalent circuit as well as that of the parasitics of the circuit with and without feedback to control low-end gain. such as harmonics back extends the response uniformly to 300kHz. changes to the model such as might occur due to processing variation can be investigated to determine if acceptable circuit performance will be maintained over the expected variation in components. to evaluate designs for the low frequency extension. The data sheet for this amplifier shows formed. Fi. ideal circuit responses. then plete model of the IC amplifier. An initial simulation of the The key to the amplifier circuit is the packaged amplifier IC with only a bias resistor was per- silicon IC. We modated in the design. linear models and SPICE mod. trol the low-frequency gain and the simulation re- and some nonlinear characteristics such as output peated. it was desired that the amplifier deliver at least + 7 dBm with better than -25 dBc harmonic distortion. the frequency range indicated by the data ideal elements having no package parasitics. the published data for the IC does in. Then. frequency response of an internal feedback capaci- els. The amplifier model includes both the IC chip Figure 1. point for the design.tributed effects require the application of micro. of a series inductor and resistor was added to con- DC characteristics such as voltage versus current. including both the we may have some confidence that the power per. But others. the low frequency output power. a com- power compression and harmonic distortion. and these too must be accom- has an excess gain from DC to about 50 MHz.

when a different chip is placed in the modeled package. The parts The nonlinear model for the transistor includes are used by specifying the part value. ferent sizes in the IC. diodes are used to model the nonlinear capacitance The Smith chart response of the actual inductor effects of the device. This model Surface-Mount Models works well for linear simulations. It can data supplies all the necessary information to gen- be used as any other simulator part in a top-level erate the model. the successful simulation of the circuit. oped using network analyzer data to match the ear model. We created a symbol for the packaged IC. The parasitics of each of these parts may which case one could make one subcircuit for the affect the circuit response substantially. circuit or as part of a more complex circuit. Q1 and Q2. characteristics to lumped circuit models. The secondary feedback path was added to control the second circuit is that of the IC chip. The lumped model (Figure 4). but cannot be The models of the surface-mount parts are key to used for DC or harmonic generation simulations. feedback path at frequencies above which the inter- age allows it to be re-used more conveniently in nal feedback becomes significant. There are two transistors of dif. as measured on a VNA. for nonlinear analysis it is only necessary a wide range of surface-mount parts were devel- to replace the linear transistor model with a nonlin. the linear model may be used Figure 3. making the IC complete. which might be low frequency gain. The manufacturer's published is shown in Figure 5. use the same circuit model. We make only one model and pass in the scaling factor for the capacitances and resistance depending on the transistor. A this same package could re-use this subcircuit. The inductor was chosen to procured in a variety of packages or in chip form. Here we add the two transistors for the example amplifier. The simulation other applications. used the linear model to determine the small-signal response of the circuit. which is an ideal SPICE model transistor. in capacity. with two transistors. surrounded by linked to the particular values needed in the other elements such as diodes and resistors. This model could be re-used for a family of 1C types merely by changing the values for resistors and capacitors and adding the appropriate transis- tor model(s). and The IC consists of various thin-film resistors and includes blocking capacitors on the input. output some parasitic capacitors. for example. developed next. A complete amplifier was designed using sur- age. IC circuit and connect it to the transistor subcir- cuits. Complete amplifier with surface mount parts for for the transistors. These transistors. with scaling factors and resistance values passed down into the model. as for the IC chip in one circuit and its package in another This way the circuits can be reused. In this amplifier. remove the effect of the external low frequency Separating the IC subcircuit separate from its pack. feedback and bias. This design (Figure 3) is IC Chip Model much more complete than the first ideal circuit. Complete Amplifier Design cuits. A and feedback paths. The IC amplifier subcircuit consists of two lower-level cir. Models for However. Any other transistor or IC device packaged in face-mount part models and the IC part model. Modeling can be pegormed in blocks. and resistors that were chosen given manufacturer might offer the same circuit to provide DC bias with sufficient power handling with variations in the transistors that it contains. Notice . One is a general circuit for the plastic pack.

lel resonance. Inductors usually require the most complcx models. The simulator should show whether any reson- GHZ GHZ ances will occur. It is clear from the many resonances. Figure 4. real inductor with parasitics deteriorated high onance occurs at about 1 GHz. spective parasitics for that part. but surface-mount capaci- tors and resistors also exhibit high frequency beha- viors requiring multi-element equivalent circuits for accurate high frequency characterization. nevertheless. Somctimes adding inductors in series. the part no longer per. This complex circuit is used to model a library of Amplifier Simulation Response surface-mount inductors of various values. used having its parasitic reactances. as denoted by marker 0. On the Smith chart. Here the impedance of the part is very high and purely resistive. which ap- pear as circles or loops on thc Smith chart. When two smaller surface mount inductors of nates near 270 MHz. This is the primary resonance at which practical. however their deleterious circuit effects may be mitigated by dissipation within or between them. causes additional resonances. The feedback circuit modeled with an ideal Above this frequency. This Smith chart plot depicts the measurement of a 680 nH surface-mount inductor. when a surface mount inductor is that at the low frequcncy. Notice that it reso. near 10 MHz. 1 GHz and 6 GHz. from which it was determined that. surface-mount inductor. Howev- er. 330 nH and 390 nH replace the 680 nH inductor. linear model. Selecting the The complete amplifier was simulated using the appropriate value (label) from the library evokes the re. inductor extended the low frequency range at no forms as a simple inductor. for which a gain shunt capacitance and the inductance have a paral. penalty in the high jkquency response. it is important to include more than the simple first-order model with only a shunt C (and a single resonance) since the parasitics responsible for higher frequcncy resonances may have a significant impact within the frequency domain of interest. This may be appre- Thc trace crosses the real (horizontal) axis at about ciated from the resonances observed with the 270 MHz. the low fre- tive reactance is close to the value corresponding to quency gain is extendcd but the high frequency re- the nominal inductance. Figure 5. dip could be expected around 1 GHz. Still an- other resonance appears as the frequency ap- proaches 6 GHz. the induc. but a resonances appear as circles or loops. or capacitors in parallel. The next res. series connected inductors. the 680 nH inductor was real- !! L=700nH a t 10 MHz ized as two smaller. sponse is dramatically affected. Since smaller inductors have much higher self- resonant frequencies. and this sensitivity thereby will be discovered during the simulation. unlike the performance with an ideal external feed- back inductor. The parasitics of the surface- GHZ mount parts are not usually reproducible from part to part. be useful as an R F choke. that a multi-element circuit model must be used to ac- count for the high frequency response of this sur- face-mount inductor. . at which frequency frequency pe$ormance. Parasitics can vary by 50% or more. the impedance of the part has decreased. The component may. A li- brary of commonly used surface-mount parts con- tained within this design software is used by the designer to create the complete circuit.


we see that harmonic behavior and com- work analyzer data may be passed directly to the pression vary with frequency. effects of cables. Above this fre- fact. This affords a good op- portunity to compare simulated results with actual measurement. The results agree well with the simulation. powcr. power compression. quency. the power compression. -15 1 A 1 I 300 kHz FREQUENCY 3 GHz Figure 11. The second and third har- sion point are within I dB of simulated. with measurement bias may be adjusted while sweeping third harmonics getting worse at higher frequen- harmonics in real time to determine bias effects. the net. this method is used to tune and minimize har.5 GHz input.harmonic has a dip in its response. In addition to gain and match. and second and third harmonic distortion in real time. fixtures and pads. In cies. During the monics do vary several dB over frequency. in the feedback path are shown in Figure 10. Measured (shown as solid line) and simulated The results measured for the breadboard circuit (shown as boxes) power and harmonics versus frequen- using the surface-mount capacitors and inductors cy. By replacing the input design software for comparison with calculated val. We can now compare . at 2 GHz. Measured power and harmonics for an IC am- power using a power meter in order to remove the plifier (shown as solid line) and simulated second har- monics shown as boxes. up to about 1. Figure 9. with the second harmonic cancelling itself at this frequency. the network ana- lyzer can measure output power. Further. In this way the accuracy of a VNA may be better than that of a power meter over a wide dynamic range. output firm. quencies. and harmonic distortion for second and By performing power sweeps at different fre- third harmonics can be shown. Remarkably. The network analyzer was calibrated for Figure 10. It may also be that at these power levels the compression of the signal is symmetric. powcr swept stimulus with a frequency swept stimu- ues. In - addition harmonics of the output were measured -15 dBm I n p u t Power t10 dBm directly. The harmonics versus frequency are shown in it predicts the dip in the second harmonic for a 2 Figure 11. a 3 dBm input signal. Measuring Nonlinear Responses Using an RF network analyzer the powcr was swept while measuring gain and output power. lus and performing the harmonic balance analysis at each frequency. a swept harmonic simulation can be performed. When the the production of network analyzers made by our amplifier is added. the third harmonic is probably out of the monic distortion of GaAs FET amplifiers used in gain region of the amplifier. all with GHz power sweep. Also shown is the output power. This may be due to the feedback in the amplifier. The output power and compres. which suppresses even- order harmonic distortion.

also shown in Figure 11. It has 1982 and MSEE in I Y83fvom Oregon been our experience from this and similar applica. by creating From a practical measurement standpoint. multi. by using mea- limitations in measuring harmonic distortion come sured data for individual parts when models arc not from the harmonic content of the source and the available. He has been an R&D tions that surface mount parts can be used to 1. .25 dB is easily achieved over a 50 dB power range. "Add Power-Meter Accuracy to a Nctwvrk measurement of harmonics.04. Hcwlctt-Packard Product Note 8753-1: "Amplifier Mea- the receiver without filtering is about 60 dBc for surcmcnts using thc H P 8753 Network Analyzer.pass filter to re- move the fundamental while passing the harmonics can improve the receiver harmonics without affect. sible for RF circuit design in network element models of surface mount parts ensures anu&zerproducts." Microwaves & RF. Using a high. rent& he is with HP's Microwave In- slrumenls Division where he is respon- Equally important. Photograph of a nearly complete surface gain measurement. The maximum range of Analyzer. H P 85150B Microwave Design System Rclcasc Notcs: Soft- This application example demonstrates that the ware Revision B. Observations 5. sion points in amplifier measurements. 1992." R F Expo is a broadband way to reduce distortion. The receiver distortion is caused by a to that predicted on the first circuit realization at- large fundamental signal. sign and lightwave test system de. By suitably calibrated VNA. January 1991. and is East Proceedings. Dunsmore. References ing receiver sensitivity. Litcraturc Numbcr 5091-S378E. J.for RF component de- linear and nonlinear responses tie the design simu. Dunsmore. using comprehensive. HP Part Numbcr 85150-90134. R F circuit designs should yield measured lin- in a limited band may be reduced by filtering the ear and non-linear performance consistently close input signal. For measuring power parameters such as output power or 1 dB compression point. This includes modeling of all of the circuit also taught undergraduate engineering elements. Measuring results of both three palents . ics in the receiver.~ Net- GHz and beyond if sufficient care in the modeling is work Measurements Division in Santa Rosa.03 dB can be obtained with a lation and the real-world performance together. and by using part libraries when avail- distortion of the VNA receiver. California since I982 and has taken. the models from manufacturers' data.this the response of a real amplifier. Source harmonies able.00. Dunsmore. Simulation and Mcasurcmcnt Tcchniqucs." H P High-Frequency CAE Design Forum. Padding the receiver input 1. careful consideration of the parts used. boundary of RF printed circuit boards can be stretched into the microwave region by using more complete circuit models for the parts and designing Jocl Dunsmore received a RSEE in compensating networks for them as needed. a VNA calibrat- ed with a power meter is extremely accurate. mount amplifier circuit that is used for testing power- surement. He has written sev- proper consideration of their frequency limitations eral papers on R F design and mea- surement lechniques and has received in the design process. Scptcmbcr 1992. Although the second harmonic does not show quite the roll-off of the model. 3. The output power tracks the simulation remark- ably well. August 1992.~ign. J. even more so than power mea. Cur- plings in lines." harmonic measurements. "Extending the Pcrformancc of Oft-the-Shclf R F Amplifiers. Hcw- lett Packard Co. much like adding attenuation in a signal-analyzer 2. the third har- monic shows a very similar response to the simula- tion.sity. at Santu Rosa Junior College. J. Gain accu- racy as good as 0. "Practical Applications of Nonlinear Analy- sis. Very accurate Figure 12. tempt. State Univer. The third harmonic response is limited in fre- quency to 6 GHz (2 GHz fundamental) due to the frequency limit of the network analyzer used. which generates harmon. even ground inductance of vias and cou. Typi- cal power accuracy better than 0. 4.5 engineer at Hewlett-Packard'. compression properties. is necessary when determining compres.