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Low density parity check code is a linear block code. This code approaches the ShannonÃ¢â‚¬â„¢s limit and having low decoding complexity. We have taken LDPC (Low Density Parity Check) code with Ã‚Â½ code rate as an error correcting code in digital video stream and studied the performance of LDPC code with BPSK modulation in AWGN (Additive White Gaussian Noise) channel with sum product algorithm and bit flipping algorithm. Finally the plot between bit error rates of the code with respect to SNR has been considered the output performance parameter of proposed methodology. BER are considered for different number of frames and different number of iterations. The performance of the sum product algorithm and bit flip algorithm are also com-pared. All simulation work has been implemented in MATLAB.

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ISSN: 2395-7549

**Performance Estimation of LDPC Code using
**

Sum Product Algorithm and Bit Flipping

Algorithm

Alpa H. Patel Mahesh Kumar Porwal

M. Tech. Student (Digital Communication) Assistant Professor

Department of Electronics & Communication Engineering Department of Electronics & Communication Engineering

S.I.T.E. Rajasmand, Rajasthan, India S.I.T.E. Rajasmand, Rajasthan, India

Abstract

Low density parity check code is a linear block code. This code approaches the Shannon’s limit and having low decoding

complexity. We have taken LDPC (Low Density Parity Check) code with ½ code rate as an error correcting code in digital video

stream and studied the performance of LDPC code with BPSK modulation in AWGN (Additive White Gaussian Noise) channel

with sum product algorithm and bit flipping algorithm. Finally the plot between bit error rates of the code with respect to SNR

has been considered the output performance parameter of proposed methodology. BER are considered for different number of

frames and different number of iterations. The performance of the sum product algorithm and bit flip algorithm are also com-

pared. All simulation work has been implemented in MATLAB.

Keywords: LDPC, Sum-Product Algorithm, Bit-Flipping Algorithm, BER (Bit Error Rate)

_______________________________________________________________________________________________________

I. INTRODUCTION

The requirement of efficient and reliable digital data communication is rising rapidly in recent years. Specially to get good

efficiency in handheld device video transmission is major issue in recent years as channel signal strength frequently varies

because of the mobility of the receiver. LDPC (Low Density Parity Check) code is best suited code with unequal error protection

for large data and robust transmission through wireless communication channels. Research work has been carried out on LDPC

code for the 4th generation LTE (Long Term Evolution), the outstanding performance is obtained with LDPC at the cost of new

hardware implementation and network implementation is to decode the signal.

Low Density Parity Check code (LDPC) is one of the most efficient technique among the error correction code. It was first

introduced by Robert Gallager in 1962 in his PhD Dissertation [1]. It was shown that LDPC codes can compete with the Turbo

codes of the same length. Parity check matrix of LDPC code is sparse binary matrix. The constraint of sparse parity check matrix

make the LDPC code decoding very efficient and in turn produce a powerful code. Well-designed irregular LDPC code

demonstrates better performance than regular LDPC code [2] [3].

Among the variety of decoding algorithms, a well-known sum product algorithm [4] achieves a good decoding performance.

Sum product algorithm performs iterative decoding. In iterative decoding a critical tradeoff between complexity and performance

is required. Based on these two issues, LDPC code may be classified as optimal, sub-optimal. The optimal decoding is performed

by sum-product algorithm with increased complexity and computational instability but with better performance. The sub-optimal

decoding is performed by Min-sum algorithm with reduced complexity compared to the sum product algorithm.

Rest of the paper is organized as follows. In section II LDPC code is and parity check matrix is discussed. And in section III

various decoding algorithms are explained. In section IV simulation work has been discussed. And finally Section V concludes

the paper.

II. LOW DENSITY PARITY CHECK CODE

LDPD code is a linear code specified by a sparse parity check matrix. As a linear code LDPC code can be represented by a factor

graph. There are two types of LDPC code. Regular LDPC code and Irregular LDPC code. Regular LDPC code has equal

hamming weight Wc of each column and equal hamming weight Wr of each row of the parity check matrix. Whereas irregular

LDPC code does not have equal hamming weight of all the columns and all the row of the parity check matrix. Gallager has

introduced Regular LDPC code in his dissertation [1].

Matrix Representation of LDPC Code

LDPC code can be represented by Parity Check matrix. Example shown below represents (8, 4) LDPC code i.e. (N×M), where

Wr denotes number of 1’s in row and Wc denotes number of 1’s in a columns. The conditions that are to be satisfied for LDPC

matrix are Wc<< N and Wr << M.

**All rights reserved by www.journalforresearch.org 6
**

Performance Estimation of LDPC Code using Sum Product Algorithm and Bit Flipping Algorithm

(J4R/ Volume 02 / Issue 08 / 002)

0 1 0 1 1 0 0 1

1 1 1 0 0 1 0 0

?=[ ]

0 0 1 0 0 1 1 1

1 0 0 1 1 0 1 0

This parity check matrix of the LDPC code can be represented graphically. And it is known as factor graph representation of

parity check matrix. The factor graph of above parity check matrix is shown in fig. 2.

There are four check nodes and eight variable nodes in the factor graph for given parity check matrix. The number of check

nodes in factor graph is equal to the number of parity bit and the number of variable node is equal to the number of information

bit of the LDPC code. Otherwise we can say the number of rows in parity check matrix is equal to the number of check nodes

and number of column in parity check matrix is equal to the number of variable nodes of the factor graph.

Fig. 1: Factor graph of parity check matrix H.

III. DECODING ALGORITHMS

Sum–Product Algorithm

Sum product algorithm is an iterative decoding algorithm. Sum product algorithm is also known as message passing algorithm.

Considering the factor graph shown in fig.2, the working order of sum product algorithm is listed below.

1) The initial message coming from the channel at variable node n is denoted as µ?ℎ (n).

2) The extrinsic message from the variable to check node is

3) µ?? (n,m)=f ct? (µ?ℎ (n), µ?? (m’, n))

Where,

n= Variable node

m ϵ M (n): check nodes which are the neighbor of the variable nodes n.

m’ ϵ M(n)\n: check nodes except m which are neighbor of the variable node n.

The new or updated extrinsic message µ?? (n,m) which is computed by the local decoding operation or function f ct? , will be sent

to the check node m. Therefore, the incoming extrinsic message µ?? (m, n) from the check node m is not considered for updating

the message µ?? (m’, n).

The extrinsic message from the check to variable node is

µ?? (m,n)=f ct? (µ?? (n’, m))

Where, f ct? is the local decoding operation at a check node and n’ ϵ N (m)\n variable nodes except n which are the neighbor of

the check node m.

The final message that is computed at the variable node n in order to estimate the code symbol.

µ? (n)=f ct? (µ?ℎ (n), µ?? (m, n))

The estimation of a code symbol Xn can be done by hard decision

0 ?? Pr(Xn = 0|µ? (n)) ≥ Pr(Xn = 1|µ? (n))

?̂? = {

1 ????

If these symbol-wise estimated code symbols are stacked to form vector ?̂ of length N, then it can be checked whether the

?̂ is a valid code word by

? ⊗ ?̂ = 0

If the above equation is satisfied or the current number of iteration is equal to some defined maximum number of iterations

then stop the iteration otherwise repeat the algorithm from step 2 to step 7.

**All rights reserved by www.journalforresearch.org 7
**

Performance Estimation of LDPC Code using Sum Product Algorithm and Bit Flipping Algorithm

(J4R/ Volume 02 / Issue 08 / 002)

**Bit Flipping Algorithm
**

In Gallager’s bit flipping algorithm, the decoder computes each parity check, using only hard-sliced binary input signals with

simple XOR(exclusive OR) operations. It then schedules a bit to be flipped if the number of failed parity checks exceeds a fixed

flipping threshold value b. The flipped bits are then used in the next iteration of the decoding process. The decoding algorithm

stops when either all of the parity checks are satisfied or a pre-defined maximum iteration limit is reached [5]. The resulting

simple BF algorithm is as follows:

1) Step 1: Compute the parity-check equations. If all of these parity constraints are satisfied, then stop decoding.

2) Step 2: Find the number of unsatisfied parity-check equations for each bit i, denoted by fi.

3) Step 3: Consider each of the bits in turn. If all of the parity check equations with a particular bit as input are unsatisfied,

then flip that bit prior to the next decoding iteration.

4) Step 4: Repeat steps 1 to 3 until all of the parity check equations are satisfied or until a predefined maximum iteration

number is reached.

Compared to the other LDPC decoding algorithm, Bit flip algorithm is simpler. And because of its simplicity, Bit flip decoder

saves large amount of power and silicon area.

IV. PROPOSED METHODOLOGY

All the simulation work has been implemented in MATLAB R2016a. LDPC decoding algorithm with BPSK modulation and

additive white Gaussian noise channel is proposed in this work. LDPC encoding requires generator and parity check matrix

depending on the rate of the code. Here LDPC matrix with rate ½ is created. Rate ½ matrix means number of rows is exactly half

compared to that of number of column. Then video file data i.e. frames are extracted and converted to digital form. Then after

parity check matrix is created in accordance with LDPC matrix and video file data.

After generating LDPC and parity check matrix, video file is sent for BPSK modulation and then additive white Gaussian

noise is added before transmission. At the receiving side data is first demodulated and then starts decoding operation. Decoding

of video data at receiver side is done using log domain sum product algorithm and bit flipping algorithms. Then after bit error

rate for video data is calculated for both decoding algorithms separately for different numbers of iterations (5, 10, 15, 20 and 25)

and different number of frames (3, 6, 9) at different input 0, 1, 2, 3, 4, 5 and 6dB SNR values. The iterative decoding algorithms

i.e. sum product algorithm and bit flipping algorithms are used in decoding process. Decoding process terminates when either a

valid codeword is found or maximum iterations (here it is 25) reached. The simulation has been carried out in MATLAB and

parameters used in the simulation are listed in table1.

Table – 1

List of input parameters and their values or type

Input parameters Value or Type of parameters

Modulation BPSK

Channel AWGN

LDPC code rate ½

Encoding Method LU Method

Decoding algorithms Sum product and bit flipping

Maximum number of iterations 25

Maximum number of frames 9

Maximum input SNR 6 dB

**Flow diagram of MATLAB code
**

Program flow diagram of proposed work is shown below in fig. 2 and fig. 3

**All rights reserved by www.journalforresearch.org 8
**

Performance Estimation of LDPC Code using Sum Product Algorithm and Bit Flipping Algorithm

(J4R/ Volume 02 / Issue 08 / 002)

START START

**Make LDPC matrix of M x N, where
**

M = 100

N = 200 Read Video Frames from

video file and get total no.

of frames in video file

Convert frame in to binary matrix of 8 column

Initialize eb/NoIndex = 1

**Reshape the frame matrix in to following dimension:
**

M = 100

newColumn = ((rows * cols) / M)

**Initialize columnCount = 1 Plot graph EbN0 vs Calculated
**

Is eb/NoIndex <= 7?

BER

NO

YES

**Take average value of BER
**

NO = berValue (Sumation of BER END Obtain Eb/N0 values as per eb/

Is columnCount <= for all coulmns) / Total no. of NoIndex from below array

Eb/N0 = [7 9 11 12 13 14 16 ]

newColumn ? columns in a frame

NO

**YES Eb/NoIndex = eb/NoIndex
**

Initialize frameCount = 1

+1

**Derive column data from matrix as per
**

columnCount END

**Take average value of BER
**

= frameBER (Sumation of BER

Is frameCount <= total for all frames) / Total no. of

Apply BPSK modulation of same column data frames in video file? frames in video file

NO Maintain BER values respective

to EbN0

YES

Add white noise on same column data

**Obtain frame data values as per
**

frameCount from video file

**Decode the data using sum product/Bit flipping
**

algorithm

Calculate BER using derived EbN0 and

frame data values.

Store it in

frameBER = frameBER + Calculated

Calculate BER for same column data BER

berValue = berValue + calculated BER

columnCount = columnCount + 1 frameCount = frameCount + 1

Fig. 2. Flow diagram for the proposed work Fig. 3. Flow diagram for the bit error rate calculation program of the proposed work

**Simulation Results in graphical and tabular form
**

From the table2. we can compare bit error rate obtained from bit flip algorithm and sum product algorithm with different

numbers of frames for LDPC code.

Simulation results of fig. 6 shows that BER(Bit Error Rate) for 3 frames for 0db SNR with bit flip algorithm is 810.5 and with

sum product algorithm is 9.3779, and it decreases to 0.6104 at 6db for bit flip and 0 dB for sum product algorithm. There is

almost same bit error rate exist for different number of frames for both the decoding algorithms.

From the table3. we can compare bit error rate obtained from bit flip algorithm and sum product algorithm with different

numbers of iterations for LDPC code.

Simulation results of fig. 5 shows that sum product algorithm gives better bit error rate response as compared to bit flip algo-

rithm. As the number of iterations increases, SPA algorithm reduces bit error rate with respect to input signal to noise ratio.

When the SNR values are low, the BER fall is found to be higher than when the SNR values are high.

**All rights reserved by www.journalforresearch.org 9
**

Performance Estimation of LDPC Code using Sum Product Algorithm and Bit Flipping Algorithm

(J4R/ Volume 02 / Issue 08 / 002)

Fig. 4: BER Vs. SNR for different number of iterations with bit flip and sum product algorithms.

Fig. 5: BER Vs. SNR graph for different number of frames and its BER Value comparison table

Table – 2

List of various BER values at different SNR for bit-flipping method and log domain SPA method with different number of frames

Number of Frames Input SNR in dB BER from Bit Flip Method BER From Log Domain SPA Method

0 810.5800 9.3779

1 80.2100 0.6204

2 420.6800 0.0256

3 3 157.11 0.0013

4 34.99 0

5 4.894 0

6 0.6164 0

0 800.62 9.2582

1 683.67 0.6154

2 418.70 0.0237

6 3 150 0.001

4 31.008 0

5 5.0318 0

6 0.6096 0

9 0 802.5800 9.2229

**All rights reserved by www.journalforresearch.org 10
**

Performance Estimation of LDPC Code using Sum Product Algorithm and Bit Flipping Algorithm

(J4R/ Volume 02 / Issue 08 / 002)

**1 678.100 0.6086
**

2 416.100 0.0255

3 148.89 0.0016

4 31.1150 0

5 4.5850 0

6 0.5111 0

Table – 3

List of various BER values at different SNR for bit-flipping method and log domain SPA method with different number of iterations

Number of Iteration Input SNR in dB BER from Bit Flip Method BER From Log Domain SPA Method

0 790 9.3469

1 680 0.5287

2 410 0.0281

5 3 150 0

4 32 0

5 4.1 0

6 0.63 0

0 852.5887 4.3281

1 794.3962 0.2225

2 600.9487 0.0056

10 3 291.3531 0

4 63.1244 0

5 6.2300 0

6 0.6162 0

0 829.8094 3.1569

1 790.0512 0.1563

2 628.3712 0.0031

15 3 312.0575 0.0031

4 91.387 0

5 10.2875 0

6 2.4281 0

0 825.5644 2.3531

1 809.8675 0.1081

2 625.4481 0

20 3 334.8969 0

4 91.8975 0

5 12.8031 0

6 1.7769 0

0 850 2.2756

1 804.50 0.0506

2 642.80 0.0056

25 3 349.70 0

4 90.250 0

5 10.9180 0

6 1.2630 0

V. CONCLUSION

The simulation results for LDPC code shows that sum product algorithm is best decoding algorithm as its bit error rate is al-most

stable and very low compared to bit flip algorithm for different numbers of frames as well as iterations. From the table we can

say optimum value of SNR is 5db.

REFERENCES

[1] R. G. Gallager, "Low-density parity check codes," IRE Trans. on Information Theory, vol. IT-8, pp.21-28, Jan. 1962.

[2] Mohammad Rakibul Islam,, dewan siam shafiullah, Muhammad Mostafa Amir Faisal Imran Raheman, “optimized Min-Sum decoding algo-rithms for low

density Parity check code” IJACSA, Vol. 4, No. 12, 2011

[3] T. Richardson, a. Shokrollahi, and R. Urbanke, “design of capacity approaching irregular low density parity check codes, ” IEEE Trans., Inf. Theory, vol.

47, pp 619-637, Feb. 2001

[4] O. J. C. Mackay, "Good error correcting codes based on very sparse matrices," IEEE Trans. on Inform. Theory, vol. 45, pp.399-43I, Mar. 1999.

[5] Xin Sheng Zhou, Bruce F.Cockburn, Stephen Bates”Improved iterative bit flipping algorithms for LDPC convolution codes” PACIRM 1-4244-1190-4/07

All rights reserved by www.journalforresearch.org 11

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