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7 Department of E lectronics and Communications in October, 2002 Universidad Pontificia de Salaman ca in Madrid License Permission is granted to copy, distribute and / or modify this document under th e terms of the GNU Free Documentation GNU (GNU Free Documentation License) 4.2. Logic gates In all engineering drawings are used to describe the designs. They are drawings, letters and symbols. Through these plans or drawings, the Engineer represents t he design on its head and wants to build. In analog electronics used different s ymbols to represent the different components: resistors, capacitors, diodes, tra nsistors ... Some of these symbols can be seen in Figure 4.4. In digital electro nics using other symbols, the logic gates to represent the bit manipulations. 4.2.1. Basic gates AND Gate A B a.b CHAPTER 4. Combinational circuit This gate implements the Boolean algebra operation. The one shown in this figure has two entries, however you can have more. The same goes for the rest of logic gates which follow. OR Gate A B A + B Implements the operation + of Boolean Algebra. You can also have more than two i nnings. NOT Gate (Inverter) A A It has only one input and performs the logical negation operation. This door is commonly known by the name of investor. Only with these three types of gates can implement any Boolean function. Example: Analyze the following circuit and obtain the output Boolean expression: A B C F The circuit consists of two doors, a three-input AND, and inverter. A £ ¢ the output of the AND gate have the product of the three input variables through the investor gets the final expression of F, which is: £ ¢ € and Example: Get the output Boolean expression following circuit: 4.2. LOGIC GATES A B C F The circuit comprises two AND gates, two inverters and an OR gate. The expressio n of F is: § £ £ ¢ €£ ¢ €

€ 4.2.2. Other doors With the basic gates can implement any Boolean function. But there are other doo rs that are widely used in digital electronics. NAND Gate A B a.b The name comes from the abbreviation of NOT-AND, and the operation performed is the negation of a product. Applying DeMorgan's laws to see that leaving the expr ession is: § £ ¢ This door can also have more than two entries. NAND gates have a very important feature is that only they can implement any Boolean function. Simply apply the p roperties of Boolean algebra any Boolean expression to be left there so that onl y such operations as discussed in paragraph 4.3.3 NOR Gate A B A + B CHAPTER 4. Combinational circuit OR-gate is negated (NOT-OR). Applying DeMorgan's laws: £ ¢ €¢ ¢ ¢ ¢ § § £ £ £ €£ £ ¢ € € €¢ As with the NAND gates with NOR gates can implement any Boolean function (see se ction 4.3.4) XOR Gate A B A + B It is the gate that implements the operation Defined in paragraph 3.8 Example: Analyze the following circuit and obtain the output Boolean expression: A B F NOR gate inputs, and the other B. The result is: and applying the DeMorgan laws we have: ¢ €¢ £ ¢ € That is, a circuit is zero. Regardless of what is entered for the tickets, its o utput will always be '0 '. Exercises Make Exercise 1. ¢ The NAND gate output we have the expression: , Which is inserted into one of the 4.3. Design of combinational circuits

physical design. This is studied in the laboratory of this course, using TTL tec hnology. In this section we point 4, ie we will see how from a function (already simplified) we obtain the circuit, or how we can modify to use a particular typ e of logic gates. This is called to implement a function. 4.3.2. Implementation of functions with any type of door The process is very simple. Just take the role that we want to implement and be replacing the operations of Boolean algebra by the corresponding logic gates. An d as always, it's best to see an example. Example 1: Implement the following function, using any type of logic gates: ¢ ¢ It tries to implement a circuit that has three input bits: A, B and C and as the solution is to obtain the function F shown. It can be done in many ways, but we 'll go slowly.€First we consider that we have no restriction. That is, in the st atement allow us to use any type of logic gate, and any number of entries. We wi ll not simplify the function, because we want to see how to implement, although we have seen that you always have to simplify! (And indeed, this function can be simplified further, how?, Is left as an exercise.) We see that in this function are three terms that sum, and. The logic gate that represents the sum is the OR , so we can two:, type: ¢ A BC ABC F Now the problem is simpler. We must get these three terms separately. One is the product we already have, which is A (is directly one of the inputs). The term B , and we can get with an AND gate as follows: £ §

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¢ £ CHAPTER 4. Combinational circuit B C BC For the term, which is the last thing we need, we look which is a product of thr ee elements, so we'll use a three-input AND gate:

A B C ABC £ ¢ and now all Pierz join to get the final circuit: C. BA ¢ £ and finally for

The term we get directly from an investor: C C and we use a couple of investors: A A B B F 4.3. Design of combinational circuits 81 Example 2: Implement the following function, using the smallest possible number of logic ga tes of any kind. The function is simplified to the maximum. In this case we say that the function is simplified to the maximum, what not to do. But it is a question that we'll always have to do! Is simplified to the maxi mum?. We also introduce a restriction: use the minimum number of logic gates. Th e first thing that can happen is we use the method in the example above, substit uting the operations of Boolean algebra by logic gates. The track we get is the following: A B C D F We use the following logic gates: four investors two two-input AND gates a fourinput OR gate The only restriction imposed on us is to use the minimum number of logic gates ... Can we implement this circuit with fewer gates?. Let's look at the function F. Given that there are other doors, such as NAND, XOR, etc ... we will do the following: ¢ ¤ ¤

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82 CHAPTER 4. Combinational circuit The expression of F that remains is: and now if we implement the circuit: A B C D F We've only used 3 doors!. A NAND gate, an XOR and OR, all of two innings. Exercises: Workout 2 4.3.3. Implementation of functions with NAND gates Only NAND gates can implement any Boolean function. This will require making cha nges in the original function for another function equivalent but can be obtaine d only with doors NAND. To see how we can do that, we will implement the gates N OT, AND, OR and XOR using NAND gates only. To cool ideas, then shows a two-input NAND gate and ways of expressing the result: A B = A + B a.b Implementation of a NOT gate Entering the same Boolean variable by the two input s of a NAND output should be:

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4.3. Design of combinational circuits Graphically: A A.A = A We have a circuit that if we introduce a variable A, we obtain the complementary output, ie, it behaves just like an investor. Implementation of a gate AND ¢ We have to design a circuit with NAND gates to implement the function we will do is implement properties of Boolean Algebra to leave this function so that we can implement directly with NAND gates. We can do the following: ¢ The term is implemented with a NAND gate and the expression is therefore the neg ation of the NAND. As we already know how to deny using a NAND gate, the resulti ng circuit is: A B a.b a.b ¢ ¢ Implementation of an OR gate. Applying prola function that we implemented with N AND gates is: properties of Boolean algebra, this expression became the followin g: ¢ €¢ which is the refusal of a product of two terms, ie, a NAND gate applied to y: ¢ £ £

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£ £ . It CHAPTER 4. Combinational circuit A A a.b = A + B B B Implementation of an XOR gate function to be implemented with NAND gates is: ame nd as follows: Let us not be frightened by the perceived complexity of this expression. Look at that. And expression is the sum of two terms denied, ie that has the form of: t his is a NAND gate! That we can put the siguienet way: F a.b a.b © §

A B A B F a.b a.b ¢ And finally there to get and using NAND gates investors: ©

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£ . 4.3. Design of combinational circuits A B F A B B a.b 85 A A.b We have implemented XOR NAND puertasn only. Example 1: Implement the following function using only NAND gates. The function is simplifi ed to the maximum: ¢ We will have to apply the properties of Boolean Algebra to stop this expression so that we can implement with NAND gates. As stated we do not put any restrictio n, we can use NAND gates to the number of tickets you want. A three-input NAND g ate can perform the following operations:

If we apply a double negative to F and then apply successively DeMorgan laws (or Shannon's theorem): This function is immediately deploy with NAND gates: #

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CHAPTER 4. Combinational circuit A B F C Example 2: Implement the following function using only 2-input NAND gates: £ ¢ ¢ £ § £ § £ " € €¢ § ¢ § €£ © § £ © § £ It is the same function as the previous paragraph, however, we now have the cons traint that we can only use two-input NAND gates. If we make the same transforma tion as before, we get: # ¢ £ # ¢ £ ¢ £ € das in the shape: and that is easily implemented with a NAND two entries A + B + C A + B + C £ F the first one. It can also be written as follows (applying the "trick" of double negation): # ¢ that is implemented as follows:

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. We go 4.3. Design of combinational circuits A BC 87 A + B + C The other term, we can implement a similar way: AB C A + B + C and now all the pieces and implementing what is missing: A B F C Exercises: X Workout 4.3.4. Implementation of functions with NOR gates As with the NAND gates with NOR gates can implement any Boolean function. Let's see how you can implement the rest of logic gates. Recall that the expressions a t the outputs of NOR gates are: A B A + B = a.b CHAPTER 4. Combinational circuit Implementation of a NOT gate is made of the same way as with the NAND gates. If we introduce the same variable for two tickets, get the variable denied: A A + A = A Implementation of an OR gate

¢ ¢ £ ¢ § €£ £ £ ¢ § € € €GBP € The function to implement is: way: . We can put this expression as follow ie we can use a NOR gate and then an investor already know how to implement it w ith NOR gates. What remains is: A B A + B A + B Implementation of an AND gate function to implement is:. We make the following c hanges so it can be implemented with NOR gates: £ ¢ €¢ The circuit would look like this: A A B B a.b ¢ § £

4.3. Design of combinational circuits Implementation of an XOR gate and in the same way we did with the NAND gates, we will start to implement £ ¢ this feature gradually. First we see that there is a NOR gate whose inputs are, and who is denied: £ ¢ A.b a.b A.b a.b + F this: Graphically: A B A B a.b A.b Uniting "all parts", the final circuit that remains is: # £

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and 90 A B CHAPTER 4. Combinational circuit A.b a.b + B A F a.b a.b We have implemented the XOR gate NOR gates only.

Exercises: X Workout 4.4. Application: Design of a driver for a line follower robot 4.4.1. Introduction In this section we design a digital circuit that governs the behavior of a line follower robot. The goal is for students to see how everything learned so far ca n be applied, and also get some intuition about the type of digital circuits can be designed. This section is optional. The reader not interested can skip direc tly to paragraph 4.6. However anxious students can use as a basis for entering t he world of robotics and digital electronics practice, to see how you can make a real project. Obviously not build the whole robot, it would take more time :-). Leave from an existing robot, which has a mechanical structure made of Lego pie ces, two motors, two sensors to detect the black on a plain background and the n ecessary electronics to control the motors and read sensors. This robot is marke ted under the name of Tritt. But using a 6811 microcontroller to implement the " brain." We will design our own digital brain, so that the robot follows a black line. Figure 4.8 shows the Microbot Tritt, along with a floppy disk, to get an i dea of the dimensions it has. 4.7. Exercises Exercise 1: Get the Boolean expressions of the outputs of these circuits (no need to simplif y or operate these expressions): Circuit 1: A B C F D Circuit 2: A B C D E F Circuit 3: A B C D E F Exercise 2: Implement the following function, using any type of logic gates, knowing that al l functions are simplified to the maximum. ¢ ¢ 1. Exercise 2a: Implement only NAND gates Exercise 2b: Implement only NOR gates Exercise x: ¢ Given the role 1. Deploying any kind of logic gates £ § £ 0

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