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PRODUCT INFORMATION

18.0 Inch Active Matrix TFT-LCD
(LG_Philips & 5120 controller card)

E048-LCD18-1
REVISION: original Rev.
DATE: 06 / 03 /2003

555 S.Kirk Rd. ST. CHARLES, IL.60174 phone: 630 / 443-1290, fax: 630 / 443-1390, www.kristel.com
e-mail: sales@kristel.com

Table of Contents

1. ELECTRICAL PERFORMANCE

2. PICTURE PERFORMANCE

3. LUMINANCE OUTPUT

4. APPROVALS

5. RELIABILITY

6. MECHANICAL SPECIFICATIONS

7. EXTERNAL CONTROLS

8. PLUG & PLAY

9. DISPLAY POWER MANAGEMENT

10.ATTACHMENTS TIMING

G.5 C -Humidity: 10 ~ 90 % -Display mode : 1280x1024/ 75Hz -Input signal : 0.777. Center 1 Point) -Contrast Ratio: 350:1 -Viewing Angle: min.60(down) CR=200 (min. ELECTRICAL PERFORMANCE All items must be performed under "standard test conditions" unless otherwise specified. 60 (left).2 LCD PANEL GENERAL SPECIFICATIONS -Model name :LG.040(H)x287.60(right ).PHILIPS LM181E06 -Screen diagonal :459.) -Signal Frequency: 80KHz max -Frame rate: 60Hz typ .232(V)mm -Pixel HxV :1280x1024 (RGB) -Pixel Pitch: 0.2805(per one triad)x0.1 ) ” -Display Area :359.75Hz max -Response Time:15 ms typ.1 STANDARD TEST CONDITIONS -Warm up time: 30 minutes -AC supply voltage: 100 ~ 240 VAC universal 0 0 -Ambient temperature: 25 C+/.hard coating (3H) .B) 2 -Typical white luminance: 250 cd/m (type.7 Vpp TTL level: Hsync & Vsync / DVI -External controls for picture position and size : Preset condition -Video generator : QUANTUM 801 SL or equivalent 1.74mm(18. -Surface treatment: :Anti-glare.216 colors (8-bit for R.60(up).2805 -Driver Element: a-Si TFT active matrix -Support Colors: 16.1. 1.

4 DC INPUT JACK -PIN (+12V. TTL compatible.1 AC INPUT RANGE -Voltage: 100 ~ 240 VAC universal -Frequency: 60 / 50 Hz 1.2 POWER CONSUMPTION < 45 W max.B. .3.5 φ x 2.G.5 INPUT SIGNAL: DVI (Digital Visual Interface) Video R.4 PULL-IN RANGE OF SYNCHRONIZATION -Horizontal frequency: 30 KHz ~ 80 KHz -Vertical frequency: 50 Hz ~ 75 Hz 1.7 Vpp Polarity: Positive Impedance: 75 ohm Synchronization Input H. at the specified voltage and frequency 1.3 POWER SUPPLY 1. GND) (5.5 plug) 1.5 x 9.V.3. Separate Sync. input Level: Analog 0.3.3 INRUSH CURRENT ° -Will not exceed 60A at 264V input for a cold start at 25 c 1.3.1.

232mm H-offset | a – b | < = 1 mm V-offset |c – d | < = 1 mm . 1.1 NORMAL DISPLAY SIZE -H=359.1.232mm 2.040mm -V=287.6 PICTURE PERFORMANCE -Implies "standard test conditions" unless otherwise specified. PICTURE SIZE AND POSITION OFFSET H-size 359 .6.040mm V-size 287 . -Values were measured after 10 minutes warm-up period.

horizontal.pixel • Total dots defects: <=5 pixel Continuous defects: Two continuous bright dots: <= 1pair Over three continuous bright dots (vertical.oblique): No Two continuous dark dots (vertical.horizontal. oblique): <=0 pair Distance between 2 bright dots: >=15mm Distance between 2 dark dots: >=5mm .pixel • Dark dots: dark pixel defects = 3 max.1 TILT /AB-CD/ = Tilt on top <= 0.5mm 2.2 DISPLAY QUALITY • Line defect: can’t be seen • Bright dots: bright pixel defects = 2 max.5 mm /EF-GH/ = Tilt on bottom <= 0.2. horizontal.oblique): <=0 pair Over three continuous dark dots (vertical.

LUMINANCE OUTPUT Under standard test conditions 3.3.10% -y= 0.232mm -Brightness uniformity of these 5 points is defined as below.4 SETUP -Light output setup: Pattern: full white Contrast: 50% 2 Brightness: 200 cd/m -Test pattern: NOKIA 4.040x287.10% -y= 0. brightness ) x 100% >= 80% 3.10% 0 2 -Test at 9300 K Preset 200 cd/m -x= 0.2 EMI FCC Class B and CE .311 +/.1 SAFETY UL and CE 4. -( Min.3 COLOR TEMPERATURE -x= 0. 3.313 +/. APPROVALS 4.1 BRIGHTNESS LEVEL 2 Input full white pattern.10% 0 2 -Test at 6500 K Preset 250 cd/m 3. brightness / Max.2 BRIGHTNESS UNIFORMITY 359.281 +/. More than 250 cd/m at center of screen with brightness and contrast at max.329 +/.

3 VIBRATION TEST & DROP TEST TBD 6. 7 Green Return 15 SCL 8 Blue Return . 6 RED Return 14 Vertical Sync.000hrs. 5.1 CONNECTOR HD15 Input Connector Pin No Signal Pin No Signal 1 Red Input 9 NC 2 Green Input 10 GND 3 Blue Input 11 NC 4 NC 12 SDA 5 GND 13 Horizontal Sync.2 ENVIRONMENTAL 0 Operating temperature : 0 ~ 50 C 0 Storage temperature : -20 ~ 60 C Humidity: 10 ~ 90% 5.1 MONITOR MTBF The MTBF of the monitor / per LG_Philips (. RELIABILITY 5...5. MECHANICAL SPECIFICATIONS: open frame 6.E06) specification: 40.

S Date 5+ 6 DDC Clock 14 +5V Power 22 T.D.M.D.M.M.M.S Date 1/3 Shield 19 T. 12 T.S Clock- C1 Analog Red C2 Analog Green C3 Analog Blue INVERTER CONNECTOR Pin 1 : vcc Pin 2 : vcc Pin 3 : backlight_enable Pin 4 : bkacklight_adjustment Pin 5 : gnd Pin 6 : gnd .D.D.S Clock+ H Sync.D.D.S Date 0/5 Shield 4 T.D.M.S Clock Shield 7 DDC Date 15 Ground(return for +5V.S Date 4.M.M.S Date 4+ 13 T. 17 T.M. 23 T.M.S Date 3+ 21 T. V Sync) 8 Analog Vertical Sync 16 Hot Plug Detect 24 T.D.D.M.M.S Date 1.S Date 2/4 Shield 11 T.S Date 5- 5 T.S Date 3.DVI Input Connector Pin Signal Assignment Pin Signal Assignment Pin Signal Assignment 1 T.M.M.S Date 2+ 10 T.S Date 1+ 18 T.D.D.D.D.M.S Date 0+ 3 T. 9 T.D.M.D.M.D. 20 T.S Date 0- 2 T.S Date 2.D.M.D.M.

Deutsch. Video. Exit. All parts & SUSPEND : The monitor is able to perform a quick start when both Horizontal and Vertical signals are active again. . DEFINITION OF MODES There are three mode of operation for the VT-18AE These are ON. EXTERNAL CONTROLS Front Controls: 7. OSD V_position 8. User( R-Gain. Sharpness OSD Control: OSD Time. (NOTE: Flash ROM with the language will comming soon!) Tools: OSD Control. G-Gain.1.7. Francais.3. H-sizs. Black Level Audio Control : Volume. Image . Select signal : VGA. 6500 K. Audio. B-Gain) Flesh Tone. Espnanol. V-position Language : English. STAND-BY/ SUSPEND and OFF ON : Both Horizontal and Vertical syncs are present and the monitor is in normal operation STAND-BY: Horizontal or Vertical sync is inactive per VESA DPMS and not operational. Brightness . communicate additional level of display capabilities. Italiano.OSD Menu: Select signal. Balance 0 0 Color Control : 9300 K. Hue. OSD H_position. Saturation Image Control : Auto-tune. PLUG & PLAY The Display Data Channel "DDC" function will allow the monitor the monitor to inform the host about it’s identity and depending on the level of DDC used . DVI Video Control : Contrast .2. Color. Power LED 7. Power Switch 7.4. DDC1: One uni-directional data channel DDC2: One bi-directional data channel 9. function key 7. Recall. H-position. Language Tool. H-phase.

000mm V TOTAL 449 =14.000mm 4.000 us 4.333 ms 600 =15.318 us 9 =0.000 Hz =60.122 ms 400 =12.907 us 120 =3.000 ms 3.478 ms VS WIDTH 33 =1.000mm 4.469 KHz =37.268 ms 449 =14.000mm 3.469 KHz =31. .941 Hz . .125 ms 2 =0.000 ms V SIZE 8 =0.222 ms 0 =0. .318 us 0 =0.318 us 0 =0.064 ms 3 =0.813 us 64 =2.907 us 88 =2.175 MHz 31. .853 ms V DISPLAY 525 =16.422 us 640 =25.200 us 120 =2.907 ms 35 =1.087 Hz =70.317 us H B-PORCH 48 =1.500 MHz 40.000 us 0 =0.080 ms V BORDER 6 =0.188 Hz =70.000mm 3.000mm 3.000mm 4.480 ms 350 =11.175 MHz 28. This is the lowest possible power state of the monitor that maintains an automatic on when both the Horizontal and Vertical signals are active again.049 ms 16 =0.607 ms 23 =0.579 ms 666 =13.800 ms V B-PORCH 60 =1.427 ms 4 =0.000 us 800 =16.268 ms 628 =16.683 ms 500 =13.322 MHz 25.813 us 96 =3.087 Hz =75.077 KHz fv =31.064 ms 2 =0.317 Hz =59.813 us 108 =3.400 us 96 =3.000mm 3.000 ms 0 =0.777 us 1056 =26.253 ms 480 =12. OFF : Both Horizontal and Vertical sync are inactive per VESA DPMS and all parts of the monitor are disabled .106 ms 6 =0.280 us HS WIDTH 48 =1. - VIDEO LEVEL 700mv 700mv 700mv 700mv 700mv 700mv WHITE LEVEL 700mv 700mv 700mv 700mv 700mv 700mv BLACK LEVEL 0 IRE 0 IRE 0 IRE 0 IRE 0 IRE 0 IRE 16 BIT DATA 0000 0000 0000 0000 0000 0000 H TOTAL 800 =31.000 MHz INTERLACE NO NO NO NO NO NO VIDEO ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR SYNC ON G? NO NO NO NO NO NO SYNC LEVEL .810 us 128 =3.400 us 1040 =20. 10.422 us 640 =20.000mm 3.907 us 54 =1.879 KHz =48.840 ms 600 =12.000mm 4.500 KHz =72.469 KHz =37. TIMING NAME VGA640X350-70 VGA720X400-70 VGA640X480-60 640X480-75 VESA800X600-60 VESA800X600-72 PIXEL RATE 25.064 ms 2 =0.000mm 4.667 us 800 =20.032 us H BORDER 8 =0. Recovery time will take longer than Stand-buy / Suspend mode.000 MHz 50.) Stand-by/Suspend mode:3W Off Mode: <3W 11.000mm HS OUTPUT ON(+) ON(-) ON(+) ON(+) ON(-) ON(-) ON(+) VS OUTPUT ON(-) ON(+) ON(-) ON(+) XS OUTPUT ON(+) ON(+) ON(-) ON(+) ON(+) ON(+) ON(+) SERR XS SELECT SERR SERR SERR SERR SERR Fh =31.000 us 640 =25.778 us 840 =26.778 us 900 =31.200 us 64 =1.800 us H DISPLAY 800 =31. POWER CONSUMPTION Normal operation: ~ 45W (max.000 us H SIZE 8 =0.422 us 720 =25.711 ms 480 =15.254 ms 0 =0.191 ms 7 =0.112 ms 23 =0.

000 MHz 75.498 ms 3 =0.064 ms 6 =0.023 KHz =64.000mm 3.000 MHZ INTERLACE NO NO NO NO NO NO VIDEO ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR ANALOG-COLOR SYNC ON G? NO NO NO NO YES NO SYNC LEVEL .660 us 1688 =12.600 ms 28 =0.385 Hz =75.000 us 0 =0.000mm 0 =0.920 us 240 =2.653 us 1024 =13.504 us H DISPLAY 1056 =21.000 us H SIZE 0 =0.462 us 176 =2.000 us 4.004 Hz =56.000 us 4.333 ms 768 =15.106 ms 3 =0.NAME 800X600-75 VESA1024X768-60 VESA1024X768-70 1024X768-75 NEC 1280X1024-60 1280X1024-75 PIXEL RATE 49.976 KHZ =46.481 us H B-PORCH 160 =2.219 us 104 =0.328 ms 1066 =13.000 ms 3.363 KHz =60.800 ms 768 =13.124 ms 29 =0.310 KHz =79.000 ms 3.000mm 4.000 ms 0 =0.000 ms V SIZE 0 =0.837 us HS WIDTH 160 =3.050 ms 3 =0.707 us 1664 =15.875 KHz =60.012 MHz 135.235 us 248 =1.272 ms 1065 =16. .000mm 3.000mm 0 =0.000 us 0 =0.162 us 1024 =13.616 us 136 =1. .092 us 144 =1.000mm 4.029 Hz =60.000 MHz 78.795 ms 1024 =15.599 ms 768 =12.813 us 96 =1.750 MHz 107.880 ms 806 =14.448 ms 6 =0.333 us 1024 =15.000mm 4.069 Hz =75.000mm 3.754 us 1328 =17.000mm V TOTAL 806 =16. 300mv - VIDEO LEVEL 700mv 700mv 700mv 700mv 700mv 700mv WHITE LEVEL 700mv 700mv 700mv 700mv 700mv 700mv BLACK LEVEL 0 IRE 0 IRE 0 IRE 0 IRE 0 IRE 0 IRE 16 BIT DATA 0000 0000 0000 0000 0000 0000 H TOTAL 1344 =20.513 ms 32 =0.000mm 3.047 ms 3 =0.038 ms V BORDER 0 =0.961 us 1280 =9. .232 us 136 =2.000mm HS OUTPUT ON(+) ON(-) ON(-) ON(+) ON(+) ON(+) VS OUTPUT ON(+) ON(-) ON(-) ON(+) ON(+) ON(+) XS OUTPUT ON(+) ON(+) ON(+) ON(+) ON(+) ON(+) XS SELECT SERR SERR SERR SERR SERR SERR Fh =48.000 us 0 =0.329 ms V DISPLAY 625 =13.000 Hz =70.500 MHz 65.804 ms V B-PORCH 29 =0.923 ms 1024 =12.000 ms 0 =0.067 us H BORDER 0 =0.000 ms 0 =0.677 us 1312 =16.000mm 4.972 us 144 =1.476 KHz fv =75.243 us 80 =1.003 us 1280 =11.475 ms VS WIDTH 21 =0.024 HZ .560 ms 600 =12.666 ms 800 =13.466 ms 38 =0.550 us 800 =16.

140 mm 130 mm signal cable. to: CN1 panel to: OSD block 106 mm 97 mm to:INVERTER D-sub 15 pin DVI conector .

LM181E06 Liquid Crystal Display Product Specification <FRONT VIEW> Ver 0.22. 2002 19 / 26 .0 MAR.

2002 20 / 26 .22.0 MAR. LM181E06 Liquid Crystal Display Product Specification <REAR VIEW> Ver 0.

4 DDCA_5V BASE13S L15 C67 BK-1608HS-601 0.01uF 2 DDC_SCL_A RED+ 4 VGA_5V 1 RED-_A R52 100 C72 0.6V C78 C79 GND B B 1 1 AGND GND DDCA_5V R56 10K 14 VGA_CONN VGA_PLUG 4 5 6 R55 4.01uF VS_A BLUE. May 05.6V 5. 拉拉拉拉) 1 2 5 AGND D 4 D 1 2 VGA_CONN 3 3 DDC_SDA_A AGND RED+_A R60 100 C73 0. 74LVT14 14 7 DDC_SDAA R41 NC DDC_SCLA ISP_SDA 4 R38 NC ISP_SCL 4 9 8 Reserved for AGND GND ISP & DDC2Bi U13D Functions GND 74LVT14 7 A A Title ANALOG INPUT Size Document Number Rev B NX5120 1.01 Date: Monday.4 R48 11 1 GND 100 6 DDC_SDAA DDC_SDA_A 12 2 7 BLUE+_A R58 100 C69 0.4 1 8 R47 14 4 A0 --> A2 A0 VCC 100 VGA_VCC 2 A1 WP 7 9 do not 3 6 DDC_SCLA DDC_SCL_A 15 5 R63 R64 R65 A2 SCL VGA_CONN +3V3 care 4 GND SDA 5 10 75 75 75 24AA02 VGA S2 2 2 GND Pins 6/7/8 are R/G/B C ZD2 ZD1 C47 C return lines resp.01uF HS_A BLUE+ 4 13 3 U15 8 BLUE-_A R50 100 C68 0.1uF GND AGND 75-ohm terminating resistor GND 1 1 very close to the VGA U13A 14 14 AGND conn.6V AGND 0.01uF GREEN.6V 5.1uF R40 R39 GREEN+_A R59 100 C71 0. 5 4 3 2 1 CNA7 VGA_VCC 13 BLUE+_A SOT23 12 11 GREEN+_A 10 9 RED+_A 3 8 D4 7 HS_A VGA_5V BAV70 +5V 6 VS_A (10 mil.7K U13C Connect two grounds at one single point only. 5.01uF RED. 2003 Sheet 2 of 7 5 4 3 2 1 . 74LVT14 R57 47 1 2 13 12 VS 4 (8 mil) U13F U13B 74LVT14 7 7 14 14 74LVT14 47 R49 3 4 11 10 HS 4 2 2 U13E ZD3 ZD4 47P 47P 74LVT14 7 7 5.01uF GREEN+ 4 47K 47K CN7 S1 GREEN-_A R51 100 C70 0.

01 Date: Monday.4 RED C1 C2 DVI_5V D5 +5V GREEN BAV70 SOT23 BLUE C3 C4 1 2 HS 3 GND C5 3 34 DDCD_5V Shell 1 2 R61 R62 10K 10K DGND B B R66 100 R53 NC SCL_HDCP 4 R67 100 R54 NC SDA_HDCP 4 2 2 ZD6 ZD5 U16 Reserved for HDCP Function 5. 5 4 3 2 1 For TMDS input trace: Relative Dielectric Constant (permittivity) 4.5 mil) DVI 0. May 05. RX1+IN RX1. A A DGND GND Title DIGITAL INPUT Size Document Number Rev B NX5120 1. RX0+IN RX0.018" spacing between the two traces of the pair 33 This results in 52 Ohms single-ended and 102 Ohms differential.4 RX0+ 18 RX0+ 4 GND 19 RX5. 24 RXC.6V 5.1uF 1 1 4 GND SDA 5 24AA02 GND A0 --> A2 GND do not care GND Connect two grounds at one single point only.012" wide trace width 1 oz copper (1. Shell 1 RX2-IN RX2.6V 1 8 A0 VCC 2 A1 WP 7 3 6 C81 A2 SCL 0. 4 RX4+ 5 6 SCL_IN SCL SDA_IN SDA 7 VS 8 9 RX1-IN RX1. 12 13 10K RX3+ 5V 14 C GND 15 C 16 HOT_PLUG HP 17 RX0-IN RX0. 20 RX5+ 21 GND 22 23 RXC+IN RXC+ RXC-IN RXC+ 4 RXC.008" dielectric thickness CN8 0.4 RX2+ 2 RX2+ 4 GND 3 RX4.8 D D 0. RX2+IN RX2.4 RX1+ 10 RX1+ 4 11 DVI_5V GND R68 RX3. 2003 Sheet 3 of 7 5 4 3 2 1 .

5 RVDD RVDD RVDD RVDD RVDD RVDD RVDD RVDD RVDD AVDD_SDDS AVDD_DDDS +2V5 +2V5 L19 3_3V_RGB 160 AVDD_ADC Close to respective power Pins 164 AVDD_BLUE EC26 + + C56 0.1uF +5V RMADDR0 A1 +5V ROM_DATA0 N/C 12 1 132 A0 NC Reserved RVSS RVSS RVSS RVSS RVSS RVSS RVSS RVSS RVSS CVSS CVSS CVSS CVSS CVSS ROM_OEn 36 131 R21 10K ROM_OEn Reserved 24 32 OE VCC 0..5 VDD_RX2_2.1uF Close to respective power Pins GND GND GND GND +2V5 +3V3 +3V3 3_3VSDDS EC15 + C50 C39 C34 C28 C27 C26 C24 C29 C32 C42 L18 22U 16V 3_3VRDDS 0.5 VDD_RX1_2. PD7/ER7 ER6 2 BLUE+ 163 61 1 BLUE+ PD6/ER6 ER5 2 BLUE.1uF 168 Clock Trace 8 mil 22U 16V EC27 AVDD_GREEN 172 EC17 + 0. program this bit to 0 CN5 32-Pin PLCC Socket 1 +5V ROM_ADDR8 HOST_PORT_EN 0 If using 2-wire host protocol.5 PD32/OG0 OR7 OR[0. 195 RXC- 3 RX2+ 179 RX2+ 3 RX2.1uF 0..1uF AGND_RXC PD36/OG4 OG3 198 96 1N4148 22U 16V AGND_RXPLL PD35/OG3 OG2 95 C65 PD34/OG2 OG1 94 PD33/OG1 OG0 199 93 GND DGND VDD_RXPLL_2.. 162 60 3 BLUE.5 CVDD_2.3 VDD1_ADC_2.3 VDD_DDDS_3. PD5/ER5 ER4 2 HS 137 59 2 HSYNC PD4/ER4 ER3 2 VS 136 58 MCP809 VSYNC PD3/ER3 ER2 159 57 ADC_TEST PD2/ER2 ER1 56 PD1/ER1 ER0 3 RXC+ 194 55 RXC+ PD0/ER0 3 RXC.1uF 0.1uF 0.5 CVDD_2..1uF 0. RED.1uF 0.7] 5 EC24 + 92 6 PPWR PD31/OR7 OR6 22U 16V 149 91 6 PBIAS AVSS_RPLL PD30/OR6 OR5 145 90 AVSS_SDDS PD29/OR5 OR4 140 87 GND AVSS_DDDS PD28/OR4 OR3 2 VGA_PLUG 86 GND PD27/OR3 OR2 85 +3V3 PD26/OR2 OR1 113 84 C44 PPWR PD25/OR1 OR0 114 83 C +5V 5P X1 PBIAS PD24/OR0 C 14.1uF 0. program this bit to 0 FLASH/ Prom-Jet Socket UART_DO 2 UART_DI TXD 3 RXD ROM_ADDR9 OCM_START 1 1 = OCM becomes active after OCM_CLK is stable 4 GND ROM_ADDR(12:10) USER_BITS(7:5) x Available for reading from a status register GND ROM_ADDR13 OSC_SEL 0 0 = XTAL and TCLK pins are connected RS232 Debug Port Title ROM_ADDR14 OCM_ROM_CFG(1) 1 1 = All 48K of ROM is in external ROM gm5120 Size Document Number Rev C NX5120 1.7K PD10/EG2 EG1 Reset 2 RED+ 171 RED+ PD9/EG1 64 MCP809 170 63 EG0 Circuit 2 RED.5 VDD_DPLL_3..1uF 22uF 16V 0.7] 5 +3V3 AGND_GREEN OB7 169 110 GND DGND L20 AGND_RED PD47/OB7 OB6 109 3V3_DVI PD46/OB6 OB5 173 108 AVDD_IMB PD45/OB5 OB4 181 107 RC Reset or Reset IC EC29 + 0.1uF 0.318MHz XTAL 151 XTAL EB[0. May 05. GPO0 3 RX1+ 185 120 RX1+ GPO1 3 RX1.1uF 0.7K 8 49 LED_ORGE 6 10K R31 RMADDR14 ROM_ADDR15 GPIO10 R71 4.3 VDD_RX0_2.1uF 0. PD8/EG0 2 GREEN+ 167 ER[0.1uF 0.1uF 0.7K 2 BANK0 GPIO19 PD20/EB4 EB3 1 208 76 C45 VGA_PLUG GPIO18 PD19/EB3 EB2 V6300 1 75 GND 5P ISP_SDA GPIO17 PD18/EB2 EB1 205 74 +5V ISP_SCL GPIO16/HFS PD17/EB1 EB0 204 73 GND GPIO22/HCLK PD16/EB0 2 ISP_SDA EG7 EG[0. GPO4 124 1% GPO5 125 R42 1K GPO6 174 126 B +5V REXT GPO7 B 127 RMADDR15 NC R20 4.1uF 0.1uF 0.1uF 0.1uF 0. 166 62 GREEN.1uF 0.7] 5 DGND +2V5 AGND_IMB OG7 178 102 DGND L21 AGND_RX2 PD39/OG7 OG6 184 101 R28 2V5_RXPL AGND_RX1 PD38/OG6 OG5 190 100 4.1uF 0. 192 123 +5V 3V3_DVI RX0.5 CVDD_2.5 VDD2_ADC_2. 180 119 RX2.1uF 0. GPO2 3 RX0+ 191 122 RX0+ GPO3 3 RX0.1uF 0..1uF AVDD_RX2 PD44/OB4 OB3 187 106 22U 16V AVDD_RX1 PD43/OB3 OB2 193 105 +3V3 C57 C59 C61 C63 C64 AVDD_RX0 PD42/OB2 OB1 196 104 AVDD_RXC PD41/OB1 OB0 103 PD40/OB0 175 OG[0.7] 5 GND GREEN+ ER7 2 GREEN.1uF 0.1uF 0.7K AGND_RX0 PD37/OG5 OG4 197 99 D3 EC14 + 0. 2003 Sheet 4 of 7 5 4 3 2 1 .7] 5 U10 6 72 2 ISP_SCL GPIO14/DDC_SCL PD15/EG7 EG6 3 3 SCL_HDCP 7 71 VCC GPIO15/DDC_SDA PD14/EG6 EG5 3 SDA_HDCP 70 _RESET PD13/EG5 EG4 2 5 69 RST RESETn PD12/EG4 EG3 4 66 R29 GPIO21/IRQn PD11/EG3 EG2 1 65 GND 4.1uF 0.5 CVDD_2.1uF 22uF 16V 0.1uF U7 88 26 20 37 53 67 81 97 2 GND D D +3V3 GND AVDD_RPLL VDD_SDDS_3.1uF C43 150 146 144 141 139 188 182 176 155 153 203 134 148 111 129 0.7] 5 2 U9 TCLK EB7 152 80 TCLK PD23/EB7 EB6 1 79 VDD BANK1 PD22/EB6 EB5 2 206 78 RES R27 MUTE GPIO20 PD21/EB5 EB4 3 MUTE 207 77 GND 2.1uF 0.01 Date: Monday.1uF R7 R8 BOOTSTRAP SIGNALS 22 CE GND 16 GND 112 130 133 135 202 156 154 177 183 189 147 143 138 U5 21 38 54 68 82 98 27 89 ADDRESS NAME SET DESCRIPTION C51 10K 10K 3 gm5120 8 1 GND VCC A0 7 2 SCL WP A1 ROM_ADDR(4:0) USER_BITS(4:0) x Available for reading from a status register PQFP208 6 SCK A2 3 GND SDA 5 4 SI VSS ROM_ADDR5 HOST_ADDR(5) 0 Program this bit to 0 A GND 24LC16B A ROM_ADDR6 HOST_ADDR(6) 0 Program this bit to 0 +5V GND GND NVRAM ROM_ADDR7 HOST_PROTOCOL 0 If using 2-wire host protocol. 5 4 3 2 1 +3V3 +3V3 L17 L16 3_3VDDDS EC22 + C40 C41 + C36 C37 22U 16V EC21 +3V3 0.7K 9 48 LED_GREN6 RMADDR13 ROM_ADDR14 GPIO9 10 128 R33 10K R32 RMADDR12 ROM_ADDR13 NC 11 +3V3 RMADDR11 ROM_ADDR12 12 10K RMADDR10 ROM_ADDR11 UART_DI U8 AT49HF/F010-45JC 13 ROM_ADDR10 GPIO4/UART_D1 44 R30 RMADDR9 14 45 UART_DO 0(NC) ROM_WE RMADDR8 ROM_ADDR9 GPIO5/UART_D0 31 15 BANK1 WE ROM_ADDR8 SCL 52 Select ISP & DDC2Bi BANK0 RMADDR7 GPIO13/NVRAM_SCL SDA 30 16 51 R24 R25 R26 NC/A17 RMADDR6 ROM_ADDR7 GPIO12/NVRAM_SDA GPIO8 Functions from 2 17 39 GPIO8 6 RMADDR15 A16 RMADDR5 ROM_ADDR6 GPIO8/IRQINn ROM_WE DSUB15 or DVI 3 18 50 10K(NC) 10K 10K RMADDR14 A15 RMDATA7 RMADDR4 ROM_ADDR5 GPIO11/ROM_WEn GPIO7 29 21 19 47 GPIO7 6 RMADDR14 RMADDR13 A14 DQ7 RMDATA6 RMADDR3 ROM_ADDR4 GPIO7 GPIO6 28 20 22 46 GPIO6 6 RMADDR9 RMADDR12 A13 DQ6 RMDATA5 RMADDR2 ROM_ADDR3 GPIO6 GPIO3 4 19 23 43 GPIO3 6 RMADDR8 RMADDR11 A12 DQ5 RMDATA4 RMADDR1 ROM_ADDR2 GPIO3/TIMER1 GPIO2 25 18 24 42 GPIO2 6 RMADDR10 A11 DQ4 RMDATA3 RMADDR0 ROM_ADDR1 GPIO2/PWM2 GPIO1_PWM1 23 17 25 41 PWM1 6 RMADDR9 A10 DQ3 RMDATA2 ROM_ADDR0 GPIO1/PWM1 GPIO0_PWM0 26 15 40 PWM0 6 RMADDR8 A9 DQ2 RMDATA1 RMDATA7 GPIO0/PWM0 27 14 28 RMADDR7 A8 DQ1 RMDATA0 RMDATA6 ROM_DATA7 5 13 29 RMADDR6 A7 DQ0 RMDATA5 ROM_DATA6 6 30 RMADDR5 A6 RMDATA4 ROM_DATA5 7 31 201 RMADDR4 A5 RMDATA3 ROM_DATA4 Int_Test CLKOUT 8 32 RMADDR3 A4 RMDATA2 ROM_DATA3 9 33 RMADDR2 A3 RMDATA1 ROM_DATA2 +5V C20 10 34 200 GND1_ADC GND2_ADC VSS_DDDS VSS_SDDS A2 ROM_DATA1 N/C VSS_DPLL RMDATA0 GND_RX2 GND_RX1 GND_RX0 RMADDR1 11 35 142 0.1uF 0. 186 121 RX1.1uF C53 C55 C54 AVDD_RED TCON_OCLK R18 33 DISP_CLK 118 DISP_CLK 5 22U 16V DCLK/TCON_OCLK R15 33 DEN 157 115 DEN 5 C38 C25 C33 C48 C49 C66 C58 C60 C62 SGND_ADC DEN/TCON_ECLK FSYNC R17 33 DVS 158 117 DVS 5 GND GND GND AGND_ADC DVS/TCON_FSYNC R16 33 DHS 161 116 DHS 5 GND AGND_BLUE DHS/TCON_LP 165 OB[0.1uF 0.

47uF 470U 25V CN2 AUD_LOUT + 4 IN2 OUT2 17 1 2 6 VOLUME VAROUT_2 5 C76 R43 C77 R44 2.1uF A A Title AUDIO AMP Size Document Number Rev B NX5120 1. 2003 Sheet 5 of 7 5 4 3 2 1 .01 Date: Monday.1uF C C U6 12 11 15 16 TDA7496L MUTE STBY VSS VSS CN9 C83 EC5 BASE2 PHONEJACK STEREO SW L23 BEAD 0. May 05. 5 4 3 2 1 D D AUD_5V 2 10K D6 5.47uF 470U 25V CN10 AUD_R R46 22K AUD_ROUT + 5 9 IN1 OUT1 14 1 4 2 3 L22 BEAD 7 AUD_L R45 22K VAROUT_1 2 1 C82 EC4 BASE2 0.00mm 220P 220P 10 GND GND GND GND GND GND GND 22K 22K SVR NC + EC19 13 18 19 20 470U 25V 1 2 3 8 B B R22 22K 2 PWM1 EC18 + C35 10U 25V 0.1V R70 +12V R9 R10 100R 0805 CP6 10K 1 1 2 R11 3 10K D1 1 Q2 + 2 1 2 MUTE MMBT3904 EC12 C19 + EC11 1uF 470U 25V DL4001SMCT 2 Hi:MUTE 0.

1uF 0.25H 4 OG[0..1uF 18 TX2+O 19 U2 TX2-O 20 DS90C385MTD 26 21 22 1 9 TSSOP56 GND R5 TX1+O 4 OR[0.1uF GND OB3 TXIN19 LVDSGND 22 TXIN20 OB4 23 34 PLLVCCO OB5 TXIN21 PLLVCC 24 TXIN22 OB6 16 35 + EC8 C13 L6 OB7 TXIN16 PLLGND 18 TXIN17 PLLGND 33 22U 16V 0.1uF TX3-E CN1 C 25 TXIN23 GND 53 1 DHS 27 29 TXCK+E 4 DHS TXIN24 GND TXCK-E 2 DVS 28 21 4 DVS TXIN25 GND 3 DEN 30 13 4 DEN TXIN26 GND TX2+E 4 5 +3V3 DISP_CLK GND TX2-E 5 4 DISP_CLK 31 TXCLKIN 6 R_FB 17 7 TX1+E TX1-E 8 9 TX0+E 10 GND GND +3V3 TX0-E 11 12 L2 TX3+O 13 TX3-O 14 15 C15 C14 C5 C10 TXCK+O 16 TXCK-O 17 0. 40 EG4 12 39 TXCK+E +3V3 EG5 TXIN13 TXCLKOUT+ 14 TXIN14 EG6 8 L5 EG7 TXIN10 LVDSVCCE 10 TXIN11 LVDSVCC 44 4 EB[0. 5 4 3 2 1 L3 +3V3 C7 C11 C17 C16 0.1uF U3 DS90C385MTD 26 1 9 TSSOP56 GND R6 4. TX1+O 29 3 TXIN6 TXOUT1+ 45 30 OR6 50 42 TX2-O OR7 TXIN27 TXOUT2.7] D ER0 51 32 LVDS_ON ER1 TXIN0 PWRDWN PPWR 4 52 COPPER-CLOSE ER2 TXIN1 TX0-E 54 TXIN2 48 1 2 ER3 TXOUT0. TX0+E 55 TXIN3 47 ER4 TXOUT0+ TX1-E 56 TXIN4 46 ER5 TXOUT1..7] 2 TXIN5 TXOUT2+ 41 38 TX3-O OG0 TXOUT3..1uF 0..1uF 0. TX2+O DF14A-30P-1.7] TX1-O 23 4. May 05.7] TXIN11 LVDSVCC OB0 15 49 + EC7 C6 OB1 TXIN15 LVDSGND +3V3 VCC_PNL 19 TXIN18 LVDSGND 43 OB2 20 36 22U 16V 0. TX2+E 2 TXIN5 TXOUT2+ 41 38 TX3-E GND GND 4 EG[0. TX3+O 4 TXIN7 TXOUT3+ 37 2 2 2 2 OG1 6 CP4 CP3 CP2 CP1 OG2 TXIN8 7 TXIN9 OG3 11 40 TXCK-O OG4 TXIN12 TXCLKOUT.01 Date: Monday.1uF 25 TXIN23 GND 53 DHS 27 29 DVS TXIN24 GND A 28 TXIN25 GND 21 A DEN 30 13 TXIN26 GND +3V3 GND 5 DISP_CLK 31 TXCLKIN R_FB 17 Title PANEL INTERFACE GND GND Size Document Number Rev Custom NX5120 1.1uF 0. TX1+E 3 TXIN6 TXOUT1+ 45 ER6 50 42 TX2-E ER7 TXIN27 TXOUT2.7] EG0 TXOUT3- 4 37 TX3+E EG1 TXIN7 TXOUT3+ 6 TXIN8 EG2 7 EG3 TXIN9 TXCK-E 11 TXIN12 TXCLKOUT.1uF 0. TX0+O 27 55 TXIN3 TXOUT0+ 47 28 OR4 56 46 TX1-O OR5 TXIN4 TXOUT1.1uF EB3 TXIN19 LVDSGND L7 22 TXIN20 EB4 23 34 PLLVCCE VCC_PNL EB5 TXIN21 PLLVCC 24 TXIN22 EB6 16 35 + EC10 C18 EB7 TXIN16 PLLGND TX3+E 18 TXIN17 PLLGND 33 C 22U 16V 0... TXCK+O +3V3 12 TXIN13 TXCLKOUT+ 39 OG5 14 OG6 TXIN14 L4 1 1 1 1 8 TXIN10 OG7 10 44 LVDSVCCO 4 OB[0.7K CP10 V V V D 4 ER[0.7] EB0 15 49 + EC9 C12 EB1 TXIN15 LVDSGND +3V3 19 TXIN18 LVDSGND 43 EB2 20 36 22U 16V 0. 2003 Sheet 6 of 7 5 4 3 2 1 .1uF 0.7K V V V OR0 PPWR 24 51 TXIN0 PWRDWN 32 25 OR1 52 TX0+O OR2 TXIN1 TX0-O TX0-O 26 B 54 TXIN2 48 B OR3 TXOUT0.

020 CP9 + 3 6 S D 3 SHDN 6 4 5 1 2 DRI G D C84 4 5 33uH 3A FB GND C85 C86 AIC1578 R34 GND 0.1uF 470U 16V 1 2 10M U12 U11 + Right Angle 1 8 CEM9435A CP8 EC32 VIN CS+ L14 D 1 8 1 2 D 470U 16V R35 S D C4426-060128YB R23 +5V 2 DUTY 7 2 7 GND CS.01uF C C U14 +2V5 Sanyo TM181SX-76N02: 5V/ 950mA RT9164-25CLR TO252 D7 1 2 1 3 550mA(Chip) JP1 L1 GND +5V IN OUT CONN PLUG 2x2 U1 MLB-321611-0120P-N1(NP) DL4001SMCT 40mil S CEM9434 D C75 + EC28 + EC30 C74 1 4 1 8 +5V 1 4 S D 2 +3V3 2 2 3 3 2 S D 7 0.01uF 100U 16V CP5 22U 16V 0.1uF 2200pF 0.1uF 2mm 100U 16V KEY_RIGHT GPIO 6 2 5 6 7 8 RP1 3 R12 KEY_LEFT GPIO 7 GND CN3 LED_GREN 1 2 Q4 10K 10K 1 KEY_AUTO GPIO 8 R2 4.01 Date: Monday.1uF 22U 16V NC GND LED_ORG CN4 L11 BK-1608HS-601 JST-S8B-ZR LED_GRN INVERTER INTERFACE 1 GND A 2 A RIGHT 3 2 GPIO6 8 1 7 8 4 7 2 5 6 LEFT 2 GPIO7 MENU 5 2 GPIO3 6 3 3 4 6 5 4 1 2 AUTO 2 GPIO8 7 4.1uF + EC16 C23 C22 1 100U 16V C21 1000U 6.1uF 0.1uF 3 6 40mil S D 4 G D 5 1 3 EC3 R1 100K IN OUT VCC_PNL + GND G + EC1 C2 0.1uF 7. 2003 Sheet 7 of 7 5 4 3 2 1 .5K FB C31 + EC23 1000U 6.1uF 100U 16V 1000U 6. May 05.2K F 0.7K BKLT_EN 2 4 PBIAS BKLT_ADJ 3 MMBT3904 R3 1K 2 4 PWM0 4 4 3 2 1 L9 BK-1608HS-601 5 ON_OFF C8 6 2 GPIO2 + EC6 C4 HEADER 6/SM L10 BK-1608HS-601 0.3V 2200pF GND D2 C46 R36 1N5820 C30 + EC20 2.7K RP2 L12 8 Title BK-32164S-601-T GND POWER L13 USER INTERFACE BK-1608HS-601 Size Document Number Rev Custom NX5120 1.1uF 1000U 6.3V 0. 5 4 3 2 1 +12V L24 F1 NOC9080-A501 CN6 24V/5A 1 3 2 C80 C52 + EC25 EC31 300R/5A R37 CP7 PV-564DA 470U 16V 2200pF 0.3V 0.3V U4 AIC1084-33CM TO263 +3V3 2200pF GND +5V 3 IN OUT 2 210mA(Chip) ADJ GND GND GND GND + EC13 0. 220 S D WR-C-5W-0.1uF C1 FL1 2 GND KHLC-010 3 1 Q1 PANEL POWER GND 4 PPWR MMBT3904 GND +5V R4 10K C9 2 NC B +5V GND B R13 GND 220 LED_GREEN GPIO 10 L8 +12V R14 MLB-321611-0120P-N1 +3V3 LED_ORANGE GPIO 9 220 3 POWER_ON/OFF GPIO 2 C3 1 Q3 + EC2 2 LED_ORGE MMBT3904 KEY_MENU GPIO 3 0.