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Introduction to Electronics

Part - II

Mrinal K Mandal
mkmandal@ece.iitkgp.ernet.in
Department of E & ECE
I.I.T. Kharagpur. 721302.
www.ecdept.iitkgp.ernet.in
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Bipolar Junction Transistor (BJT)
One of the most important inventions (John Bardeen, Walter Brattain and
William Shockley at AT & T Bells lab, got Nobel in 1956).
It has three layers (npn or pnp): two pn junctions.
A three terminal device: emitter, base and collector.
Main applications: amplifiers, oscillators, switches, logic gates.

Bardeen n n p
p

Base
E C

p n p
B Emitter Collector
Brattain
Shockley
BJT
The first transistors. 2
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Bipolar Junction Transistor (BJT)
B (base) B
Base
E p n p C E n p n C

(emitter) (collector)
emitter collector
C C
Conventional
B current flow B
direction
E E
Analogy with a water tap point.
pnp- transistor npn- transistor

E
E

BJT with a heat sink


Different types of transistors. 3
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT
Two pn junctions: barrier voltages are negative on the p-side and positive on
the n-side.
Bipolar device: two types of charge carrier are involved in the current flow.
The base region (mid-layer) is thin and lightly doped.
The emitter emits electron in npn, holes in pnp and collector collects them.
In normal operation, the emitter-base junction is forward-biased: carrier
injection.
The collector-base junction is reverse-biased, its depletion region penetrates
deep into the base.
emitter base collector C

+ - C
E B
+ -
p n p
+ - E
+ -
VEB VBC pnp- transistor

Holes are the majority charge


carriers in an pnp device.
pnp- transistor biasing 4
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT Operation
emitter base collector C
- + C
E B
- +
n p n
- +
- E
VBE + VCB
npn- transistor

Electrons are the majority


npn- transistor biasing charge carriers in an npn device.

Forward bias base-emitter junction works as a diode: majority carriers electron


in n-type emitter drift into p-type base.
Holes also drift from base into emitter small because the base is thin and
lightly doped.
The electrons diffused into the collector-base depletion region they are
drawn across the collector-base junction collected at the collector terminals
(~96-99.5%).
In the bas region, a small percentage of the injected electrons recombines
with holes base current. 5
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT Voltages and Currents
IC IC
RC RC
- IB C + +
IB C - B
B VCC
VCC + VCE
- - VEC -
VBB RB VEB + + VBB RB VBE -
+ E IE
+ E IE -

pnp-transistor biasing: common npn-transistor biasing: common


emitter (CE) configuration. emitter (CE) configuration.

Applying KCL, I=
E IC + I B
IE IC
Common emitter current gain: dc = I C I B .
+ +
Common base current gain: dc = I C I E . RC
VCC
VEE RB
IB IB
IC = ( IC + I B ) IC = . - -
1
npn-transistor biasing: common base
IC = I B = = .
1 +1 (CB) configuration.
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Different Configurations
IC
RC IC
+ IE
IB C +
B VCC + RC +
+ VCE
- VEE RB VCC
VBB RB VBE - IB
E IE - -
-

Common base (CB) configuration.


Common emitter (CE) configuration.

IE
RC
IB E + +
B VCC
+ VCE
-
VBB RB VBE -
C IC
-

Common collector (CC) configuration.


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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT Characteristics: Input Characteristics
IC 30
A
RC 20
RB + IB (A)
IB + 10
VCC
+ A V VCE
- 0
+ - 0 0.3 0.6 0.9
VBB VBE V IE
A VBE(V)
- -
Input characteristics of a npn-
transistor in CE configuration.
npn-transistor in common emitter (CE)
configuration.
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Input parameters: I B , VBE 20


IB (A)
Output parameters: I C , VCE 10

VBE 0
0 -0.3 -0.6 -0.9
Base current: I B = I B 0 exp VBE(V)
T
V
Input characteristics of a pnp-
transistor in CE configuration.
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT Characteristics: Output Characteristics
Input loop: DC load line
VCC /RC IB = 40 A
Applying KVL,
=
VBB I B RB + VBE 15 = 30 A
Saturation
region Active
Output loop: 10 = 20 A region
IC (mA)
Applying KVL,
Q-point = 10 A
=
VCC I C RC + VCE 5
V V = 0 A Cut-off
IC =
CE + CC . load line region
RC RC 0
0 4 8 12 VCC
=
At I C 0,=
VCE VCC and VCE (V)
VCC Output characteristics for a npn
at=
VCE 0,=
IC . transistor in CE configuration.
RC
Active region: base-emitter junction is in FB but base-collector junction is in
RB., Saturation region: both junctions are in FB, Cut-off region: both are in RB.
A saturation current component IC = ICBO flows even for IB = 0. [=
I C I E + I CBO ]
Consider VCE|sat = 0.2 V, if the transistor in saturation. 9
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Some Important Characteristics
In active region, collector current IC is almost independent of VCE: constant
current source.
IC can be tuned by IB (linear model, function of VBE): voltage controlled current
source.
IC is mostly due to the flow of charges injected from a high-concentration
emitter into the base where there are minority carriers that diffuse toward the
collector: a minority-carrier device.
When using as an amplifier, the DC source supplies the energy required to
amplify a signal: fix the dc operating point (Q-point) first.
Linear approximation (output is an exact replica of the input signal) is valid only
for small signal amplitudes.

Non-linear device:
Does not have a linear relationship between current and voltage.

Examples: diode, transistors.

I = I 0 exp (V VT ) .
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Voltage Amplification
A BJT works as an amplifier Saturation
only in active region and under region
VCC /RC IB = 40 A
proper biasing condition.
In a class A amplifier, Q-point is IC (mA) 15 = 30 A
so selected that a BJT always Active
ic
remains in the active region. 10 ib = 20 A region
Slope of the load line and
hence voltage amplification
t (mS) = 10 A
5
depends on RC.
= 0 A Cut-off
In CE configuration, when the region
0
input voltage (vbe) increases, 0 4 8 12 VCC
the output voltage (vce) VCE (V)
vce
decreases.
t (mS)
Output characteristics for a npn transistor in
CE configuration.

Maximum possible variation in VCE =


VCC - 0.2 V
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Why Need Biasing?

In the following circuit, IB changes by 10 A because of a VBE change by 20 mV.


Calculate the change in VCE. Given that = 100.
IC
Solutions: RC = 6 k
I C =I B =100 20 A =2 mA. VCC =
VCE =
I C RC =
26 VBB = 0.7 V VCE 20 V
=12 V . vb = 20sin t mV
VBE
IE

40
Linear
approximation Biasing: to set the dc
IB (A) operating point.
IC = IB, only in active region.
0
0.7
VBE(V) In lab. experiment, dont forget to
switch on the dc power supply.
Input characteristics of the BJT.
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT in Saturation

In the previous example, recalculate the change in VCE if RC is changed to 12 k.

IC
Solutions: RC = 12 k

I C =I B =100 20 A =2 mA. VCC =


VCE =
I C RC =
2 12 VBB = 0.7 V VCE 20 V
= 24 V (> VCC ) wrong . vb = 20sin t mV
VBE
IE

High IB drives the BJT in saturation.


Considering maximum possible variation,

VCE max =
VCC 0.2
=19.8 V Neglecting the contribution of ICBO.

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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT In Saturation
IC
Calculate IB and IC. Given that = 100, RB =
10 k, RC = 1 k, VBB = 5 V and VCC = 12 V. RC
IB C + +
Solutions: B VCC
+ VCE
Applying KVL in the input loop, -
VBB RB VBE -
E IE
=
VBB I B RB + VBE -
VBB VBE 5 0.7
=
IB = = 0.43mA.
RB 10k
+VCC
I C = I B = 43mA IC
wrong. RC
VCE =
VCC I C RC = 31 V ?
12 43 =
IB +
So, the transistor is in saturation. +VBB VCE
RB VBE -
Applying KVL in the output loop, IE

VCC VCE 12 0.2


IC = = 11.8 mA. npn-transistor in CE configuration.
RC 1k
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
BJT Biasing
Biasing: setting up the dc operating point (quiescent point).
Minimize number of dc sources, increase stability of the circuit (eg. VBE and ICBO
depend on temperature, varies widely from transistor to transistor).
Three popular biasing schemes:
1. Base bias
2. Collector-to-base bias
3. Voltage divider bias.

Analysis objectives:
Draw the dc load line (apply KVL for the input and output loops, assume
suitable VBE value)
Identify Q-point (IBQ, ICQ, VCEQ)
Estimate the maximum variation of the output voltage.

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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
1. Base Bias
Input loop: +VCC
R B=
I B VCC VBE
IB IC
VCC VBE
IB = . RB RC
RB +
vout

In forward active region: vin VCE


+
-
IC = I B , VBE
IE
-
VBE = 0.7 V( Si), 0.3 V( Ge) .
Base bias configuration (npn-BJT).
Output loop:
R C=
I C VCC VCE DC load line I = 40 A
B
VCC /RC
VCC VCE
I CQ = 15 = 30 A
RC
VCEQ =VCC R C I C . 10 = 20 A
IC (mA)
Q-point = 10 A
Load line: At I C 0,=
= VCE VCC 5
= 0 A
V V VCC
IC =
CE + CC . VCE 0,=
= IC . 0
RC RC RC 0 4 8 12 VCC
VCE (V) 16
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Base Bias
Calculate the Q-point values ( = 100). +18 V
IC
IB
Solutions: 2.2 k
VCC VBE 18 0.7 470 k
I BQ = +
RB 470 103 VCE
Assuming +
= 36.8 A. active condition. VBE -
- IE
I CQ =
= I BQ 3.68 mA.

VCEQ =
VCC R C I C =18 3.68 2.2
Assumption is correct.
= 9 .9 V.

Recalculate the Q-point values for = 50.


A BJT with the same number
I CQ =
= I BQ 1.84 mA. may have wide variation of
VCEQ =
VCC R C I C 13.95 V.
= (high manufacturing tolerance)

VCEQ changes by 41% when changes by 50%.


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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Base Bias
-18 V +18 V
+ IE
IB IC VEB +
2.2 k - VEC
470 k - -
IB
VEC
-
+ 470 k IC 2.2 k
VEB
+ IE

pnp transistor in base bias configuration.

In the above circuit, Vcc is changed to 12 V. Calculate the new Q-point ( = 100).

V= VBE + RB I B VCEQ =VCC R C I C =12 2.4 2.2


CC

VCC VBE 12 0.7 = 6.72 V.


= I BQ =
RB 470 103
= 24 A.
The transistor is working in the
forward active region.
I CQ =
= I BQ 2.4 mA.
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Base Bias Circuit Design
Determine the resistor values for the specified Q- +VCC
value.
IB IC
Input loop: RB RC
vout
R B I=
BQ VCC VBE +
vin VCE
VCC VBE I CQ +
RB = put I BQ . VBE -
I BQ - IE
In forward active region:
VBE = 0.7 V( Si), 0.3 V( Ge) . Base bias configuration (npn-BJT).

Output loop:
VCC VCEQ
R C I CQ = VCC VCEQ RC = .
I CQ
Design a base bias circuit using a Si transistor with = 100 to set the Q-point at
ICQ = 5 mA and VCEQ = 6 V. Use VCC = 12 V.
I CQ
Solution: I B = = 50 VBE = RB = RC =
A. 0.7 V. 226 k and 1.2 k .
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
2. Collector-To-Base Bias
+VCC DC load line I = 40 A
VCC /RC B
(IC+IB)
RC 15 = 30 A
IB
RB 10 = 20 A
vout IC (mA)
+
VCE
Q-point = 10 A
vin + 5
VBE - = 0 A
- IE 0
0 4 8 12 VCC
npn transistor in collector-to- VCE (V)
base bias configuration. Output loop:
= R C (I C + I B ) +VCE
VCC
Input loop: VCC VCE
I CQ = load line
Applying KVL, RC (1 + 1 )
VCEQ =VCC RC (1 + 1 ) I C .
VCC= RC (I C + I B ) + RB I B +VBE
At I C 0,=
= VCE VCC
V VBE
I B = CC . where I C = I B . VCC VCC
RB + RC ( + 1) VCE 0,=
= IC .
RC (1 + 1 ) RC
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Collector-To-Base Bias
+VCC DC load line I = 40 A
VCC /RC B
(IC+IB)
RC 15 = 30 A
IB
RB 10 = 20 A
vout IC (mA)
+
VCE
Q-point = 10 A
vin + 5
VBE - = 0 A
- IE 0
0 4 8 12 VCC
npn transistor in collector-to- VCE (V)
base bias configuration.

The change in resistor position improves bias stability.

Negative feedback effect:


IF IC increases above the design level, VCE decreases.
The reduced VCE level causes IB to be lower than the design value.
Because IC = IB, IC tends to decrease.
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Collector-To-Base Bias
+18 V
Calculate the Q-point values for = 100. Calculate
the new values if is changed to 50. (IC+IB)
2.2 k
IB
Solutions:
270 k vout
+
For = 100: For = 50: vin +
VCE
-
VCC VBE VCC VBE VBE
IB = IB = - IE
RB + RC ( + 1) RB + RC ( + 1)

= 45.3
npn transistor in collector-to-
= 35.1 A.
A. base bias configuration.
I CQ = I B = 3.51 mA. I CQ = I B = 2.31 mA.
VCC RC (I C + I B )
VCEQ = VCC RC (I C + I B )
VCEQ =
= 10.2 V. = 12.82 V.

Observe that the change in Q-point values in comparison to base-bias case is


much smaller.
In this case IB is also a function of .
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Collector-To-Base Bias
In the above circuit, Vcc is changed to 12 V. +12 V
Calculate the new Q-point values ( = 100). IE
+
VBE +
Solutions: vin -
VEC
VCC VBE 270 k IB
IB = -
RB + RC ( + 1) 2.2 k
vout
(IC+IB)

= 23
A.
I CQ = I B = 2.3 mA.
VCC RC (I C + I B )
pnp transistor in collector-to-
VCEQ = base bias configuration.
= 6.89 V.

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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Collector-To-Base Bias Circuit Design
R B=
I BQ VCEQ VBEQ +VCC

I CQ (IC+IB)
VCEQ VBEQ =put I BQ = , VBE 0.7 V for Si, .
RC
RB = IB
I BQ
0.3 V for Ge RB vout
VCC VCEQ +
RC = . vin VCE
I BQ + ICQ +
-
VBE
- IE

npn transistor in collector-to-


base bias configuration.

Design a collector-to-base bias circuit using a Si transistor with = 100 to fix the
Q-point at ICQ = 5 mA and VCEQ = 6 V. Use VCC = 15 V.

Solution:
I CQ
I B = = 50 VBE =
A. 0.7 V.
RB =
106 k and RC = 1.78 k .
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
3. Voltage Divider Bias
Most stable biasing scheme among the +VCC
three.
R1 and R2 form a voltage divider. I1 R1 RC IC
IB
I2 >>IB VB remains almost constant. +
VB
+ VCE
+VCC VBE -
-
I2 R2 RE IE

I1 R1
I1 = I2
VB VTh npn transistor in voltage divider
bias configuration.
I2 R2 RTh

The voltage divider and its Thevenin equivalent.

R1R 2 R2
R=
Th R1 || R=
2 and V=
Th VCC .
R1 + R 2 R1 + R 2
25
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Voltage Divider Bias: Analysis
Input loop: +VCC

VTh = RTh I B +VBE + RE (I B + I C ) RC IC

V VBE IB +
I B = Th . where I C = I B .
RTh + RE ( + 1) VTh
+ VCE
VBE -
-
RTh RE IE
Output loop:
VCC = R C I C +VCE + RE (I B + I C )
Voltage divider bias using the
VCC VCE V VCE
I CQ CC load line Thevenin equivalent.
RC + RE (1 + 1 ) RC + RE
VCEQ =VCC (RC + RE ) I C RE I B .

At I C 0,=
= VCE VCC
VCC VCC
VCE 0,=
= IC .
RE + RC (1 + 1 ) RE + RC

26
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Voltage Divider Bias

DC load line I = 40 A
VCC /(RC+RE) B

15 = 30 A

10 = 20 A
IC (mA)
Q-point = 10 A
5
= 0 A
0
0 4 8 12 V
CC
VCE (V)
Load line and the Q-point on the
output characteristics.

27
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Voltage Divider Bias
Calculate the Q-point values for = 100. +18 V
Recalculate the values for = 50. A Si
transistor has been used. 1.2 k IC
33 k
IB
Solution: +
For = 100: + VCE
VBE
R2
8.8
-
R=
Th R1 || R=
2 k V=
Th VCC 12 k IE
R1 + R 2 1 k
and =4 8 V
VTh VBE
IB = 37.3
RTh + RE ( + 1) A.
npn transistor in voltage divider
IC =
3.73 mA. bias configuration.

VCEQ =VCC (RC + RE ) I C RE I B =9.76 V. VB VBE V


IC I E I C I E = BE .
RE RE
For = 50: VB remains almost constant.
=
I B 68.6 IC
=
A 3 43 mA Introduction of an emitter resistor RE
VCEQ = 10.39 V. greatly improves the biasing stability.
28
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Voltage Divider Bias Design
+VCC

IC RC
I1 R1 RC R1
IB VC IB
+
VB
+ VCE
VBE - VE
-
I2 R2 RE R2 RE
IE

npn transistor in voltage divider Equivalent circuit as seen by


bias configuration. any AC source.

VB should be stable I2>>IB.


Avoid low input impedance choose low I2 (because R1||R2 w.r.t. the input
terminals).
VE>VBE.

29
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Voltage Divider Bias Design
Approximations: +VCC

1. I 2 I C 10 3. VE 3=
= V for VCC 5 V IC
R1 RC
2. I 1 I 2= 5 V otherwise. I1
IB VC
+
V
RE =E
, VB
I EQ + VCE
VBE - VE
V VCEQ VE -
RC = CC , I2 R2 RE
I EQ IE

R2
=
VBQ (V +VE ) ,
= 10 BEQ
I2 I CQ npn transistor in voltage divider
bias configuration.
VCC VBQ V (VBEQ +VE )
R1 = 10 CC .
I2 ICQ

Design a voltage divider bias circuit using a Si BJT with = 100. Fix the Q-point at
ICQ = 5 mA and VCEQ = 5 V. VCC = 15 V.
Answers:
RE =1k , RC =1k , Choose nearest available values of
resistors.
R 2= 11.4 k , R1= 18.6 k . 30
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Bias Stability
250C
VBE decreases by 1.8 mV (Si) and 2.02 mV
30
(Ge) for 10C rise in temperature. 500C 00C
ICBO doubles for every 100C rise in 20
temperature IB (A)
10
(hFE) widely varies from transistor to
0
transistor. 0 0.3 0.6 0.9
VBE(V)
Effects:

1. Q-point is changed. +VCC


2. Thermal runway.
R1 ICBO RC
Thermal runway:
+
I C I E + I CBO
=
+ VCE
If ICBO increases, IC increases increases VBE -
-
temperature of the device cumulative effect R2 RE
can permanently damage the device (burn out).
Rule of thumb: take vcemax < VCC/2.
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Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Thermal Stability
+VCC
Change in ICBO can permanently damage the
device ICBO is the most important parameter. IC
I1 R1 RC
IB VC
Stability factor: +
VB
I C + VCE
S =
I CBO VBE
- - VE
I2 R2 RE IE
S depends on the circuit configuration and
the bias resistors.
npn transistor in voltage divider
S should be as small as possible. bias configuration.

Base bias: S= + 1
+1
Collector-to-base bias: S =
1 + RC (RC + RB )
+1
Voltage divider bias: S =
1 + RE (RE + R1 || R 2 )
32
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Thermal Stability
+18 V +18 V
+18 V
2.2 k 33 k 1.2 k
2.2 k
470 k +
+ 270 k + + VCE
VCE
+ VCE VBE
- +
VBE - -
VBE
- 12 k 1 k
-

Base bias configuration. collector-to-base bias voltage divider bias


configuration. configuration.

Calculate the stability factor for the three biasing schemes. In each case, the
same Si transistor with = 100 has been used.

Base bias: S = 101


Collector-to-base bias: S = 56
Voltage divider bias: S = 9.
33
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Diode Compensation
VCC
The diode can compensate for the changes in VBE.
V=
B VR 2 +VD R1 RC
= VBE +VE
+
V +VD VBE +
I C I E =R 2 + VCE
RE VD VBE
-
- -
V RE
R2 . [If the two junctions have similar R2
RE characteristics]
voltage divider bias
configuration with diode
compensation.

34
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
AC Analysis of BJT Circuits
+VCC +VCC +VCC

R1 RC R1 R1 RC
IB IB
C1
VB
+ +
vs vs vs
VBE VBE
- -
R2 RE Rs R2 R2 RE
Rs Rs

Signal source incorrectly VB is changed by the Signal source capacitor-


direct-coupled to the direct-coupled signal coupled to the circuit.
circuit. source.

Direct-coupled: Capacitor-coupled:
RS || R 2 R2
VB = VCC . (DC condition) VB = VCC .
R1 + RS || R 2 R1 + R 2
Always use a coupling capacitor C1
Signal source changes the Q-
to avoid the change in Q-point by
point.
the signal source. 35
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
AC Analysis of BJT Circuits
+VCC +VCC +VCC

RC
R1 RC RC VC R1 C2
C1 C1

RL vs RL
vs RL

R2 RE RE Rs R2 RE
Rs

Load is incorrectly direct- VC is changed by the Load capacitor-coupled to


coupled to the circuit. direct-coupled load. the circuit.

Direct-coupled: Capacitor-coupled:

RL V= VCC I C RC .
VC = VCC . C
RC + RL
Always use a coupling capacitor C2
Direct-coupled load changes the
to avoid the change in Q-point by
Q-point.
the load.
36
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Negative Feedback and AC Degeneration
If IC increases above the design level, VCE +VCC
decreases. RC
The reduced VCE level causes IB to be lower RB /2 RB /2
than the design value.
Because IC = IB, IC tends to decrease.
So, voltage change at the collector is fed back
to the base, where it tends to partially cancel CB
the signal.
For collector-to-base bias RB and for voltage +VCC
divider bias RE are the feedback resistors.
RC
The above effect produces good bias stability. R1 C2
C1
The same reaction occurs when an ac signal
RL
is applied to the circuit for amplification. CE
RE
very low voltage gain. Rs R2
AC bypass capacitors are connected to avoid
the above effect. Corrected circuits.
37
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
AC and DC Equivalent Circuits
+VCC +VCC

RC RC
R1 C2 R1

C1
RL vs RC||
vs R1||
CE RL
RE R2
Rs R2 Rs R2 RE

The amplifier circuit. AC equivalent circuit of the DC equivalent


amplifier. circuit of the
amplifier.
AC equivalent circuit: replace all the capacitors by short circuits (assume the
capacitance to be high).
DC equivalent circuit: replace all the capacitors by open circuits (capacitors
block dc signal).
RC acts as a load in the ac equivalent circuit when external load RL is absent.
Draw a new load line for the ac source: ac load line. 38
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
AC Load Line
AC load line
Q-point is fixed for the AC as well as DC load line I = 40 A
B
DC load lines. VCC /(RC+RE)
15 = 30 A
Consider extreme scenario:
10 = 20 A
When I CQ changes to zero, IC (mA)
Q-point = 10 A
VCE =
I CQ RC ].
[consider RL = 5
= 0 A
At i c =
0 v ceQ =
VCEQ + I CQ RC . 0
0 4 8 12 VCC
VCE (V)
VCEQ + ICQRC

DC and AC load lines on the output


characteristics.

DC load line remains the same as before.


39
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
AC Load Line
Draw the DC and AC load line for the following +18 V
amplifier (Si BJT with = 100).

Solutions: 33 k 1.2 k

DC load line: +
VCC VCE V VCE + VCE
I CQ CC VBE
RC + RE (1 + 1 ) RC + RE -
12 k 1 k
At =
I C 0, V=CE V=
CC 18 V
VCC 18
VCE 0,=
= IC = = 8.18 mA.
RE + RC 1 + 1.2 voltage divider bias
configuration.
AC load line:
Calculate the Q-point values first.
From slide 26: I CQ 3.73
= = mA, and VCEQ 9.76 V.
At i c =0, Vce =VCEQ + I CQ RC [ RL =0].
= 9.76 + 3.73 1.2 V
= 14.24 V. 40
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
AC Load Line (cont...)
AC load line
DC load line I = 40 A
B +VCC
8.18 vC
= 30 A vB (V)
(mV) RC vo
R1 (V)
3.73 = 20 A C2
vs
Q-point = 10 A (mV) C1 vE
IC (mA)
(mV) RL
= 0 A vs
RE CE
0 R2
0 9.76 18 Rs
VCE (V)
14.24

DC and AC load lines on the output The amplifier circuit.


characteristics.

Note that under any condition IC cannot be more than 8.18 mA (assuming
biasing circuit remains unaltered).

41
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Hybrid- Model
Assume linear device: only for small signal VBE : DC value,
Valid only in forward active region. v BE : total instantaneous value,
Small signal parameters:
v be : instantaneous AC value.

1. Input resistance r (),


Input parameters: ib, vbe.
2. Current gain (dimension less),
Output parameters: ic, vce.
3. Output resistance r0 (),
4. Transconductance gm (-1). ic

1. Input resistance r: +
ib
change in input voltage
r = vce
change in input current Q-point +
vbe
1 i B -
ie -
=
r v BE Q-point

1 i BJT as a two-port
= b . device.
r v be Q-point
42
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Hybrid- Model

v be VT 30
r
= = , VT is the thermal voltage, IBQ 1/r
i b Q-point I CQ 20
IB (A)
VT
re , re
= = called the emitter resistance. 10
I CQ
0
0 0.3 0.6
VBEQ
r is also called the diffusion resistance. VBE(V)
It is a function of the Q-point. Calculation of r from the
input characteristics.
2. Current gain : IB = 40 A
change in output current = 30 A
= 15
change in input current Q-point = 20 A
IC (mA) 10
= 10 A
i Q-point
= C 5
= 0 A
i B Q-point
0
0 4 8 12 VCC
i VCE (V) 43
= c .
ib Q-point
Calculation of .
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Hybrid- Model
3. Output resistance r0: IB = 40 A

change in output voltage 15 = 30 A


r0 =
change in output current Q-point IC (mA) 10 = 20 A
Q-point = 10 A
v CE 5
= = 0 A
i C Q-point 0
0 4 8 12 VCC
v ce VCE (V)
=
ic Q-point Calculation of r0.
VA
= where V A is the Early voltage.
I CQ

Consider r0 as infinite if unspecified.

44
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Hybrid- Model
4. Transconductance gm:
30
change in output current
gm = IBQ 1/r
change in input voltage Q-point 20
IB (A)
i 10
= C
v BE Q-point 0
0 0.3 0.6
ic VBEQ
= VBE(V)
v be Q-point Calculation of r and hence gm
I CQ from the input characteristics.
= where VT is the thermal voltage
VT 1000
dc
1
= . 100 0.707dc
re |(j)|
VT I CQ
10
Now, r g m = = .
ICQ VT
1 f 1000
= r g m . 0 500 fT
Freq. (kHz)
Three parameters are required. Frequency variation of .
45
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Hybrid- Model
ic
ib ic
+ B C
ib + +
vce ib= gmv
+ vbe r v g v r0 vce
m
vbe
ie E
- - - -

BJT as a two-port device. Small signal hybrid model of a npn


transistor in CE configuration.
ic
ib ic
- B C
ib - -
vce gmv
- vbe r r0 vce
vbe v
ie E
+ + + +

BJT as a two-port device. Small signal hybrid model of a pnp


transistor in CE configuration. 46
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Calculation of Voltage Gain
+VCC

RC RB
B C
RB + +

vi r v gmv r0 RC v0
vi
E
- -

BJT amplifier. AC equivalent circuit using the small


signal hybrid-.

Analysis steps:
Draw the AC equivalent circuit.
Replace the BJT by its small signal equivalent model.
Calculate the input impedance, output impedance and voltage gain of the
circuit.

47
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Calculation of Voltage Gain
r
v =v i . RB
B C
r + R B + +

v 0 = g mv ( r0 || RC ) vi r v gmv r0 RC v0
r R r
= g m 0 C v i . -
E
-
r0 + RC r + R B
v0 AC equivalent circuit using the small
Av =
vi signal hybrid-.

r R r
= g m 0 C
r0 + RC r + RB
r
= g m RC for r0 .
r + R B

Parallel combination: 5 k||200 k = 4.87 k.

48
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Hybrid- Model
+18 V
Draw the small-signal hybrid- equivalence of the
following circuit (Si BJT with = 100 and VA = 500 V).
33 k 1.2 k
Solutions:
I CQ = 3.73 mA ( calculated previously).
V 26 V
r = T = 100 r0 = A = 134k.
I CQ 3.73 I CQ 12 k 1 k
I CQ
= 697 . gm = 143.5 m 1.
=
VT
voltage divider bias
configuration.

RB C
B
+ +

vi R1||R2 r v gmv r0 RC v0
E
- -

AC equivalent circuit using the small signal hybrid-.


49
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Analysis of CE Amplifier
+VCC

RC
R1 C2
C1
vs RC||
RL R1|| RL
vs R2
RE CE Rs
Rs R2

AC equivalent circuit of the


The amplifier circuit. amplifier.
RS B C
+ +

vi R1||R2 r v gmv r0 RC||RL v0


E
- -
AC equivalent circuit using the small signal hybrid-
model.
50
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Analysis of CE Amplifier
RS B C
+ +

vs R1||R2 r v gmv r0 RC||RL v0


E
- -
AC equivalent circuit using the small signal hybrid-
model.

R1 || R 2 || r v
v =vs . AVL =0

R1 || R 2 || r + Rs vs
R1 || R 2 || r
v 0 = g mv ( r0 || RC || RL ) g m ( r0 || RC || RL )
=
R1 || R 2 || r + Rs
R1 || R 2 || r
g m ( r0 || RC || RL )
= v s . = g m (RC || RL ) for Rs 0 and r0 ,
R1 || R 2 || r + Rs
=

(RC || RL )
( R || R L ) .
C
=
r re
Voltage gain without RL:
R1 || R 2 || r R
Av 0 = g m ( r0 || RC ) g m RC = RC = C .
R1 || R 2 || r + Rs r re
51
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Analysis of CE Amplifier
ii RS ib B C ic iL
+ +

vi R1||R2 r v gmv r0 RC RL v0
E -
-

AC equivalent circuit using the small signal hybrid-


model.
Current gain:
io Now, i = g v
( r0 || RC || RL )
Ai = . o m
RL
ii
( R1 || R 2 || r ) = A g v
( r0 || RC || RL ) RB || r
ib = ii i m
RL i b r
r
r RC RB
ii ib = , [ where RB R1 || R 2 ]. = .
(RB || r ) ( R C + R L )( R B + r )

Power gain: A=
p Av A i .
52
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Analysis of CE Amplifier
RS B C
+ +

vi R1||R2 r v gmv r0 RC v0
E
- -
Ri Ro
AC equivalent circuit using the small signal hybrid-
model.

Input resistance is the resistance seen by the AC source.


Output resistance is the resistance seen by the load.

Input resistance Ri = R1 || R 2 || r .
Output resistance
= Ro r0 || RC RC .

Voltage gain mainly depends on RC and RL. We may end with attenuation
instead of amplification if RL is too small.
53
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal Analysis of CE Amplifier
12V
Calculate the input and output impedances
and the small signal voltage gain of the
3.9 k
amplifier (Si BJT with r = 2.1 k, = 75, ro 68 k 100 F
= 1 M). 100 F
Solutions: 82 k
If unspecified, the small signal equivalent 47
56 k 4.7 k F
parameters are to be calculated from the
DC biasing condition.
Input resistance
= Ri R1 || R=2 || r 1.97k . The amplifier circuit.
Output resistance Ro= r0 || RC 3.9k .

Voltage gain without the load: AV = RC = 139.3.
r

A
Voltage gain with the load: VL = (RC || RL ) = 133.
r

Recalculate the gain if the load is changed to 8 (e.g. a sound box speaker).
Answer: Voltage gain with the load: AVL ( r ) RL = 0.29 ( attenuation). 54
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
CE Amplifier With an Emitter Resistor
+VCC

RC
R1 C2
C1
vs RC||
RL R1|| RL
vs R2
RE CE Rs RE
Rs R2

AC equivalent circuit of the


The amplifier circuit. amplifier.
RS B C ic
+ +
ib
R1||R2 r v gmv r0 RC||RL
vs v0
E

RE ib+ib
- -

Equivalent small signal hybrid- model. 55


Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
CE Amplifier With an Emitter Resistor
RS B C ic
+ +
+ ib
R1||R2 r v gmv r0 RC RL
vs vi v0
E

RE ib+ib
- - -
Ri Rib Ro
Equivalent small signal hybrid- model.

Applying KVL,
v i = i b r + ( i b + i b ) R E
vi
Rib = =r + ( + 1) RE .
ib
Emitter resistance is multiplied by a factor ( + 1) .
Ri =
R1 || R 2 || Rib , and
Ro RC || ro RC .
= Output resistance remains almost
unchanged but input resistance increases.
56
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
CE Amplifier With an Emitter Resistor
RS ib B C ic
+ +
+
R1||R2 r v gmv r0 RC RL
vs vi v0
E

RE ib+ib
- - -
Ri Rib Ro
Equivalent small signal hybrid- model.
Ri
vi = vs.
R i + Rs
v0 i R Ri
Av 0 == b C For A VL , put (RC || RL ) instead of RC
vs vi R i + Rs
i Ri 1 Ri
RC b = RC
v i R i + Rs r + ( + 1) RE Ri + Rs
RC
for Rs 0 and ( + 1) RE >> r ,
( + 1 ) E
R
R
C . Voltage gain decreases.
RE
57
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
CE Amplifier With an Emitter Resistor
12V
Calculate the input and output impedances
and the small signal voltage gain of the
3.9 k
amplifier (Si BJT with r = 2.1 k, = 75, ro 68 k 100 F
= 1 M). 100 F
Solutions: 82 k
Rib =r + ( + 1) RE =359.3 k .
56 k 4.7 k
Input resistance= Ri R1 || R 2 =
|| Rib 28.3k .
Output resistance Ro= r0 || RC 3.9k .
The amplifier circuit.
RC
Voltage gain without the load: AV =
0.82.
=
( + 1) E
R

58
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal h-Parameter Model
ic
ib ic
B C
+ + +
ib
hie (r) hfeib
vce +- 1/hoe vce
+ vbe hrevce (gmib)
vbe (r0)
ie - E
- - -

Small signal hybrid model of a npn transistor


BJT as a two-port device. in CE configuration and approximate
relationship with r parameters.

Input voltage and output current are expressed in terms of input current
and output voltage.

v be hie i b + hrev ce
=
i c hfe i b + hoev ce
=

59
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Small Signal h-Parameter Model
v be hie i b + hrev ce
=
i c hfe i b + hoev ce
=

v be
hie r , small signal input resistance( ~k
ib v ce =0
) .

ic
hfe
= , small signal current gain.
ib v ce =0

v be
hre = reverse transverse ratio or voltage feedback ratio( ~10-3 ) .
v ce i b =0

ic
hoe
= 1 ro , small signal output conductance( ~10-6 ) .
v ce i b =0

60
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Amplifier
Power gain( dB) ,
vi (mV)
p io (po)
A p = 10log10 o dB
pi ii Ri vo (V)
v o2 RL (pi) Ro
= 10log10 2 dB
v
i R i

v o
20log
= dB [ only when Ri RL ],
Representation of an amplifier.
10
v
i
io
20log
= 10 dB [ only when Ri RL ].
ii

Half-power points:
when po p= (
i 2 i .e . v o vi )
2 ,
pi 2
Ap = 10log10
p
i
= 10log10 (1 2 )
= 3.01 3 dB.
61
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Frequency Response of an Amplifier

fc1 and fc2 corresponds to the half-power


30 3 dB
points and known as the lower and
higher cut-off frequencies, respectively. Ap (dB) 20 Half-power
The output voltage vo = 0.707vi at the bandwidth
10
cut-off frequencies. fc1 fc2
0
The difference (fc1 - fc2) is known as the 0 100 200 300 400
half-power bandwidth of the amplifier. Freq. (kHz)

f0 = (fc1 - fc2)/2 is called the mid-band Frequency response of an amplifier.


frequency or center frequency of the
amplifier.
1000
dc
100 0.707dc
|(j)|
10

1 f 1000
0 500 fT
Freq. (kHz)
Frequency variation of .
62
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
High Frequency Limitation of BJT
High frequency limitations: ic
ib Cbc
1. Junction capacitances: base-emitter B C
+ +
and collector-base junctions are
associated with junction capacitances. vbe r Cbe gmv r0 vce
2. Transit time: charge carriers take E
- -
finite transit time.

Limitation is represented by a cutoff High frequency small signal equivalent


frequency f where voltage gain falls circuit of a npn transistor in CE configuration.
to 0.707 of the mid-band value.
Common-emitter cutoff frequency: Cbc: capacitance of the reverse-
falls to 0.707 of the mid-band value biased C-B junction.
at fe (sometimes f). Cbe: capacitance of the forward-
Common-base cutoff frequency: biased B-E junction.
falls to 0.707 of the mid-band value
at fb (sometimes f).

f b = f e .
63
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
High Frequency Limitation of BJT
Unity gain frequency: VCC

fT : in CE configuration, where short-circuited current gain RC


is unity.
Cbc
fT gainbandwidth f b .
For a given device, the gain-bandwidth product Cbe
is a constant term that cannot be changed.
Cbe and Cbc are in pF range and their values
depend on the Q-point values.
Representation of the
6.1I E junction capacitances.
C be .
fT

Miller effect:
If there is any capacitance (Cio) between the input and output terminals of an
inverting voltage amplifier (-Av), then the equivalent input capacitance (CM)
increases.

CM C io (1 + Av ) .
64
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Miller Effect
VCC VCC
RC RC

Cbc

Cbe CM Cbe

Miller effect.

Change in output voltage Vo because of a change in input voltage V i ,


Vo = Av V i .
Total collector-base voltage reduction,
VCB =V i + Av V i =V i 1 + Av . ( ) In CE configuration, total input
Now, charge Q= C change in voltage. capacitance is
Charge supplied to the input.
C in = C be + (1 + Av )C bc
Q = C bc (1 + Av ) V i
= C M V i .
65
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Frequency Response of a CE Amplifier
+VCC

RC
R1 C2
C1
+ C1
+
vs Avvi RL
Rin vin Cs RL vo vs
RE CE
Rs Ro R2
- - Rs

RC highpass filter. RC lowpass filter. BJT in CE configuration.

The coupling capacitors (C1 and C2) block low frequency signal: highpass
filtering.
1
For the input side, the corresponding cutoff frequency: f c 1 =
2 RinC1
The input capacitance Cin + stray capacitance (a few hundred pF together)
bypasses high frequency components: lowpass filtering.
Miller effect does not occur in common-base configuration: operates to a much
higher frequency. 66
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Noise in BJT Circuit
Thermal noise: because of random thermal motion of electrons in a metal.

Resistors are the main source of noise


rms value of this noise voltage is
4h f BR
en 4kTBR Volt, [ for hf <<kT ]
exp( hf kt ) 1
where h 6.626 10 34 J-S is Planck's const.
k 1.37 10 23 J/K is Boltzmann's const.
T temperature( K)
B bandwidth, f - center frequency( Hz)
R resistance(
)
Some other noises: Shot noise (independent of f and T), Flicker noise (1/f),
Transit-time noise (at high frequencies) etc.

S in N in
figure F
Noise = 1( also expressed in dB )
Sout N out
67
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Power Dissipation
Power dissipation at an ambient temperature,
PD = I CVCE .

When designing a circuit, consider maximum possible values of the current and
voltage.
PD =
I C maxVCE max

The amplifier shown in the figure uses a 2N3904 BJT (PD = 625 mW at 250C).
Calculate the maximum value of VCC that can be applied without damaging the
device.
VCC
PD = VCC VCC RC IB
IC
VCC =
37 V . 2.2 k
470 k +
VCE
+
VBE -
- IE

68
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Switching Circuit
OFF state (Vout = VCE VCC): VCC
Vi is low/ negative IB 0
RB RC
the BJT is in cutoff,
+
IC = ICBO. VCE
vs +
-
ON state (Vout = VCE 0.2 V): VBE
-
Vi is high IB = IBmax
the BJT is in saturation,
Capacitor-coupled switching
IC VCC /RC. circuit.
Design equations: VCC /RC IB = 40 A
Off state: check V i cut-in voltage. 12
min = 30
VCC
On state:RC = [choose IC max = 1mA if unspecified] 8
RC = 1 k
= 20
I C max IC (mA)

Now , I B I C max
(V CC V i max ) V
CC 4 = 3 k
= 10
RB RC =0
0
V 1 V 0 3 6 VCC = 12
RB RC 1 i max . Choose RB= RC 1 i max
VCC 2 VCC VCE (V)
69
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Switching Circuit
Design a capacitor-coupled stitching circuit using +6 V
base-bias configuration. IC should not exceed 1 mA.
The input is a positive square wave of amplitude 5 V 50 k 6 k
with a PRF = 10 kHz, VCC = 6 V, a Si-BJT with = +
100 is to be used. VCE
vs +
VBE -
Solutions:
-
VCC
R=
C = 6 k .
I C max
Direct-coupled switching circuit.
5
RB 100 6 1 VCC
6
RB 100 k . RC
RB
Take =RB 50 k . +
C
VCE
+
VBE -
-

Capacitor-coupled switching circuit.


70
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Differential Amplifier
Differential input: vd = (v1 v2) Ro
vi1
Common-mode input: vcm = (v1 + v2)/2 Ri +
(non-inverting) vdep vo
v1 = vcm+ vd/2 and v2 = vcm - vd/2 -
vi2
For v1 = 10 V, and v2 = -10 V: (inverting)
vd = 20 V and vcm = 0. Differential amplifier.

Differential-mode output voltage: v0d = Ad(v1 v2) VCC


Common-mode output voltage: v0c = Acm(v1 + v2)/2
vc1 = Acmvcm+ Advd
RC RC
vc2 = Acmvcm - Advd VC1 VC2

Common-mode rejection ratio: |Ad /Acm| + +


+ vB1 vB2 +
CMRR is a measure of how well the differential - -
- -
amplifier rejects the common-mode.
ICQ
Considering identical BJTs, and VB1 = VB2:
-VCC
IC1 = IC2 IE1= IE2 = ICQ/2.
Differential amplifier using BJT.
vC1 = vC2 = VCC -RC IC1/2. 71
Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur mkmandal@ece.iitkgp.ernet.in
Thank you

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mkmandal@ece.iitkgp.ernet.in
Ph. +91-3222-283550 (o)
Department of E. & E.C.E.
I.I.T. Kharagpur, 721302.
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