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EMCDesignandInterconnectionTechniques

Cableroutingandconnection
RecommendationsofIEC6100052:1997andmanyotherrecentstandardsconcernedwiththeinstallationof
informationtechnologyandtelecommunicationscables:
a) Allbuildingstohavealightningprotectionsystem,bondedatgroundlevelatleasttotheirinternal
bonding network. All building steel, metalwork, cable ducts, conduits, equipment chassis, and
earthingconductorsinabuildingtobecrossbondedtocreatea3dimensionalbondingnetworkwith
meshsizenogreaterthan4metres.
b) Segregatepowerandsignalcablesintoatleastfour"classes",fromverysensitivetoverynoisy.
c) Runallcablesalongasingleroutebetweenitemsofequipment(whichshouldthereforehaveasingle
connectionpaneleach),whilstpreservingatleastminimumspecifiedspacingsbetweencableclasses.
d) 360o Bond cable screens (and any armouring) to the equipment enclosure shields at both ends
(see later) unless specifically prohibited by the manufacturer of the (proven EMC compliant)
transducerorequipment.
e) Preventexcessivescreencurrentsbyroutingallcables(signalandpower)veryclosetoconductorsor
metalworkformingpartofthemeshedearthnetwork.
f) Wheremeshedbuildingearthisnotavailable,usecabletrays,ducts,conduits,orifthesedon'texista
heavy gauge earth conductor, as a Parallel Earth Conductor (PEC). A PEC must be bonded at both
endstotheequipmentchassisearthsandthesignalcablestrappedtoitalongitsentirelength.
The needs for segregation, PECs, and (in general) screen bonding at both ends will have an impact on the
design of interconnections panel layout, choice of connector types, and the provision of some means for
bondingheavydutyPECs.
Figure2Egivesanoverviewofthetechniquesinvolvedinconnectingscreenedenclosurestogetherwithboth
screenedandunscreenedcables.


ForshortconnectionsbetweenitemsofequipmentsuchasaPCanditsVDU,dedicatedprinter,andmodem,
only d) above (360o cable screen bonding to enclosure shields at both ends) is needed providing all the
interconnecteditemsarepoweredfromthesameshortsectionofringmain,andalllongcablestootherparts
ofthebuilding(e.g.networkcables)aregalvanicallyisolated(e.g.Ethernet).Thesescreenbondingtechniques
arealsoneededfortheEMCdomestichifiandhometheatresystems.However,a)oftencomesinhandyas
wellforprotectingsuchequipmentfromdamageduringathunderstorm.

2.6Gettingthebestfromcables
Open any signal cable manufacturer's catalogue and you will find a huge variety of cable types, even for
similar tasks. This is a warning that cables are all imperfect. The best cable for a given application will be
difficulttoselect,andthenwillprobablybetooexpensive,toobulky,toostiff,andonlyavailabletospecial
orderon26weekleadtimein5kmreels.
2.6.1Transmissionlines
Transmissionlinetechniquespreventcablesfromactingasresonantantennas.
When the send and return conductors of a signal current loop are physically close together and so enjoy
strongmutualcoupling,thecombinationoftheirmutualcapacitanceand

inductanceresultsinacharacteristicimpedanceZ0=,

whereLandCarethecapacitanceandinductanceperunitlength(afractionoftheAofthehighestfrequency
ofconcern).

Z0canbecalculatedforcablesandconnectors
WhenZ0iskeptconstantovertheentirelengthofaninterconnection,andwhendriveand/orsend(sourceor
load) impedances are "matched" to Z0, a controlledimpedance transmission line is created and resonant
effects do not happen. Theintrinsicinductanceandcapacitanceoftheconductorsalsocreatefarfewer
problems. This is why RFand all EMC test equipment use 50Q transmission line cables and connectors (see
Figure 2F), and why highspeed and/or long distance data busses and serial communications also use
transmissionlines(usuallyintherange50to120Q).


Linesmustbematched,andtheclassicalmethodistomatchatbothsourceandload.Thisprovidesmaximum
powertransferfromsourcetoload,butasitresultsina50%voltagelossforeachinterconnection,itisoften
not used for normal signal interconnections in nonRF equipment. Instead, transmission lines are often
terminatedatjustoneend,soasnottolosevoltage,eventhoughthisisnotidealfromeitheranEMCorsignal
integritypointofview.Terminatingatoneendonlyisaconsciousdecisiontocompromiseontheengineering
tosavecost.Figures2G,H,andJshowthemainterminationmethods.

Butnothingisperfectandeventhoughnotresonant,eventhebestpracticaltransmissionlinesstillleaka
bit. Installation also reduces transmission line performance by causing variations in Z0 (increasing
leakage) when cables are bent sharply, crushed, strapped or clipped too tightly, repeatedly flexed,
damaged,orfittedwithinadequateconnectors.
Unfortunately, the overall cost of creating transmission line cable interconnections with high enough
qualityatmodernhighfrequenciescanbeveryhigh.Flexiblecablesformicrowavetestequipment,for
instance,cancosthundredsofpoundspermetre.Thisiswhy,forGHzEthernettorunonlowcostCat5
UTP(unscreenedtwistedpair),ithastousesophisticatedDSPalgorithmstoreducedatarateandspread
itrandomly,anditstillneedsfourpairs.Soalthoughtransmissionlinesareverypowerful,theyarenota
universalpanaceaforcableproblemsathighfrequencies.

2.6.2EMCconsiderationsforconductorsusedinsideandoutsideproducts
Insideaproductiftheproduct'senclosureshields,andthescreeningandfilteringofitsexternalcables
isgoodenough,almostanytypeofwireorcablecanbeused,althoughsignalintegritywillsuffer.The
problem here is that for highperformance digital or analogue electronics the cost of the enclosure
shieldingandfilteringrequiredcan be sohighthatitwouldhavebeencheapertousemoreexpensive
internalcables.
Itisgenerallymostcosteffectivetoavoid all internal cables, keepingallnonopticalfibresignalsin
thetracksofpluggedtogetherPCBs(preferablyasinglePCB,evenusingflexirigidtypes).Tomakethis
workthePCBsneedtobedesignedaccordingtothePart5ofthisseries,usingagroundplaneunderall
tracks.Thisgenerallyreducesthecostofenclosureshieldingandfilteringtogivethemostcosteffective
product,andbecauseitalsoimprovessignalintegrityitusuallysavesacoupleofdevelopmentiterations
too.
Outsideaproductunscreenedcableswithsingleendedsignalsarenowaseriousliabilitywhetherthe
product is digital or analogue. Filtering digital signals does not help much to reduce emissions: single
ended drive produces copious commonmode currents at the signal frequencies themselves,
causing the product to fail conducted or radiated emissions tests depending on signal frequency. Any
filteringwouldneedtoremovethesignal,whichdoesnothelp.
Filteringcanworkquiteeffectivelyforlowfrequencyanaloguesignals,butforprecisionbeyond0.05%
(12 bits) the cost of the filter and its board area increases rapidly. Of course filters have difficulty
removing inband interference (such as powerline hum) that a properly designed balanced
communicationsystemwouldeasilyreject.

2.6.3Pairingsendandreturnconductors
Evenwhennotusingtransmissionlines,alwaysusepairedconductors.Provideadedicatedreturnpath
forthereturncurrentascloseaspossibletothesendpath(andnotviaanearthorascreen).Thisworks
evenwhensignalsaresingleendedandalltheirreturnconductorsarebondedtoacommonreference
potential. The fluxcompensation effect encourages return currents to flow in the path nearest to the
sendconductor,inpreferencetoalternativecurrentpaths,andwecanusethisnaturalphenomenonto
helpkeepthefieldpatternsofourcablestightandreducetheirEandMleakages.Figure2Kshowsthe
generalprinciple,whichisofuniversalapplication.

Figure2KRoutingoftheconductorsinacable
(thisexampleisofswitchedcircuits,buttheprincipleisuniversallyapplicable)

Itisbadpracticetorunthereturnpathdifferentlyfromsendpathalwaysusepairedsend
andreturnconductorswhicharephysicallyclose

Figure2Kshowsamainssupplywithaswitchinoneline,butthesameprincipleappliestosignals.
Theclosenessofthesendandreturnconductorsovertheentirecurrentloopisabsolutelycrucialatthe
highestfrequenciesforcircuitstoworkatall,nevermindgoodEMC.
Ribbon cables carrying a number of singleended (i.e. 0V referenced) signals are very poor indeed for
EMCandsignalintegrity,butscreeningthemresultsinstiff,bulky,expensivecableassemblieswhichis
whatflatcablesweresupposedtoavoid.
Using the pairing technique for flat cables improves their EMC considerably and this conductor
arrangementisthebest:
return,signal,return,signal,return,etc.
Alesseffectivealternativewhichisoftenrecommendedis:
return,signal,signal,return,signal,signal,return,etc.
Significantimprovementscanoftenbemadebyfittingflatcableferriteclamps(commonmodechokes)
atthesourceend(s),sothattheconductorpairsbehaveasiftheyweredrivenfromabalancedsourceat
highfrequencies,althoughproperbalanceddrive/receivecircuitsarebetter(seePart1ofthisseries).
Twistedpairsareverymuchbetterthanparallelpairs.Usetwistedtriples,quads,etc.wherethisiswhat
ittakestogetallthesendandreturnpathsofasignalincloseproximity.
Twisted send and return conductors are strongly recommended for power cables: combining all phase
andneutralconductors(twoforsinglephase,threeforthreephase,fourforthreephaseplusneutral)in
a single cable with a slow twist greatly reduces the emissions of powerline M field emissions. M fields
frompowerbusbarsorindividuallyroutedphaseandneutralcablescanrenderwholeareasofbuildings
unfitforCRTbasedVDUmonitors.
Twistedpairsusingbalancedcircuitry(seePart1ofthisseries)andcommonmodechokescanbegood
forsignalsuptosometensofMHz,dependingonthe"balance"ofthecircuit,cable,andconnectors.Any
unbalance will convert some of the wanted signal into useless commonmode currents, which all leaks
away as fields. Just a few microamps of commonmode can fail an emissions test. Tighter and more
preciselyregulartwistsmakecablesbetterforhigherfrequencies.
Agreatmanytypesoftwistedpaircablesareavailable,someintendedfortransmissionlines(Z0willbe
specified).Buttwistedpairtechnologydoesnotsuitmasstermination.Socalled"twist+flat"flatcable
has multiple twisted pairs all formed into a ribbon, but has regular lengths of 100mm or so of parallel
conductorsformassterminatingconnectorsandtheflatbitsaresolongtheycompromiseEMC.

2.6.4Gettingthebestfromscreenedcables:thescreen
There is no such thing as a cable that "complies with the EMC Directive", there are only cables with
frequencydependantscreeningperformance.
Cable screens must cover the entire route with 360o coverage. Making screening work effectively with
lowcostthesedaysisincreasinglydifficult,exceptfortheleastaggressiveandleastsensitivesignals.
It is no longer best practice to use the shield of a cable as the signal return. The
problem with coaxial cables is that the screen carries currents for both the signal return and external
interference,andtheyusetheskineffecttokeepthemondifferentsidesofthescreen(knownas"tri
axialmode").Thisworksfineforsolidcopperscreens(plumbing,toyouandme),butflexiblescreened
cables aren't very good at keeping the two currents apart, so return currents leak out, and interfering
currentsleakin.
But(Ihearyousay)allRFtestequipmentusesflexiblecoax,soitmustbe OK.Lookcarefullyatthese
cablesnexttimeyouareinanEMCtestlab:thecablesusedforhigherfrequenciesareverythick,stiff,
andexpensive,partlybecausetheyaredoublescreenedatleast.Theyuseexpensivescrewedconnectors
(e.g. Ntypes), and are always used in matched (at both ends) 50Q transmission lines. They are also
treated reverentially and woe betide you if you tread on one. At higher frequencies than the average
EMCtestlab,semirigidorrigidcoaxialcableshavetobeused,asstiffasautomotivebrakepipes.
The ability of a screened cable to prevent interference is measured in two ways, as shielding
effectiveness (SE), and also as ZT. SE seems obvious enough, and ZT is simply the ratio of the voltage
whichappearsonthecentreconductorinresponsetoanexternalRFcurrentinjectedintothescreen.For
ahighSEatagivenfrequency,weneedalowZT.AflatZTofafewmilliQoverthewholefrequencyrange
wouldbeideal.
A very broadbrush summary of the screening qualities of typical types of screened cables follows, but
remember that within each broad category there are many different makes and grades with different
performances:
Spiralwrappedfoilisnotterriblygoodatanyfrequency,andgetsprogressivelyworse>1MHz.

Longitudinalfoilwrapisbetterthanspiralfoil.

Singlebraidisbetterthanfoilatallfrequencies,butstillgetsprogressivelyworse>
10MHz.
Braid over foil, double braid, or triple braid, are all better than single braid and all start to get
progressivelyworse>100MHz
Two or more insulated screens are better still, but only up to about 10MHz, at higher frequencies
resonancesbetween thescreenscanreducetheir effectivenesstothatofjustonescreen atsome
frequencies.
Solid copper screens (e.g. semirigid, rigid, plumbing) are better than braid types and their
screening performance continually improves at higher frequencies, unlikebraidorfoil,
whichalwaysdegradesabovesomefrequency.
Roundmetalconduitcanbeusedtoaddasuperbhighfrequencyperformancescreen.(Armouring
isalsousefulasascreenbutonlyatlowfrequencies,sayuptoafewMHz.)
"Superscreened"cablesusebraidscreenswithaMuMetalorsimilarhighpermeabilitywrap.These
canbeasgoodorevenbetterthanasolidcopperscreen,whilststillretainingsomeflexibility,but
areexpensiveandsuitapplicationswhereperformanceismoreimportantthanprice(e.g.aerospace,
military).
I'm only aware of one manufacturer (Eupen) offering ferriteloaded screened cables, which may
offer improved highfrequency performance with good flexibility without the high cost of
superscreenedcables.
ToreducethebulkandcostofourscreenedcablesandstillgetgoodEMCforhighperformancemodern
productsweneedtousepairedconductorsforeverysignalanditsreturn,preferablytwistedpairs,just
asdescribedaboveforunscreenedcables.Balanceddrive/receiveisalsoagreathelp.

2.6.5Gettingthebestfromscreenedcables:terminatingthescreen
Using coaxial cables and connecting their screens to a circuit 0V track is almost a guarantee of EMC
disasterforhighperformancedigitalandanalogueproducts,forbothemissionsandimmunity.Insulated
BNCconnectorsonaproductareusuallyasignthatallmaynotbewell
forEMC.
Cablescreensshouldalwaysbeconnectedtotheirenclosureshield(eveniftheythengoontoconnectto
circuit0V),unlessthereareverygoodquantitativeengineeringandEMCreasonswhynot."We'vealways
doneitthisway"isnotareason.
Circuit development benches need to create the real structure of the product and the real
interconnections with the outside world as closely as possible. Otherwise circuit designers may use
various interconnection tricks to make their PCBs test well on the bench (I know, I used to do it too)
leavingittosomeoneelsetosortouttheresultingreallifeapplicationandEMCproblems.
But even a highquality screened cable is no good if the connection of the screen to the product is
deficient. Cable screens need to be terminated in 360o a complete circumferential connection to the
skinofthescreenedenclosuretheyarepenetrating,sotheconnectorsusedareveryimportant.
"Pigtails"shouldneverbeused,exceptwherethescreenisonlyneededuptoacoupleofMHz.Where
pigtailsareusedtheymustbekeptasshortasassemblytechniquesallow,andsplittingapigtailintotwo
onoppositesidesalsohelpsabit.Inthemid1980'sacompanyreplacedalltheirpigtailedchassismount
BNCs with crimped types for EMC reasons. Although the crimping tool cost around 600 they were
surprisedtofindtheyquicklysavedmoneybecausecrimpingwasquickerandsufferedfewerrejects.So
pigtailingmaybeuneconomicaswellaspoorforEMC.
The"blackmagic"ofcablescreeningistounderstandthatacable'sSEiscompromisedifitsconnectors,
ortheenclosureshieldsitisconnectedto,havealowerSE.
Itispossibletousescreenedcablessuccessfullywithsomeunshieldedproducts,iftheyusenointernal
wiresandtheirPCBsarecompletelygroundplanedwithlowprofilecomponents.ThisisbecausethePCB
groundplane,likeanymetalsheet,createsazone ofreducedfieldstrength avolumetricshieldfora
limitedrangeoffrequencies.Successfuluseofthistechniquedependsupontheelectronictechnologyin
theproduct,andisunlikelytobeadequateforhighperformancedigitaloranalogueproducts.Thecable
screenswouldconnect360otothePCBgroundplane.
2.6.6Terminatingcablescreensatbothends
This seems like heresy to some, but with the high frequencies in use these days leaving an end
unterminatedwillusuallyleaktoomuch.Screenterminationatbothendsalsoallowsthescreentowork
onallorientationsofmagneticfields.
Ofcourse,connectingscreensatbothendsallowsanyearthpotentialdifferencestodrivecurrentsinthe
screenthatmightcausehumpickup,andevenmeltthecables.Wheresuchearthcurrentsexistitisan
indicationofpoorfacilityearthbondingwhichcouldallowearthfaultsorthunderstormsurgestodestroy
inadequatelyprotectedelectronics.Itisnotunknownforscreenedcablestoflashoveratunterminated
endsduringthunderstorms,creatingobvioushazards.
It is sometimes recommended to electrically bond a cable screen at one end, and terminate the other
withasmallcapacitor.Theaimistopreventexcessivepowerfrequencyscreencurrents,anditdoeswork
tosomeextentalthoughitisdifficulttogetcapacitorstoprovidelowenoughinductanceforveryhigh
frequenciesanditdoesnothingforsurgeandflashoverproblems.InsulatedBNCconnectorsareavailable
with screentochassis capacitors builtin, but the last price I had for types which worked well to 1GHz
wasnearly20each.
Galvanically isolated communications offer a way out of bonding screens at both ends, but such an
approach needs careful attention to detail, especially the safety and reliability issues associated with
installationearthfaultsandsurges.Metalfreefibreopticsarethebestkindofgalvanicallyisolatedsignal
communications,andtheeasiesttouse.
Section 2.5 above briefly lists the currently accepted best installation practices in achieving good EMC
(e.g. using a PEC to divert heavy earth currents) without suffering hot cables and without
compromisingsafety.RefertoIEC6100052:1997formoredetail.

2.7Gettingthebestfromconnectors
ConnectorssufferfrommanyofthesameEMCproblemsascables,afterall,theyarejustshortlengthsof
conductorinarigidbody.
It is best to segregate connectors into those used for internal connections, and those used for outside
connections, because of the possibility of flashover from outside to inside pins during surge or
electrostaticdischargeevents.Suchflashoverscanbypassprotectivedevices.

2.7.1 Unscreenedconnectors
Controlledimpedancetransmissionlineconnectorsareincreasinglyavailableforhighspeedbackplanes
orcables.
When not using transmission lines, much improved EMC and signal integrity can be had from ordinary
multiway connectors (e.g. DIN41612, screwterminal strips) by making sure that each "send" pin has a
returnpinalongside.Attheveryleastprovideonereturnpinforeverytwosignals.Itisbestwhenthese
areusedwithbalancedsignals,butthetechniquealsohelpswhensignalsaresingleended.
2.7.2 ConnectorsbetweenPCBs
Connectors between PCBs (e.g. daughterboard to motherboard) also benefit greatly from multiple 0V
pins spread over their full length and width, and a similar arrangement of power pins also helps
significantly.OptimumsignalintegrityandEMCisgenerallyachieved(forsignalssharingthesamepower
rails)withapinpatternthatgoes:

Thefollowingpatternprovideslowerperformancebutisoftenadequate,andusesfewerpins:

Itisalsobesttoextendtheconnectoroverthefulllengthofthecommonedgebetweenthetwoboards,
andliberallysprinkle0Vandpowerconnectionsoverthefulllength.Thereissomeevidencethatrandom
pin allocations may provide better performance by breaking up standing wave patterns. Additional
groundsbetweensensitiveandnoisysignalscanhelpbeabarriertocrosstalk.
Wedon'treallylikeconnectorsonPCBs,andtheyshouldbeavoidedifpossible(reliabilitywillimproveas
a result) as mentioned earlier, single or flexirigid PCBs with ground planes under all their tracks are
better. Also: don't socket ICs (use field programmable PROMS). Each IC socket pin is a little antenna
positionedrightatthemostvulnerableornoisylocationpossible.
2.7.3 Screenedconnectors
Thereisnosuchthingasaconnectorthat"complieswiththeEMCDirective",thereareonlyconnectors
withfrequencydependantscreeningperformance.Screenedcablesmustmaintain360oscreencoverage
overtheirwholelength,includingthebackshellsoftheirconnectorsatbothends.Connectorbackshells
mustmake360oelectricalbondstotheenclosureshieldstheyaremountedon,usingirisspringsorsome
other method. Saddleclamps seem to make adequate screen bonds for most purposes in rectangular
connector backshells, but avoid the ones that need the screen to made into a pigtail, however short.
Figure 2L shows a typical Dtype screen termination.

Coaxial and twinaxial screened cables benefit most from connectors with screwed metal backshells.
Thesearebetterandmorereliableathighfrequenciesthanbayonettypes(likeBNC),whichiswhythey
areusedonsatelliteTVconvertorboxes.
Multiway screened cables are also best used with round connectors with screwed backshells, but are
often specified with rectangular connectors such as Dtypes or larger. Making a 360o connection from
cablescreentoconnectorbackshell,andfrombackshelltoenclosureshield,seemsalottoaskofsome
connectormanufacturers,socheckthishasbeendoneeffectivelybeforecommittingtoaparticularmake
or type. Especially watch out for single (or long) springs, clips, and wires, when used to make a screen
bond:thesearejustpigtailsandwilllimitSEathighfrequencies.
Unfortunately,manyindustrystandardconnectorsdonotallowcorrectterminationofcableshields(e.g.
jack plugs, XLRs, phonos, and any number of proprietary connector models). Also unfortunately,
connectorsystemsarestillbeingdesignedwithoutadequatethoughtbeinggiventotheneedforsimple
360ocablescreentermination(e.g.RJ45,USB).TheoverallSEofaconnectorwillbecompromisedifused
withanenclosureshieldorcablewithalowerSE.
Figure2Mshowssomeoftheimportantconsiderationswhenbondingconnectorstoshieldedenclosures.

COMPONENTASSEMBLYTECHNIQUES


ComponentSelection:

Resistor
y TypesCarbonComposition,FilmtypeandWireWound
y Filmtypehasmoreinductancethatcarbonresistors
y Resonance due to Inductance and Capacitance is the limiting factor for the use of a
resistoratHF

Capacitor
y TypesCeramic,Tantalum,Mica,Mylar,etc..
y Electrolyticcapacitorshavelargeseriesresistanceabove25KHz
y MicaorCeramicisPreferredforHF
y AtVHFFeedThroughCapacitorisused

Inductor
y AirCoreInductoractasasourceofRadiatedEmission
y MagneticCorecanpickmoreEMI
y ThusCrystalOscilatorreplaceInductorsinPCBs


The careful assembly of the PCB is as relevant for the final equipment reliability as the
circuit design or PCB design and fabrication. When going through equipment failure statistics,
thisfactcaneasilybeverified.
Assembly techniques can vary widely from case to case. While smallscale production is
fully based on manual performance, automation plays an important role in highvolume
assembly, especially in countries where manual labour is a main cost factor. Assembly
techniques also undergo changes in the course of time with the accumulation of experience
and with the introduction of new component types. A review on assembly techniques can
thereforegiveanaccountofthepresentstateoftheart.
Tofitthescopeofthisbook,theemphasiswillbelaidmoreonsmallerproductionvolumes
withmanualassemblytechniques.


PREPARA
ATIONAN
NDMOUN
NTINGOF COMPON
NENTS

T
The guideelines givven here have ma inly the purpose to minim mise the ccracking of solderr
joint s due to mechaniical stres s on the joint. M echanica l stress on
o a soldder joint is mostlyy
caus ed by meechanical inputs b but also thermal
t e
effects o lead to the samee stress situation.
do s .
Adeqquate preecautions taken d during the e PCB deesign stagge can be
b an efffective reemedy to o
mini misestre ssonsold derjoints .Theopt imumcom mponent preparatiionasweellasthem mountingg
has to be pl anned an nd consid
dered han nd in hannd with the PCB design. In any caase, hole e
diam
meters sho ould at t he maxim
mum be 0.5
0 mm morem thann the lea d diametter for no
onplatedd
holessor0.7mmmforplaatedthro ughholesstogivesstillreliab blesolder joints.

Co mponent LeadPre
eparation

T
The bend ing of the e axial co
omponentt leads is done in a mannerr to guaraantee an optimum m
retenntionoft hecompo onenton thePCB whileam minimumo ofstress isintrodu
ucedont hesolderr
joint .Innocaaseshould danydam magetoth hecompo nentorittsleadsb ecaused whilebe ndingthe e
leadss; any strress on th
he compo onent lead ds where they direectly com e out fro om the coomponentt
bodyy (compo onentlead d junctio n) has tot be av oided. T he lead bendingradius sh hould be e
appr oximatelyy two ti mes the lead diaameter. The bentt leads should fiit into t he holess
perp endicularrtothebo oardsoth hatanysttressont hecompo onentlea djunction nisminimmised.
Fig. 211 sho ows a fe ew of thee very c ommon shortcom mings whiich provi de stresss on the e
comp ponent a s well ass on the solder jo oint. Ther efore suiitable be nding too ols must be made e
avail able for easy butt perfect compone ent prepaaration. A A simple handhel d device for such h
purp oses is suuggested in Fig. 21 12. In th is device,, a changee from on
ne bendinng slot to the nextt
will automatic
a cally give 2.54 mmm or 0.1" increased d spacing between the bentt compon ent leadss
tota kecareo ofholepa tternsin agridsysstemonth hesamed dimension nalbase.

Polarrised2le adcompo onents(e .g.,electrrolyticcap


pacitors) havethei rleadsbeentinam
mannerto o
showwthepolaaritysymb bolontheetop,afteermountiing,foreaasyreada bility.
Whe re largeqquantitiess ofboardds have to
obeasse mbled,au utomatic leadben ding mac hinesare e
emp loyed witth a throoughput o of thousaands of c omponen nts per h our. Theyy are avaailable in
n
diffe rent deg rees of sophistica
s ation and automattion. For small eqquipment,, the com mponentss
havee usuallyttobesup pliedinb
beltform withboth htheleaddendsst ickingon stripsof adhesive e
tape .

ng
Co mponent Mountin

Com ponents aare basic ally mounnted on only


o he board.. In doub lesided PCBs,
one side of th P the
e
comp ponent siide is usu posite to the majo
ually opp or conducctor patt ern side, unless otherwise
o e
dictaatedbysp
pecialdes ignrequi rements.
No
onpolaris ed2lead dcompone entsaremmounted togiveth hemarkin gorcolo ur
code the samee orientations throu ughout th he board (Fig. 213). The ccompone nt
orienttation can
n be both horizonttal as wel l as verti cal but u niformity in readin
ng
direct ionsmusttbemain tained.
Thhe uniform mity in orrientation
n of polarrised commponents (diodes, capacitorrs,
transisstors,ICs ,etc.)isd
determine edduringgthedesiggnofthe PCB.Itsiimportancce
isnot onlyforaassembly convenie encebutaalsolater duringte stingorsservicing.

Component
C orieentation to be keept uniform

Fiigures21 .4givesa fewmor emountin


ngdetailssfor2leaadcompo nents:
A)) Horizon tallymou unted res istors muust touch the boa rd surfacce to avo id
lifting of solde
er joints along witth the co
opper patttern und der pressu ure on th
he
resistoor body. B) Verticaallymoun nted resis tors shouuld not be o the boa rd
e flush to
surfacce to avo id strain on the s older join
nt as welll as on the
t comp ponentleaad
junctioon due to
t differeent therm mal expan nsion coeefficients of lead and boa rd
mater ials.Whe erenecesssary,resillientspaccershave tobepro ovided.C))Coatedo or
sealedd compon nents tooo, have to
o be mou unted in such a way
w o provide a
as to
certai n distancce from the boarrd becau se the i nsulation coating is usuallly
extend ded to a certain length al ong the leads. Es pecially with
w plat edthrouggh
holes whereth esolderfflowsup intheho le,clean leadsofaatleast1 mmabovve
thebooardarerrecommen nded.

Some more mo ounting reecommen ndations are
a given in Fig. 2 15 A:. Co
omponen ts
dissipaating mo re heat tthan 1 W
W should be clearl y separatted from the boa rd
surfacce. Thisis to minim
misethermmalstressson thel aminate butalso ttoenable a
betterrairflow forcoolinngofthe componeent.B)W herejump perwires crossov er
condu ctors, th he jumpe r wire must
m be insulated . The in sulation has to be
b
suitabblystrippeedbackso oasnott oaffectt hesolderring.C)In thecase offlushtto
board mounte d compo onents ovver cond uctors, aa conform mal coatiing of th
he
finisheedPCBis recommeendedto preventttheformaationofm moisturettrapswhicch
could beharmffultothe electricallfunction ningoftheecircuit.




























Trransistor mountingg should never be done flu ush to th e board: This cou ld
give c onsiderab
ble stresss on the solder
s joi nts and tto the leaad junctio
ons besidees
the poossible ovverheatin g during the soldeering ope ration (F ig. 216). There is a
widerrangeofrresilientsspacersan ndspread dersavail able.Wit hsinglessidedPCB Bs,
the usse of slee mmon praactice. If large traansistors (e.g., TO 3
eves is a lso a com
case) havetob bemechan nicallyse curedtottheboard d,spacerss,washer andsprin ng
washeersarepre eferablyuusedasin ndicatedi nFig.21 6C.

M
Mounting o f integraated circuitts: To en able an easy inse ertion, thhe leads of
integr atedcircu uitsinTOOcanord ualinlineepackagee(DIP),th eleadsh aveusuallly
to be readjuste ed. Simplee jigs are availablee for this purpose,, for each
h particul ar
packaggetype.

Mechanical securing of components must
M m be cconsidere ed as so on as th he
compo onent we ight is m ore than 10 g. Thiis is not oonly to withstand
w the shoc ks
andvi brations intheord dinaryuse eoftheeelectroniccequipme entlater, butalsotto
surviv ethetran nsportan ndshipme enthandli ngpriorttothefin aluse.Sp pecialclip
ps,
clamp sandbra cketsare available einawid evariety forsuch purposes .

Sttraightthro
ough mou unting orr lead cliinching: TThe simp le straigghtthrouggh
mountting of componen
c nts (Fig. 217) is compatib ble with the com mmon ma ss
solderringtechn niques.Th hereplaci ngofstraaightthro oughmou untedcom mponents is
simplee since thhey can bbe readilyy removeed after h heating u p the so lder jointts.
Straig htthrouggh moun ting is preferred d for sin nglesided d PCBs b because it
provid desanopttimum36 60symm etricalso lderjointt.Adrawb backisth enecessi ty
tohol dthecom mponentffirmlyini tspositio onwhiles oldering it.

NotRecommended Recommendeed

Thhe clinchi ng of lead


ds meanss an addittional opeeration affter the leeads are in
prope rposition nforsold ering.Buttclinchin gavoidsttheneed forspeci alpressu re
solderring fram mes. Also o, holet olead c learance become es less ccritical fo or
solderring and the
t moree the cleaarance, th
he easier will be the
t inserttion of thhe
compo onent. In addition n, platedthrough hole sol der conn nection reeliability is
impro ved due to the laarger wet ted area and bettter mechaanical con ntact. As a
rule,ttheclinch edleadp portionshhouldnot beexten ndedbeyo ondthea nnularrin ng
butit isanacceeptedpra cticetoe extenditffurtheral ongcond uctortra cks.

Lead preformin ng: A co ompromis e betweeen strai ghtthrou ugh mou unting an nd
clinch ing is givven with appropriiate com ponent leead prefo orming. TThe dimp ple
mplelead preformaationsareeshown i n Fig.218.Other shapesa re
offset and dim
used aas well. A
A good co omponen t retentio on on thee board prior
p to ssoldering is
achievved whil e the aadvantage es of s traightthhrough mounting
m are sttill
maintaained.In addition, thelead sarecut tofinall engthintthesame operatio n.
Thereffore, lead
d preform
ming withh semiau tomatic eequipmen
nt has beecome ve ry
populaarwithbuulkelectr onicequi pmentm anufacturrers.

GUILD
DLINESForPCBDessignCom
mponentPlacemen
nt,TraceR
Routingaand
Decou
upling
INTROD
DUCTION
Asmucchasweh hatetoadm mitit,EMCCengineerssandprinttedcircuitboard(PC CB)designeers
relyheeavilyonddesignguid delineswh hendesigningorevaluatingPC CBsordiaggnosingEM MC
problems.Ofcourse,agoodengineer doesno otrelysolelyonguidelines.If aparticullar
design feature violates
v a gguideline, a more thhorough analysis is normally ccalled for to
determmine whether or nott the violation is likeely to pressent a problem. Ideaally PCB EMMI
design guidelinees serve as a startin
ng point. They help p the designer to m
make layo out
choices without stopping to analyzze every decision.
d D
Design guid delines plaay a role in
makinggdesigntradeoffsandtheyhe elptoidentifypotenttialproblemareas.

Unforttunately,thherearenearlyasm manydesign nguidelineesasthere earedesignengineers.


Somegguidelinesarebased doncircuittorradiationmodelss,someare ebasedon
nexperience
and otthers have
e no known origin. A
A few guid delines aree very important and d can nearrly
alwayss be applie
ed. Otherss apply only to speccific situations and are
a not ap ppropriate in
generaal.

Theguuidelinespresentedh herewere selectedffromamuchlonger listthatw wascompileed


over the past year.
y The longer listt containss guidelinees contribuuted by some of th he
compaaniesthatwweworkw withhereattheuniveersity.Itallsoinclude esguidelineespublisheed
inbooks,magazinesandontheweb.Inthelon ngerlist,guidelineso oftenconfllictwithon ne
anotheer and many of them
m are outt of date or
o applicab ble only to
o certain vvery speciffic
typeso
ofboards.

The longer list was


w shorteened by eliiminating all the guiidelines th
hat didn't m
make sensse,
were ooutdated or could not be applied
a o a wide variety off board designs. Also
to
eliminaated, were e guidelinees that co
ould easily be misintterpreted causing a designer to
inadveertently make thingss worse. TheT remaining guidelines we ere groupeed into foour
categoories:comp ponentplacement,trraceroutin ng,boardd decouplinggandtheto opfour.

THETO
OPFOUR
While anyrankinngofEMC designguidelinesis subjectivee,therearefourguid delinesthaat,
inthe opinionofftheautho
or,deservespecialaattention.A AsignificantpercenttageofEM
MC
problemsarethe edirectressultofboaarddesignssthatviolaateoneofthesefourguidelinees.
Sometimes desiggners are aware of these guidelines, but violate them in an effort to
complyywithlessimportanttguideline es.

1.Miniimizesignaalcurrentloopareass
Althouughdigital designers don'talwaysrealizeethis,alleelectricalsignalshavvecurrent as
well ass voltage. Signal currrents always return e. they flow in loops).
n to their source (i.e
Minimizingsignaalcurrentlloopareassisperhapsthesingllemostim mportantth hingyoucaan
do to prevent ennergy in thhe signal from
f coupling to othher circuitss or radiatting. Printeed
circuitboarddessignerssho ouldalwaysskeeptracckofwherrethesignaalcurrentssareflowin ng
anden nsurethat alowimp pedancepathisprovvidedtoreeturneverrysignalcurrentto its
sourcee.

2.Don'tlocateciircuitrybetweencon nnectors
I/Ocon nnectorsggenerallyreepresenttthebestpo ossiblewayforenergytobecoupledonto
oroffffromtheb board.Highhspeedcirccuitrybetwweentwocconnectorswithattaachedcables
willeasilydriveo onecable relativeto
otheotheerwitheno oughvoltagetoexceeedradiateed
emissio onsspecifiications[1].Thiswillbetrueevvenifthe cablesare
ewellshieldedandth he
circuitrryislocate
edaboveaasolidsignnalreturn plane.Transientsan ndRFcurreentsinduceed
byexteernalsourccesareverrylikelytoflowontoaboardo ononecableandoffo oftheboard
onanoother.Circu uitrylocateedbetweeentwocableconnecttionsismo oredifficultttoprotecct.

3.Controltransitiontimesindigitalsignals
Itisnotuncommontoseeproductsfailtomeetemissionsrequirementsatfrequencies
that are 10 100 times the fundamental clock frequency. However, by controlling the
rise and falltimes of the signal, it is possible to attenuate these upper harmonics
significantlywithoutdegradingthesignalqualityorbiterrorrate.Signaltransitiontimes
arereadilycontrolledbychoosinglogicfamiliesthatareappropriatetothetaskor(for
capacitiveloads)byputtingaresistanceinserieswiththesource.

4.Provideasolid(notgapped)signalreturnplane
This rule is essentially a corollary to the first rule, but it deserves special mention.
Radiated EMIproblemsoftenresultwhenwellmeaningdesignerscutagapinasignal
return plane forcing highfrequency currents to find their way back to the source by
highimpedance paths. Often the gap is created in an attempt to avoid a perceived
susceptibilityproblem.Althoughthereareafewcircumstanceswhereagapintheplane
iscalledfor,thisisadecisionthatshouldbepartofawellthoughtoutplan.Solidreturn
planesshouldneverbegappedjusttocomplywithaguidelineoranapplicationnote.

GUIDELINESFORCOMPONENTPLACEMENT

Connectorsshouldbelocatedononeedgeorononecornerofaboard.
ThepurposeofthisguidelineistomakeiseasiertocomplywithGuideline#2above.
Adeviceontheboardthatcommunicateswithadeviceofftheboardthrougha
connectorshouldbelocatedascloseaspossibletothatconnector.
ComponentsnotconnectedtoanI/Onetshouldbelocatedatleast2cmaway
fromI/Onetsandconnectors.
I/O lines represent one of the easiest ways to couple unwanted energy on or off the
board.
Alloffboardcommunicationfromasingledeviceshouldberoutedthroughthe
sameconnector.
This is to prevent radiated emission and susceptibility problems as described under
Guideline#2above.
Clockdriversshouldbelocatedadjacenttoclockoscillators.
Thisisconsistentwiththeideaofminimizingloopareas(seeGuideline#1above).

GUIDELINESFORTRACEROUTING

Allpowerplanesandtracesshouldberoutedonthesamelayer.
Thishelpspreventunwantednoisecouplingbetweenpowerbuses.Itusuallyresultsin
anefficientlayout,sincenotwodevicesrequirethesamepoweratthesamepointand
devicesusingthesamepowerbusaregenerallygrouped.
Criticalsignaltracesshouldbeburiedbetweenpower/groundplanes.
Signalsontracesbetweensolidplanesarelesslikelytointeractwithexternalsourcesor
antennas.
No trace unrelated to I/O should be located between an I/O connector and the
device(s)sendingandreceivingsignalsusingthatconnector.
Signalswithhighfrequencycontentshouldnotberoutedbeneathcomponentsused
forboardI/O.
I/O lines represent one of the easiest ways to couple unwanted energy on or off the
board.
Criticalnetsbetweenplanesshouldberoutedatleast2mmawayfromtheboard
edge.
Signalsontracesveryclosetotheboardedgearemoreeasilycoupledontoandofffrom
theboard.
Onaboardwithpowerandgroundplanes,notracesshouldbeusedtoconnectto
powerorground.Connectionsshouldbemadeusingaviaadjacenttothepoweror
groundpadofthecomponent.
Tracestakeupspaceontheboardandincreasetheinductanceoftheconnection.
Onboardswithmultiplesignalreturnplanes,allviasconnectedtoonesignalreturn
planeshouldalsoconnecttotheothers.
Attemptstocontroltheflowofsignalreturncurrentsbyconnectingtodifferentplanes
usuallycreatemoreproblemsthantheysolve.Itisgenerallydesirabletohaveallreturn
planes in a PCB at the same potential. They should be shorted together at every
opportunity.


Thetracewidthformulasare:
I=0.0150xdT0.5453xA0.7349forinternaltraces
I=0.0647xdT0.4281xA0.6732forexternaltraces
where:
I=maximumcurrentinAmps
dT=temperatureriseaboveambientinC
A=crosssectionalareainmils

GUIDELINESFORBOARDLEVELDECOUPLING

Due to unwanted coupling of Power Sources with subsystems, High Speed


Switching transience Occur.

Decoupling is the process of preventing undesired coupling between subsystems


via the power supply connections. A Capacitor is placed in Shunt to the Power
Source (or the Source that may couple) which will absorb the transient current.

1.1Boardswithcloselyspacedplanes

Onboardswithcloselyspaced(i.e.lessthan0.25mm)powerandgroundplanes,
the location of decoupling capacitors is not nearly as important as the inductance
associatedwiththeirconnectiontotheplanes
Decoupling capacitors should be connected directly to power/ground planes
usingviasinoradjacenttothepads.

It is unnecessary and ineffective to use capacitors with a nominal value that is
lessthantheboard'sinterplanecapacitance.Atlowfrequencies,highervaluesofca
pacitance are desirable. At high frequencies, connection inductance is much more
importantthanthenominalvalueofthecapacitor.
Power supply leads from active devices and decoupling capacitors should be
connecteddirectlytothepowerandgroundplanes.Noattemptshouldbemadeto
connectchipleadsdirectlytoadecouplingcapacitor.

1.2 Boardswithwidelyspacedplanes

On boards with widely spaced (i.e. greater than 0.5 mm) power and ground
planes,alocaldecouplingcapacitorshouldbelocatedneareachactivedevice.Ifthe
active device is mounted on the side of the board nearest the ground plane, the
decoupling capacitor should be located near the power pin. If the active device is
mountedonthesideoftheboardnearestthepowerplane,thedecouplingcapacitor
shouldbelocatednearthegroundpin{
Decoupling capacitors should be connected directly to power/ground planes
using vias in or adjacent to the pads. Decoupling capacitors can share a power or
groundviawiththeactivedeviceifthiscanbeaccomplishedwithouttraces(orwith
atraceslengthlessthanthepower/groundplanespacing).
It is unnecessary and ineffective to use capacitors with a nominal value that is
lessthantheboard'sinterplanecapacitance.Atlowfrequencies,highervaluesofca
pacitance are desirable. At high frequencies, connection inductance is much more
importantthanthenominalvalueofthecapacitor.

1.3 Boardswithnopowerplane

Onboardswithnopowerplane,alocaldecouplingcapacitorshouldbelocated
neareachactivedevice.Theinductanceofthedecouplingcapacitorconnection
betweenpowerandgroundshouldbeminimized.Twolocaldecouplingcapacitors
withafewcentimetersofspacebetweenthem,canbeusedtoprovidemoreef
fectivedecouplingthanasinglecapacitor



BoardZoning

Boardzoninghasthesamebasicmeaningasboardfloorplanning,whichistheprocess
ofdefiningthegenerallocationofcomponentsontheblankPCBbeforedrawinginany
traces.Boardzoninggoesalittlebitfurtherinthatitincludestheprocessofplacinglike
functionsonaboardinthesamegeneralarea,asopposedtomixingthemtogether(see
Figure10).Highspeedlogic,includingmicros,areplacedclosetothepowersupply,with
slower components located farther away, and analog components even farther still.
With this arrangement, the highspeed logic has less chance to pollute other signal
traces.Itisespeciallyimportantthatoscillatortankloopsbelocatedawayfromanalog
circuits,lowspeedsignals,andconnectors.Thisappliesbothtotheboard,andthespace
insidetheboxcontainingtheboard.Donotdesignincableassembliesthatfoldoverthe
oscillatororthemicrocomputerafterfinalassembly,becausetheycanpickupnoiseand
carryitelsewhere.

Inprioritizingcomponentplacement,themostimportantthingstodoinPCBdesignare:

Locatethemicrocomputernexttothevoltageregulator,andthevoltage
regulatornexttowhereVBattenterstheboard.

Builtagriddedorsolidgroundbetweenthethree(formingasinglepoint
ground),andtietheshieldatthatpoint.


BoardZoning

GroundingStrategiesforPrintedCircuitBoards

Designandlayoutofaprintedcircuitboard(PCB)forelectromagneticcompatibility
(EMC)isprobablythemostcosteffectivemeasurepossibleinthequestforEMC
compliance.Itiscosteffectivebecauseitrequiresnoadditionalcomponents.Itrequires
justtheknowledgeofEMClayoutmethodsandexperienceinapplyingthem.Some
criticalerrorsinlayoutthatcancauseanEMCproblemcannotberesolvedsimply
throughtheapplicationofadditionalfilters;relayingthePCBmaybetheonlysolution,
andgettingitrightthefirsttimethereforeoffersthelowestcostapproach.

Zoning

Theideabehindthisprincipleistoreducethecouplingbetweencircuitsbybasicphysical
separation.Theactualamountofseparationisdifficulttospecifyforallapplicationsand,
ofcourse,dependsonthewavelengthsofthesignalsineachsection(onequarter
wavelengthgapsbeingaminimum).Asabasicguide,a5mmgapbetweencircuitsall
aroundisusuallyadequate.

Zoningofcircuitsisusuallyperformedbyusingamoated(empty)areaaroundeach
circuitorfunctionalblock.Hence,somepatterningisrequiredofanygroundandpower
planes.Patterningthegroundandsupplyrailspreventsapowersurgeornoisevoltage
ononecircuitblock(whichmaybeabletohandletheevent)frombeingreturnedviathe
groundonanothercircuitblock(whichcannottoleratesuchanevent).Althoughthe
groundconnectionsandsupplyrailsmaymeetatthepowerinputtothePCB,by
separating,theloopsforsupplyandgroundreturnarecontrolledforeachcircuit.

Figure1.
Zoning:
separationof
circuitsby
functionor
operating
speed.

Functionandoperationspeedshouldsegmentcircuits.Highspeeddigitalcircuitstendto
havehighinstantaneouscurrentdemandsatclockedges,andthereforethesecircuits
shouldbeplacedclosertothepowersupplyunit(PSU)inletthanslowercircuitssuchas
analogfunctionsandinterfacecircuits(seeFigure1).Itisimportanttonotethatitisnot
theabsolutepowerdemandthatcausesEMCproblemswithinasystem,butrather
transientsinthepowerdemand.

CircuitsthatwillinterfacewiththeoutsideworldorwithotherPCBswithintheend
systemmustbenearthePCBedge;thereshouldbenotrailingwiresacrossaPCBwithin
asystem.SomecircuitsonaPCBareknowntobenoisyorareintendedtohandledirty
signalsfromoffboardsystems.Filteringmightberequiredatthesecircuitinputs,soa
secondaryZoningwithinthecircuitblockmightberequiredtohandletheoffboard
signalfiltersatthePCBinterface.Aseparatemoatedgroundplaneforinterfacecircuits
wouldbeanothergoodEMCmeasure,especiallyifthesystemhasasafetyground(oran
EMCground)thatcouldbereferencedforelectrostaticdischarge(ESD)andtransient
suppressioncircuitsdirectlyattheinterfacesocket.

GroundingPatterns

Themainobjectiveofagroundingpatternistominimizethegroundimpedanceandthe
sizeofanypotentialgroundloopsfromacircuitbacktothepowersupply.Notethatthis
isnotsimplyminimizingtheresistanceatthefrequenciesofinterestforEMC;itis
inductivereactanceofthetrackingthatusuallydominatestheimpedancecharacteristic.

GuardRing.Thisisagroundconnectedtrackthatdoesnotcarryareturncurrentforthe
circuitundernormaloperation.Itspurposeismainlytoserveasareturnsourcefor
radiofrequencycurrentradiatingoutof,orincidentto,thePCB(seeFigure2).Itis
usuallytrackedaroundtheouteredgeofaPCBandaroundconnectorsandinputoutput
circuits.Ifaseparatesafetygroundisbeingused,theguardringcanbeconnectedtothis
ratherthansystemground,andsafetyorESDdevicescouldsinktheircurrentviathis
track.Theguardringcanactasafieldfringingsinkandcanbeplacedaroundtheedgeof
apowerplane,aswellasaroundthetrackinglayers.

Figure2.
Guardring.
The
grounded
track
normally
carriesno
current.

SingleSidedGroundTracking.Agroundingstrategycanstillbeimplementedona
singlesidedPCB.Thefirstconsiderationistoplanforawidegroundtrackcoveringas
muchofthePCBaspossible.Donotattemptagroundplaneandthenetchouttheplane
fortracking.Doingsocanactuallycausemoreproblemsthanitsolvesbecauseitcould
leaveunconnectedmetallizedareaswithinthePCBthatreflectsignalsthroughtheboard
oractasreceiversandinjectcapacitivelyintonearbytracks.Itispreferabletoattempta
stararrangementofconnectinggroundandpower,butthiscanbedifficultwithonly
singlelayertracking.

Usinginductorcapacitorfiltersattheinputtoeachcircuitsegmentfromadaisychained
powerrailcouldcompensateforthelimitedavailabletrackingbecausetheinductors
fromthesupplyrailcanbeusedasbridgingcomponents.Aguardrailcanbeplaced
aroundtheedgeofaPCB,connectingtothegroundattheinputtothePCBonly.Even
onasinglesidedboard,thisapproachhelpsreducefieldfringingattheboardedge.Ifa
shieldprovesnecessary,leavingtheguardringasasoldermaskedtrackprovidesa
suitableplacetoattachtheshield.

GroundGrid(GroundMatrix).AgroundgridformsaseriesofboxsectionsonthePCB.A
groundareabeneatheachintegratedcircuit(IC)onthecomponentsidealsohelps(even
ifafullgridcannotbeimplemented);decouplingcapacitorscanbetieddirectlytotheIC
supplylineusingthisarea.Tomaintainlowimpedance,athicktrackforthegroundgrid
ispreferred,butwithhighpincountsurfacemountcomponents,athicktrackisnot
alwayspossible.Athintrackcompletingthegridisbetterthannotrackatall.Even
thoughathintrackisnotaparticularlylowimpedancesolution,itstillminimizesloop
areasforbothgroundcurrentsandsignalreturnpaths.

MirrorSupplyLines.Forgroundgridstobetrulyeffectiveatminimizingsignalloops,a
similarpatternforthesupplyshouldbeattempted,mirroringthegroundpaths
whereverpossible(seeFigure3).However,itisnotnecessaryforthesupplypathto
completelygridthesamewaythegrounddoes.Comborstarsupplyarrangementscan
beveryeffectivewhencoupledwithacompletegroundgrid(combpatterningshould
notbeusedongroundingschemes).

Figure3.
Mirror
supplyand
ground
paths.A
thinner
powertrack
reducesfield
fringing.

Havingthesupplytrackslightlynarrowerthanthegroundhelpsreducesupplyfield
fringingandreducescrosstalkfromthesupplyrailtonearbysignaltracks.

SafetyorESD/EMCGround.Aseparatesafetygrounddesignedaseitheraplaneora
guardtrackisparticularlyusefulwheresignalsenterandexitthesystem.Oftenthe
safetygroundcannotbeusedoveracompletePCBplanebecausetheleakagecurrent
specificationsareexceededbycapacitivecouplingeffects.Alowvaluedecoupling
capacitorbetweenthesignalandsafetyground,andclosetoanyoffboardsignal
connectors,providesahighfrequencycurrentlinkbetweensystemandsafety
references.Capacitivecouplingbetweenanaloganddigitalgroundsclosetoanysignal
interfaceshouldalsobeplannedtocapacitivelybridgeanymoatregionatthesignal
interface.

PlanandLayOutGrounds

OnamultilayerPCB,thegroundandpowerplanesshouldbeplannedfirst.Ifoneofthe
supplyplaneshastobesacrificedfortracking,itshouldalwaysbeapowerplane.The
groundplaneshouldbemaintainedintactwhereverpossible.

IncreasingthePCBstackandincludingoneormoregroundplanescansolvemanyEMC
problemsencounteredwithbothsingleanddoublesidedPCBdesigns.Apreferredstack
wouldhavegroundandpowerplanesseparatedbyaprepreglayer(foilbuild)orthin
laminate,withathicklaminatebetweenpowerandtrackingandbetweengroundand
tracking.Usingathinlayerbetweenthepowerandgroundplanesminimizesthe
distancebetweenthem,therebymaximizingtheeffectivecapacitance.APCBcapacitor
constructedinthismannerhasaveryhighfrequencyresponse(highselfresonant
frequency)andlowseriesinductance.

MultilayerPCBGroundPossibilities.Severalofthesegroundingstrategies,including
placingasurfacegroundgridondigitalsectionswithburiedorevenmultipleground
planes,canbeimplementedonaPCBstructurewithmanylayersandagroundplane.
Whereverthereareseveralgroundcircuits,thecircuitsmustbeinterconnectedto
maintainalowimpedanceandshortreturnloops.

Copperfill,acommontechniqueforusewithsomeanalogcircuits,introducesareasof
copperontheportionsofthePCBsurfacethatcarrynosignalsandthereforeshouldbe
grounded.Althoughthiscanpotentiallyreducefieldfringingandimprovedecoupling,
thecopperareascanbeinadvertentlyleftdisconnected,whichcaninduce
electromagneticinterference(EMI)problems.Thistechniqueisnotsuitablefordigital
circuitsbecauseitcancreatedifferencesinsignalskewaswellaspropagationdelay
betweentracksthatcouldleadtofunctionalfailures.Consequently,copperfillisnot
particularlypopularformanymoderndesignsandshouldbeusedwithcareonanalog
circuits.Groundstitching,whichreferstoplacingmultipleviasbetweengroundareason
differentlayers,canbeusedwithguardringsandlargegroundedsurfaceareasthat
resultfromcopperfill.Ifthesystem'schassisisgrounded,usingplatedthroughholesfor
thestitchingpointsandfurtherconnectingthesetothechassiscanproduceveryquiet
PCBdesigns.

Imp
pedance
eControl
Charaacteristic impedan
nceofatrransmissi online

Transmission lin ne correctly terminaated at one end behhaves at th
he other eend as if th
he
terminaatingimped dancewasspresenttthere,with htheonly noticeable eeffectbeiingacertaain
me that takes the electrical phenomen
delay. TThis delayy is the tim na to travvel over thhe
transmission line and this sspeed is a fraction of
o the speeed of ligh um, typically
ht in vacuu
between0.4and0 0.9.

This is to say th
hat for a ccorrectly terminated
t d line will be no reflections diistorting th
he
waveform. The validity
v of these assertions iss limited by some implicit aassumption ns,
notablyy that the e losses in n the transmission line itself are neggligible an nd that th he
characteristicimp pedanceisessentiallyindependentofth hefrequen ncyinthe spectrum of
interestt. These tw wo approxximations are justifieed in the typical situations an nd materiaals
normalllyusedind digitaldesiigns,sowe ecanconfiidentlyuseetheresulttspresenteedinhere.

ThegeneralcaseofCapaccitiveReacttanceandInductiveandReactanceis:





It can
n be show
wn that for a line without
w lossses, the ccharacterisstic imped
dance is th
he
positivee square root
r of th
he producct of the Inductive Reactance e and thee Capacitivve
Reactan nceperunitoflengthh.


Co
Since the two reactancess are imagginary num mbers of o opposite sign it resu ults that thhe
characteristic imppedance iss a real number. In other
o words, it lookks as a regular resisttor
butwith hthepecuuliaritythaatitdoesnnotdissipaatepower.Infactth hepoweriisdissipateed
(withth hedelayassmentioneedabove)attheotherendby therealre esistorthattterminates
the linee. Another consequeence, show wn in the third
t exprression, is that even though th he
characteristic imp pedance is essentiaally a dynaamic phen nomenon, it can bee calculateed
purelyb bystaticm
means.Tho osemeans dependoftheinductanceand dcapacitanceperun nit
length,whichintu urndependstrictlyo ofthegeommetryofth helineinquestion.

The b
bad news is that theere are noo practical general expressionss applicablle to all lin
ne
shapes. Only a handful o of cases with
w simple geomettry that admit exacct analyticcal
solution
ns. If an acccurate im
mpedance calculation
c n is neededd for an arbitrary geeometry th he
best beet are the e numericcal metho ods. Thesee methodss work byy successiive numerric
approximations applied
a to some decceptively simple
s equuations satisfying th he boundaary
conditio
onsimpose edbytheggeometry((metaland ddielectricc).

Fortunately,the ereareapp
proximateoraccuratteenoughsolutionsforanum mberofcases
of interrest. We will
w here cooncentrate e of some of those ccases, especially as it applies to
common structurres in PCB B design. These
T biquitous "microstrip"
are variationss of the ub
(traceooveradielectricoveraground dplane)an nd"striplinne"(trace buriedin adielectric,
sandwicchedbetweentwogroundplan nes).

Thefaactthatthhetransmissionline actsasifttheloadw wasdirectlypresent attheinpput


(othertthanthede elaypheno omenon)issthereaso onwhyweeareintereestedinitssbehaviorin
the realm of digittal design. As resultt of its ow eform pressented at its
wn nature, the wave
inputmmakesitswaytotheo outputwithoutreflecctionsordistortionsofanykind d.


SomeoftheJargonandBackground
Core Construction: PCB fabrication process that piles up core materials with
intermediateprepegmaterial.Thismethodalwaysresultsinanevennumberoflayers.

Foilconstruction:PCBfabricationprocesssimilartotheCoreConstructionexceptinthe
externallayers.Theexternallayersareaddedusingsheetsofcopperfoilontopofprepeg
material.Eventhoughthismethodcantheoreticallyproduceoddnumberoflayersitis
recommendedtostilluseanevennumberduetotheriskofwarpageandcost(itis
usuallycheapertoaddalayer).

Prepeg:Shortforpreimpregnatedmaterial.Itconsistsofsheetsofthebasicmaterial
(forexample,FR4)impregnatedwithasyntheticresinpartiallycuredtoanintermediate
stage.Prepegisusedbetweensheetsofcorematerialformiddlelayersandwithcopper
foilontopforexternallayers.
CopperClador"CoreMaterial"::ItisoneoftherawmaterialsusedbyPCBfabhouses.
Itconsistsofalayerofdielectricmaterial(themostcommonisFR4)sandwichedbetween
layersofcopperoneachface.Thecopperlayersaregenerallyofthesamethickness.The
copperthicknessisusuallyexpressedintermsof"oz.",ormorecorrectlyin"ouncesper
squarefoot".Thisunitisequivalentto1.4milthickness(35microns).Mostdigitalcircuit
designs use substrates of a glass/epoxy composite known as FR4. Commonly
commerciallyavailablevaluesofcopperthicknessare0.5,1,2&3oz.

FR4:Typicalmaterialusedindigitaldesign.FR4isaglassfiberepoxylaminate.Itisthe
mostcommonlyusedPCBmaterial."FR"standsfor"FireRetardant"(ANSI).Itisusableup
tofrequenciesintheorderof1GHz,withlossesincreasingwiththefrequency.Indigital
designs,thelossesarenotthatbad.Infact,thelowQ(highloss)materialsarepreferred
for these applications because thy help to dissipate the energy of reflections and other
spuriousdistortions.

Padstack:ThedescriptionofcopperanddielectriclayersconstitutingaPCB,specifying
each thickness. It consists of a number of prepeg, cores and copper layers. Since the
optimumpadstackisPCBfabtechnologydependent,itisalwaysagoodideatochecka
proposedpadstackwithyourPCBhouse.

Microstrip: Consists of a trace running on the surface of a PCB separated by one or


more layers of dielectric material from a ground plane located underneath. It is also
called"surfacemicrostrip"todistinguishitfromthe"coated"or"embedded"variations.

Embedded Microstrip: Similar to the plain or "surface microstrip" but buried into the
dielectricmaterial.

Coated Microstrip: Similar to the "embedded microstrip", differing from it because of


the dielectric thinness on top and the construction process. The dielectric on top is
usually the solder mask coating the PCB surface. It is an extreme case of Embedded
Microstrip with different dielectric constant than the material below. The impedance
does not usually change significantly from the regular Microstrip case except in case of
verythintraces,whichchangeafewunitspercent.

Stripline: Trace running between two ground planes. See under the "symmetric" and
"asymmetric"variations.

Symmetric Stripline: This geometry consists of a trace running between two ground
planeslocatedinlayersaboveandbelowwiththesamedielectricthicknessandmaterial
onbothsides.
Asymmetric Stripline: Similar to the symmetric stripline except that the dielectric
thicknessaboveandbelowthetrace aredifferent.Thematerialistypicallyofthesame
kind.

Etching:Chemicalprocesstoremovetheunwantedcopperfromalayerduringthefab
process. The copper face where the etching solution is applied results in extra etching
comparedwiththecopperlayerfacingtheFR4core.Thiseffectmaybeimportantincase
ofverythickcopperorverynarrowtraces.

Ground Plane: For the purpose of impedance control a well decoupled VCC plane is
equivalenttoatrue

Thefollowingplotshowstheimpedancevaluesforacoupleofcommonvaluesofthecopperthickness
(0.5and1oz.)andtypicalFR4material.Theimpedanceisplottedagainstthetracewidth,fordielectric
thicknessfrom4through14milsandtheplotisorderedbygenerallydecreasingimpedance.


Note:

If Mother Board Design Question is asked, write about all the PCB Design
techniques viz., Trace Routing, Impedance Control, Zoning etc.. Centric
with Mother Board. There is no Special Technique for Mother Board
Design, but it will be done with more Precaution. Present the Answer
Accordingly.