SAUDI ELECTRICITY COMPAHY .!

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xiii) Measurements sha[ be peformed earry during the base design
stage.
b) Filter Design Requirements

i. Harmonic filters shall be designed in such a way that
the total
harmonic currents from the power system and the svc
do not
overload the filter reactors or capacitors. The rated
current of the
filter components_ vriil be based upon the carcuration of
the generated
harmonic currents added quadraricaily (RSS), ano aaoin-g
margin in totar rated current (incruding iransient,
a ?}a/a
=tuioy iiate and
harmonic roading) in consideraiion of uickground ha-rmonics.

ii' The rated voltage of capacitors should be not less than
the arithmetic
sum of the normar continuous power-frequency vortage
and each of
the individuar,harmonic voftages (from n = z io so]=anc
an added
margin ar 2ao/o in totar rated vortaqe. (incruding transieni
steady state
and harmonic roading) in eonsideLtion of b;"iil;;;
harmonics,
iii- The components of harmonic firters shaH be sized upon
the loilowing
factors:
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1. absorption of characteristic and non-characteristic
harmonic
currents generated by the proposed SVC,
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2. filter detuning and maximurn expected frequency deviation,
which
shalr not cause harmonic overvortages neyonJ i'""rtrin
ti*it.
3. requirements and contingencies described in herein,

4. operation of svc with arr redundant firters out of service" if
applicable.

iv. vsc firter components shaH be rated as per i, ii and iii above.
The fundamentar frequency cunrent rating shali be derived
fronr
the po nt s vi n ;[H,'J "X#ffi
i i
i' hf '[?,il:'
J,- ir"J ",i:Jilfi
voltage bus in the vr diagranr. A safety mirgin, in aooition
to
margins for components given in section s ott-tris prs,
strall be
multiplied to both current and voltage. The safeg margin
shall
be 2.0

c) TSC Design Requirements

shunt capacitor bank components shail be rated as per i, ii
and iii above.
The voltage and current stress shail be carcuratei [v ,rirg
voltage $ource behind the network impedance. rne compone"nt
J r"rmonic
raiing snail
be the geometric sum of the maximum fundamentar cuirent, tne
background harn':onic currents and the svc generated
TE! DO(r}l!:\I E harmonics for the
BE T:ED
TOT
reactors and the arithmetic sum for the eapacitrors.
cor:rx.t(fiox oR
offie-^t [s
n-Ia mmD
d) SVC Power Transformer Design Requirements

The voltage and current stress shaH be carcurated by using
a harmonic
voltage source behind the netrork impedance. The iransfJrmei-cunent
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