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LED LCD TV
SERVICE MANUAL
CHASSIS : LD03E

MODEL : 47LE7300 47LE7300-ZA
MODEL : 47LE730N 47LE730N-ZA
MODEL : 47LE7380 47LE7380-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL63263214 (1008-REV00) Printed in Korea

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CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ..................................................................................3

SPECIFICATION ....................................................................................... 4

ADJUSTMENT INSTRUCTION ................................................................ 7

BLOCK DIAGRAM...................................................................................14

EXPLODED VIEW .................................................................................. 15

SVC. SHEET ...............................................................................................

Copyright © 2010 LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes

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SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer, AC Volt-meter

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instrument's CONDUIT etc.
0.15 uF
Leakage Current Cold Check(Antenna Cold Check) exposed
With the instrument AC plug removed from AC source, connect an METALLIC PARTS
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1 Ω
measured resistance should be between 1 MΩ and 5.2 MΩ.
*Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright © 2010 LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes

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SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method
This specification is applied to the LCD TV used LD03E 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety : CE, IEC specification
2. Requirement for Test - EMC :CE, IEC
Each part is tested as below without special appointment.

1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. Module General Specification
No. Item Specification Remark
1 Display Screen Device 119 cm(47 inch) wide color display module LCD
2 Aspect Ratio 16:9
3 LCD Module 119 cm(47 inch) TFT LCD FHD LGD/ IOP
4 Operating Environment Temp. : 0 deg ~ 50 deg
Humidity : 20 % ~ 90 %
5 Storage Environment Temp. : -20 deg ~ 60 deg
Humidity : 10 ~ 90 %
6 Input Voltage AC 100-240V~, 50 / 60Hz
7 Power Consumption Power on (White)
LGD Typ : 103 LCD (Module) + Backlight(EDGE LED)
8 Module Size 1083.6(H) x 628.8(V) x 25.5 mm(D) With inverter
8 Pixel Pitch 0.5415 (H) x 0.5415 (V)
9 Back Light LED(EDGE), LGE(IOP)
10 Display Colors 1.06 B(true) colors
11 Coating 3H

Copyright © 2010 LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes

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00 HDTV 1080i 11.603 Blue Xb 0. 0. Green Xg -0.00 HDTV 720p 10.03 Yg 0.061 1) Stable for approximately 60 minutes in a dark environment at 25 ºC ± 2 ºC and windless room. Remark 1. 720x480 15.com manuals search engine .75 60.63 59.DVD 480i 3. Max.94 480p 4.625 50. Viewing Angle<CR>10> Right/Left/Up/Down 89/89/89/89 CR > 10 2. Max 90 %RH 3) Suppl Voltage: 24 V 4) Frame Frequency: 120 Hz 6. Typ.94 HDTV 720p 9.636 Yr Typ.279 Wy 0.Manualslib. CIE Color Coordinates White Wx 0. 720x576 15.72 59. 720x480 31.47 59. LGE Internal Use Only Only for training and service purposes Downloaded from www.00 HDTV 720p 8.335 Typ. Inc. 2) Operating Ambient Humidity: Min 10. 720x480 31.00 SDTV.DVD 480i 2. 1920x1080 67.25 50.73 60. 1920x1080 33.50 60.250 50 HDTV 1080p 14.94 SDTV. -5.00 HDTV 576p 7.00 50. CB/PB.00 60. 5.3 MAX /MIN 3. Module optical specification No. 1280x720 44. Luminance Luminance (cd/m2) 360 450 Variation 1. 1920x1080 33. 720x480 15. 1280x720 45.00 480p 5.5 60 HDTV 1080p Copyright © 2010 LG Electronics. Contrast Ratio CR 1000 1400 4.291 +0.DVD 625 Line 6. 1280x720 45. CR/PR) Specification No. Remark Resolution H-freq(kHz) V-freq(Hz) 1.292 RED Xr 0. 1920x1080 56.94 HDTV 1080i 13.00 HDTV 1080i 12.25 50. All rights reserved. 1920x1080 31. Component Video Input (Y. Item Specification Min.03 0.146 Yb 0.96 59. 720x576 31.00 SDTV.

5 59. 720*576 31.363 60.321 HDCP 2. 1280*720 44.321 For only DOS mode 2. 1024*768 48. 640*480 31.17 VESA Input 848*480 60 Hz.96 /45 59. 1920*1080 67.78 59.72 59.Manualslib.17 VESA HDCP 3. Proposed Remarks Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz) 1. 1280*768 47.94 /60 74. 1280*768 47. 720*400 31.17/74.25 HDTV 1080I 6.75 WXGA 7.97 /27 23.00 65.94 /60 27. 1280*1024 63. 720*480 31. 1360*768 47. 1920*1080 66.25 HDTV 1080P 8. -6.0 108.595 60. Resolution H-freq(kHz) V-freq.94 /60 148.625 WUXGA FHD model 8.716 /33.75 WXGA HDCP 7. Inc. 1280*720 37.00 65. 1360*768 47.17/74.31 40.587 59. 852*480 60 Hz -> 640*480 60 Hz Display 3.50 HDTV 1080P (2) PC Mode No.com manuals search engine . HDMI Input (1) DTV Mode No. 1920*1080 67.(Hz) Pixel clock(MHz) Proposed Remark 1. 1920*1080 33.72 /33.469 59.5 WXGA HDCP 6. 1024*768 48.25 HDTV 1080I 7.363 60.8 84.500 50 74.94 25.5 HDTV 1080P 10.25 50 54 SDTV 576P 3.78 59. 640*480 31.00 74. 800*600 37. 1920*1080 28.875 SXGA HDCP/FHD model 8.5 59.976 /30.(Hz) Pixel clock(MHz) Proposed Remark 1.72 59.8 84.43 /67.00 VESA(XGA) HDCP 5.00/27.468 70.94 /60 74.00 74.75 59.879 60.469 59.5 60.00 VESA 4.595 60. 720*400 31.94 25.08 28.00 138.87 79. 1920*1080 33.625 WUXGA HDCP/FHD model Copyright © 2010 LG Electronics.469 /31. RGB (PC) Specification No.468 70.31 40.5 WXGA 6.17/74. 1280*1024 63.25 HDTV 1080P 9.97 /24 74. All rights reserved.00 VESA(XGA) 5. 800*600 37. 1920*1080 56.250 50 148.03 SDTV 480P 2. 1920*1080 26. Resolution H-freq(kHz) V-freq.0 108.75 29. 7.25 HDTV 720P 4.879 60.93 138. LGE Internal Use Only Only for training and service purposes Downloaded from www.35/148.875 SXGA FHD model 8.00 VESA HDCP 4.08 28.125 50.25 HDTV 720P 5.87 79.

shown in “3.0 [Caution] When still image is displayed for a period of 20 minutes or 3) Adj. Inc.ad 00 10 [Adjust 480i Comp1] . xb 00 60 b 00 OK60x (Adjust 1024*768 RGB) (3) The adjustment must be performed in the circumstance of Begin adj.3)” 2) Adj. it should be placed in the circumstance of above 15 °C for 3 hours.1 in the other LD03E chassis. protocol 2. ad 00 20 000000000000000000000000007c007b006dx (5) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over (sub) (Sub) 15.Using RS-232. Application Range (3) Adjustment 1) Adjustment method This specification sheet is applied to all of the LCD TV with .Manualslib. -7. (2) Adjustment must be done in the correct order. NGx (Case of Fail) (4) The input voltage of the receiver must keep AC 100-240 Read adj.1.2.Image Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port Copyright © 2010 LG Electronics. result OKx (Case of Success) humidity if there is no specific designation.65) PCBA PC(RS-232C) . it NG 03 01x (Fail) should be placed in the circumstance of above 15 °C for 2 NG 03 02x (Fail) hours OK 03 03x (Success) In case of keeping module is in the circumstance of below . ad 00 10 25 ºC ± 5 ºC of temperature and 65 % ±10 % of relative Return adj. 3. . . order longer (especially where W/B scale is strong.Pattern level : 0.) ADC Adj.1 Vp-p .aa 00 00 [Enter ADC adj. mode] 13ch and/or Cross hatch pattern 09ch). MAC Address (1) Overview (1) Equipment & Condition ADC adjustment is needed to find the optimum black level . LGE Internal Use Only Only for training and service purposes Downloaded from www. it is not necessary to use Enter adj. mode aa 00 00 a 00 OK00x an isolation transformer. aa 00 90 a 00 OK90x 20 °C.7 ± 0. data (main) (main) V~ 50 / 60Hz. Digital pattern . Designation Protocol Command Set ACK (1) Because this is not a hot chassis.Input Start / End MAC address (2) Equipment & Condition (2) Download method 1) Jig (RS-232C protocol) 1) Communication Prot connection 2) MSPG-925 Series Pattern Generator(MSPG-925FA.Play file: Serial. Automatic Adjustment 3.(3). Ref.exe and gain in Analog-to-Digital device and to compensate .MAC Address edit RGB deviation. the use of isolation Source change xb 00 40 b 00 OK40x (Adjust 480i Comp1 ) transformer will help protect test instrument.1. there can some . ad 00 21 000000070000000000000000007c00830077x Confirm adj.xb 00 60 [Change input source to RGB(1024*768)] .Resolution : 480i Comp1 1080P Comp1 1920*1080 RGB . End adj.ad 00 10 [Adjust 1024*768 RGB] . All rights reserved. pattern . However.ad 00 90 End adj. ADC Adjustment 3.com manuals search engine . adjust items listed in 3.xb 00 40 [Change input source to Component1(480i)] afterimage in the black level area. ad 00 99 NG 03 00x (Fail) In case of keeping module is in the circumstance of 0 °C. ADJUSTMENT INSTRUCTION 1. RS232C Protocol_Ver1.Pattern : Horizontal 100 % Color Bar Pattern RS-232C Po rt .

2 (2) LAN PORT inspection (PING TEST) 1) Play the LAN Port Test Program. 2) Input IP set up for an inspection to Test Program. Inc. A setting automatic IP -> Liquid Crystal need for Polarity Change with every frame. A Setting state confirmation Circuit Block -> If automatic setting is finished.G. *IP Number : 12.12. LAN (1) Equipment & Condition A Each other connection to LAN Port of IP Hub and Jig 3. you confirm IP and Data (R .4 and 115200(Baud rate) Connect SET -> LAN port == PC -> LAN Port .5. 3) Play Test (F9) button and confirm OK Message. -8. 2) MAC Address Download 3.B ) & C ont ro l s ignal Ti m i n g S Co nt r o ll e r Gamm a Reference In t e r f a ce Cont rol si gnal Volta ge Y Da t a I n p u t So urce D r i v e I C S T Column Line Pane l Gat e Driv e IC E Power Po w e rInput I nput Po w e r V COM Blo ck M CLC CST Liquid Crys tal V COM Row Li ne TFT V COM Copyright © 2010 LG Electronics.Check the OK Or NG 3. All rights reserved.4. 2) Connect each other LAN Port Jack.3.Port connection button click(1) SET PC (1) Equipment setting 1) Play the LAN Port Test PROGRAM.Com 1. 4) Remove LAN CABLE .Why need Vcom adjustment? A LAN Port connection with PCB A The Vcom (Common Voltage) is a Reference Voltage of A Network setting at MENU Mode of TV Liquid Crystal Driving. .Manualslib.Start MAC Address write button(3) .com manuals search engine .B ) & Ga mma MAC Address.3.2.2. Cont rol si gnal Re f e r e nce V o ltage Data (R . LGE Internal Use Only Only for training and service purposes Downloaded from www. LAN PORT INSPECTION(PING TEST) .G.Load button click(2) for MAC Address write. V-COM Adjust(Only LGD(M+S) Module) (2) LAN inspection solution .

2. Press the ‘instart’ key of ADJ remote control. Check the method of CI+ Key value (RS232) b. minimized the Flicker. Check the Diagnostics (DTV country only) -> Buyer model displayed (ex 42LE7500-ZA) Copyright © 2010 LG Electronics.(Baud rate : => Check the Download to CI+ Key value in LGset. so It . b. Then the message “Saving OK” is pop.com manuals search engine .normally status for download : OKx There is impossible to download by bar code scan. 1) into the main ass’y mode (RS232 : aa 00 00) CMD 1 CMD 2 Data 0 (2) Method & notice A. a.Manualslib. check the method of CI+ Key value A Connect RS232 Signal Cable to RS-232 Jack. V. A As pushing the right or the left button on the remote 4) Check whether the key was downloaded or not at ‘In controller. (If there is no flicker at default value.0 * Manual Download (Model Name and Serial Number) C I 1 0 If the TV set is downloaded by OTA or service man. check the method on Instart menu A Write Serial number by use RS-232.(Not 3) result value always) . Input the Factory model name(ex 42LD450-ZA) or Serial CMD 1 CMD 2 Data 0 number like photo.(Baud rate : (Or After enter Service Mode by pushing “ADJ” key. CI+ Key Download method A Press the PIP key of the ADJ remote controller. All rights reserved. LGE Internal Use Only Only for training and service purposes Downloaded from www. And find the V-COM value Which is no or Start’ menu. 2) Connect RS232-C Signal Cable.Adjust sequence 3. Press the exit key and finish the VCOM adjustment. Setting of scan equipment operated by Manufacturing Technology Group.Model Number D/L’ like below photo. Check the model name Instart menu -> Factory name displayed (ex 42LE7500-ZA) e. because serial number D/L CMD 1 CMD 2 Data 0 is mandatory by D-book 4.6. Model name & serial number download (1) Model name & Serial number D/L A Press “Power on” key of service remocon. a. A A 0 0 2) Check the method of CI+ key by command (RS232 : ci 00 20) CMD 1 CMD 2 Data 0 C I 2 0 3) Result value i 01 OK 1d1852d21c1ed5dcx CI+ key Value d. then 115200 bps) Enter V-Com Adjust mode by pushing “G” key at “10. Serial number D/L is using of scan equipment. check the method of RS232C Command A Must check the serial number at Instart menu. 1) into the main ass’y mode (RS232 : aa 00 00) c. Go to the menu ‘5. 115200 bps) 1. (This PIP (1) Download Procedure key is hot key to enter the VCOM adjusting mode) 1) Press "Power on" button of a service R/C. (Refer to below). A Press the exit key to finish VCOM adjustment. A A 0 0 B.) A Push the OK key to store value. sometimes model name or serial number is initialized.abnormally status for download : NGx need Manual download. 2) check the key download for transmitted command C.7. Com”) 3) Write CI+ Key through RS-232-C. .Serial number D/L must be conformed when it is (RS232 : ci 00 10) produced in production line. [Visual Adjust and control the Voltage level] 3. Inc. -9.

1080p Mode. A Reference 5) If ADC calibration is successful. bellows may be different by S/W or If ADC calibration is failure. 4. HDMI1 / 65) . “ADC RGB Fail” is displayed. “ADC RGB Success” is . By pressing Enter key. External ADC -> 0x01 22 15 01 26 15 07 50 09 57 07 67 ⓕ 1.Adjust remote control (1) Adjust Remocon . select 7. “ADC RGB Success” is 0x04 40 80 35 00 A0 5A 00 00 00 1E 02 3A 80 18 71 38 displayed. EDID(The Extended Display Identification 4.HDMI1 ~ HDMI4 / RGB displayed. 0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C (MSPG-925 Series -> model:126 . 802R) or MSPG925FA Pattern HDMI cable and D-sub cable are not need. then select “10. Input mode. 0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C (MSPG-925FA -> Model: 209.10 .1. 1080p.Pattern level: 0. Press enter key. . Manual Adjustment 4.Image For Analog EDID For HDMI EDID D-sub to D-sub DVI-D to HDMI or HDMI to HDMI (3) Must use standard cable (4) EDID DATA A HDMI 4.3. LGE Internal Use Only Only for training and service purposes Downloaded from www.Since embedded EDID data is used. 0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A 4) Press the In-start Key on the ADJ remote after at least 1 0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ min of signal reception. 100 % Horizontal Color Bar 0x02 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01 Pattern to RGB port.1080p HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display . ADC(GP2) Adjustment Data)/DDC(Display Data Channel) download 4. A PC or a MNT will display an gain in Analog-to-Digital device and to compensate RGB optimal resolution through information sharing without any deviation. necessity of user input.7 ± 0. External ADC -> 0x07 ⓓ 00 ⓔ 1. Then. 1080p Comp1 0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ 1) Check connected condition of Comp1 cable to the equipment 0x01 ⓒ 01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26 2) Give a 480i.Manualslib. 0x06 51 00 1B 30 40 70 36 00 A0 5A 00 00 00 1E 00 00 6) If ADC calibration is failure.480i D/L”.2. “ADC RGB Fail” is displayed. Equipment & Condition . (2) Equipment 4.480i 0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20 (MSPG-925FA -> Model: 225. Horizontal 100% Color Bar 0x02 0F 50 54 A1 08 00 71 4F 81 80 01 01 01 01 01 01 Pattern to Comp1. R/C.Pattern : Horizontal 100% Color Bar Pattern OK or NG. after recheck ADC pattern or condition retry calibration Error message refer to 5).1.1080p 0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A 3) Change input mode as Component1 and picture mode 0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ as “Standard” 0x07 ⓓ 01 ⓔ 4) Press the In-start Key on the ADJ remote after at least 1 0x00 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21 min of signal reception. Pattern: 2) Select [Start] button by pressing Enter key.EDID . Generator . enter EDID D/L menu. after recheck ADC pattern or 0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 ⓔ condition retry calibration Error message refer to 5). 720*480 (MSPG-925FA -> Model: 209.1. Pattern: 65) . pattern:65 ) 0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20 3) Change input mode as RGB and picture mode as “Standard”. A RGB (2) ADC 1920*1080 RGB 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 1) Check connected condition of Component & RGB cable 0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ to the equipment 0x01 ⓒ 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26 2) Give a 1920*1080 Mode.1 Vp-p . 0x03 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 0C 20 5) If ADC calibration is successful. . It is a realization of “Plug and Play”.2. COMP 1080p on the menu. Inc. Pattern: 65) 1) Press Adj. 0x05 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 66 21 50 B0 If ADC calibration is failure. Press enter key. COMP 1080p on the menu. 802F. select 7. The 0x02 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C adjustment will start automatically.1. Pattern: 65) . All rights reserved. Adjust method 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F (1) ADC 480i. Then. 6) If ADC calibration is failure. 1920*1080 (MSPG-925FA -> Model: 225. .In the data of EDID. The adjustment will start automatically. Overview (1) Overview ADC adjustment is needed to find the optimum black level and It is a VESA regulation. key on the Adj. (2) 801GF(802B.1.com manuals search engine .Resolution : (3)Download method 480i. EDID download JIG. Copyright © 2010 LG Electronics.

Manualslib.3.2 Equipment 1) Color Analyzer: CA-210 (LED Module : CH 14) R-Cut 2) Adj. Inc.A: Acknowledge Year : ‘2010’ -> ‘14’ Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX] ⓓ Model Name(Hex): A RS-232C Command used during auto-adj. one of A Adj.3. data 4... : Controlled on product line .VAL: FOS Data value ⓒ Month. completed (2) Objective: To reduce each Panel’s W/B deviation *(wb 00 20(Start).3. In order to prevent saturation of Full Dynamic range and data. completed HDMI3 67 03 0C 00 30 00 B8 2D wb 00 ff End White Balance adj. completed HDMI1 67 03 0C 00 10 00 B8 2D wb 00 20 Offset adj.CS: Checksum of sent data ex) Monthly : ‘01’ -> ‘01’ .. . 4.(internal white pattern) HDMI2 67 03 0C 00 20 00 B8 2D wb 00 2f Offset adj.4. All rights reserved.3. Computer(During auto adj. ⓕ Vendor Specific(HDMI) wb 00 10 Gain adj. MODEL MODEL NAME(HEX) RS-232C COMMAND Explanation all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 [CMD ID DATA] ⓔ Checksum: Changeable by total EDID data. White Balance Adjustment jb 00 c0 . Year: Controlled on production line: . not needed Copyright © 2010 LG Electronics. Map R/G/B is fixed at 192. (3) How-it-works : When R/G/B gain in the OSD is at 192. wb 00 00 Begin White Balance adj.) (Decimal) 1) Surrounding Temperature : 25 ºC ± 5 ºC Cmd 1 Cmd 2 Min Max 2) Warm-up time: About 5 Min Cool R-Gain j g 00 C0 3) Surrounding Humidity : 20 % ~ 80 % G-Gain j h 00 C0 B-Gain j i 00 C0 4.11 . Adj.. means the panel is at its Full Dynamic Range. wb 00 2f(completed)) -> Off-set adj. (1) W/B adj. it wb 00 ff -> End white balance auto-adj.1 Overview . ⓐ Product ID 4.(internal white pattern) INPUT MODEL NAME(HEX) wb 00 1f Gain adj.(Internal pattern disappears) HDMI4 67 03 0C 00 40 00 B8 2D HDMI5 67 03 0C 00 50 00 B8 2D Ex) wb 00 00 -> Begin white balance auto-adj.3.com manuals search engine . and the other two is lowered to find the desired value. Command (Protocol) Model Name HEX EDID Table DDC Function <Command Format> LEN CMD VAL CS FHD Model 0001 01 00 Analog FHD Model 0001 01 00 Digital . RS-232C protocol is G-Cut needed) B-Cut 3) Adjust Remocon Medium R-Gain j a 00 C0 4) Video Signal Generator MSPG-925F 720p/216-Gray G-Gain j b 00 C0 (Model:217. ITEM Command Data Range Default (4) Adj.. LGE Internal Use Only Only for training and service purposes Downloaded from www. Pattern:78) B-Gain j c 00 C0 -> Only when internal pattern is not available R-Cut A Color Analyzer Matrix should be calibrated using CS-1000 G-Cut B-Cut 4. Equipment connection MAP Warm R-Gain j d 00 C0 G-Gain j e 00 C0 Co lo r Analyzer B-Gain j f 00 C0 Probe RS -232C R-Cut Co m p ut er RS -232C G-Cut RS -232C Pat t ern Generat o r Signal Source * If TV internal pattern is used.LEN: Number of Data Byte to be sent .CMD: Command ⓑ Serial No. wb 00 10 -> Gain adj. condition : normal temperature (Hex. ja 00 ff -> Adj.3. Objective & How-it-works wb 00 1f -> Gain adj.

check adj. Local Dimming Function Check . R/C (2) Manual adj. (Warm. mode using POWER ON your hand and wait for 6 seconds 2) Zero Calibrate the probe of Color Analyzer. replace Eye Q II Balance then press the cursor to the right (KEY G). MEDIUM 0.12 .002 13000 K 0. .5. method 210(CH 9) 1) Set TV in adj.273 ± 0.285 ± 0. Medium. is complete (OK Sing).002 9300 K 0.313 ± 0. area into dark surrounding. A W/B Adj. By selecting OFF. 3) Press ADJ key -> EZ adjust using adj.0000 4) Select mode in adj.0000 Copyright © 2010 LG Electronics.White Balance. x y 3) Connect Cable (RS-232C) COOL 0.0000 MEDIUM 0. EYE-Q function check finish as end command “wb 00 ff”. and Adj. using no signal or Full-white pattern. R/G/B value is not lower than 10. method Step 3) Cover the Eye Q II sensor on the front of the using 1) Set TV in Adj. replace Eye Q II sensor.In case of LCD. Reference (White Balance Adj.Manualslib. Mode Color Coordination Temp ∆UV 2) Zero calibrate probe then place it on the center of the Display. offset if need.313 0. If change is not seen. LGE Internal Use Only Only for training and service purposes Downloaded from www. (When KEY(G) is pressed 216 Gray internal pattern will Step 5) Remove your hand from the Eye Q II sensor and wait be displayed) for 6 seconds.273 13000 K 0. All rights reserved.002 6500 K 0. . 4) One of R Gain / G Gain / B Gain should be fixed at 192. condition and cautionary items 1) Lighting condition in surrounding area Surrounding lighting should be lower 10 lux. WARM 3 modes of color temperature. you can select one of 2 Test-pattern: ON. 4. use RF input.6. OFF. Back light)”. In EZ Adj.4.0000 WARM 0.293 ± 0. and the rest will be lowered to meet the desired value. 4. Step 1) Turn on TV Step 2) Press EYE key of Adj. coordinate and temperature) A Luminance : 216 Gray A Standard color coordinate and temperature using CS-1000 (over 26 inch) Mode Color Coordination Temp ∆UV x y COOL 0.293 9300 K 0.002 0. status pre mode.269 ± 0. 2) Probe location : Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface (80°~ 100°) 3) Aging time 4. Try to isolate adj. Data (Sensor data. method A Standard color coordinate and temperature using CA- (1) Auto adj. R/C. Step 6) Confirm that “ok” pop up. A Adj. White. Program and begin adjustment.285 0.0000 5) When adj. MEDIUM. A If internal pattern is not available. menu 7. you can adjust using RF signal in 216 Gray pattern. Back-light on should be checked Step 3) Confirm under the screen.269 0.002 0. mode using POWER ON key.After Aging Start.com manuals search engine . and 4. sensor. is performed in COOL. Keep the Power ON status during Step 1) Turn on TV. Inc.3.5. R/C -> 7. Adj. must begin as start command “wb 00 00” . 5 Minutes.0000 6) Remove probe and RS-232C cable to complete adj. Step 2) Press Tilt key of Adj. 5) Adj. then place it Step 4) Confirm that R/G/B value is lower than 10 of the “Raw on the center of LCD module within 10cm of the surface.329 6500 K 0. Cool) WARM 0. If after 6 seconds. Default is inner(ON).3.329 ± 0.002 0.

Item Min. Service only) 1) Put the USB Stick to the USB socket 4. Ship-out mode check(In-stop) 2) Automatically detecting update file in USB Stick After final inspection. Tool Option selection Measurement condition: . Unit .Unit fully inserted Power cord. MX. Select "Tool Option 1" and Push “OK” button.) Copyright © 2010 LG Electronics. RF input: Mono. The TV will restart automatically • TEST POINT 6) If your TV is turned on. Audio (1) Overview .Internal Pressure TEST = POWER CORD GND & LIVE & TV can lost all channel data. .0 W EQ On 04 or Country Group EU then on the lower Country option. CVBS. Buzzer will sound to inform the operator. 5.If OK.0 15. In this case. 2.5 mArms have a DTV/ATV test on production line. you didn’t • LEAKAGE CURRENT: At 0. . * After downloading. (explain the Tool option. have to adjust TOOL OPTION again. . . Max. RGB PC: 1 KHz sine wave signal 0.GND: 1. Option selection per country 6. A/V form AV JACK BOX) 4) Updating is starting. check your updated version and . (Each model has their number. it didn’t work. LGE Internal Use Only Only for training and service purposes Downloaded from www.Manualslib. (If loose. Good lamp will lit up and the stopper will allow the pallet to move on to next process. 2. All rights reserved.5 KV/min at 100 mA . Always turn on the Mechanical S/W. Component: 1 KHz sine wave signal 0. 100 % Modulation option. data is automatically detecting 3) Show the message “Copying files from memory” 5.Option selection is only done for models in Non-EU No. 1 KHz sine wave signal.If OK.5 8. . select Country Group Code 2.0 10. USB S/W Download (option.1. Punch in the number. Selection is done using +. USB After final inspection. L/R AVL Off (2) Method 1) Press ADJ key on the Adj. 4.7.13 . (Remove CORD. R/C.com manuals search engine .8 Vrms Clear Voice Off Group Menu max Output) 2) Depending on destination. Clear Voice On 4.Connect D-terminal to AV JACK TESTER . then select Country (Distortion=10% 8. Audio practical max 9.8.If NG. changeover to I/P check automatically. Push "IN-START" key in service remote control. Antenna cable and A/V arrive to the auto-check process.Applied model: LD03D/03E Chassis applied EU model 1. if all channel data is cleared. .7 Vrms MODEL Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 47LE7300 33056 31795 64556 22958 2066 7.Check that Power Cord is fully inserted to the SET. R/C.2. Impedance) AVL On or GF KEY. R/C and . you have to NEUTRAL channel recover.0 12. then select Tool 1. 3. next stage) METAL GND * If downloading version is more high than your TV have. GND and Internal Pressure check 5. press IN-STOP key of the Adj. Speaker (8Ω 10.0 W EQ Off Output. Typ. select US.9 9. But your downloaded version is High. Inc.If NG.GND TEST = POWER CORD GND & SIGNAL CABLE Tool option. Checkpoint • TEST voltage . re-insert) 2) Perform GND & Internal Pressure auto-check . check that the unit goes to Stand-by mode. Buzzer will sound to inform the operator.Perform GND TEST . key on the Adj. Method 1) GND & Internal Pressure auto-check preparation . .SIGNAL: 3 KV/min at 100 mA • TEST time: 1 second 5) Updating Completed.Auto CONTROLLER(GWS103-4) ON .If your downloaded program version in USB Stick is Low.Perform I/P test .6. 1. CA.4 Vrms 3.Method : Press Adj.

. BLOCK DIAGRAM Copyright © 2010 LG Electronics.com manuals search engine .Manualslib. All rights reserved. Inc.14 . LGE Internal Use Only Only for training and service purposes Downloaded from www.

Manualslib. .15 . Do not modify the original design without permission of manufacturer. Shock. LGE Internal Use Only Only for training and service purposes Downloaded from www. 710 400 521 A7 540 801 530 LV2 803 LV1 910 900 802 * Stand Base * Stand + Set A10 200 + Stand Body 810 A9 A5 122 120 A21 A2 500 300 510 501 Copyright LG Electronics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION.com manuals search engine . or other Hazards. All rights reserved. Fire. Inc. EXPLODED VIEW IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics.

2K 1. GPIO_02. RESET GPIO_11.7K C114 12 37 C115 K27 GIP 0.2K 1.3V_NORMAL NAND_DATA[0-7] R1000 2. GPIO_11.7K R1037OPT NC_4 NC_26 NAND_DATA[0-7] NAND_DATA[4] 2.2K 1.1uF VSS_1 VSS_2 0.3V GPIO_51 RGB_DDC_SCL P26 100 R160 R1052 +3.3V R27 R161 100 GPIO_46 5V_HDMI_4 R26 R133 22 VSS SDA GPIO_47 MODEL_OPT_2 4 5 R1028 22 P28 SDA3_3.8mA 10 : 2.3V_NORMAL +3.2K 1.7K R1019 100 NC_9 NC_22 LNA2_CTL/BOSTER_CTL MODEL_OPT_1 14 35 R1024 100 RF_SWITCH_CTL MODEL_OPT_2 NAND_IO[0] : Flash Select (1) NC_10 NC_21 R181 100 0 : Boot From Serial Flash 15 34 BT_ON/OFF MODEL_OPT_3 17page:M_RFMODULE_RESET *MODEL_OPT_0 & MODEL_OPT_4 1 : Boot From NAND Flash BCM BT MODULE REFER TO THIS OPTION CL NC_20 MODEL_OPT_4 15page:TW_9910_RESET NAND_CLE 16 33 NAND_IO[1] : NAND Block 0 Write (DNS) AL I/O3 NAND_DATA[3] MODEL_OPT_515page:CHB_RESET MODEL_OPT_0 MODEL_OPT_4 0 : Enable Block 0 Write NAND_ALE 17 32 R130 22 NO FRC/INTERNER FRC /CI_SEL MODEL_OPT_6 LOW LOW NO FRC 1 : Disable Block 0 Write W I/O2 NAND_DATA[2] NAND_WEb 18 31 HIGH LOW URSA3 Internal LVDS/LOCAL_D 1K 1K 1K 1K 1K 1K 1K NAND_IO[3:2] : NAND ECC (1.7K E NC_25 NAND_DATA[7] NAND_CEb 9 40 1K 1K 1K 1K 1K 1K 1K DDR_512MB R1038 MODEL_OPT_3 K1 NC_7 NC_24 +3.7K NAND_DATA[3] U26 AD19 R106 1K 12K R1041 EMI NAND_DATA3 GPIO_25 HDMI_HPD_1 IR_IN C173 NAND_DATA[4] U27 AE19 R1048 100 C180 NAND_DATA4 GPIO_26 5V_HDMI_1 100pF 22uF NAND_DATA[5] V26 M4 R109 100 BB Add.7K 10 39 C116 FHD FRC GIP 2.3V_NORMAL GPIO_36 AV_CVBS_DET L24 0 R1044 GPIO_37 CI_OUTCLK W24 P25 R1033 22 GPIO_38 /CI_CD2 R1025 C103 SF_MISO 4.5T_GAS GAS1-*1 GAS6-*1 GAS7-*1 R1045 F26 K24 CI_A[6] MDS62110204 4.5T_GAS 6. GPIO_44 FE_TS_VAL_ERR R28 R1050 100 GPIO_45 5V_HDMI_3 E2 3 A8’h 6 SCL R1026 22 SCL3_3.7K OPT 2.3V Boot Strap * NAND FLASH MEMORY 4Gbit (512M for BB) Default Res.5T_GAS 9.3V K3 SGPIO_06 SCL3_3.7K NAND04GW3B2DN6E NAND_DATA[1] R1005 R1040 2.7K 4.8K G4 For CI +3.0mA NAND_IO[7] : MIPS Frequency (DNS) C178 C179 0 : 405MHz 0.3V_NORMAL FHD HD R158 OPT 2.7K 5 44 PIN NAME PIN NO.7K IC102 U23 L5 R1046 22 M24M01-HRMN6TP 0.1uF R1001 R1012 100 NAND_CLE 13 36 IF_AGC_SEL MODEL_OPT_0 MODEL_OPT_6 K4 OLED NON_OLED 2.3V_NORMAL MODEL_OPT_1 AA26 MAIN_MINI_LVDS MAIN_LVDS EXTERNEL FRC/T_CON FRC NAND_DATA[6] R I/O4 MINI_LVDS/NO LOCAL_D OPT R1007 NAND_DATA[4] NAND_REb 8 41 R1006OPT 2. of all NAND pin is Pull-down +3.5T_GAS SIDE_AV_DET 5. GPIO_39 MDS62110206 MDS62110206 MDS62110206 MDS62110206 MDS62110206 MDS62110206 MDS62110206 MDS62110206 MDS62110206 6. HIGH OPT 2.3V R124 0 WIRELESS * I2C_2 : W26 SGPIO_02 SCL1_3.3V W28 SGPIO_01 SDA0_3.7K 2.3V K2 SGPIO_07 SDA3_3.3V J1 SGPIO_05 SDA2_3.7K R1021 R1015 R1014 R1018 R1023 R1010 11 : 8 ECC Bit NC_12 NC_19 21 28 NAND_IO[4] : CPU Endian (0) NC_13 NC_18 0 : Little Endian 22 27 1 : Big Endian NC_14 NC_17 FOR ESD 12V Pattern C 23 26 NAND_IO[6:5] : Xtal Bias Control (1. FILRE AND ELECTRICAL SHOCK HAZARDS.Manualslib.7K NC_1 NC_29 NAND_DATA[2] R169 1 48 NAND FLASH R1039 2.3V GPIO_48 SCART1_DET G Q103 P27 C171 C167 FDV301N GPIO_49 SIDE_COMP_DET SIDE_COMP_DET 8pF 8pF K6 R103 0 GPIO_50 RF_SWITCH_CTL_CHB RF_SWITCH_CTL_CHB 15page : CHB_SUB_TUNER OPT OPT WIRELESS_SDA K5 22 R129 D S SDA2_3.5T_GAS 6.3V_NORMAL CI_A[1] H24 L25 R1027 EBI_ADDR1 GPIO_03 MODEL_OPT_4 CI_A[0] H23 K27 10K EBI_ADDR0 GPIO_04 MODEL_OPT_5 MDS62110204 MDS62110204 MDS62110204 GAS1-*4 CI_A[5] J25 K28 5.1uF 0.7K 2 47 NAND_DATA[3] OPT R1004 NC_3 NC_27 3 46 2.7K R157 OPT VDD_1 VDD_2 MODEL_OPT_5 NON-GIP 2.5T_GAS NAND_DATA[1] T26 P23 R199 1K NAND_DATA1 GPIO_23 HDMI_HPD_2 IR_IN NAND_DATA[2] T27 M23 NAND_DATA2 GPIO_24 A_DIM 4.7K IC101 OPT 2.2K 1.4mA (3rd over tune Recommand) E 11 : 3.5T_GAS CI_A[7] F27 7.3V Switching 1 : 5V Switching NAND_CLE 0 : Enable D2CDIFF AC (DNS) 1 : Disabe D2CDIFF AC THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.7K NC_2 NC_28 2.7K NAND_DATA[0] OPT R1008 R1036 2.7K NAND_DATA[5] NC_6 I/O6 NAND_DATA[6] R1035 6 43 MODEL_OPT_0 N28 URSA3 NON_URSA3 R1034 2.5T_GAS 9.7K MODEL_OPT_2 R26 DDR-256M DDR-512M 2.5T_GAS 9.7K +3. EXT IRQ SMD GASKET GPIO_00.2K R187 R184 R183 R180 R177 R176 R171 R170 L4 22 R1051 GPIO_56 LG5111_RESET L6 LOCAL DIMMING GPIO_57 HP_DET LG5111_RESET R123 0 WIRELESS * I2C_1 : W27 SGPIO_00 SCL0_3.5T EBI_ADDR8 GPIO_07 HDMI_HPD_4 SOC_RESET SYS_RESETb CI_A[9] J26 K25 DEMOD_RESET 22 R113 EBI_ADDR9 GPIO_08 DEMOD_RESET 28page : ISDB Demod EBI_CS CI_A[13] H27 AA27 DEMOD_RESET EBI_ADDR13 GPIO_09 PWM_DIM GAS3-*4 CI_A[12] G26 AA28 R1029 1K R1042 100 EBI_ADDR12 GPIO_10 HDMI_HPD_3 MDS62110204 CI_A[11] J27 AA26 EBI_ADDR11 GPIO_11 MODEL_OPT_1 55LD650_5.2mA (Fundmental Recommand) FLASH_WP 24 25 +12V KRC103S 01 : 1. 16V NAND_DATA5 GPIO_27 EPHY_ACTIVITY 50V NAND_DATA[6] V27 M5 R110 100 R194 R193 NAND_DATA6 GPIO_28 EPHY_LINK NAND_DATA[7] V28 L23 NAND_DATA7 GPIO_29 /CI_CD1 For CI T24 Y28 BCM_AVC_DEBUG_TX1 NVRAM NAND_CEb NAND_ALE NAND_REb R23 T23 NAND_CS0B NAND_ALE GPIO_30 GPIO_31 Y27 G2 BCM_AVC_DEBUG_RX1 M_REMOTE_TX M_REMOTE_RX M_REMOTE_TX 17page : Motion Remocon M_REMOTE_RX 17page : Motion Remocon NAND_REB GPIO_32 VREG_CTRL NAND_CLE T25 G3 +3.5T_GAS NAND_DATA0 GPIO_22 GAS1-*3 GAS3-*3 GAS4-*3 GAS5-*3 GAS6-*3 GAS8-*3 9.5T_GAS 9.06.3V GPIO_54 D S M1 OPT GPIO_55 COMP2_DET * I2C_0 : 1.7K OLED NAND_DATA[0-7] 4700pF NC_8 NC_23 R1017 R1022 R1011 R1020 MODEL_OPT_4 NON_FRC R1009 R1013 11 38 C136 10uF L25 FRC R118 R156 10V NAND_ALE 2.3V_NORMAL G OPT FRC_RESET 4.3V * I2C_3 : J2 SGPIO_04 SCL2_3.com MANUFATURES SPECFIED PARTS BE USED FOR manuals search engine THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.3V_NORMAL NAND_CLE GPIO_33 TUNER_RESET From wireless_I2C to micom I2C NAND_WEb R24 G5 R107 100 NAND_WEB GPIO_34 DTV_ATV_SELECT +3.3V_NORMAL Q104 GPIO_52 M3 22 R102 FDV301N * I2C MAP GPIO_53 M2 22 R1049 RGB_DDC_SDA WIRELESS_SCL SCL2_3.5T_GAS 9.2K 1.7K 2.5T_GAS L3 7. GPIO_01.5T_GAS GAS1-*2 GAS6-*2 GAS7-*2 EBI_ADDR7 GPIO_13 BT_RESET 22 R116 G24 L2 /CI_WAIT EBI_TAB GPIO_14 /RST_HUB 22 R122 H26 Y25 EBI_WE EBI_WE1B GPIO_15 BCM_RX R117 G27 Y26 33 EBI_CLK_IN GPIO_16 BCM_TX G28 M27 EBI_CLK_OUT GPIO_17 SC_RE1 22 R127 K23 AA25 EBI_RW EBI_RWB GPIO_18 SC_RE2 22 G25 R25 R111 22 EBI_CS EBI_CS0B GPIO_19 CI_MOD_RESET R140 N28 GPIO_20 MODEL_OPT_0 NAND_DATA[0-7] N27 BT_MUTE GPIO_21 DD DD 17page : Motion Remocon MDS61887710 MDS61887710 MDS61887710 MDS61887710 MDS61887710 MDS61887710 MDS61887710 MDS61887710 +3.18 Downloaded from ESSENTIAL THAT ONLY www.5T_GAS EBI_ADDR5 GPIO_05 5.5T_GAS 9.5T CI_A[10] J28 L1 MDS62110205 MDS62110205 MDS62110205 EBI_ADDR10 GPIO_12 DSUB_DET 7.7K Open Drain RB I/O5 2. DNS) HIGH HIGH URSA3 External DDR_256MB WP I/O1 NAND_DATA[1] NON_OLED +3.7K EBI_ADDR6 GPIO_06 CI_5V_CTL For CI CI_A[8] H28 K26 1K R114 R1030 0 55LD650_5.1uF SF_MOSI GPIO_39 /CI_IREQ V23 K4 SF_SCK GPIO_40 MODEL_OPT_6 R173 V24 K1 10K OPT NC VCC SF_CSB GPIO_41 MODEL_OPT_3 1 8 L27 GPIO_42 WIRELESS_DL_RX R1032 M26 0 E1 WP GPIO_43 WIRELESS_DL_TX 2 7 N23 R132 22 External Demod.3V W25 SGPIO_03 SDA1_3. BCM3556 & NAND FLASH 1 . DNS) B Q101 NC_15 NC_16 00 : 1.2K 1.3V_NORMAL OPT CI_A[2] H25 N25 INTERRUPT PIN EBI_ADDR2 GPIO_02 ERROR_OUT +3.7K NAND_RBb 7 42 NAND_DATA[5] +3.3V_NORMAL NON_GIP 00 : No ECC 19 30 NO_FRC LOW HIGH PWIZ Pannel T-con 01 : 1 ECC Bit HD NC_11 I/O0 NAND_DATA[0] with LG FRC 10 : 4 ECC Bit 20 29 R119 R136 4.7K 4 45 MODEL OPTION R191 R1003 R134 NC_5 I/O7 NAND_DATA[7] LOW R1002 2.1uF 1 : 378MHz 50V 50V NAND_ALE : I2C Level (DNS) 0 : 3.3V_NORMAL NAND_RBb U25 G6 R108 100 NAND_RBB GPIO_35 5V_HDMI_2 R115 1.3V_NORMAL NAND_DATA[0] U24 AH18 R105 56 GAS2-*3 GAS9-*3 AUD_MASTER_CLK 9.5T_GAS IC100 IR_INT : GPIO_23 GAS4 GAS5 GAS6 GAS8 GAS9 GAS3 GAS7 GAS1 GAS2 LGE3556C (C0 VERSION) IR1_IN : GPIO_25 CI_A[0-13] IR2_IN : GPIO_29 IR_OUT : GPIO_26 J23 N26 OPT R1047 CI_A[3] 0 EBI_ADDR3 GPIO_00 POWER_DET INTERRUPT PIN PWM0 : GPIO_24 CI_A[4] J24 L26 0 R192 EBI_ADDR4 GPIO_01 DC INTERRUPT PIN DC 17page : Motion Remocon OPT OPT PWM1 : GPIO_09 OPT OPT OPT +3. WHEN SERVICING IF IS BCM (EUROBBTV) 2009.

3V_NORMAL R3 P24 USB_AVDD1P2 RESET_OUTB U3 F6 SYS_RESETb USB_AVDD1P2PLL RESETB 001:A6.7K near audio connector.1uF 0.7uF C240 C241 C237 EPHY_AVDD2P5 PLL_RAP_AVD_AGND C238 R261 N4 L212 EPHY_PLL_VDD1P2 34 C2026 C244 N1 0. 2 .5V USB_AVDD3P3 TMODE_1 C2016 0.47uF 041:B5 R232 51 C225 0.035:AK18 L208 CI_OUTDATA[2] C25 B5 54MHz_XTAL_N POD2CHIP_MDI2 LVDS_TX_0_CLK_N LVDS_TX_1_CLK_P 013:E7.015uF AD8 PC_L_IN AUDMX_LEFT5 5.7uF A2.015uF AG5 AUDMX_LEFT2 PLACE NEAR BCM CHIP COMP2_R_IN AUDMX_RIGHT2 002:J6 COMP2_LR_INCM AG4 AUDMX_INCM2 PLACE NEAR Jacks 041:B5 R229 51 C220 0.047uF 0.7K R2 H2 R224 R225 Place test points.COMP_Pr_IN.1uF 4.1 041:B5 R230 51 C221 0.035:AK12 F25 E2 22 CHIP2POD_MCLKO LVDS_TX_1_DATA3_N LVDS_TX_0_DATA1_P013:E7.035:AK19 12pF TP4021 B25 B3 R212 TP4022 RMX0_DATA LVDS_TX_0_DATA2_P LVDS_TX_1_DATA2_N013:E7.5K 34 34 34 54MHz_XTAL_P R201 1.SC_G.1uF AC18 E5 Near Q1705 TU_CVBS_INCM VDAC_AVDD2P5 LVDS_TX_AVSS_5 Run Along TUNER_CVBS_IF_P Trace AF20 E6 003:A3 VDAC_AVDD1P2 LVDS_TX_AVSS_6 AG20 D7 VDAC_AVDD3P3_1 LVDS_TX_AVSS_7 4.035:AK12 CI_OUTSTART E23 D2 POD2CHIP_MISTRT LVDS_TX_1_DATA2_N LVDS_TX_0_DATA2_P013:F7.1uF L200 T4 N24 4.com manuals search engine ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR BCM3556 AUD_IN/LVDS THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. WHEN SERVICING IF IS BCM (EUROBBTV) 2009.015uF SIDE_AV_L_IN AUDMX_LEFT4 C2014 0.7uF C2028 R200 1.035:AK11 R211 12pF C27 E3 CHIP2POD_MDO0 LVDS_TX_1_DATA4_P LVDS_TX_0_DATA0_N013:E7.001:B7 C2015 0.2V 3 VCXO_AGND_1 AB24 VCXO_AGND_2 R245 R6 AC24 L203 USB_AVSS_1 VCXO_AGND_3 34 T6 AF25 BLM18PG121SN1D 4 A3.1 AA10 C2027 0.5V A1.1 009:I3 R234 51 C227 0.035:AK15 54MHz_XTAL_P CI_OUTDATA[4] E26 B2 POD2CHIP_MDI4 LVDS_TX_1_DATA0_N LVDS_TX_0_DATA4_P013:F7.035:AK14 CI_OUTDATA[7] D26 D1 POD2CHIP_MDI7 LVDS_TX_1_DATA2_P LVDS_TX_0_DATA2_N013:F7.1uF 0.047uF 0.035:AK11 C229 C26 E4 CHIP2POD_MDO1 LVDS_TX_1_DATA4_N LVDS_TX_0_DATA0_P013:E7.1uF 0.3V_NORMAL AE20 R220 560AH22 VDAC_AVSS_3 AD27 0.9K SIDE_USB_DM Run Along DSUB_B Trace R251 100pF USB_DM2 POR_OTP_VDD2P5 U2 AB8 34 34 34 D3.5V C270 C217 5.035:AK19 FE_TS_SYNC PKT0_SYNC LVDS_TX_0_DATA1_P LVDS_TX_1_DATA3_N013:E7.2V R227 34 EPHY_RDAC BLM18PG121SN1D 2.1uF EPHY_AGND_1 C247 N5 AA24 16V EPHY_AGND_2 BYP_CPU_CLK P7 Y24 EPHY_AGND_3 BYP_DS_CLK AE24 1K R222 BYP_SYS216_CLK AD25 1K R262 BYP_SYS175_CLK 041:B5 R204 51 C206 0.47uF AB11 0.2V Near J1500 003:A4 AF19 H7 Run Along SC1_R.5V R220 : BCM recommened resistor 562 ohm VDAC_AVSS_2 0.1uF 0.1uF BT_DM USB_DM1 TMODE_3 V2 V25 A1.15uF 041:B5 R231 51 C224 0.7uF L210 C2020 C2021 C2018 0.7uF 0.SC_B Trace VDAC_AVSS_1 LVDS_TX_AVSS_11 AD20 A2.7uF AG21 E7 0. When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF IC100 54MHz X-TAL LGE3556C (C0 VERSION) When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF D23 B4 FE_TS_DATA_CLK C24 PKT0_CLK LVDS_TX_0_DATA0_P A4 LVDS_TX_1_DATA4_N013:E7.015uF AG6 SC1_L_IN AUDMX_LEFT3 5.7K 2.1uF 0.3V_NORMAL C207 C208 C209 C202 C203 R210 USB_MONCDR same point where the connector 120 R5 H4 ground connects to the board ground USB_MONPLL EJTAG_TCK R266 R1 H3 (thru-hole connector pin).035:AK13 B27 D4 CHIP2POD_MDO3 LVDS_TX_1_CLK_N LVDS_TX_0_CLK_P 013:E7.1uF 4. resistors USB_PWRFLT_2 EJTAG_TDO 2. R218 P6 R260 240 1K R219 EPHY_VREF R226 P5 L204 A1.3V A1.1uF VDAC_AVDD3P3_2 LVDS_TX_AVSS_8 C214 C219 C223 C212 F7 BROAD BAND STUDIO LVDS_TX_AVSS_9 G7 C2019 0.047uF COMP2_LR_INCM AUDMX_AVSS_3 AB10 Near J1603 R259 Route Between COMP1_L_IN & COMP1_R_IN 0.COMP_Pb_IN Trace COMP2_VID_INCM A1.047uF 0.015uF AE6 REAR_AV_L_IN AUDMX_LEFT1 TP is Necessory 041:B5 REAR_AV_R_IN 002:J6 REAR_AV_LR_INCM R214 51 C210 0.2V EPHY_TDN EPHY_TDN PLL_MAIN_MIPS_EREF_TESTOUT N2 M6 390 L207 A1.7K Near P1600 R_VID_INCM BLM18PG121SN1D USB_AVDD2P5 NMIB Run Along DSUB_R Trace 003:A5 T3 J5 R221 USB_AVDD2P5REF TMODE_0 R4 J4 A2.1uF C2012 +3.035:AK11 B28 D3 A1.15uF 002:C6 C269 0.7uF 4.047uF 0.047uF 0.035:AK17 A26 A3 TP4023 RMX0_SYNC LVDS_TX_0_DATA2_N LVDS_TX_1_DATA2_P013:E7.18 Downloaded from www.047uF 0. FILRE AND ELECTRICAL SHOCK HAZARDS.47uF C2010 Near Q1704 TU_SIF_INCM 003:A3 Route Along With TUNER_SIF_IF_N THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.1uF BSC_S_SDA AA23 Near J1603 Run Along COMP_Y_IN.5V T7 USB_AVSS_4 T8 USB_AVSS_5 +3.5V CHIP2POD_MDO2 LVDS_TX_1_CLK_P LVDS_TX_0_CLK_N 013:E7.CI_OUTSTART.7uF 0.035:AK14 604 CI_OUTDATA[6] D27 C3 POD2CHIP_MDI6 LVDS_TX_1_DATA1_N LVDS_TX_0_DATA3_P013:F7.1uF Route INCM between associated BT_DP USB_DP1 SPI_S_MISO C231 C234 B_VID_INCM C201 R209 U1 AH3 10uF 0.035:AK20 FE_TS_SERIAL B26 PKT0_DATA LVDS_TX_0_DATA0_N C6 LVDS_TX_1_DATA4_P013:E7.015uF AH4 R228 51 C232 0.047uF 0.2V C2023 0.035:AK16 CI_A[14] G23 D5 POD2CHIP_MCLKI LVDS_TX_0_DATA4_P LVDS_TX_1_DATA0_N013:E7.1uF SC1_RGB_INCM LVDS_TX_AVSS_10 A1.7K P3 AB26 EPHY_RDN EPHY_RDN PLL_MAIN_AVDD1P2 P2 AC25 EPHY_RDP EPHY_RDP PLL_MAIN_AGND N3 AB27 R240 A2.5K 1 VDAC_VREG CLK54_XTAL_P 002:I2 AE25 CLK54_MONITOR DTV/MNT_V_OUT Y23 PM_OVERRIDE 2 M25 BSC_S_SCL M24 C262 0.015uF AF8 PC_R_IN AUDMX_RIGHT5 002:C6 REAR_AV_LR_INCM 002:J7 AE8 Near J1600 R258 Route Between AV1_L_IN & AV1_R_IN PC_LR_INCM AUDMX_INCM5 0.47uF A2.035:AK17 A1 CI_OUTDATA[0-7].035:AK16 54MHz CI_OUTDATA[1] D24 C5 X903 3 POD2CHIP_MDI1 LVDS_TX_0_CLK_P LVDS_TX_1_CLK_N 013:E7.1uF 4.015uF AF7 SC1_R_IN AUDMX_RIGHT3 SIDE_AV_LR_INCM 002:J7 AE7 Near J1501 SC1_LR_INCM AUDMX_INCM3 R256 002:C6 AH5 Route Between SC2_L_IN & SC2_R_IN 0.Manualslib.035:AK17 C257 045:V14 A2 LVDS_TX_0_DATA3_N LVDS_TX_1_DATA1_P013:E7.1uF 0.035:AK16 CI_OUTDATA[0] D25 D6 2 POD2CHIP_MDI0 LVDS_TX_0_DATA4_N LVDS_TX_1_DATA0_P013:E7.7uF 4.1uF 4.035:AK13 A27 F24 CHIP2POD_MDO4 LVDS_PLL_VREG F5 F1 C228 10uF OPT VIDEO INCM CHIP2POD_MDO5 LVDS_TX_AVDDC1P2 F23 F4 CHIP2POD_MDO6 LVDS_TX_AVDD2P5_1 A3.035:AK18 CI_OUTDATA[3] E27 B1 1 POD2CHIP_MDI3 LVDS_TX_1_DATA0_P LVDS_TX_0_DATA4_N013:F7.7uF 0.2V C264 0.CI_OUTVALID 1008LS-272XJLC 33pF LVDS_TX_0_DATA3_P LVDS_TX_1_DATA1_N013:E7.15uF 002:C6 AUDMX_AVSS_4 C2025 0 0 AA11 C265 C222 AUDMX_AVSS_5 0.2V A2.015uF AD7 AF6 AUDMX_RIGHT1 AUDIO INCM AUDMX_INCM1 COMP2_L_IN R215 51 C211 0.15uF AH7 AUDMX_LEFT6 C2024 0.1uF U4 J6 L211 G_VID_INCM USB_RREF TMODE_2 BLM18PG121SN1D Run Along DSUB_G Trace 003:A5 V1 J3 0.7uF C4 C2013 0 0 R236 R237 C236 C239 C242 C295 L202 LVDS_TX_AVSS_3 A5 BLM18PG121SN1D LVDS_TX_AVSS_4 C258 0.035:AK14 CI_OUTDATA[5] D28 C2 R243 POD2CHIP_MDI5 LVDS_TX_1_DATA1_P LVDS_TX_0_DATA3_N013:F7.035:AK12 CI_OUTVALID E24 E1 POD2CHIP_MIVAL LVDS_TX_1_DATA3_P LVDS_TX_0_DATA1_N013:E7.1uF P200 C215 VDAC_RBIAS CLK54_AVDD1P2 C261 0.1uF BLM18PG121SN1D 4.1uF C251 AH20 AD28 REAR_AV_CVBS_INCM TJC2508-4A 0.01uF CLK54_XTAL_N 002:I1 R238 75 1% AH21 AC27 4. USB_PWRON_1 EJTAG_TMS T1 G1 1K R249 Connect the other side of C2011 0.035:AK19 C230 A25 B6 22 RMX0_CLK LVDS_TX_0_DATA1_N LVDS_TX_1_DATA3_P013:E7.3V USB_AVSS_2 VCXO_AVDD1P2 R7 AF24 C233 C235 A1.1uF BLM18PG121SN1D EPHY_TDP EPHY_TDP PLL_RAP_AVD_TESTOUT Near J1501 SIDE_AV_CVBS_INCM 003:A3 P1 N6 OPT BLM18PG121SN1D BLM18PG121SN1D L209 Run Along SC2_CVBS_IN Trace EPHY_AVDD1P2 PLL_RAP_AVD_AVDD1P2 P4 N7 0.1uF VDAC_1 CLK54_AVDD2P5 AG19 AD26 003:A3 VDAC_2 CLK54_AVSS C213 AC26 54MHz_XTAL_N R244 R248 R250 0.47uF AH8 AUDMX_RIGHT6 C2017 AG8 AUDMX_INCM6 AF5 AUDMX_AVSS_1 AB9 AUDMX_AVSS_2 5.1uF 003:A5 R246 R247 left and right signals of same channel 3.1 10uF PC_LR_INCM Near J1602 R252 Route Between PC_L_IN & PC_R_IN 0.1uF USB_PWRON_2 EJTAG_TRSTB the resistor to GND as close H6 Near J1500 SC1_CVBS_INCM 003:A3 as possible to the ground EJTAG_CE0 Run Along SC1_CVBS_IN Trace H5 connection of the associated EJTAG_CE1 audio connector.7K T2 H1 2.047uF 0.2V A2.5V E25 F2 CHIP2POD_MDO7 LVDS_TX_AVDD2P5_2 C28 A28 CHIP2POD_MOSTRT LVDS_TX_AVSS_1 C1 F3 PLACE NEAR BCM CHIP CHIP2POD_MOVAL LVDS_TX_AVSS_2 0.047uF 0.1uF 4.1 SC1_LR_INCM Near J1500 R257 Route Between SC1_L_IN & SC1_R_IN 0.3V SIDE_USB_DP USB_DP2 POR_VDD1P2 The INCM trace ends at the T5 +3.1uF 4.06.7K 2.2V USB_AVSS_3 VCXO_PLL_AUDIO_TESTOUT 0.15uF 002:C6 C2022 0.015uF AG7 SIDE_AV_R_IN AUDMX_RIGHT4 C271 AH6 002:J6 SIDE_AV_LR_INCM AUDMX_INCM4 009:I3 R233 51 C226 0. OPT OPT R235 USB_PWRFLT_1 EJTAG_TDI 2.1uF AUDMX_AVSS_6 AC8 C277 C279 C296 C298 C299 C252 C253 C254 C256 AUDMX_LDO_CAP R264 R265 AE5 AUDMX_AVDD2P5 5.

7uF EDSAFE_IF_P AUD_AVSS_0_2 C144 AD24 AC22 TU_IF_N_1 L103 0.01uF 0.1uF 4. BCM3556 VIDEO IN 3 .1uF 4.1uF 0.3V C245 C255 C377 C375 C263 C373 C267 C289 C291 L111 C383 C246 C378 C376 C259 C374 C366 C266 C288 C290 4.1uF AD9 AC5 H21 DVSS_24 DVSS_85 TU_CVBS 1000pF 0.7uF 1000pF 0.1uF 10uF 10uF 33uF 100uF C2008 FOR ESD C2007 0.5V AB22 AH19 TU_IF_AGC_1 EDSAFE_AVSS_2 I2S_DATA_OUT AUD_LRCH AF26 AD18 EDSAFE_AVSS_3 I2S_LR_IN TU_IF_AGC_2 A1.1uF 4.1uF AG12 K21 DVSS_26 DVSS_87 SC1_CVBS_IN SD_CVBS3 D3.01uF CIC21J501NE 0.01uF 0.1uF 4.8V_AMP +1.3V U13 J22 R139 AA15 PLL_VAFE_AVDD1P2 AA2 DVSS_38 DVSS_99 240 C121 C140 V13 K22 12K PLL_VAFE_AVSS HDMI_RX_1_DATA1_N AH27 0.01uF 0.1uF COMP2_Pr +5V_NORMAL IC100 C101 47pF SD_V4_AVSS SPDIF_IN_N C17047pF C127 0.1uF 4.3V_NORMAL A3.01uF AD14 AH24 1000pF 1000pF 1000pF 1000pF 0.5V J7 T16 C130 SD_INCM_B HDMI_RX_0_HTPLG_OUT 0.3V Place here for common circuit with ATSC D1.com MANUFATURES SPECFIED PARTS BE USED FOR manuals search engine THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.1uF 0.8V DVSS_50 DVSS_111 SC1_FB HDMI_RX_1_AVSS_6 L108 C384 N15 W23 U8 33uF DVSS_51 DVSS_112 HDMI_RX_1_AVSS_7 P15 AB23 V8 10V A9 DVSS_52 DVSS_113 HDMI_RX_1_AVSS_8 DDRV_1 R15 F28 Y5 G9 DVSS_53 DVSS_114 HDMI_RX_1_AVSS_9 DDRV_2 T15 M28 0 R2116 OPT V6 G11 DVSS_54 DVSS_115 HDMI_RX_1_PLL_AVSS DDRV_3 U15 T28 AA4 G13 DVSS_55 DVSS_116 HDMI_RX_1_PLL_DVDD1P2 DDRV_4 V15 AC28 Y7 C159 C152 C166 A14 DVSS_56 DVSS_117 HDMI_RX_1_PLL_DVSS DDRV_5 A16 1000pF 0.1uF 0.7uF AH25 A1.1uF AG11 W8 DVSS_25 DVSS_86 REAR_AV_CVBS SD_CVBS2 HDMI_RX_0_PLL_DVSS VDDC_22 N12 V18 12 R2114 C125 0.1uF AF15 AC4 499 R152 J8 DVSS_5 DVSS_66 SC1_G VDDC_2 M7 AA16 SD_PB1 HDMI_RX_0_RESREF C3006 K8 COMP1_Pr ==> SC1_R AH15 AC1 DVSS_6 DVSS_67 SD_INCM_COMP1 HDMI_RX_0_CLK_N HDMI_CLK.1uF 10uF A1.1uF 0.1uF AH9 AA6 LGE3556C (C0 VERSION) DVSS_1 DVSS_62 1% 1% SD_B HDMI_RX_0_HTPLG_IN AD6 R16 AG9 AA5 R309 10K DVSS_2 DVSS_63 A2.1uF 16V 16V D3.1uF 10uF G_VID_INCM AB13 AD22 DSUB_B SD_V3_AVSS_1 AUD_AVSS_2_2 AA14 AH2 COMPONENT SD_V3_AVSS_2 AUD_SPDIF SPDIF_OUT B_VID_INCM AC11 AC6 SD_V4_AVDD1P2 SPDIF_AVDD2P5 R195 10 AD11 AE4 COMP2_Y SD_V4_AVDD2P5 SPDIF_AVSS C150 1% C169 47pF AB12 AF3 0.8V_HDMI +3.01uF C356 SD_V1_AVDD1P2 0.1uF AE9 R312 75 R131 75 R2036 R120 82 SD_G 1K D1.01uF 10uF G15 DVSS_57 DDRV_6 G16 G17 DVSS_58 DDRV_7 L16 A19 DVSS_59 DDRV_8 M16 G19 DVSS_60 DDRV_9 N16 DVSS_61 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.1uF AG15 AB3 0 R307 DVSS_3 DVSS_64 SC1_RGB(EU)/COMPNENT1[NON_EU] SD_Y1 HDMI_RX_0_DDC_SCL HDMI_SCL K7 U16 C131 0.3V VDDC_23 P12 D20 10K 10K 10K 10K 0 R2115 C100 0.1uF AG16 AC2 L8 DVSS_7 DVSS_68 SD_Y2 HDMI_RX_0_CLK_P HDMI_CLK+ 16V VDDC_4 AC7 L17 C134 0.2V +1.06.5V AH12 U6 P21 DVSS_30 DVSS_91 SC1_CVBS_INCM SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT VDDC_27 V12 E21 AG13 V5 R21 DVSS_31 DVSS_92 SD_INCM_CVBS4 HDMI_RX_1_DDC_SCL VDDC_28 L13 F21 SIDE_AV_CVBS_INCM AF17 V3 T21 DVSS_32 DVSS_93 SD_SIF1 HDMI_RX_1_DDC_SDA VDDC_29 M13 G21 R137 R4020 AG17 W4 499 R153 A3.1uF VDDC_3 AB7 D17 COMP1_Pb ==> SC1_B C133 0.1uF 0.1uF 4.1uF AF16 AD1 M8 DVSS_8 DVSS_69 SC1_RGB_INCM VDDC_5 G8 M17 C105 OPT HDMI_RX0- 75 75 75 SD_PR2 HDMI_RX_0_DATA0_N N8 0.7uF 1000pF 0.1uF AD10 AH1 COMP2_Pb AC10 SD_R SPDIF_IN_P LGE3556C (C0 VERSION) R2035 COMP2_VID_INCM SD_INCM_R C104 OPT C128 0.7uF 0.7uF 33uF AA21 AD17 EDSAFE_AVSS_1 I2S_DATA_IN A2.1uF 4. FILRE AND ELECTRICAL SHOCK HAZARDS.01uF SD_V2_AVDD1P2 AUD_AVSS_1_3 AE13 AF21 SCART1_Lout_N SD_V2_AVDD2P5 AUD_LEFT2_N DSUB AC13 AE21 SCART1_Lout_P SD_V2_AVSS_1 AUD_LEFT2_P AB14 AF22 SD_V2_AVSS_2 AUD_RIGHT2_N SCART1_Rout_N DSUB_R AC14 AG22 SD_V2_AVSS_3 AUD_RIGHT2_P SCART1_Rout_P R_VID_INCM AC12 AD21 DSUB_G SD_V3_AVDD1P2 AUD_AVDD2P5_2 AD12 AC20 C149 C157 C164 SD_V3_AVDD2P5 AUD_AVSS_2_1 0.2V D3.7uF 4. VDDC_7 R315 R313 FOR COMP 1 SD_INCM_COMP2 HDMI_RX_0_DATA1_N R8 82 1% C174 0.7uF AC16 AA1 DVSS_39 DVSS_100 HDMI_RX_1_DATA1_P AGC_VDDO G14 L22 TU_SIF_INCM AG3 PLL_VAFE_TESTOUT AB2 BLM18PG121SN1D D3.3V DVSS_40 DVSS_101 RGB_HSYNC L14 M22 R4021 HDMI_RX_1_DATA2_N L110 AF4 AB1 DVSS_41 DVSS_102 M14 N22 12K C4020 RGB_VSYNC HDMI_RX_1_DATA2_P C2003 120 R3056 A1.5V AA12 DVSS_42 DVSS_103 OPT Y3 0.3V U21 DVSS_33 DVSS_94 10K SD_INCM_SIF1 HDMI_RX_1_RESREF VDDC_30 N13 E22 10K AD15 W2 V21 DVSS_34 DVSS_95 0.01uF 0.1uF AE14 AF1 BLM18PG121SN1D AA8 DVSS_12 DVSS_73 SIDE COMPONENT SD_PR3 HDMI_RX_0_DATA2_N HDMI_RX2.5V A2.7uF 1000pF 0.01uF 0.1uF AB17 AG24 C282 C283 C284 C285 C2005 C2006 L104 C120 C123 SD_V5_AVSS AUD_RIGHT1_N BT_ROUT_N C248 C281 C365 C364 C363 C357 C348 C320 C319 C318 C304 1000pF 0.2V 0 AF9 AG1 IC100 1% SD_INCM_G HDMI_RX_0_CEC_DAT AD5 P16 C129 0.1uF 10uF C117 AC15 AC21 SD_V1_AVSS_2 AUD_AVSS_1_2 1000pF C118 AD13 AE23 0.1uF HDMI_RX_1_VDD3P3 0.1uF 0.5V AG25 AUD_RIGHT0_P HP_ROUT_P AB18 AH23 BLM18PG121SN1D SD_V5_AVDD1P2 AUD_LEFT1_N BT_LOUT_N C111 C112 AC17 AG23 SD_V5_AVDD2P5 AUD_LEFT1_P BT_LOUT_P 0.7uF 1000pF 0.3V D1.5V AG27 AH26 EDSAFE_AVDD2P5 AUD_LEFT0_P HP_LOUT_P TU_IF_N_1 AE26 AF23 EDSAFE_DVDD1P2 AUD_AVDD2P5_0 TU_IF_P_1 AE28 AA20 C147 C155 C162 C113 C172 EDSAFE_IF_N AUD_AVSS_0_1 0.2V A2.1uF 10uF 0.1uF C2004 TU_IF_AGC_2 DS_AGCT_CTL I2S_CLK_OUT AUD_SCK 0.1uF OPT VDDC_31 P13 F22 SD_FB HDMI_RX_1_CLK_N W21 R128 C106 A1.01uF 0.2V AE16 W3 DVSS_35 DVSS_96 SC1_ID SD_FS HDMI_RX_1_CLK_P R205 VDDC_32 R13 G22 0 L106 AE17 Y1 Y21 DVSS_36 DVSS_97 TU_SIF BLM18PG121SN1D SD_FS2 HDMI_RX_1_DATA0_N 20 VDDC_33 T13 H22 AB16 Y2 DVSS_37 DVSS_98 OPT R3055 HDMI_RX_1_DATA0_P A3.1uF PLL_DS_AGND AUD_AVSS_0_3 D1.1uF 0.01uF 0.1uF AH17 AD2 DVSS_9 DVSS_70 OPT 1% C135 A3.1uF 1000pF 0.1uF AF14 AF2 L109 H9 DVSS_13 DVSS_74 R196 C176 VDDC_10 L11 U17 SD_PB3 HDMI_RX_0_DATA2_P HDMI_RX2+ 10 AH14 AD3 A1.01uF 0.1uF L28 DVSS_47 DVSS_108 RGB_VSYNC HDMI_RX_1_AVSS_3 VDDO_6 V14 W22 CONNECT NEAR BCM CHIP U7 U28 DVSS_48 DVSS_109 HDMI_RX_1_AVSS_4 FOR ESD VDDO_7 L15 Y22 V7 AB28 DVSS_49 DVSS_110 R2117 VDDO_8 M15 AA22 0 HDMI_RX_1_AVSS_5 BLM18PG121SN1D W7 D1.1uF 0.01uF 0. 0.1uF 0. VDDC_9 A11 T17 0.7uF 1000pF 0.8V IC100 26page : TUNER(HALF NIM) LGE3556C (C0 VERSION) AG28 AE18 C216 C268 C371 C370 C369 C292 C293 C294 TU_IF_AGC_1 DS_AGCI_CTL I2S_CLK_IN C274 C272 C275 C276 C278 C280 C297 AH28 AF18 0. D1.1uF 0.Manualslib.8V AB19 AC23 PLL_DS_AVDD1P2 AUD_AVSS_0_4 TU_IF_P_1 BLM18PG121SN1D C119 C122 AB25 AD23 PLL_DS_TESTOUT AUD_AVSS_0_5 D1.1uF AE15 Y6 0 R308 H8 DVSS_4 DVSS_65 SD_PR1 HDMI_RX_0_DDC_SDA HDMI_SDA VDDC_1 L7 V16 COMP1_Y ==> C132 0.01uF 0.1uF BLM18PG121SN1D AUD_RIGHT1_P BT_ROUT_P AD16 AE22 16V 16V 16V 10V 16V 16V 16V 16V 16V 16V SD_V1_AVDD2P5 AUD_AVDD2P5_1 L105 AB15 AB20 C148 C156 C163 SD_V1_AVSS_1 AUD_AVSS_1_1 0.01uF 0.7uF 4.2V AF27 AG18 BLM18PG121SN1D EDSAFE_AVSS_4 I2S_LR_OUT AUD_LRCK AF28 AG26 L102 EDSAFE_AVSS_5 AUD_LEFT0_N HP_LOUT_N A2.7uF 1000pF 0.18 Downloaded from ESSENTIAL THAT ONLY www.1uF VDDO_1 N14 P22 Y4 AA13 DVSS_43 DVSS_104 HDMI_RX_1_VDD1P2 VDDO_2 P14 R22 W5 AA18 DVSS_44 DVSS_105 HDMI_RX_1_VDD2P5 VDDO_3 R14 T22 W1 AA19 DVSS_45 DVSS_106 HDMI_RX_1_AVSS_1 VDDO_4 T14 U22 U5 C146 C154 C161 E28 DVSS_46 DVSS_107 RGB_HSYNC HDMI_RX_1_AVSS_2 VDDO_5 U14 V22 W6 4.8V 0.1uF 4.7uF 0.1uF 0.01uF 0.1uF 0.1uF AF13 L21 DVSS_27 DVSS_88 R2037 SD_CVBS4 VDDC_24 R12 G20 OPT SIDE_AV_CVBS M21 DVSS_28 DVSS_89 12 AC9 AA3 TU_CVBS_INCM SD_INCM_CVBS1 HDMI_RX_1_CEC_DAT VDDC_25 T12 H20 AF10 V4 N21 DVSS_29 DVSS_90 REAR_AV_CVBS_INCM VDDC_26 U12 A21 R310 R2039 SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN R2038 A2.1uF 4.1uF 0.2V AUD_RIGHT0_N HP_ROUT_N A2.2V A2.3V VDDC_6 D9 N17 NON_EU SD_PB2 HDMI_RX_0_DATA0_P HDMI_RX0+ ONLY USE NON_EU P8 DVSS_10 NON_EU AH16 AE1 DVSS_71 NON_EU 1% AA9 P17 R135 1% R135-*1 HDMI_RX1. WHEN SERVICING IF IS EUROBBTV 2009.1uF 10uF BLM18PG121SN1D L112 C243 C249 C250 C382 C381 C380 C379 C286 C287 1000pF 0.2V AE27 AB21 0.1uF H14 DVSS_18 DVSS_79 1% R2112-*1 R141-*1 1% SD_L2 HDMI_RX_0_AVSS_2 BLM18PG121SN1D VDDC_15 T11 L18 SIDE_COMP_Y AF11 AB6 H15 DVSS_19 DVSS_80 5% 12 5% 62 SD_C2 HDMI_RX_0_AVSS_3 L107 VDDC_16 U11 M18 SIDE_COMP_Pr AH11 AG2 H16 DVSS_20 DVSS_81 SD_INCM_LC2 HDMI_RX_0_AVSS_4 VDDC_17 V11 N18 SIDE_COMP_Pb R100 62 AH13 AB4 H17 DVSS_21 DVSS_82 SD_L3 HDMI_RX_0_AVSS_5 VDDC_18 D12 P18 SIDE_COMP_INCM R142 OPT AE12 AA7 H18 DVSS_22 DVSS_83 CVBS R143 62 SD_C3 HDMI_RX_0_AVSS_6 VDDC_19 G12 R18 EU AF12 Y8 H19 DVSS_23 DVSS_84 R2112 R141 75 1% EU SD_INCM_LC3 HDMI_RX_0_PLL_AVSS C158 C151 C165 VDDC_20 L12 T18 C110 0.5V H10 DVSS_14 DVSS_75 SIDE_COMP_Y SD_INCM_COMP3 HDMI_RX_0_VDD3P3 VDDC_11 M11 V17 AH10 AE3 H11 DVSS_15 DVSS_76 1% SD_L1 HDMI_RX_0_VDD1P2 VDDC_12 N11 AA17 SIDE_COMP_Pr C177 OPT H12 R165 82 R166 75 AG10 AC3 DVSS_16 DVSS_77 R167 75 SIDE_COMP_Pb SD_C1 HDMI_RX_0_VDD2P5 VDDC_13 P11 AC19 AE10 AD4 C145 C153 C160 H13 DVSS_17 DVSS_78 1% SIDE_COMP_INCM NON_EU NON_EU SD_INCM_LC1 HDMI_RX_0_AVSS_1 VDDC_14 R11 G18 AE11 AB5 4.1uF 0.01uF 0.01uF 10uF VDDC_21 M12 U18 R2113 SD_CVBS1 HDMI_RX_0_PLL_DVDD1P2 J21 1% 18 C124 0.1uF AG14 AE2 DVSS_11 DVSS_72 SD_Y3 HDMI_RX_0_DATA1_P HDMI_RX1+ VDDC_8 G10 R17 C175 0.

047uF 0.1uF VTTS VCC 3 6 DDR0_VREF0 R417 R414 0 VREF VDDQ 220 4 5 R415 0 C418 Close to IC Close to IC C422 C416 C420 1uF 1uF 10uF 0.004:F4 DDR1_CLK DDR01_A[0-3.1uF F17 DDR1_DQ[13] DDR1_DQ13 B22 DDR1_DQ[14] DDR1_DQ14 E17 DDR1_DQ[15] DDR1_DQ15 A10 DDR0_DM0 004:E6 DDR0_DM0 IC401 IC403 DDR1_DQ[8-15] C496 C10 DDR0_DM1 004:E3 0.1uF DDR1_DQ00 DDR01_A[7] C20 DDR1_DQ[1] DDR1_DQ01 DDR0_A[5] 75 A18 DDR1_DQ[2] AR407 DDR1_DQ02 DDR0_A[4] B21 DDR1_DQ[3] DDR1_DQ03 DDR01_A[11] C492 DDR1_DQ04 C21 DDR1_DQ[4] DDR1_DQ[8-15] Close to IC Close to IC DDR01_A[8] 0.1uF DDR0_DM1 NT5TU128M8DE_BD DDR0_DQ[8-15] NT5TU128M8DE_BD A20 DDR1_DM0 004:H6 004:B5 DDR1_DM0 F19 DDR1_DM1 004:H3 004:A7.3V DDR01_A[11] K7 A10/AP VSSQ_1 B2 DDR01_A[11] K7 A10/AP VSSQ_1 B2 A11 VSSQ_2 A11 VSSQ_2 DDR01_A[12] L2 B8 DDR01_A[12] L2 B8 A12 VSSQ_3 A12 VSSQ_3 DDR01_A[13] L8 D2 DDR01_A[13] L8 D2 A13 VSSQ_4 A13 VSSQ_4 D8 D8 VSSQ_5 VSSQ_5 A3 A3 IC404 VSS_1 VSS_1 C426 C425 E3 E3 10K C417 C419 D1.004:C4 004:A7.8V D1.1uF DDR01_A08 BA0 DQS 004:A4 BA0 DQS B14 DDR01_A[9] DDR01_A[7-13] G3 B3 G3 B3 DDR01_A09 DDR0_DM0 004:A4 DDR1_DM0 004:A4 DDR01_A[8] D14 DDR01_A[10] BA1 DM/RDQS BA1 DM/RDQS DDR01_BA2 G1 A2 DDR01_BA2 G1 A2 DDR01_A[13] DDR01_A10 NC_1/BA2 NU/RDQS NC_1/BA2 NU/RDQS C489 C13 DDR01_A[11] DDR01_A11 DDR01_A[0-3.1uF 470pF 10uF 10uF 10uF 22uF DDR_BVDD1 10uF 10uF B7 DDR_BVSS0 B24 DDR_BVSS1 F20 DDR_PLL_TEST B23 R411 0 DDR_PLL_LDO B17 OPT DDR01_CKE DDR01_CKE C22 DDR_VTT R412 240 DDR_COMP IC400 IC402 E16 1% DDR01_ODT DDR1_DQ[0-7] DDR01_ODT NT5TU128M8DE_BD NT5TU128M8DE_BD C23 DDR0_DQ[0-7] 004:B6 004:B5 DDR_EXT_CLK DDR0_CLK B12 DDR0_CLK 004:C7.1uF DDR01_BA2 A6 VDD_2 A6 VDD_2 DDR01_ODT A17 DDR01_CASb K2 E9 K2 E9 DDR01_CASB DDR01_A[7] DDR01_A[7] R410 75 A8 A7 VDD_3 A7 VDD_3 C421 DDR0_DQ[0] DDR0_DQ[0-7] DDR01_A[8] K8 H9 DDR01_A[8] K8 H9 0. DDR Memory 4 .004:C2.7-13] 470pF 470pF 1uF 1uF D1.047uF A24 C440 470pF 0.004:I6 DDR0_DQ[12] F9 E2 F9 E2 DDR01_A[10] 0.8V DDR01_A12 DDR01_A[1] B13 DDR01_A[13] H8 A9 H8 A9 DDR0_A[4-6] DDR01_A[0] DDR01_A[0] DDR01_A[10] DDR01_A13 F15 DDR1_A[4] A0 VDDQ_1 004:B6.7-13] SI C12 R406 R407 DDR0_CLKb 004:C7.004:F4 DDR1_CLKb 1% DDR1_DQ[1] DDR01_A[2] C485 A12 CK DQ1 CK DQ1 DDR1_CLKb 004:F7.1uF 470pF 470pF 10uF 470pF 0.004:C4 E8 C8 DDR0_DQ[0] E8 C8 DDR1_DQ[0] DDR01_RASb DDR0_CLKB 100 CK DQ0 100 CK DQ0 A13 DDR1_CLK 004:F7.1uF D13 DDR01_A[12] D1.004:I7 DDR1_A[4-6] A0 VDDQ_1 C490 DDR1_A[4-6] DDR01_A[1] H3 C1 DDR01_A[1] H3 C1 DDR01_BA1 75 0.7-13] DDR01_A[3] AR402 0.1uF DDR1_DQ08 DDR01_WEb D21 DDR1_DQ[9] DDR1_DQ09 75 F18 DDR1_DQ[10] DDR01_CKE AR409 DDR1_DQ10 DDR01_ODT E20 DDR1_DQ[11] DDR1_DQ11 R404 75 A22 DDR1_DQ[12] C494 DDR1_DQ12 0.1uF C469 10uF C470 C471 C472 C473 C474 C475 C476 C477 C478 C479 C480 C481 C482 C495 0.1uF B10 DDR0_DQS0 004:E6 E8 C8 E8 C8 DDR0_DQS0 DDR0_DQ[9] DDR1_DQ[9] B9 CK DQ0 CK DQ0 DDR0_DQS0b 004:E6 DDR0_CLKb F8 C2 DDR0_DQ[8] DDR1_CLKb F8 C2 DDR1_DQ[8] DDR0_DQS0B 004:A7.004:F4 1% F8 C2 DDR0_DQ[1] F8 C2 DDR1_CLK 004:A7.047uF 0.1uF L7 VSS_3 DDR0_VREF0 L7 VSS_3 10V 10V K9 K9 DDR1_VREF0 16V NC_3/A15 NC_3/A15 VSS_4 VSS_4 GND VTT 1 8 F9 E2 F9 E2 DDR01_ODT DDR01_ODT ODT VREF ODT VREF E1 E1 VDDL C450 C453 VDDL C464 C467 EN VTT_IN E7 E7 2 7 DDR1_VREF0 VSSDL VSSDL 0.1uF DDR0_DQ08 L3 VSS_2 L3 VSS_2 E10 DDR0_DQ[9] NC_2/A14 J1 NC_2/A14 J1 DDR0_DQ09 DDR0_A[6] 75 E9 L7 VSS_3 DDR0_VREF0 L7 VSS_3 DDR1_VREF0 DDR0_DQ[10] NC_3/A15 K9 NC_3/A15 K9 DDR01_A[3] AR405 DDR0_DQ10 VSS_4 VSS_4 F11 DDR0_DQ[11] DDR0_DQ11 DDR01_A[1] C483 F12 004:A7.1uF 10uF 22uF 0.1uF 470pF 470pF 0.004:I4.1uF 16V 16V 10V THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.1uF C404 10uF 10uF C462 C465 C468 0.004:F7.1uF C403 0.004:C4 DDR0_CLKb 004:A7.004:C7 DDR0_CLK DDR1_CLK C497 DDR1_DM1 0.1uF DDR0_DQ00 A8 VDD_4 A8 VDD_4 B11 DDR0_DQ[1] K3 K3 DDR0_DQ01 DDR01_A[9] DDR01_A[9] B8 A9 A9 DDR_VTT DDR0_DQ02 D11 DDR0_DQ[2] DDR0_DQ[3] DDR01_A[10] H2 K7 A10/AP VSSQ_1 A7 B2 DDR01_A[10] H2 K7 A10/AP VSSQ_1 A7 B2 PI DDR0_DQ03 DDR01_A[11] DDR01_A[11] E11 DDR0_DQ[4] A11 VSSQ_2 A11 VSSQ_2 DDR01_A[12] L2 B8 DDR01_A[12] L2 B8 DDR0_DQ04 A12 VSSQ_3 A12 VSSQ_3 C8 DDR0_DQ[5] DDR01_A[13] L8 D2 L8 D2 DDR0_DQ05 DDR01_A[13] C11 DDR0_DQ[6] A13 VSSQ_4 A13 VSSQ_4 D8 D8 DDR01_RASb DDR0_DQ06 DDR0_DQ[8-15] VSSQ_5 VSSQ_5 C9 DDR0_DQ[7] A3 A3 DDR0_DQ07 DDR01_A[2] C491 D8 DDR0_DQ[8] VSS_1 VSS_1 E3 E3 DDR01_A[0] 0.1uF 0.8V A6 0.004:I7 A1 VDDQ_2 DDR01_A[2] H7 C3 DDR01_A[2] H7 C3 A2 VDDQ_3 A2 VDDQ_3 DDR01_A[3] J2 C7 DDR01_A[3] J2 C7 A3 VDDQ_4 A3 VDDQ_4 DDR0_A[4] J8 C9 DDR1_A[4] J8 C9 A4 VDDQ_5 A4 VDDQ_5 DDR0_A[5] J3 A1 DDR1_A[5] J3 A1 A5 VDD_1 A5 VDD_1 DDR0_A[6] J7 L1 DDR1_A[6] J7 L1 A6 VDD_2 A6 VDD_2 * DDR_VTT DDR01_A[7] K2 A7 VDD_3 E9 DDR01_A[7] K2 A7 VDD_3 E9 DDR01_A[8] K8 H9 DDR01_A[8] K8 H9 A8 VDD_4 A8 VDD_4 DDR01_A[9] K3 DDR01_A[9] K3 A9 A9 DDR01_A[10] H2 A7 DDR01_A[10] H2 A7 DDR_VTT D3.1uF 10uF 0.1uF 0.7-13] DDR01_A[0-3.1uF DDR1_A04 A1 VDDQ_2 A1 VDDQ_2 C15 DDR1_A[5] H7 C3 H7 C3 AR403 DDR1_A05 DDR01_A[2] DDR01_A[2] DDR01_BA0 D16 DDR1_A[6] A2 VDDQ_3 A2 VDDQ_3 DDR01_A[3] J2 C7 DDR01_A[3] J2 C7 DDR01_BA2 DDR1_A06 A3 VDDQ_4 A3 VDDQ_4 F16 DDR01_BA0 DDR0_A[4] J8 C9 DDR1_A[4] J8 C9 DDR01_BA0 DDR01_WEb B16 A4 VDDQ_5 A4 VDDQ_5 DDR01_BA1 DDR0_A[5] J3 A1 DDR1_A[5] J3 A1 75 DDR01_BA1 A5 VDD_1 A5 VDD_1 DDR01_CKE C499 E15 DDR01_BA2 DDR0_A[6] J7 L1 DDR1_A[6] J7 L1 AR404 0.8V DQS DQS DDR01_WEb G2 A8 DDR0_DQS1b G2 A8 DDR1_DQS1b 004:A3 C410 DDR01_WEB 004:A4 C400 C401 C409 C405 C402 C408 C407 C7 BA0 DQS BA0 DQS G3 B3 DDR0_DM1 G3 B3 DDR1_DM1 004:A4 DDR_VDDP1P8_1 BA1 DM/RDQS 004:A4 BA1 DM/RDQS D22 G1 A2 G1 A2 DDR_VDDP1P8_2 DDR01_BA2 DDR01_BA2 NC_1/BA2 NU/RDQS NC_1/BA2 NU/RDQS C406 C415 470pF 470pF DDR01_A[0-3.1uF DDR01_A[0] H8 A9 DDR01_A[0] H8 A9 A0 VDDQ_1 DDR1_A[4-6] A0 VDDQ_1 DDR01_A[1] H3 C1 DDR01_A[1] H3 C1 DDR0_A[4-6] A1 VDDQ_2 004:B6.com MANUFATURES SPECFIED PARTS BE USED FOR manuals search engine HONG YEON HYUK THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.004:F2.18 Downloaded from ESSENTIAL THAT ONLY www.1uF 470pF 0.8V 1uF 1uF 0.2V IC100 LGE3556C (C0 VERSION) D1.1uF 0.Manualslib.047uF C442 0. FILRE AND ELECTRICAL SHOCK HAZARDS.8V R418 C413 BD35331F-E2 L3 VSS_2 L3 VSS_2 22uF 22uF 10uF 10uF NC_2/A14 J1 NC_2/A14 J1 10V 10V 0.1uF DDR1_DQ[0-7] 0.7-13] DDR01_A[0-3.1uF DDR0_DQ12 DDR01_ODT DDR01_ODT E8 DDR0_DQ[13] ODT VREF ODT VREF E1 E1 C463 C466 DDR01_BA1 75 DDR0_DQ13 VDDL C449 C452 VDDL D10 DDR0_DQ[14] E7 E7 DDR0_DQ14 DDR01_A[12] AR406 F8 DDR0_DQ[15] VSSDL VSSDL 470pF 0.8V D1.047uF 0.047uF 0.004:C4 DDR0_CLK 004:A7.004:F4 DDR01_CKE F2 D7 DDR0_DQ[2] DDR01_CKE F2 D7 DDR1_DQ[5] DDR1_A[4-6] DDR01_A[0] 0.1uF DDR0_A05 CS CS F13 DDR0_A[6] DDR0_A06 DDR01_BA0 DDR01_BA0 DDR1_A[5] 75 C14 DDR01_A[7] B7 B7 AR401 DDR01_A07 DDR01_BA1 DDR0_DQS0 004:A4 DDR01_BA1 DDR1_DQS0 004:A4 DDR1_A[4] C488 F14 DDR01_A[8] DQS DQS G2 A8 DDR0_DQS0b G2 A8 DDR1_DQS0b 004:A3 DDR01_A[11] 75 0.047uF DDR_BVDD0 0.1uF 470pF DDR01_A[9] DDR0_DQ15 C484 C18 DDR1_DQ[0] 0.004:C5.1uF 0.1uF 10V 10V 10V 16V 16V C423 C414 C411 C412 0.004:C7 CK DQ1 CK DQ1 C498 F10 DDR0_DQS1 004:E3 F2 D7 F2 D7 DDR0_DQS1 DDR01_CKE DDR0_DQ[12] DDR01_CKE DDR1_DQ[12] 0. D1.004:F6.004:C7.004:F4 D3 DDR0_DQ[13] D3 DDR1_DQ[13] DDR0_DQS1B DQ3 DQ3 B19 DDR1_DQS0 C19 DDR1_DQS0 004:H6 DDR1_DQS0b 004:H6 F7 DQ4 D1 D9 DDR0_DQ[15] DDR0_DQ[11] F7 DQ4 D1 D9 DDR1_DQ[15] DDR1_DQ[14] SI DDR1_DQS0B DDR01_RASb RAS DDR01_RASb E19 DQ5 RAS DQ5 DDR1_DQS1 004:H3 DDR01_CASb G7 B1 DDR0_DQ[10] DDR01_CASb G7 B1 DDR1_DQ[10] DDR1_DQS1 CAS DQ6 CAS DQ6 D19 DDR1_DQS1b 004:H3 F3 B9 F3 B9 DDR1_DQS1B DDR01_WEb DDR0_DQ[14] DDR01_WEb DDR1_DQ[11] C16 DDR0_VREF0 WE DQ7 WE DQ7 DDR01_RASb G8 G8 DDR01_RASB CS CS A7 DDR1_VREF0 DDR_VREF0 DDR01_BA0 DDR01_BA0 A23 B7 B7 DDR_VREF1 DDR01_BA1 DDR0_DQS1 004:A4 DDR01_BA1 DDR1_DQS1 004:A3 C17 D1.047uF C451 C454 C455 C456 C457 C458 C459 C460 C461 C441 0.1uF F9 CKE DQ2 CKE DQ2 DDR0_DQS1b 004:E3 004:A7.06.1uF B18 DDR1_DQ[5] DDR1_DQ05 DDR01_A[13] 75 B20 DDR1_DQ[6] AR408 DDR1_DQ06 DDR01_BA0 D18 DDR1_DQ[7] DDR1_DQ07 DDR01_BA2 C493 E18 DDR1_DQ[8] 0.1uF DDR1_CLKB CKE DQ2 CKE DQ2 B15 DDR01_A[0] D3 DDR0_DQ[3] D3 DDR01_A00 DDR1_DQ[3] DDR1_A[6] 75 E14 DDR01_A[1] DQ3 DQ3 AR400 DDR01_A[0-3] D1 DDR0_DQ[4] D1 DDR1_DQ[4] DDR0_A[4-6] DDR01_CASb DDR01_A01 DQ4 DQ4 C486 A15 DDR01_A[2] F7 D9 DDR0_DQ[5] F7 D9 R408 75 0.1uF DDR01_A02 DDR01_RASb DDR01_RASb DDR1_DQ[2] D15 DDR01_A[3] RAS DQ5 RAS DQ5 DDR01_CASb G7 B1 DDR0_DQ[6] DDR01_CASb G7 B1 DDR1_DQ[6] DDR01_A[12] R409 75 DDR01_A03 CAS DQ6 CAS DQ6 E13 DDR0_A[4] DDR0_A[4-6] F3 B9 DDR0_DQ[7] F3 B9 DDR0_A04 DDR01_WEb DDR01_WEb DDR1_DQ[7] DDR01_A[9] C487 E12 DDR0_A[5] WE DQ7 WE DQ7 G8 G8 DDR01_A[7] 0.1uF C443 C444 C445 C446 C447 C448 470pF 470pF 0. WHEN SERVICING IF IS BCM (EUROBBTV) 2009.8V A1.004:F3.

18 Downloaded from ESSENTIAL THAT ONLY www.6V 100pF 5D 25V 4A REAR_AV 50V 0 REAR_AV [RD]CONTACT COMP2_L_IN REAR_AV 1uF 5A [YL]E-LUG 4E D901 R907 C939 REAR_AV [RD]O-SPRING_2 5. New Item Development EARPHONE BLOCK HP_LOUT OPT C902 1000pF 50V C E OPT OPT JK901 Q900 B +3.1V R925 PPJ233-01 10K [GN]CONTACT REAR_AV L903 [RD]E-LUG 4A 270nH 5C R926 AV_CVBS_DET [BL]E-LUG-S COMP2_Pb REAR_AV 1K D909 D904 5.1V 27pF 27pF +3.5V_ST B Q902 E C OPT R914 10K SIDE_HP_MUTE COMPONENT +3.6V REAR_AV_CVBS 100pF R957 50V REAR_AV 0 REAR_AV C909 L904 D906 47pF 270nH 5.3V_NORMAL KJA-PH-0-0177 MMBT3904-(F) MMBT3904-(F) B Q903 GND 5 E R917 C 10K L 4 R912 1K DETECT 3 HP_DET HP_ROUT R 1 OPT C903 1000pF C E 50V OPT OPT Q901 B MMBT3904-(F) MMBT3904-(F)+3.6V [BL]O-SPRING 27pF 27pF REAR_AV 100pF 50V 50V 50V 3C [RD]CONTACT 5B L902 [RD]E-LUG-S 270nH C941 R928 4B [WH]C-LUG 25V 0 7C COMP2_Pr 5.5V [RD]O-SPRING_1 C934 C905 REAR_AV_R_IN REAR_AV D905 1uF 5C 27pF 27pF 3A [YL]CONTACT REAR_AV 50V R921 C916 [WH]O-SPRING 50V D908 470K C935 R910 [YL]O-SPRING 5.6V 470K C940 100pF R927 25V 0 50V 5E REAR_AV_L_IN [RD]E-LUG 1uF C936 R909 REAR_AV 25V REAR_AV REAR_AV REAR_AV 6E 0 R920 C915 COMP2_R_IN D907 470K 100pF PPJ234-01 1uF 5. WHEN SERVICING IF IS EUROBBTV 2009.5V 50V COMP2_Y [GN]E-LUG C932 C904 D903 6A 5.06.6V R961 50V JK900 D902 C937 5.com MANUFATURES SPECFIED PARTS BE USED FOR manuals search engine THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.6V 470K 100pF 50V THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.Manualslib.3V_NORMAL R902 10K Rear CVBS R903 1K COMP2_DET REAR_AV D900 C931 5. FILRE AND ELECTRICAL SHOCK HAZARDS.3V_NORMAL [GN]O-SPRING 50V REAR_AV D910 50V JK902 REAR_AV 5A 5. ETC SUB BOARD I/F 9 .5V C933 C906 4C [RD]O-SPRING C910 7B 5.

2K 1 RF_S/W_CNTL TU2701 CN B C R2755 BST_CNTL C R2720 0 10K 2 3 +B1[5V] TDFR-G135D Q2703 2SC3052 B 4 NC[RF_AGC] LNA2_CTL/BOSTER_CTL 5 AS C2718 E 6 SCL[A_DEMOD] close to TUNER 0.1uF GND 2 16V C2704 10V 12 0.3V D5 R2739 R2741 28 C2712 C2714 200 200 29 D6 NC(IF_TP) 18pF 18pF 31 30 D7 8 50V 50V SHIELD SIF C2702 close to TUNER TU_CVBS 9 E 0.1uF 8 16V 9 SIF RESET +2.2V_TU 24 EU R2716-*1 RF_S/W_CNTL 47 CIC21J501NE 1 BST_CNTL D2 CN R2716 0 10K 2 +B1[+5V] 25 EU R2711-*1 FE_TS_VAL CN EU FB EN/SYNC R2732 3 47 1 8 POWER_ON/OFF2_2 4 NC[RF_AGC] R2713-*1 R2713 NC_1 D3 CN R2711 0 FE_TS_DATA[0-7] 56K 75K L2704 5 FE_TS_DATA_CLK R2 6 SCLT 26 EU R2709-*1 1/8W GND SW_2 3.3V +B1[5V] 50V C 0.1uF RESET 3 R2724 15 10K R2746 16V 2.5V] 16 16 SCL[D_DEMOD] SCL[D_DEMOD] 17 17 C2721 C2725 C2727 C2729 18 SDA[D_DEMOD] 18 SDA[D_DEMOD] 0.2V] L2701 200mA 10uF 3.3V_TU EU_VERTICAL_NIM_T2 EU_HORIZONTAL_NIM_T2 R2722 0 TU2701-*4 TU2701-*5 FE_TS_SERIAL L2702 TDFR-G055D TDFR-G035D CN CIC21J501NE 60mA +3.1uF +5V_TU 6 SCLT 3.3V_TU +2.3V] D6 CN R2707 0 FE_TS_DATA[2] C2715 0.3V_TU 9 SIF 1 NL17SZ08DFT2G NC C2701 C2709 10 C2708 10uF 11 VIDEO BST_CNTL 0.1uF 0.5V_TU RF_S/W_CNTL RF_S/W_CNTL 1 1 BST_CNTL BST_CNTL 2 2 C2722 C2724 C2734 3 +B1[5V] 3 +B1[5V] C2728 IC2700 0.1uF 14 RESET 14 RESET BLM18PG121SN1D 10V 16V 15 15 2.3V B Q2705 19 ERR SYNC 18 R2729 33 ISA1530AC1 20 C 21 VALID ERR C2713 22 MCL 19 C2711 CN CN 23 D0 10pF 10pF 50V 50V R2731-*1 R2756-*1 24 D1 SYNC 0 30K 25 D2 D3 20 26 1/16W 1/10W 27 D4 VALID 5% 1% 28 D5 D6 21 C2716 29 31 30 D7 MCL EU R2757-*1 +3.7K C 24 D1 6 SCL0_3.3V_TU 22 47 100pF EU SHIELD CN R2757 50V EU R2756 0 R2731 D0 FE_TS_ERR 18K CN_HORIZONTAL_LGS8G85 23 EU R2717-*1 1% 22K 47 TU2701-*3 CN R2717 IC2701 1% TDFR-C135D D1 0 FE_TS_SYNC L2703 MP2212DN Close to IC R1 +1.11 3 8 8 9 SIF 9 SIF 2 R2744 NC NC_2 1 10 10 +5V_NORMAL +5V_TU GND 11 VIDEO 11 VIDEO C2719 12 GND 12 GND 0.2V R2721 R2723 100K 4 NC[RF_AGC] NC_1 13 C2700 C2703 C2705 C2707 100 TUNER_RESET 5 100pF 0. WHEN SERVICING IF IS Downloaded from ESSENTIAL THAT ONLY www.3V E 16 NC_4 SCL 17 R2728 33 17 18 SDA SDA[D_DEMOD] SDA2_3.1uF 100pF 0.01uF 7 SDA[A_DEMOD] +5V_TU 25V 8 NC(IF_TP) RF_S/W_CNTL OPTION : RF AGC IC2702 +3.5TRE1 5 AS 5 NC_1 10V SCL[A_DEMOD] SCLT 6 6 SDA[A_DEMOD] SDAT VIN 1 VOUT 7 NC(IF_TP) 7 NC(IF_TP) $0.5V Q2700 B 16 470 R2749 2 SCL[D_DEMOD] NC[RF_AGC] 2SC3052 IF_AGC_SEL 82 17 R2700 0 OPT FE_TS_ERR 18 SDA[D_DEMOD] 4 OPT E E TU_SIF R2758 ERR 19 OPT 47 SYNC AS 3 4 FE_TS_VAL_ERR 20 21 VALID 5 B ISA1530AC1 MCL 22 33 R2726 R2743 Q2704 23 D0 SCL[A_DEMOD] +5V_TU 4.1uF 0.Manualslib.1uF 22uF 22uF ERR ERR 16V 10V 10V 19 19 16V SYNC SYNC 20 20 VALID VALID 21 21 MCL MCL 22 22 D0 D0 23 23 D1 D1 24 24 D2 D2 25 25 D3 D3 26 26 D4 D4 27 27 D5 D5 28 28 D6 D6 29 29 D7 D7 30 30 31 31 SHIELD SHIELD THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.3V +B3[3.3V_NORMAL R2725 Close to the tuner EU +3.3V] 16 C2733 14 0.1uF 15 RESET 29 EU R2710-*1 22uF +B4[2. +5V_TU CAN H-NIM/NIM TUNER for EU L2700 BLM18PG121SN1D VERTICAL_NIM R2738 Q2701 R2742 TU2701-*1 0 ISA1530AC1 TDFR-G155D E R2740 10K HORIZONTAL_NIM R2754 0 RF_SWITCH_CTL 2.3V 50V 16V 50V 16V C2710 7 SDAT NC_2 14 0.5V] 10V 16V 16 47 17 SCL D7 CN R2710 0 FE_TS_DATA[3] 18 SDA 30 EU R2705-*1 R2719 0 19 ERR 31 47 20 SYNC CN R2705 0 FE_TS_DATA[4] R2718 21 VALID EU R2706-*1 10 Vout=0.8*(1+R1/R2) MCL 47 C2717 22 CN R2706 1/10W 1uF 23 D0 0 FE_TS_DATA[5] 1% 24 D1 SHIELD EU R2704-*1 10V 25 D2 47 26 D3 CN R2704 0 FE_TS_DATA[6] D4 27 EU R2703-*1 D5 28 47 29 D6 CN R2703 0 FE_TS_DATA[7] D7 30 31 0 SHIELD +3.1uF C2706 0.3V D2 25 26 D3 SDA[A_DEMOD] 33 R2727 27 D4 7 SDA0_3. FILRE AND ELECTRICAL SHOCK HAZARDS.1uF 16V R2736 0 NC 10 B Q2702 CN_VERTICAL_LGS8G85 VIDEO ISA1530AC1 C TU2701-*2 11 +3.2V] +B3[3.com MANUFATURES SPECFIED PARTS BE USED FOR manuals search engine THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.3V_TU TDFR-C155D GND +3.2V_TU BST_CNTL 2 3 +B1[+5V] 1.1uF 16V C2723 C2726 13 1.1uF 22uF 12 GND 28 EU R2707-*1 10V +B2[1. 27 .2V 100pF OPT +5V_TU 1 5 13 16V OPT C2736 14 3.2V] 47 BS VCC 10V 13 4 5 C2720 14 +B3[3.6uH 47 1/8W 1% 2 7 7 8 9 SDAT NC_2 SIF 27 D4 CN R2709 0 EU R2708-*1 FE_TS_DATA[0] 1% IN 3A SW_1 NR8040T3R6N 10 NC_3 47 3 6 C2730 CN R2708 C2731 C2735 11 VIDEO D5 0 FE_TS_DATA[1] 22uF 0.3V_TU 1 RF_S/W_CNTL 12 +1.2V 13 +B2[1.5V R2701 0 13 +B2[1.5V +B4[2.1uF ATV_OUT 15 RESET SCL[D_DEMOD] 16V SCL2_3.3V] 0.1uF 0.1uF NC[RF_AGC] NC[RF_AGC] 22uF 4 4 16V 16V 16V AZ2940D-2.1uF 16V FE_TS_VAL 1.5V_TU R2702 R2712 10 NC_3 VIDEO 15 200 200 11 12 GND 2.

1uF USB DOWN STREAM 2 USB_DM1 C2208 C2210 15pF 15pF 3 USB_DP1 SUSP_IND/LOCAL_PWR/NON_REM0 R2202 1M 1% 1/10W 1% 4 D2201 D2203 CDS3C05HDMI1 CDS3C05HDMI1 R2203 R2201 5 5.Manualslib.3V_USB 24MHz L2201 BLM18PG121SN1D +3.3V_USB THERMAL OPT R2214 USBDN1_DP RESET_N 0 2 26 USB_DP1 USB_DM2 USBDN2_DM 3 37 25 HS_IND/CFG_SEL1 R2210 100K C2215 0.3V_USB R2227 0 /USB_OCD2 USB DOWN STREAM 040:J6 2 USB_DM2 C2211 3 0.3V_NORMAL USB / DVR Ready IC2202 AP2191SG-13 +5V_USB R2220 L2202 NC 8 1 GND 4.6V C2209 5.1uF 0.1uF 9 19 EAN60921001 2. USB2 OPTION +3.3V_NORMAL +3.6V 12K +3.1uF C2213 C2214 USB_DP2 4.1uF 0.6V 100K X2201 5.7K 1uF MLB-201209-0120P-N2 OPT 10V 0. FILRE AND ELECTRICAL SHOCK HAZARDS.1uF /RST_HUB USB +3.1uF R2209 USB_DM1 1 27 100K +3.7uF 0. WHEN SERVICING IF IS Downloaded ESSENTIAL THAT from www.7K 10V 0 R2208 KJA-UB-4-0004 16V OPT 10 11 12 13 14 15 16 17 18 SDA2_3.1uF EAN60921001 2.3V P2202 R2204 R2205 USB_CTL2 R2206 100K 100K 100K VDDA33_2 TEST PRTPWR1 OCS1_N VDD18 VDD33CR PRTPWR2 OCS2_N NC_5 1 +3.3V_USB XTAL1/CLKIN VDD33PLL VDD18PLL USBUP_DP USBUP_DM VDDA33_3 RBIAS XTAL2 VSS C2212 36 35 34 33 32 31 30 29 28 USBDN1_DM VBUS_DET 0.3V_USB USBDN2_DP SCL/SMBCLK/CFG_SEL0 OPT USB_DP2 4 24 IC2201 VDDA33_1 VDD33 R2212 100K OPT IC2203 +5V_USB 5 USB2512A_AEZG 23 AP2191SG-13 R2221 C2201 NC_1 SDA/SMBDATA/NON_REM1 R2211 100K OPT L2203 NC 8 C2202 C2203 C2204 C2205 6 22 1 GND 4.1uF 4 D2202 D2204 CDS3C05HDMI1 CDS3C05HDMI1 5 5.7K MLB-201209-0120P-N2 OPT OUT_2 7 2 IN_1 120-ohm OUT_1 6 3 IN_2 SIDE_USB_DP SIDE_USB_DM C2218 C2220 FLG 5 C2222 4 EN 10uF 100uF R2226 0.com ONLY MANUFATURES SPECFIED PARTS manuals search BE USED FOR engine 40 THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. .7K 10V 16V C2206 USB_CTL1 1uF 10V KJA-UB-4-0004 P2201 R2225 0 /USB_OCD1 1 C2207 0.3V 100uF R2223 0.6V 1uF 10V /USB_OCD1 /USB_OCD2 USB_CTL2 USB_CTL1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.3V_NORMAL +3.1uF 0.1uF NC_2 NC_8 OUT_2 7 2 IN_1 7 21 R2213 100K OPT 120-ohm OUT_1 6 3 IN_2 NC_3 8 20 NC_7 C2221 C2219 C2223 0 R2207 OPT FLG 5 4 EN 10uF NC_4 NC_6 SCL2_3.

1uF 470 0. WHEN SERVICING IF IS EUROBBTV 2009.6V 50V 50V DTV/MNT_L_OUT EU 0 EU EU 0 B Q4111 OPT EU R4152 L4101 EU 2SC3052 BLM18PG121SN1D R4107 4.7K 4.1uF DTV_ATV_SELECT IC4101 16V EU EU EU EU C4119 NLASB3157DFT2G E R4135 C4118 D4101 ISA1530AC1 0.2uF 0.6K R4144 33K 6 9 PSC008-01 25V R4113 6 9 0 JK4100 SC1_R_IN 002:C6 +12V EU 1uF C4128 33pF 7 8 D4108 7 8 R4100 EU 5.6K R4143 5 10 16V SCART1_Rout_P 5 10 EU EU SCART1_Rout_N R4150 C4104 5.Manualslib.18 Downloaded from ESSENTIAL THAT ONLY www.6V OPT Selece = High ==> A = B1 RGB_IO OPT EU FIX-TER 16 SC1_FB Selece = Low ==> A = B0 R4122 R_OUT 22 15 SC1_R R4131 11 [GN]GND 0 RGB_GND D4103 R4111 10 14 OPT 30V R4104 EU 75 [GN]G R_GND 75 1% 13 OPT 9 [GN]C_DET 12 R4168 0 D2B_OUT EU 1% Audio Out Amp 8 G_OUT EU 11 [BL]B D2B_IN D4104 R4101 R4108 0 SC1_G EU 30V REC_8 EU_SCART [OPT] 7 10 30V R4128 75 D4112 EU [RD]R G_GND OPT 1% 0 9 R4146 IC4100 6 EU 1K LM324D 8 ID DTV/MNT_L_OUT [WH]L_IN SC1_ID EU OPT EU C4126 EU R4149 5 B_OUT D4111 EU C4123 7 SC1_B R4127 +12V OPT OPT 33K 1 14 [RD]R_IN 30V 15K R4130 10uF 6800pF 1 14 AUDIO_L_IN D4110 3. +5V_NORMAL +12V +3.7K R4174 1 12 HP_LOUT_N 0 C4136 1uF C 10V INL+ CPP R4175 2 11 1K HP_LOUT_P Q4117 B C4137 IC4102 C4144 2SC3052 SIDE_HP_MUTE 1uF TPA6132A2 2. ETC SUB BOARD I/F 41 .7K EU EU R4159 0 Q4106 R4151 EU E DTV/MNT_R_OUT 041:F3.041:G2 EU 12K 2SC3052 EU 1/16W 2K C 5% 1/16W EU C4101 C4108 RT1P141C-T112 EU EU B Q4110 D4100 1000pF EU 4700pF Q4109 SC_RE1 2SC3052 5.1uF 10K D4107 EU 16V 1K L4105 5.7K R300 OUTR G0 G1 HPVSS R4173 L4103 R4171 BG2012B080TF R4169 0 OPT OPT HP_ROUT C4141 1/16W C4145 2. CPN 4 EAN60724701 9 HP_ROUT_P 5 6 7 8 R4170 4.9K R4141 R4142 16V 50V 4 6 R4102 C4127 30V 68K 68K 75 33pF 2 13 [RD]MONO B_GND 5 OPT 1% 2 13 13 C4122 AUDIO_GND OPT EU R4176 4 33pF EU 10K EU PPJ-230-01 C4105 R4116 5.6K R4147 SCART1_Lout_P CN AUDIO_R_IN 1uF 4 11 2 EU R4103 4 11 AUDIO_R_OUT D4109 C4112 1 470K C4120 5.3V_NORMAL R4126 10K EU EU C4134 R4163 SCART1_DET R4129 0.com MANUFATURES SPECFIED PARTS BE USED FOR manuals search engine THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.1uF C EU Q4107 EU 2K B Q4108 SC_RE2 2SC3052 REC_8 For Frequency Response 2SC3052 1/16W R4155 1K E EARPHONE BLOCK +3.1uF 30V Q4104 16V 16V EU EU OPT SC1_CVBS_IN B SELECT B1 6 1 R6166 R4164 EU R4123 C4115 EU ATV_OUT C4113 EU EU CN 12 0 C 220pF Q4105 0 R4115 EU 47pF EU R4136 62 50V 50V C 2SC3052 47K EU VCC GND OPT R4133 C4117 5 2 AV_DET 22 390 B 47uF COM_GND 16V A B0 21 4 3 E DTV/MNT_V_OUT SYNC_IN EU EU 20 75 R4178 1% EU R4132 R4138 EU 390 0 19 SYNC_OUT EU R4112 Rf EU R4137 SYNC_GND2 D4106 75 C4114 Rg 18 R4134 15K D4102 30V 100uF Gain=1+Rf/Rg 180 SYNC_GND1 16V 17 5. FILRE AND ELECTRICAL SHOCK HAZARDS.6V 50V 50V EU R4154 DTV/MNT_R_OUT SCART1_MUTE 1K E OPT 3 1 EU C4130 EU EU R4153 2 0.6V C4116 OPT 0.6V 100pF EU OPT 50V EU 0.22uF 1uF Close to the IC 16V 10V OUTL SGND VDD +3.6K R4148 3 12 AUDIO_L_OUT 25V SCART1_Lout_N 3 12 JK4101 3 0 SC1_L_IN 5.1uF 5.041:G2 DTV/MNT_L_OUT EU 1/16W EU 5% C4100 C4107 R4156 D4105 EU 4700pF 1000pF 10K R4157 R4160 C 5.3V_NORMAL EN R4172 C4143 100K C4135 16 15 14 13 2.06.22uF 10V 16V THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.2uF 10V INR+ PGND 10V 3 10 E HP_ROUT_N C4138 1uF 10V INR.3V_NORMAL EARPHONE AMP L4102 10uH C4140 C4142 10uF 0.6V C4111 OPT OPT 470K R4177 OPT 100pF R4139 R4140 R4145 10K EU 50V 68K 68K EU 1K DTV/MNT_R_OUT EU [SCART2 PIN 8] C4121 33pF OPT C4124 10uF EU C4125 6800pF +12V L4100 16V BLM18PG121SN1D R4105 50V EU_SCART [OPT] 0 EU 041:F4.1uF 10V 16V R4119 L4104 0 BG2012B080TF HP_LOUT 1/16W C4146 C4139 0. HPVDD 4.2uF OPT 1uF 10V R4109 OPT 10V INL.

com ONLY MANUFATURES SPECFIED PARTS manuals search BE USED FOR engine 43 THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.6V 5 BCM BT MODULE R1898 0 BT_RESET 4 BCM BT MODULE 3 R1899 0 VREG_CTRL 2 BCM BT MODULE 1 12507WR-10L P1895 BCM BT MODULE THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.Manualslib. WHEN SERVICING IF IS Downloaded ESSENTIAL THAT from www.7K B OPT 500 2SC3052 BCM BT MODULE Q1800 E BCM BT MODULE 11 10 BCM BT MODULE C1899 22uF 9 10V R1896 27 BT_DM 8 D1899 BCM BT MODULE CDS3C05HDMI1 7 5. FILRE AND ELECTRICAL SHOCK HAZARDS.6V BCM BT MODULE R1897 27 BT_DP 6 D1898 CDS3C05HDMI1BCM BT MODULE 5. BLUETOOTH +3. .3V_NORMAL G BCM BT MODULE S BCM BT MODULE D C1108 BCM BT MODULE Q1801