You are on page 1of 14

Chapter Four 1

----------------------------------------------------------------------------------------------------------------------------------------

Mekelle University

Ethiopian Institute of Technology-Mekelle

School of Electrical and Computer Engineering

Microcontroller Programming and Interfacing


(ECEG-6602)
Lec/Tut/Lab=2/0/3=3

Chapter Four

8051-Assembly Language

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 1 | 14


4. The 8051 Microcontroller Assembly Language 2
----------------------------------------------------------------------------------------------------------------------------------------

4. The 8051 Microcontroller Assembly Language

An assembly language (or assembler language) is a low-level programming language for a


computer, or other programmable device, in which there is a very strong (generally one-to-one)
correspondence between the language and the architecture's machine code instructions. Each
assembly language is specific to a particular computer architecture, in contrast to most high-level
programming languages, which are generally portable across multiple architectures, but require
interpreting or compiling.

Assembly language is converted into executable machine code by a utility program referred to as
an assembler; the conversion process is referred to as assembly, or assembling the code. Assembly
language uses a mnemonic to represent each low-level machine instruction or operation. Typical
operations require one or more operands in order to form a complete instruction, and most
assemblers can therefore take labels, symbols and expressions as operands to represent addresses
and other constants, freeing the programmer from tedious manual calculations. Macro assemblers
include a macroinstruction facility so that (parameterized) assembly language text can be
represented by a name, and that name can be used to insert the expanded text into other code. Many
assemblers offer additional mechanisms to facilitate program development, to control the assembly
process, and to aid debugging.

Figure 4.1: Level of Programing Languages


--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 2 | 14


4. The 8051 Microcontroller Assembly Language 3
----------------------------------------------------------------------------------------------------------------------------------------

Hereunder is portrayed the general format of an assembly language programming:

[Label:] mnemonic [operands] [;comment]

Mnemonics assembly level instructions are called mnemonic like MOV R5, 34;

Operands on which the operation is performed.

Operator Performed on operands


Example:
Loop: MOV R1, #25H ; transfer 25H into R1

Label mnemonics operand comments

two instructions which are used to start and terminate program.

ORG this instruction indicate the origin of program ORG 3000H

means program starts from 3000H location.

this instruction hasnt take any memory space. It is used to show the
starting address of program.

END this instruction show the END of program or it is used to terminate


the program.

Instructions (statements) in assembly language are generally very simple, unlike those in high-
level languages. Generally, a mnemonic is a symbolic name for a single executable machine
language instruction (an opcode), and there is at least one opcode mnemonic defined for each
machine language instruction. Each instruction typically consists of an operation or opcode plus
zero or more operands. Most instructions refer to a single value, or a pair of values. Operands can
be immediate (value coded in the instruction itself), registers specified in the instruction or implied,
or the addresses of data located elsewhere in storage. This is determined by the underlying
processor architecture: the assembler merely reflects how this architecture works. Extended
mnemonics are often used to specify a combination of an opcode with a specific operand.
--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 3 | 14


4.1 8051 Instruction Set 4
----------------------------------------------------------------------------------------------------------------------------------------

Extended mnemonics are often used to support specialized uses of instructions, often for purposes
not obvious from the instruction name. For example, many CPU's do not have an explicit NOP
instruction, but do have instructions that can be used for the purpose. In 8086 CPUs the instruction
xchg ax,ax is used for nop, with nop being a pseudo-opcode to encode the instruction xchg
ax,ax. Some disassemblers recognize this and will decode the xchg ax,ax instruction as nop.

Steps of ASSEMBLY AND RUNNING 8051 PROGRAM comprises the steps depicted in figure 4.2.

Figure 4.2: Steps of Assembly Program Execution

4.1 8051 Instruction Set


For a precise control, the microcontrollers may operate under instructions. These instructions are
commands written for microcontroller and divided into various categories including arithmetic,

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 4 | 14


4.1 8051 Instruction Set 5
----------------------------------------------------------------------------------------------------------------------------------------

logic, data transfer, Boolean variables, and machine control instructions. Given are below some of
the instructions of 8051 Assembly Language.

ACALL: Absolute Call


ADD, ADDC: Add Accumulator (With Carry)
AJMP: Absolute Jump
ANL: Bitwise AND
CJNE: Compare and Jump if Not Equal
CLR: Clear Register
CPL: Complement Register
DA: Decimal Adjust
DEC: Decrement Register
DIV: Divide Accumulator by B
DJNZ: Decrement Register and Jump if Not Zero
INC: Increment Register
JB: Jump if Bit Set
JBC: Jump if Bit Set and Clear Bit
JC: Jump if Carry Set
JMP: Jump to Address
JNB: Jump if Bit Not Set
JNC: Jump if Carry Not Set
JNZ: Jump if Accumulator Not Zero
JZ: Jump if Accumulator Zero
LCALL: Long Call
LJMP: Long Jump
MOV: Move Memory
MOVC: Move Code Memory
MOVX: Move Extended Memory
MUL: Multiply Accumulator by B
NOP: No Operation
--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 5 | 14


4.2 Data Transfer Instructions 6
----------------------------------------------------------------------------------------------------------------------------------------

ORL: Bitwise OR
POP: Pop Value From Stack
PUSH: Push Value Onto Stack
RET: Return From Subroutine
RETI: Return From Interrupt
RL: Rotate Accumulator Left
RLC: Rotate Accumulator Left Through Carry
RR: Rotate Accumulator Right
RRC: Rotate Accumulator Right Through Carry
SETB: Set Bit
SJMP: Short Jump
SUBB: Subtract From Accumulator With Borrow
SWAP: Swap Accumulator Nibbles
XCH: Exchange Bytes
XCHD: Exchange Digits
XRL: Bitwise Exclusive OR
Undefined: Undefined Instruction

The instruction set of microcontroller 8051 can be divided into such groups as Data transfer
instructions, Data Processing Instructions (Arithmetic instructions, Logical Instructions /Boolean,
Bit manipulation instructions), and Program Flow/Control Instructions/jumps. Each group is
explained in details in what follows.

4.2 Data Transfer Instructions

These instructions are designed to perform data movement between registers, memory and ports
of the 8051 microcontroller. A typical example is the Mov instruction, which moves or transfers
data from one location to another.

MOV Destination, Source

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 6 | 14


4.3 Addressing Modes 7
----------------------------------------------------------------------------------------------------------------------------------------

Data movement in the internal RAM. This type of instruction is supported by virtually all forms
of addressing scheme: direct, indirect, and recording and immediate.

MOV A, P0; It moves data from port 0 to the Accumulator.


MOV R1, A ; It moves data from the Accumulator to register R1

MOVX: Data movement in the external RAM (XRAM). This type of motion only supports
indirect addressing, register 8bit by R0 or R1 and 16-bit register via the DPTR.

MOV DPTR,#2000H ;

MOVX A,@DPTR ;

MOVC: Allows movement of the accumulator ROM. By this statement can make the
manipulation or movement of tables from the program memory.

XCH: Swaps the contents of the accumulator and the internal RAM.

XCHD: Swaps the contents of the first 4 bits of the Accumulator with internal RAM.

PUSH and POP: To transfer data to or from the stack.

4.3 Addressing Modes


In 8051 microcontroller, there are many ways of addressing memory locations or registers or ports.
The commonest ones are described below briefly.

4.3.1. Direct Addressing (Dir)

In direct addressing, you specify the address to operate in absolute terms. For the family of 8051
microcontrollers, there are 256 available direct addresses, corresponding to both internal + RAM
Records SFR. Always, The OpCode is followed by a byte representing the address.

MOV A,30H ;
ADD A,31H ;

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 7 | 14


4.3.2. For Registration (Rn) 8
----------------------------------------------------------------------------------------------------------------------------------------

4.3.2. For Registration (Rn)

Rn: For the record addressing, the instruction code (OpCode) contains the registration information
to operate the selected register bank.

MOV R1, A

Example: OpCode of (MOV Rn, A) is F8H, in binary:

11111001

The last three bits identify the register on which it operates.

4.3.3. Indirect (@)

@: It specifies a register containing the address of the data to be operated. R0, R1 when accessing
the internal memory of 256 Bytes indirection. DPTR to access external memory 64K bytes.

MOV R0,#30H ;
MOV A,@R0 ;

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 8 | 14


4.3.2. For Registration (Rn) 9
----------------------------------------------------------------------------------------------------------------------------------------

Figure 4.3: Indirect Addressing

4.3.4. Implicit

The statement implicitly indicates the record on which to be operated.

INC A; A= (A)+1, it increments the accumulator

CPL A; A= (), it complements the Accumulator

4.3.5. Immediate (#)

#: The opcode is followed by a constant that represents the value that will be operated.

MOV A, #0; A=0


MOV R1, #123; R1=123

4.3.6. Indexed
Two registers are used to point to the address containing the data. The sum of the contents of DPTR
and the accumulator determines the direction of trade. This routing is limited to only two
instructions that move data from ROM to the accumulator.

MOVC A, @A+DPTR

Figure 4.5: Indexed Addressing

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 9 | 14


4.4 Data Processing (arithmetic and logic) 10
----------------------------------------------------------------------------------------------------------------------------------------

4.4 Data Processing (arithmetic and logic)

4.4.1 Arithmetic Instructions

Arithmetic instructions of these microcontrollers are very limited, can add, subtract, increment,
decrement and exceptionally has been integrated product and division of whole numbers.

ADD A, byte. Sum of 8 bits. Add contents of the accumulator with a byte whose address
indicated, the result will be stored in the accumulator.

MOV A, #3; A=3 it moves 3 to the accumulator

ADD A, R0; A= (A)+(R0) it adds the value of Register R0 to the Accumulator value

ADDC A, byte. Addition with Carry. Carry flags when sum is greater than 8 bits.

Example: Add two 16-bit integer variables that are at memory locations 30H and 32H. The result
should be stored in a third variable in memory location/position 34H.

MOV A, 30H; A<-(30H)

ADD A, 32H ; A<-(A)+(32H)


MOV 34H, A ; 34H<-(A)
MOV A, 31H ; A<-(31H)
ADDC A, 33H ; A<-(A)+(32H)
MOV 35H, A ; 35H<-(A)

The following figure shows an outline of the contents of memory to perform the addition of two
integers of 16 bits. It is assumed that the data of the sum (35FEH +00003 H) have been previously
established and are being studied in this example.

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 10 | 14


4.4.1 Arithmetic Instructions 11
----------------------------------------------------------------------------------------------------------------------------------------

Figure 4.4: Sum 16-bit integers in Assembly

SUBBED A byte: Subtract with Carry. Subtract the contents of a byte accumulator with the
address indicated, the result is in the tank.

MOV A, #5 ; A<-5
CLR C; C<-0
SUBB A, #03H ; A<-(A)-3

INC byte: Increase. Unit increases the contents of a byte (Acc, register, memory), with the address
indicated.

MOV R0, #30H; R0<-30H

INC @R0; ((R0)) <-((R0)) +1

DEC byte: Decrease. Decrease of one unit the contents of a byte (Acc, register, memory), with
the address indicated.

DEC R1; (R1)<-(R1)-1

DA A: Adjust decimal accumulator. This instruction performs the setting in BCD format (0-9)
nibbles of the accumulator (b0-b3 and least significant bits b4-b7 bits) the result of the sum with
the ADD or ADDC instruction. This instruction is used when working with digit 7-segment BCD
is necessary to work.
--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 11 | 14


4.4.2 Logical Instructions 12
----------------------------------------------------------------------------------------------------------------------------------------

MUL AB: Multiplication of 8 bits. Performs a multiplication of integers of 8 bits unsigned values
contained in the register A and B. The result is an integer of 16 bits, leaving the least significant
part in the accumulator and the most significant in the register B.

DIV AB: Division 8-bit integer. Performs integer division 8-bit unsigned accumulator between
the register B. The accumulator is the result (quotient), while the remainder of integer division
is in the register B.

4.4.2 Logical Instructions

Instructions Boolean logic for data processing.

ANL destination, origin: AND (AND) logic. It does logical operation between the source byte
and destination byte.

MOV A, #0F0H ; A<-F0H


ANL A, #10H ; A<-(A)

AND logic.

ORL destination, origin: OR (O) logic of bits. So it does logical operation OR between the source
byte and destination byte.

XRL destination, origin: XOR (exclusive OR) logic bits. So do it exclusive OR logical operation
between the source byte and destination byte.

Accumulator:

CLR A: A = 0, Removes the content of A

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 12 | 14


4.4.2 Logical Instructions 13
----------------------------------------------------------------------------------------------------------------------------------------

CPL A: A = A, Complement the accumulator.

SWAP A: A 3-0 <-> A 7-4, swap the nibbles of the accumulator.

Bit rotation:

RL A: Rotate to the left of the Accumulator.

RLC A: Rotate accumulator left through carry.

A. RR: clockwise rotation of the accumulator.

A. RRC: Rotate accumulator right through carry.

8051 microprocessor rotations Accumulator

4.4.3 Bit Manipulation Instructions:

CLR bit: Make Zero the specified bit.

SETB bit: Putting a specified bit.

CPL bit: Complement the bit indicated.

MOV Bit_destino, bit_Source. Transfer or move a bit.

ANL C, bit_Source. AND (Y) between the carry logic and the bit indicated.

ORL C, bit_Source. OR (O) and carry logic between the specified bit.

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 13 | 14


4.5 Program Flow Instructions 14
----------------------------------------------------------------------------------------------------------------------------------------

4.5 Program Flow Instructions

Unconditional branch instructions

LJMP addr16. 16bits unconditional jump (long jump).

AJMP addr11. 11bits unconditional jump (short hop).

SJMP rel: Salto unconditional on the current position.

If you use an assembler, jumps can be expressed in its generic term for unconditional jump JMP
and CALL to jump to subroutine, the software assembler will replace the jump for the specific
generic microprocessor suitable for each case.

JMP label: Salto generic unconditional.

In the following snippet of code in JMP SALTO1 an unconditional jump is made from the current
position to the line that is labeled SALTO1, the assembler will replace the label SALTO1 by the
value of the corresponding direction.

...
...
JMP SALTO1 ; Jumps to Salto1 if condition is met
...
...
SALTO1: MOV A,#05H
...

Jump to subroutine

Lcall addr16: 16bits Jump to subroutine (long jump).

ACALL addr11. Salto subroutine of 11 bits (short hop).

CALL label. Salto generic subroutine.

Indirect jump

JMP @ A + DPTR: Salto position indirectly resulting from the sum of the data contained in the
DPTR registers and accumulator.

--------------------------------------------------------------------

Compiled by Alem H (Assistant Professor, M.Sc. in Computer Engg) P a g e 14 | 14