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Carolina Albea

**To cite this version:
**

Carolina Albea. Control Design for Electronic Power Converters. Automatic. Institut National

Polytechnique de Grenoble - INPG; Universidad de Sevilla, 2010. English.

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https://tel.archives-ouvertes.fr/tel-00539077

Submitted on 24 Nov 2010

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abroad, or from public or private research centers. publics ou privés.

UNIVERSITE DE GRENOBLE

INSTITUT POLYTECHNIQUE DE GRENOBLE

No. attribué par la bibliothèque

THESE EN COTUTELLE INTERNATIONALE

pour obtenir le grade de

**DOCTEUR DE L’Université de Grenoble
**

délivré par l’Institut polytechnique de Grenoble

et

de L’Université de Sevilla (Espagne)

Spécialité: AUTOMATIQUE-PRODUCTIQUE

préparée au Département Automatique du GIPSA-lab

**dans le cadre de l’Ecole Doctorale
**

Electronique, Electrotechnique, Automatique, Traitement du Signal

et au laboratoire

Departamento de Ingenierı́a de Sistemas y Autimática

**présentée et soutenue publiquement
**

par

**Carolina ALBEA-SÁNCHEZ
**

le 27/09/2010

TITRE

**Control Design for Electronic Power Converters
**

DIRECTEURS DE THESE

**M. Carlos Canudas de Wit Directeur de Recherche CNRS
**

M. Francisco Gordillo Álvarez Professeur, Universidad de Sevilla

JURY

**M. Javier Aracil Santoja Professeur, Universidad de Sevilla, Président
**

M. Wilfrid Perruquetti Professeur, Ecole Centrale de Lille, Rapporteur

M. Enric Fossas Colet Professeur, Université Politècnica de Catalunya, Rapporteur

M. Laurent Fesquet Maitre de Conférence de l’INPG, Examinateur

M. Luis, Martinez Salamero Professeur, Université de Tarragona, Examinateur

PhD Thesis

Control Design for Electronic Power Converters

By

Carolina Albea Sánchez

Supervised by

Carlos Canudas de Wit and Francisco Gordillo

A mi familia y a Alexandre

.

. . . . . . . .1 Converters classification . . . 8 i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 DC-AC converter . . . . . . . 4 1. . . 6 1. . .3. . . .2. . . . 7 1. 2 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Introduction to power converters .Contents Aknowledgements vii Notation ix 1 Introduction 1 1. . . .5 AC-AC converter .1. . . . . . . . . . . . .2 DC-DC converters . . . . . . . . . . . . . . . . . .2 Controlling a DC-DC Vdd-hopping converters . 3 1. . . . . .2 DC-DC Vdd-Hopping converter . . . . . . . . . 7 1. . . . . .4 Thesis structure . 3 1. .1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1. .1. . . . . . . . . . .4 AC-DC converter . . . . . . 4 1. . . . . . .1 Boost inverter . . . .2.1 Controlling a boost inverter . . . . . . . . . .3. . . . .1. . . . . . . . . . . . . . . . . . . . 1 1. .3 Main objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1. . . . . . . . . . . . . . . .2 Research motivation . .

. . . . . . . . . . . . . . . . . . 33 3. . . . . . . . . . . . . . . . 29 3. . . . . . . . . . . . . . . . .1 Control law . . . . . . . . . . .3 Synchronization problem . . 12 2.3. .2 Adaptive control . . . . . . . . . . . . . . . . . . . . . . . . . 33 3. 21 3 Control of the DC-AC boost converter by energy shaping 23 3. . . . .2. . . . . . . . . . .1 Normalized average model . . .4 Simulation results . 38 3. . . . . . . . . . . . . .1 System description . . . . 16 2. . . . . . . .2. . . .2. . .1 Adaptation law . . . . . . . . . . . . . . . . . . . .2 Control problem objectives . . . . . . . . . . . . . . . . . . . . . .1 Design of an adaptive control . . . . . . . .2. . . .3. . . . . . .2. . . . . . . 39 4 Adaptive control 41 4. . . . . . . . .4 Conclusion . . . . . . . . . . . . . . . . . . . .2 Synchronization with the electrical grid . . . .2. . . . . . . . .I Controlling a DC-AC Boost Converter 9 2 Introduction 11 2. . .1. . . . . . . . . . . . . . . . . . . . . . . .2 Controller design . . . . . . . . . . . . . . . . . . .2 Energy shaping control for generation of oscillations . . . . . . . . . . . . . . . 13 2. . . . . . . . . . . . .1. . . . . . . . .3 Control law for the full system . . . . . . . .3 Attraction domain . . 25 3. 43 . . . 23 3. . . . . . . 17 2. . . . . 27 3. . .1 Boost inverter synchronization . . . . . .1 Boost inverter . . . . . . . . . . . . . .1 Approach overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2. 20 2. . . . . . . . . . . . . . . . . . . . 30 3. . . . . . . 41 4. . . 25 3. . . . . . . . . . . . . . . . . . . .

2. 45 4. . . . . . . . .2. . . . .2. . 52 4. . . . . . . . .2 Stability considerations of the full closed-loop system . .2. . 43 4. . . . . . . . . . . . .3 Non-linear control application to Vdd-Hopping DC-DC converter . . . . . . . . .2. . .1 Optimization of the energy consumption in SoCs . . . . 47 4. . . . . . . . .3 Application to the boost inverter . .2 Error equation . . . . . . . . . . . . . . . . . . . . 46 4. . . . . . . . . . . . . . . . . . . . . . . .3 Conclusions . . . . . . . . 59 5. . . . . . .2 Closed-loop system . . . . . . . . . . . .4 Conclusions .2 Vdd-Hopping DC-DC converter . . . . . . . .2. . . . . . . . . . . . . . . . . .1 Sum of squares optimization . . . . . . . . . . . . .1. . . . . . 44 4. . . . . . . . .6 Simulations . . . . . . . . . . . . . . . . 52 5 Estimation of the attraction domain 57 5. . . . . 4. .2. . . . . . . 63 5. . . 58 5. . . . 45 4. . . . . . . . . . . . 74 .1 Problem statement . . . . . . 49 4. . . . . . . . . . . . . 72 6. . . . . 65 II Controlling a DC-DC Vdd-Hopping converter 67 6 Introduction 69 6. . . . . . . . . . . . . 49 4. . . .3 Stability properties . .1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 6. . . . . . . . . . . . . . . . .5 Boundary layer fast subsystem . . . . . . . . . . . . . . . .2 An approach of estimation of the attraction domain. . . . .3 Singular perturbation form . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 5.1 Tuned system . . . . . . .4 Slow sub-system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . .4. . . . . . . . .3.3. . .3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2. .4 Controller No. . . . . 86 7. . .1 Optimal voltage reference computation . . 82 7. . . . . . . . . . . . 1: linear controller . . . . . . . . 110 . . . . . . . . . . . . . . . . . . .3 Performance evaluation . . 97 7. 95 7. . . . . . 89 7.1 Control proposed in [99] . . . . .4 Advanced energy-aware controller . . . . . .2 Energy-aware controller . . . . . . .3. . . . . . 94 7. . . . . . . . . . .4 Advanced Lyapunov’s controller . . . . . . . . 82 7. . . 103 7. . . . . .1 High-performance controllers . . . . . 106 8 Energy-aware controller for the Vdd-Hopping converter 109 8. .3 Approximate stability analysis for the energy-aware controller . . . . . . . . .3: Lyapunov-based design . . . .3 Controller No. . . . . . . . 98 7. . 93 7. . . . . . . .2 Control laws . . . . . . . . . . . 76 6. . . . . .2 Adaptive feedback control design . .2 Controller No. . . . . . . . . . .2. . . . . . . . . . . . . .3. . . . . . . 77 6. . . . . . . . . 90 7. . . . .1 Mathematical model for control design . . . . . . . 75 6. . . . . 104 7. . . . . . . .5 Simulation of the advanced Lyapunov’s controller . . .2 Summary .6 Conclusion . . . .2. . . . . .1 Energy evaluation . . . . . . . . . . . . . . .1 Mathematical model of Vdd-Hopping mechanism . . .2: feedback linearization . . . . . . . . . 85 7. . . . 78 7 High-performance control for the DC-DC Vdd-Hopping converter 81 7. . . . . . .2. . . . . . . . . . . . . . . . . . 6. . . . . 85 7. . . . . . . . . . . . . . . . . . . .3. . . . . . . . . . . . .4. . . . . . . . . . . . . . . . .1. . . . . . . . . . . . . . . . . .1 Control design without current-peak managing .

. . . . . . . . . . . . . . . . . 133 10. . . . 140 . . . . . . . . . . 133 10. . . . . 134 10. . . . . . . .1 Descriptor model transformation . . . . . . . . . . . . . . . . . . . . . . 134 10. . .3 Control design . . 136 10. . . . . . . . . . . 118 9. .1. . . . . . . . . . . .2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 9. . . . . . . . . . . . . . . . . . . . . 127 10 Sub-optimal control considering delays and parameter uncertainties 129 10. . .2 State-space representation . . 135 10. . . . . . 140 10. . .2 Stability with control (8. 115 9 Approximate stability analysis of the DC-DC Vdd-Hopping converter 117 9. . . . . . . . . . . . . . . . .3 Conclusions . . .1) . . . . . . . . . .1 Problem statement . . . . . . . . . . . . . . . . . . .2 Uncertain PMOS resistance . . . . .1 Time discretization . . . . . . . . . . . . . . . . . . .2. . . .2. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Condition for state-space representation . 132 10. . 8. . . . . . . . . .3 Conclusions . . . . . . . . . . . . . . . . 140 10. . . .5 Simulation Results . . . . . . .1 Uncertain clock frequency. . . . . . . . . . . . . . . . . . 139 10. .2. . . . . . . .1. . . . . . .2 Simulation of ENARC controller in the Vdd-Hopping system .1. . . . . . . . . . . . .6) . . . . . . . . . . . 110 8. . . .1 Alternative representation for the saturated control (10.3 Robust control tuning . 137 10.2 Control redesign with current-peak managing . . . . . . . . . . 113 8. . . . . . . . . . . . . . . . . . . . . . . . .2) and the error equation (10. . . . . . . . 112 8. . .1 Stability with control (7. . . .4 Sub-optimal control result . . .2. . . . . .2 H∞ control design . . . . . .5. .10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 10.5. . . . . . . . .3 Stability and disturbance rejection problem . . . . . . . . .

. . 10. .5. . . . . . . . . . . . . . . . . . . .7 Conclusions . 140 10. . . . . . .3 Uncertain load parameter . . . . . . . . 143 10. . . . . . . . . . . . . . . 150 List of Publications 152 . . . . . . . . . . . . .2 Future work . . . . . . . . . . . . . .6 Evaluation of the tuning methods . . . . . . . . . . . . . . . . . . . . 145 12 Conclusions and future work 147 12. . . . . . . . . 147 12. . . . . . . . . . . . . . . . .1 Conclusions and contribution summary . . . . . . . . . . . .

Vicente. at the ‘Universidad de Sevilla’. Amparo and David in the ‘Departmento de In- genı́a de Sistemas y Automática’.Aknowledgements The period of this thesis brought me valuable new experiences in both a scientific and per- sonal perspective. Paco Salas. and the Professor Enric Fossas Colet at the ‘Universit Politècnica de Catalunya ’ (Spain). Pablo. Lara. Manolo Lopez. Brandon. Riccardo. vii . and the Director of Research Carlos Canudas de Wit at the CNRS (France). Paco Rubio. During this period. Isa. Firstly. the Professor Francisco Gordillo at the ‘Universidad de Sevilla’ (Spain). Denis. Their encouraging and personal guidance have provided a good background for the present thesis. Sylvain. This thesis would not have been possible without the constant support and motivation of many people. in the NeCS team from the ‘Département d’Automatique de GIPSA-Lab’ at the ‘Institut Polytechnique de Grenoble’ and at the ‘Insti- tut National de Recherche en Informatique et en Automatique de Grenoble’ (France). Fabio. I would like to express my sincere gratitude to my two supervisors. from PhD students. Wenjuan. Their wide knowledge and their experience have been of great value for me. I am also grateful the Professor Javier Aracil at the ‘Universidad de Sevilla’ (Spain). Manolo Gil. Gabriel. Mirko. I have collaborated with many colleagues. Nicolas. teach- ers to professors for whom I have great regard. John-Jairo. Manolo Vargas. Asun. Javier. for accepting to review my work as well as for participating in my jury committee. Katerina. Many thanks to the Professor Wildfrid Perruquetti at the ‘l’Ecole Central de Lille’ (France). Their con- structive suggestions on the thesis are really appreciated for me. Especially to Alicia. for their commitment to take part in my jury committee. I am grateful that in the midst of their activities. Alejandro. they accepted these tasks. Antonio. Carlos Vivas. and I wish to extend my warmest thanks to all those who have helped me from a professional and personal point of view. Emilie. the Maitre de Conference Laurent Fesquet at the ‘Institut Polytechnique de Grenoble’ (France) and the Professor Luis Martinez Salamero at the ‘Université de Tarragona’ (Spain). Eduardo. Fernando. Guilherme. in the Nonlinear Control group from the ‘Departmento de Ingenı́a de Sistemas y Automática’. Manolo Ruiz. Jose Ángel. And thanks to Luc. Jörn.

Johana. Marie-Therese. (Virginie. for their consideration of my research abroad. and from France. entertainment and attention. Manolo. Luis. for helping me through difficult periods. (Manolo. Eduardo. Without their encouragement and understanding it would have been impossible for me to finish this work. Myr- iam. Silvia) and France. I wish to thank my best friends from Spain. Sonia. Patricia. compañeros de ISF. Nicolas and Olivier in the ‘Département d’Automatique de GIPSA-Lab’ at the ‘lInstitut Polytechnique de Grenoble’ and at the ‘Institut National de Recherche en Infor- matique et en Automatique de Grenoble’. I offer my regards and blessings to all of those who supported me in any respect during the completion of the project. and for providing to me their friendship. Mikel. Maribel. Marie-Rose. JuanMa. And my deep lovely thanks to Alexandre for its emotional supports. Domingo and my father Pepı́n. .Gregory. Antonio. My warm special thanks to my family. Daniel. my sister Myrian. I am grateful to the secretaries and librarians in the automatic departments from Spain. Lastly. Olga. especially to my mother Marilo. Elodie) for helping me to run smoothly and for assisting me in many different ways.

defined as < (>) less (greater) than ≤ (≥) less (greater) than or equal to ≪ (≫) much less (greater) than ± plus and minus ∀ for all ∈ belongs to ⊂ subset of ∩ intersected with : such as → tend to xT the transpose of a vector x ∞ infinity ∑ summation |x| the absolute value of x kxk the norm of a vector x kxk p the p-norm of a vector x [a.Notation The following symbols and conventions will be used consistently throughout the thesis.e.. N} the set from 1 to N xk discrete variable q−1 discrete-time delay or parameter.. xk−1 = q−1 xk Rn the n-dimensional Euclidean space R+ the semi-positive-dimensional Euclidean space N the set of natural numbers Z the set of integer numbers ix . b] closed interval from a to b {1. .. ≡ identically equal 6 ≡ not identically equal ≈ approximately equal . 2. i..

ζ + − ζ − the value of ζ in two consecutive sampling time L2 is the space of {x} with the norm: kxk22 .. ∑∞ k=0 x x < ∞ T H∞ H-infinite method designation of the end of definition designation of the end of proof [xx] see reference number xx in the bibliography .. y) metric space In n-dimensional identity matrix diag[a1 . C o is the convex hull of a set round(x) is the nearest integer to x ζ+ denotes ζ (k + 1) ζ− denotes ζ (k) ∆ζ . M) the distance from a point p to a set M limx→c f (x) limit of f (x) as x approaches c M if x > M satM m (x) is defined as x if m ≤ x ≤ M m if x < m.. . an] a diagonal matrix with diagonal elements a1 to an O(·) order of magnitude notation f : S1 → S2 a function f mapping a set S1 into a set S2 ∂f ∂x the Jacobian matrix ẏ the first derivative of y with respect to time d dt the first derivative of y with respect to time λmin(P) the minimum eigenvalue of symmetric matrix P P>0 a positive definite matrix P≥ a positive semidefinite matrix P e neperian number s the Laplace variable sign sign function max maximum min minimum exp exponential function sin sine cos cosine dist(p.Re z the real part of a complex variable z (x.

Acronyms AC Alterning current BVP Boundary Value Problem DC Direct current DVS Dynamic Voltage Scaling ENARC ENergy Aware Controller GALS Globally-Asynchronous and Locally Synchronous Systems HPF High Pass Filter IVP Initial Value Problem LDVS Local Dynamic Voltage Scaling LMI Linear Matrix Inequalities LPF Low Pass Filter PC Personal Computer PHC PHase Controller PI Proportional-Integral PLL Phase-Lock Loop PMOS P-channel Metal-Oxide-Semiconductor field-effect transistor PSS Power Supply Selector QoS Quality of Service SDP Semidefinite Program SMPC Switched-Mode Power Converter SoC System on Chip SOS Sum Of Squares THD Total Harmonic Distortion VLSI Very Large Scaling Integration VHDL-AMS Verilog Hardware Description Language-Analog and Mixed-Signal .

.

Among all electronic converters. and condition- ing of electric power. in electric power transmission systems. to megawatts. A much greater emphasis is required on achieving high-power efficiency in low-power level electronic technology.g. Research have been focused on developing electronic circuits that can be employed as switches. Firstly. the most common technology is switched-mode power converters (SMPC) [118]. 100]. This switched-mode conversion has a particular interest due to the fact that it can switch at high frequency in a very efficient way. by stor- ing the input energy temporarily and then releasing that energy to the output at a different voltage. for power efficiency reasons. Converters are used in these circuits in order to change the supply voltage in the blocks of the System on Chips (SoCs) according to performance requirements. as the Vdd-hopping converter [98]. They convert the voltage input to another voltage signal. secondly. mobile phone.1 Introduction to power converters Power converters are electronic circuits associated to the conversion. e. Electronic devices and control circuit must be highly robust in order to achieve a high useful life. Reliability of the power converters become a key industrial focus.Chapter 1 Introduction 1. control. because of the cost of energy dissipated that it can generate. approximating ideal closed or open switches. for example. because of the economic and environmental value of wasted power and. A special accent must be set on the total efficiency of the power electronic circuits. Even a small improvement in converter power efficiency translates to improved profitability of the investment in the electronic market [33. The power range can be from milliwatts. since few low-power circuits can tolerate a power efficiency less than 85%. 1 . Power is controlled (even modified) by controlling the timing that the electronic switches are “on” and “off”.

1. They have recently aroused the interest in the current market due to its wide range of appli- cability. Another sort of classification may be performed according to the size of the output signal obtained from the input signal. • DC to AC. it is known as step-up [2]. some important way to classify the power converters are described. they can be line frequency converters (naturally commutated converters) or high-frequency switching (forced-commutated converters). and if it obtains a larger signal. converters may be of low. 50Hz or 60HZ).1 Converters classification Power converters control the flow of power between two systems by changing the character of electrical energy: from direct current to alternating current. if the converter accomplishes a lower output signal it is well known as step-down. Depending on the character of the input source. The most common classification of power conversion systems is based on the waveform of the input and output signals.2 DC-DC converters DC-DC converters are electronic circuits that change the DC operating voltage or current. either to make a state of the art. Introduction to power converters 1. 79. • AC to DC. the devices within converters can be switched in different ways [72. or in some other way. 100].1. in the case whether they are alternating current (AC) or direct current (DC) [33]. If the devices switch at the line frequency (normally. they are designed in order to transfer power from the input to the output . thus: • DC to DC. Transformer.2 1. It is only desired to understand some properties of these kind of circuits. 1. • AC to AC. because it is not the purpose of this thesis. Normally. The aim of this section is not to make a rigorous converter classification. Rectifier. At the same time. from one voltage level to another voltage. Moreover. Inverter. Here.1. they may be voltage-source converters or current-source converters. medium or high voltage and/or current level.

in the case of switches topologies. being very useful to develop new converter topologies for other applications.4 AC-DC converter The process that converts AC to DC is known as rectification. to design a suitable control law currently is a subject of much research [22. 89. 1. lower or even negative) or battery. They have a particular interest in low-power circuits. hence. This sort of technology are composed of many sub-circuits that require an own voltage level from an external supply (higher. DC-DC con- verters have a special role in these kind of systems. The full-wave rectification can convert the whole of the input waveform to achieve the constant output signal. It becomes more efficient [59. that it is not useful for power transfer. can obtain a certain amplitude and fre- quency of the AC voltage and/or current without using normally an intermediate DC stage. Therefore. 107]. these converters are also called rectifier. Therefore. as cellular phone and personal com- puters (PCs). or commonly named inverters.Chapter 1. 136]. These kind of circuits require an efficient control for the switches devices that. the power moving may be also bidirectional. since they can be employed to change the voltage from a partial lowered battery voltage thereby. The rectification can be half-wave or full-wave. . can be quite complex due to system structure. 1. only one half of the input waveform can be employed to reach the desired output. The main idea of DVS is to vary the supply voltage in order to consume a minimal amount of energy. 137].1. they are SMPCs. An electronic oscillator is just an electric circuit that produces a repetitive signal. In the first case (half-wave rectification). This electrical device is a power electronic oscillator [118]. This is based on the Dynamic Voltage Scaling technic (DVS) [27. It is clear. only this half AC wave (positive or negative) is converted. they are used in power supplies and detector of radio signals. Among others applications. Generally. The efficiency will depend of the kind of application. Introduction 3 in one direction. This fact improves the power efficiency and saves space in spite of using multiple batteries to accomplish the same voltage level [82]. in many occasions. as a sine-wave output signal.3 DC-AC converter DC-AC converters.1. as can be an inverter topology [25]. However.

1 Boost inverter As was said before. the boost inverter [25]. two DC-DC boost converters are connected with a load between them. On this way. this thesis is focused on providing a control solution for two converters topologies. the buck-boost inverter [90].2. computers. on designing control mechanisms that accomplishes the converter objectives. and their topologies are derived from coupling one or more basic switch topologies. 1. among all variety of converters. it can be found the boost- buck inverter [95]. In this case. the buck inverter [127].4 1. appliances. and secondly.5 AC-AC converter AC-AC converters are employed to transform an AC input signal to another AC output signal with an arbitrary amplitude. 141]. the frequency can be changed as well. e. That is why. This current research is specially focused on finding highly-efficient converter topolo- gies for every system application and. a DC-DC converter for low power application. the supply voltage within calcul node of a SoCs [41.1. Among them. The inverters are generally SMPCs. vehicles. Tackling the control problem in detail for every converter is out of the scope of a thesis.2.g. This is mainly caused by their broad applicability domain that includes battery-operating portable equipment. uninterruptible power supplies. Its interest is due to its step-up property. which is achieved through a signal stage. telecommunication systems and much more. The converters that will be dealt with are: firstly. Likewise. The efficiency of these kind of systems depends on the type of circuit employed. depending on the converter complexity. 1. inverters are devices that obtain a current output signal capables from passing through zero. thus it has a bidirectional current [25]. The first part of this thesis is focused on a boost inverter. the speed of a motor. industrial electronic equipment. Research motivation 1.2 Research motivation A lot of research has recently been focused on converters due to the increasing deal of in- terest in power electronics. . the temperature of an oven. one or more electrical parameters can be regulated with a high reliability and efficiency. a switch inverter topology.. It is clear that a higher power density and reliability will be obtained with a conversion in one single stage [139]. the supply voltage of an appliance. which have some interesting properties and appli- cations.

boost converters [36]. 153]. 106. Hence its name of ‘DC-DC Vdd-Hopping converter’. 143. By employing DC-DC converters based on power-saving. being the control objective a limit cycle.58]. a novel control strategy based on energy shaping for generation of oscillations is employed [16. In low-power applications where a high-efficiency is required. For this. 142] converters and charge pump [125]. to extend battery life has a particular role. Not only the voltage ampli- tude must be controlled.2. de- livering two small voltage levels according to the optimum Vdd required for every perfor- mance [75. Numerous DC-DC converters employed for this aim have been proposed over the years to increase the power efficiency of an SoCs. while converters may decrease conduction losses. buck-boost [125. Therefore. However. but the phase of both signal must also be controlled to achieve the specified output voltage. This method is expired in scaling the voltage supply Vdd in a discrete way. 149]. thereby extending battery life. Several control laws have been designed for this converter from other authors [25. this technique replaces the continuous adjustable voltage. applying different control strategies. especially in battery-operated devices such as cellular phones and personal computers. it is a very simple system.Chapter 1. ad- ditional losses can be added if switched devices are employed. This converter is employed in a French gouvernement project. In this thesis. a discrete DC-DC converter was proposed based on the ‘Vdd-Hopping’ tech- nique. in order to control the two output voltages of each DC-DC boost converter. Introduction 5 In this system. 126. 1. power efficiency in SoCs can be significantly increased. the demand for high efficiency DC-DC converters is increasing dramatically. In SoCs. so that it reaches a high-efficiency and reduced size. with a very ambitious objective: ‘to reduce the size of the SoCs to 32nm’.2 DC-DC Vdd-Hopping converter The second part of the thesis is focused on a DC-DC converter employed in low-power applications. four switches have to be controlled by two control signals. just to two set-points [83]. This is the DVS idea mentioned before. 128]. As mentioned. becoming easily controllable [55]. The most commonly used topologies in DC-DC converters in low-power electronics are: continuous buck con- verters [119. Likewise. among others. a new technology must be . other different topologies far from switched-mode are employed. In [98]. The goal of these efficiency DC-DC converters is to adapt dynami- cally the supply voltage of the chip according to the required performance level. The novelty of this method is that it does not need to track any reference signal to achieve an oscillatory character in the output signal.

3. For instance. the input sources.6 1. Here. from a 1st -order model in the DC-DC converter to a 4th -order.3 Main objectives The two selected converters have different natures and applications. and the DC-DC converter has a topology far from the common structures. Main objectives Converter Power level Conversion Scales Model order Boost Inverter More suitable DC-AC normal 4th for medium and high power Vdd-Hopping Converter Low power DC-DC micro. . since the currently technology applied to 45nm can not be employed for physical reasons. the level of the output signal. The boost inverter normally is applied to medium and high power level for normal scales.or forced-commuted characteristic. the control may take a particular role since. as for its work context as for its different characteris- tics. The DC-AC converter is based on the switched-mode classical topology. it has to achieve the highest efficiency (among other goals) to achieve the global project objective. and DC-to-AC. or 1st nano-scales Table 1. The complexity of the systems are quite different. a suitable control law can achieve the equilibrium and the demanded requirements. They covers a wide range of the power converter domain. as well. Table 1. In fact. among others.1 summarizes these differences. and DC-DC Vdd-hopping converter is used in low-power technology for micro-scales or nano-scales. These two converter applications. Likewise. conversions are DC-to-DC. as is the different natural. 1. and hence. That does not mean that these two applications completely cover all power converter domain. as is the boost inverter. have some different control objectives. they may have different control objectives.1: Main differences between boost inverter and Vdd-Hopping converter developed. there are other features that have not been taken into account.

the control problem of the Vdd-Hopping converter in this thesis comes directly demanded by the industry. a control system guarantees a stable and robust behav- ior from an initial condition. And. the control law must be designed taken these objectives into account.g. This converter is particularly interesting because it does not only allow to generate an alternating current.minalogic.2 Controlling a DC-DC Vdd-hopping converters The second application deals with the control of a discrete DC-DC Vdd-Hooping converter. in addition. it has a non-minimum phase. robustness with respect to parameter uncertainties and robustness with respect to delays due to synchronization and computation issues [45]. achieving certain required features as: high-efficiency. for instance. to design a control law focused on achieving an optimal energy- efficiency may be an attractive control problem in order to reach this objective. in low- power technology. 1. it has a 1st -order and its control objective is an equilibrium. Concretely. Nevertheless.com/ . It has a high efficiency due to its switching character. it is included in a French national project called ARAVIS. low computational cost. Due to all the mentioned boost inverter characteristics. for which the system variables tend to the desired limit cycles when the control law before is applied to the boost inverter. Likewise. Introduction 7 1. it has nice properties. but it can also obtain an output voltage larger than the input signal. 1 http://www. the desired behavior is not an equilibrium point but a limit cycle. Indeed. the system has to accomplish right performance not only for known loads.1 Controlling a boost inverter The first application is focused on controlling an SMPC boost inverter. In addition. small current peaks and reduced space) to achieve a certain objective.Chapter 1. stability. Another important aim is to estimate a set of initial voltage and current values. with the particularity that no external reference is applied to the system. This is a low-power converter with a high-efficiency. but also the stability of it. this level of efficiency may not become enough if certain requirements are demanded (e. In this way. 4th -order model. The main control objective of this converter is to guarantee that the system reaches the desired equilibrium point. Furthermore.3.3. high energy-efficiency. If all these objectives are achieved. Nevertheless. but also for unknown loads. which is within an estimated attraction region. sponsored by the global competitive cluster Minalogic1. For this. the main objective is to design a control law that guarantees not only the convergence to the desired limit cycle. the system is autonomous in the sense that no reference signals are needed.

which is solved by means of an adaptation mechanism design. as is noted above. but it is shown that the behavior is not acceptable due to a lack of synchronization. proposing some Linear Matrix Inequalities (LMIs) developed from Lyapunov Krasovskii method. Likewise. optimal control theory as well as adap- tation methods are applied. Therefore. the control objectives required for this DC-DC converter in the ARAVIS project are defined. a set of controllers are presented and dis- cussed. is composed of two parts. In Chapter 9. It is employed to provide an estimated attraction domain for the boost inverter. a rigorous stability analysis is developed for the closed-loop system with this last controller. Chapter 10 presents an optimal tuning mech- anism for the control constants in order to deal with delays and parameter uncertainties. For this. This method deals with control and state constraints. In Chapter 6. Nevertheless. Likewise. its implementation is not simple. Chapter 4 deals with the unknown-load case. a summary of the ARAVIS project work context. the objectives are specified in details.4 Thesis structure This thesis. In Chapter 7. it has an important drawback. a controller is developed in order to achieve the control objectives. is performed. This proposed control solution is developed from the simplest control implementation of the set of controllers presented in Chapter 7. just as a particular solution is proposed in order to resolve the raised problem. A stability analysis for the full-system is also studied by using singular perturbation analysis. The second part of the thesis is focused on controlling the DC-DC Vdd-Hopping con- verter. Thesis structure 1. Conclusions are drawn in Chapter 11. Chapter 5 is devoted to develop a method of estimating an attraction domain.8 1.4. another controller is de- veloped in Chapter 8. This controller presents good properties for the project. In Chapter 2. The first part deals with controlling the boost inverter. Part I covers Chapters 2 to 5 while Part II covers Chapter 6 to 10. the model of the double boost converter (boost inverter) is presented. From the control solution that offers the best performance. This development copes with resolving a H∞ problem. a phase controller is added to achieve the synchronization of an isolated boost inverter as well as the synchronization of the boost inverter with a pre-specified signal. Chap- ter 3 shows the general idea of producing oscillating behavior by means of the generation of a limit cycle through energy shaping. This idea yields a controller for the boost inverter. . Next. where this research is included. thus it is not suitable in the ARAVIS project.

Part I Controlling a DC-AC Boost Converter 9 .

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The switching effect is achieved by transistors. Buck-boost converter. 2. electrical appliance). which can be recovered in the discharge phase [43. telecommunication equip- ment) to personal applications (PCs. 118]. since it directly affects the battery lifetime [42]. 4. with other differ- ent configuration. This approach is also used in alternating current (AC) applications. from in- dustrial applications (spacecraft power systems. This rate of energy is controlled by a duty cycle1 to minimize the dissipated energy. Buck converter. which dissipates little power when it is outside of its active region. Its main characteristic is that it inverts the polarity of the voltage. office equipment. This action help to limit the otherwise high peak current. 11 . 3. It can be achieved using ‘switched-mode’. transferring a rate of energy from the input to the output. Moreover. SMPCs have an inductor. DC motor drives. It is a step-down: the output voltage is lower than the input voltage.Chapter 2 Introduction DC-DC power converters have a very large presence in all kind of electronic circuits. A switched-mode power converter (SMPC) is characterized by rapidly switching on and off some devices. whose main function is to limit the current slew rate through the power switch. These systems provide a regulated DC voltage level (Vo ) from an unregulated DC voltage level (Vin ). 1 Duty cycle is the fraction of time that a system is operated. In addition. the inductor stores the energy. It has the same features that a buck-boost converter. High efficiency is the most important requirement for DC-DC converters in a wide range of load power. It can be a step-down or a step-up. Cuk converter. Boost converter. The basic components of the switching circuit can be rearranged to form a: 1. It is a step-up: the output voltage is larger than the input voltage.

As side effect. The solar cells can charge a battery up with a DC voltage of 48V . 100]. However. 2. It can be a step-down or a step-up. Figure 2. Its structure allows to isolate as well as to increase the voltage. In applications that require a boosting output.. In [46. 48]. this problem is solved by using two-stages. Hence. Moreover. a new inverter was proposed composed of two boost converter. by oneself. but it does not invert the voltage polarity. 29]. This inverter has as main advantage that it generates an AC output voltage from a lower DC voltage in a single stage. One-stage to change the signal from DC to AC. there is a proposition of using this boost circuit as a way to convert DC volt- age into an oscillating voltage. some topologies have been proposed in order to obtain the alternating current condition. The boost inverter may be used in diverse applications.12 2. 147]. These nice properties are only achieved with a suitable controller.e. it has a higher efficiency and a better signal quality with respect to the traditional buck inverters [126.1 Boost inverter A boost circuit is usually employed as a DC-DC converter. It is known as boost inverter. a standard domestic AC power is required as power supply [15. and the other stage. When they are used in domestic installations.1. it is a voltage elevator. SEPIC converter. Therefore. From these topologies other converters can be obtained [96. Never- theless. this kind of configurations obtain an AC output voltage lower in amplitude than the input voltage [90]. 4]. For this. it ensures that the power conversion is done with reduced energy losses [3. A buck or boost topology. In [25]. since the output current cannot change its sign. Traditionally. an inverter is yielded by duplicating the boost circuit [25]. to design an appropriate control law has an important relevance for these kind of circuits. Physical rea- sons prevent the output current signal from passing through zero. being especially interesting be- cause it generates an output voltage larger than its input voltage.1 represents a domestic photovoltaic installation. . DC-AC converters (or inverters) are based on the buck topology. i. as for example in photovoltaic system market. Hence. a boost inverter provides in these kind of applications a better benefit. These topologies have the drawback of needing more space and dissipating more energy since they use more components. can not achieve alternating current. Boost inverter 5. alternating current cannot be generated with this converter. to raise the amplitude [121].

a part of the boost inverter is replaced by a constant voltage source as is shown in Fig. each part does not act as a DC-DC converter. 2. The circuit implementation is shown in Fig.1 System description Now. having a bidirectional current (see Fig.1. to maximize the voltage excur- sion across the load. to generate an oscillatory signal without bias is possible. in the boost inverter. 2. some assumptions about the boost inverter are presented. so that each source generates a unipolar voltage. The boost inverter is made up of two DC-DC converters2 and a load connected differ- entially across them. Assume that: 2 Throughout this part of the thesis. 2. Once the desired results are obtained. Voltages v1 and v2 should present a phase shift equal to 180◦ . 2. In this way.1: Domestic photovoltaic installation.Chapter 2. it should be taken into account that.2).3.4. In order to simplify the analysis. Nevertheless. Note that. . each part of the boost inverter will be referred as ‘boost DC-DC con- verter’ since each part is a normal boost converter that is commonly used as a DC-DC converter. they are extrap- olated to the full inverter. Introduction 13 PHOTOVOLTAIC ARRAY DC 48V BOOST INVERTER AC 220Vrms 50Hz ELECTRICAL GRID AC 220Vrms 50Hz Figure 2. Each converter produces a DC-biased sine wave output. this replacement shows more clearly the bidirectional current of each boost DC-DC converter. v1 and v2 .

. + Vo − Q2 R Q4 + L1 L2 + v1 C1 C2 v2 − − Q1 Vin Q3 Figure 2.4: Boost inverter model with replacement of a voltage source.1. + Vo − Q2 R L1 + + C1 v1 v2 − − Vin Q1 Figure 2.14 2.3: Boost inverter model. Boost inverter load + + converter converter v1 v2 A B − − Figure 2.2: Basic representation of the boost inverter.

Introduction 15 • all the components are ideal and the currents of the converter are continuous. • the inductances L1 = L2 . 2. For control purposes. obtaining diL1 L1 = −u1 v1 +Vin (2. (2. • the power supply is constant and known. continuous-time ordinary differential equation (ODE).5. • the converter operates at a high-switching frequency. L1 + Vo − iL1 R Q1 ON + + Q2 OFF Vin v1 C1 v2 − − L1 + Vo − iL1 R Q1 OFF + + Q ON Vin v1 C1 v2 2 − − Figure 2. this circuit generates a switched model. is defined as q = 0 when Q1 = OFF and Q2 = ON. nonlinear. This yields two modes of operation illustrated in Fig. smooth. This averaging process may reach an averaged. Formally. and q = 1.4 is driven by the transistor ON/OFF inputs. 2.Chapter 2.2) dt R R Now. u1 = 1 − q is taken as the control action in equations (2. it is common to use an average model described in terms of the mean current and voltage levels [97].4) dt R R . The circuit shown in Fig. as will be seen below.1) dt dv1 v1 v2 C1 = iL1 − qiL1 − + . when Q1 = ON and Q2 = OFF.3) dt dv1 v1 v2 C1 = u1 i L 1 − + . Qi .1)–(2. q. • v1 and v2 are positive and sinusoidal voltages.2). If the control variable. the converter dynamic equations are diL1 L1 = −v1 + qv1 +Vin (2. (2. and the capacitances C1 = C2 . are known and symmetric.5: Operation modes.

In order to reach a right performance with this inverter. Control problem objectives where u1 is the control variable.7) dt dv2 v1 v2 C2 = u2 i L 2 + − .5)–(2. 1].2 Control problem objectives As mentioned before.6) dt R R diL L2 2 = −u2 v2 +Vin (2. because of: • system nonlinearities. An alternating current signal can be achieved by a suited control-law that controls the voltage output [48]. Therefore. 1}. it can produce an oscillating voltage centered around zero. and thus. 2. both voltages signals must present this phase shift [25]. • The linear part of system (2. which is a relatively high order.3 is diL1 L1 = −u1 v1 +Vin (2. u1 is a continuous variable defined as u1 ∈ [0. (2. which can only take two values u1 ∈ {0.8) is nonminimum phase because it has poles in the positive semiplane.2. • Boost inverter is a double oscillator.8) copes with its control. • The control law variables are saturated because of duty-cycle signals [25]. • It is 4th order.5)–(2. the main objective for the boost inverter is to generate alternating current. 2. Hence. This kind of system are more difficult to study [76]. The control signals multiply the state variables. The main difficulty of system (2. it is not stable in open-loop [131].5) dt dv1 v1 v2 C1 = u1 i L 1 − + (2. it can .16 2. • The current signal is indirectly controlled. • Loads in this kind of systems are unknown or/and slowly variable [63]. • A phase shift of 180◦ is not necessarily achieved. Therefore. The full inverter structure according to Fig. thus it does not present two equilibrium points but two limit cycles. However. 1 R T +t it is usual to consider its average value u1 (t) = T t u1 (s)ds where T is the switching period [97].8) dt R R where u2 controls the other part of the full system (remember that this part has been replaced by a constant voltage source).

Furthermore. 4. 2. The general control objectives for the boost inverter. is its control due to the complexity of the system structure. to estimate an attraction domain for the resulting system.1 Control law The control of switched-mode inverter is usually accomplished by tracking a reference (sinu- soidal) signal [20. or in anti- phase. . 2.126. to study an attraction domain composed of all initial conditions that ensure a convergency to the system right performance. to generate a stable output voltage with an amplitude equal to the desired voltage. when the phase shift between them is equal to 180◦. This estimation of the region of attraction is important for the design of the starting phase. it is required that the output voltage has a pre- specified phase.Chapter 2. In this thesis. Note that the user has to specify the desired amplitude and frequency of the output voltage. Figure 2. 3. as well as that the initial conditions belong to an estimated attraction domain to ensure the system convergency. to propose an adaptive control to deal with unknown and/or slowly varying loads and. Its main drawback. are: 1. without introducing reference signals.35. 2.150]. these general objectives can be achieved for a particular solution made up of some proposed specific objectives: 1. Introduction 17 achieve negative voltages. in the case that the control law does not guarantee global stability. which are common in switching electronics converters.6 shows a block diagram of the solution proposed in this thesis for the boost in- verter control problem. in certain applications. to ensure the performance for unknown or/and slowly variable loads. to achieve an anti-synchronization3 between the voltage signals of each side of the circuit. however. to design a suitable control law for the duty cycle by using energy shaping.2. The use of this external signal makes the closed-loop system 3 Inthis thesis it is said that two sinusoidal signals of the same frequency are anti-synchronized. 3.

i. Several ap- proaches have been applied to control this topology of inverter. the control is based on passivity.8 shows the autonomous structure that replaces the standard feedback control loop. which corresponds to the valley of a certain surface with a ‘Mexican-hat’ shape [115]. Figure 2. 57]. since both current and voltage signals are controlled by the same control variable. In these kind of systems. 73] is similar but there a sliding mode controller is proposed. in [148]. the system becomes autonomous [24.2. Figure 2. The idea behind [19. This is a sub-control problem. in [25. . If a control law is able to produce such a limit cycle. where a three-phase UPS and a boost converter are controlled using this method. Control problem objectives â ADAPTIVE x̂2 CONTROL OBSERVER x̄ V t CONTROL u1 DC-DC BOOST −V 1 CONVERTER 1 + V V t PHASE t LOAD −V CONTROLLER −V − CONTROL DC-DC BOOST CONVERTER V 2 2 t −V Figure 2. Applications to electronic devices are [16. For instance. the control objective can be seen as the generation of a stable limit cycle defined by a given amplitude and frequency. alternating current will be generated without the need to introduce a time-dependent reference signal. In Chapter 3.7 shows the control objective. 150].18 2. 126]. the main contribution in this part of the thesis is to control the boost inverter without using any reference signal. these methods need a reference signal. non-autonomous in such a way that its analysis is more involved than if it were autonomous. Therefore.e.6: General control problem. this approach is applied to a nonlinear boost inverter [11]. 58]. Nevertheless. sliding mode method is applied and. The generation of limit cycles to produce self-oscillations has been successfully applied to electro-mechanical sys- tems [56..

Ref erence + CONTROL SYSTEM Output − Figure 2. Introduction 19 Figure 2.Chapter 2.8: Autonomous feedback control loop.7: Desired energy function: Mexican-hat shape. .

This problem in switched-mode converters is usually dealt with by using adaptation mechanisms along with other techniques such as feedback stabilization [63]. a phase controller (PHC) in an external loop is added to the previous control law. The resulting adaptive control is tested by simulations. backstepping [123.6. which is shown in Fig. predictive control [94] or fuzzy logic control [40].2. This adaptive controller is computed using passivity arguments. an adaptive control is obtained for a part of the DC-DC boost converter. 135]. In [108]. 2. input-output feedback lineariza- tion [64]. which is controlled using the oscillation generation approach mentioned before. 4 In this thesis it is said that two sinusoidal signals of the same frequency are synchronized when the phase shift between them is equal to 0◦ .20 2. 2. sliding modes [28. For the sake of simplicity. a control law satisfying previous requirements was designed in Chapter 3. the phase controller is not considered in this analysis. The stability of the full system is analyzed by singular perturbation analysis. Control problem objectives It is shown that the direct application of the approach proposed in [16] and [58] does not fulfill the objective due to the lack of anti-synchronization between both parts of the circuit.6). the extension to the controller based on energy shaping method considering an inductive load was presented. In Chapter 4. 145]. The circuit performance is validated in the simulation of a practical case presented in this chapter. 2.78]. successful adaptation of the load parameter [7]. An example of such a configuration is the synchronization of the boost inverter with the electrical grid (as in the photovoltaic case) in order to achieve a satisfactory power factor. This approach is not easily applicable to the boost inverter because its model is more involved than the converter of [108]. In order to achieve anti-synchronization. a state observer is designed for any system variable even when the state variables are measured (Fig. [76. 134. . This provides a fast. In order to estimate the load. This approach is also applied to synchronize4 the output with a given signal. grid-point modeled [102]. taking also into account the PHC.2. In [10]. it is well known in in- dustrial applications that the load can be unknown or suffer perturbations.2 Adaptive control Previously. as is usually the case in industrial applications. This approach is applied by simulation to a real industrial case. the goal is to design a load-adaptation mechanism for the boost inverter controlled by energy shaping methodology. Previous results were extended to the case that the load is not purely resistive but it is inductive. It has been supposed that the load is known and constant. However.

the closed-loop system must be in a polynomial form.9). which is a rational function with a high degree polynomial numerator. This method is applied to estimate an attraction domain for the boost inverter. In order to apply the method. 156]. . In this application two parameters of the load are adapted at the same time. The main drawback is the complexity of the control law. in which closed Lyapunov-function level surfaces are employed to deter- mine approximate sort of ‘conservative’ estimations for the region of attraction [76] (see Fig. Moreover. It is re- marked. which is very common in this kind of systems [13. it is necessary to es- timate an attraction region for the boost inverter. Chapter 5 presents a method of estimating an attraction domain. 2. By means of employing this Lyapunov function to estimate a ‘conservative’ attraction domain. as is the problem pro- posed here. the designed control law guarantees global stability by means of a Lyapunov func- tion. One example of this kind of methods is based on Lyapunov theory. it is necessary to highlight that the desired behavior does not correspond to an equilibrium point but to a limit cycle. and secondly. the ideal control signal cannot be implemented globally due to control signal saturation. The application of this method is very simple and satisfactory results are obtained. for example. There is a starting phase. The attraction domain estimation problem presents several difficulties. whose local system stability was previously guaranteed by a Lyapunov function. a control law for the boost inverter is designed satisfying its main objectives. that the computed attraction region obtained from this Lyapunov function consid- ers physical system constraints.Chapter 2. Introduction 21 The extension to case of unknown and non-purely resistive load using the adaptation mechanism before is published in [12].2. This attraction region is composed of all initial conditions of the system that guarantee the convergency to the right behavior. 146]. for exam- ple [54. In practice. to obtain an estimated attraction domain for the boost inverter can be quite involved. This approach can be applied to a class of system. 2. although the model and/or control law have a relative high degree and complexity. that must bring the state of the system into a point inside this region. a simple computational approach can be generated. 124. Consequently.3 Attraction domain In Chapter 3. These methods often employ polynomial systems [85. containing control law saturations. Therefore. There exist many published methods to estimate the region of attraction (see. cannot be negative. however. 91. 76] and the references therein). in such a way that the problem is transformed in a sum of squares (SOS) optimization problem [117]. Ideally. considering state and control-signal constraints. the control law does not achieve global stability due to two rea- sons: firstly. the circuit imposes physical constraints on certain state variables: the capacitor voltages.

Control problem objectives ESTIMATED ATTRACTION ATTRACTION Attraction DOMAIN DOMAIN Domain SATURATIONS DESIRED LIMIT CYCLE CONSTRAINT Figure 2.2.22 2.9: System attraction domain with constraints. .

133]. this idea is used to synchronize the voltage output with a pre-specified signal. The control objective is not only to obtain a right system performance. For this. as is shown in Fig. The only missed thing in the developed controller is to synchronize the voltage signals with a phase shift of 180◦ .g. In order to simplify the control study. 3. In addition. 3. The interesting advantage of this method is that an external reference signal is not needed. a known change of variable is employed [18. it is necessary to mention that it is a sub-control problem. In addition. in order to achieve a normalize 23 . This approach guaranties the system stability. This is important in order to obtain the desired response.4) is only subject to a resistive load. a phase controller is added to the control law in order to achieve 180◦ -synchronization between both parts of the circuit. The resulting control is tested by means of simulations. which has not an equilibrium point but a limit cycle. This aim is achieved by using energy-shaping methodology with a suitable Hamiltonian function which defines the desired system behavior [44].3)–(2.1. e. Boost inverter is nonminimum phase 4th order nonlinear system.Chapter 3 Control of the DC-AC boost converter by energy shaping This chapter exposes a novel control strategy for nonlinear boost inverter. synchronization with the electrical grid. The idea behind is based on generating an autonomous stable oscillator. The control law has to control voltage as well as current signal.1 Normalized average model Assume system (2. but also to guaranty the system stability.

10) q where a = 1 R L1 C1 .1: Controlled boost inverter with PHC.1) Vin C1 1 v1 x2 = (3. (3.4) Vin where x1 and x3 are the averaged currents and x2 and x4 are the averaged voltages. model: r 1 L1 x1 = iL (3.6) L1C1 which yields ẋ1 = −u1 x2 + 1 (3. .1.7) ẋ2 = u1 x1 − ax2 + ax4 . Normalized average model V t −V CONTROL u1 DC-DC BOOST x2 1 CONVERTER 1 + V x̄ V Vout Vin t ω̃ PHASE t LOAD −V CONTROLLER −V − CONTROL u2 DC-DC BOOST CONVERTER 2 2 x4 V t −V Figure 3. Note that ωn is the natural frequency and a is twice the damping.24 3.2) Vin r 1 L1 x3 = iL (3. The normalized time scale is t˜ = ωnt (3.8) ẋ3 = −u2 x4 + 1 (3.3) Vin C1 2 v2 x4 = (3. (3. (3.9) ẋ4 = u2 x3 + ax2 − ax4 .5) with 1 ωn = √ .

the equilibrium manifold is x1 = ax2 (x2 − x4 ). with respect to t˜.1 ẋ1 . η2 ) . From Eq. (3. respectively.8) given by (3.11). Note that x4 can be considered an exogenous input in system (3. ẋ2 . η10 .3)– (2.8).7)–(3. the stability of the system is maintained [48]. later. it is had: x1 (1 − ẋ1 ) = x2 (ẋ2 + a(x2 − x4 )) and x3 (1 − ẋ3 ) = x4 (ẋ4 + a(x4 − x2 )). η2 ) = Γ21 (η1 . which relates the state variables (x2 . 3. x3 and x4 . (3. This curve is an ellipse centered at point (η10 . In this way. To do this.11) can be understood as the internal dynamic of the system. consider the following energy-like function 1 H0 (η1 . controlling x1 and x3 . η20 ). ω 2 (η1 − η10 )2 + (η2 − η20 )2 − µ .Chapter 3. it is possible to see that given x4 . the internal dynamic of system (3. Control of the DC-AC boost converter by energy shaping 25 Remark 3. This can be reached by 1 For the full system. Thus.7)–(3. Moreover.11) This equation is an implicit equation. and only controlling x1 .8). A dynamical system can be defined such that this closed curve is its limit set.7)–(3. .8) a control law can be obtained. Equation (3. Parameters ω . η2 ).2 Energy shaping control for generation of oscillations 3.12) 4 where η1 and η2 are state variables and Γ1 (η1 . the desired behaviors for x2 and x4 can be obtained. the simplified boost inverter (2. Focussing on the simplified system. variable x2 can be indirectly controlled1 . next equation is obtained x1 (1 − ẋ1 ) = x2 (ẋ2 + ax2 − ax4 ).4) is dealt with and. x2 . η20 and µ > 0 should be chosen so that the closed curve Γ1 = 0 defines the desired behavior. ẋ3 and ẋ4 are time derivatives of x1 . As mentioned in the chapitre before. for simplicity.11) acts as a constraint on the system states. the results are extrapolated to the full system. an oscillatory target system may be defined and by matching its equations and system equations (3. (3.1 Approach overview The generation of alternating current in electronic converters can be achieved by generating a stable limit cycle without the need to introduce a reference signal. If u1 is eliminated in (3. In order to define the target system. If ẋ1 = 0 and ẋ2 = 0 is performed. x4 ) and their time derivatives and does not depend on the control signal u.7)–(3.2.

2: Desired energy function: mexican-hat. η10 . for all initial conditions except the center of the ellipse. Energy shaping control for generation of oscillations adopting H0 as a Hamiltonian function [16.8).16) by using the LaSalle invariance principle it can be seen that. (3. . Constants ω .2.15) Taking into account that Ḣ0 = −Γ21 ka1 ω 4 (η1 − η10 )2 + ka2 (η2 − η20 )2 ≤ 0.14) η̇2 = −ω 2 (η1 − η10 ) − ka2 (η2 − η20 )Γ1 . Figure 3. while ka1 and ka2 define the speed of the transient response. in order to work with the normalized averaged model (3. and defining the Hamiltonian dynamical system # " ∂H # " η̇1 1 0 −k a1 Γ1 ∂ η1 = ∂ H0 . results in η̇1 = (η2 − η20 ) − ka1 ω 2 (η1 − η10 )Γ1 (3.26 3.13) η̇2 − Γ11 −ka2 ∂η 2 which. after using (3. (3. (3.12). bias and amplitude of the desired behavior. Note that η̇1 and η̇2 are in this case time derivatives of η1 and η2 with respect to t˜. Figure 3. The behavior of the target system (Γ1 = 0) corresponds to the desired sinusoidal behav- ior for the DC-AC converter. η20 and µ are design parameters for the frequency.7)–(3.2 shows this energy-like function. the trajectories of the system tend to the curve Γ1 = 0. 108].

17) 2 ζ2 = x1 − ax22 + ax2 x4 + ζ20 (3.14)–(3.17)– (3. Looking at target system structure (3. (3.18).20) It is not easy to obtain simple relationships x1 = f (ζ1 . From (3. the resulting u1 can violate the constraint 0 ≤ u1 ≤ 1. ζ4 ) from (3. as follows from the inverse function theorem.19)–(3. it is easy to see that ζ̇1 = ζ2 − ζ20 (3.Chapter 3. Nevertheless.14)–(3.19)–(3.20) the choice ka1 = 0 is obvious. that matches (3.18) due to the quadratic terms.17)–(3. . Furthermore.17)– (3.21) ζ̇2 = −ω 2 (ζ1 − ζ10 ) − k1 Γ1 (ζ2 − ζ20 ). for sake of simplicity.8) can not be directly transformed to the form of system (3. In Chapter 5 it will be seen that this constraint restricts the domain of attraction of the desired limit cycle when the controller obtained below is applied. 156].7)–(3. It is assumed that a starting strategy will bring the state of the system into this region of attraction [13. 91. as can be noted from Eq.15) and comparing it with (3.20) and (3. u1 varies dependently on x.23) may be zero (this is the same neces- sary condition for (3. ka2 has been denoted as k1 . The control law. In Chapter 5. resulting in the target system ζ̇1 = ζ2 − ζ20 (3. u.15).21)–(3. this change of variables is a diffeomorphism if and only if x2 + 2ax1 x2 − ax4 x1 6= 0. the denominator in (3. (3.2. but this can be done using the new change of coordinates given below: x21 + x22 ζ1 = (3.20) to be a diffeomorphism). This controller has several problems. The attraction of curve Γ = 0 can still be proved by the LaSalle invariance principle.19)–(3. (3.23) x2 + 2ax1 x2 − ax4 x1 Indeed.18). ζ2 ) and x2 = f (ζ3 . Control of the DC-AC boost converter by energy shaping 27 3. an estimation for the region of attraction of the desired limit cycle will be obtained by taking these problems into ac- count.22) is 1 + 2a2 x22 − 3a2 x4 x2 + a2 x24 + ax2 x˙4 + k1 Γ1 (ζ2 − ζ20 ) + ω 2 (ζ1 − ζ10 ) u1 = . (3. in other cases.19) ζ̇2 = 1 + 2a2 x22 − 3a2 x4 x2 + a2 x24 + ax2 x˙4 − u1 (x2 + 2ax1 x2 − ax4 x1 ).2 Controller design System (3. First.18) where ζ20 is an offset term that will be a tuning parameter.22) where.

1)–(3. For this.2. 48. (3.24)–(3. 2 If the second order harmonics are neglected. When this system is resolved for α0 .17)–(3. it is necessary to obtain an analytical expression of the desired objective curve in plane x1 − x2 .26) This assumption is very common in the field of electronics [20.6). note that these desired evolutions allow us to remove the bias in the output. 37. By substituting (3.24)–(3.28 3. For this.30) 2 ζ2 = aα0 + α1 cos ω t + β1 sin ω t − a(A sin ω t + B)2 + a(−A2 sin2 ω t + B2 ) + ζ20(3. 1 ζ1 = [(aα0 + α1 cos ω t + β1 sin ω t)2 + (A sin ω t + B)2 ] (3. ζ20 and µ ) in terms of the desired behavior for x2 . (3.5) and (3.25) and (3. The origin of time in (3. 60]. α0 = A2 (3.4). In addition.18) to (3. η20 and µ have to be defined as a function of the desired behavior.26) in (3.25) and (3.24)–(3.29) 1 + a 2 A4 ω 2 The next problem is to show that the desired behavior for ζ1 and ζ2 is an ellipse and defining the ellipse parameters (ω .28) 1 + a 2 A4 ω 2 aAB(ω 2 A2 − 2) β1 = − . Assume that the desired time evolutions for x2 and x4 are x∗2 = A sin ω t + B (3.31) .24) x∗4 = −A sin ω t + B. ζ10 . the corresponding coefficients can be equated: aα0 = aA2 β1 + aα0 α1 ω = −2aAB α1 − aα0 β1 ω = −ω AB. it is necessary to obtain the desired evolution for ζ1 and ζ2 by applying the change of variables (3.26).27) ω AB(2a2 A2 + 1) α1 = (3. α1 and β1 .25) where A.25) is arbitrary in such a way that no phase shift value is imposed (signal synchronization will be achieved below). (3. B and ω take pre-specified values to obtain the desired evolution for v1 and iL1 using (3.11) 1 aα0 + (β1 + aα0 α1 ω ) sin ω t + (α1 − aα0 β1 ω ) cos ω t + ω (α12 − β12 ) sin 2ω t 2 1 −α1 β1 ω cos 2ω t = aA2 − 2aAB sin ω t − ω AB cos ω t + ω A2 sin 2ω t − aA2 cos 2ω t. Assume that the desired steady state for x1 can be approximated by x∗1 = aα0 + α1 cos ω t + β1 sin ω t (3. Energy shaping control for generation of oscillations Parameters η10 .

is used in . (21) (22) (21) (22) Assuming that the double frequency terms ζ1 .36) (0) ζ20 = ζ2 (3.33) By equating (3. these expressions can be approximated by an ellipse in the plane ζ1 . ζ1 .30)–(3. For that.32)–(3. ζ2 and ζ2 can be neglected.30)–(3. Therefore.32) (0) (11) (12) (21) (22) ζ2 = ζ2 + ζ2 cos ω t + ζ2 sin ω t + ζ2 cos 2ω t + ζ2 sin 2ω t. (3.37) (11) (12) µ = ω 2 ((ζ1 )2 + (ζ1 )2 ).33) the following Fourier coefficients. which is used for a part of the system.31) with (3. (3.34) (12) (11) ωζ1 = ζ2 .35) The parameters of this ellipse are given by (0) ζ10 = ζ1 (3. (3. the previous control law. ζ2 since (3.38) 3.Chapter 3.3 Control law for the full system The boost inverter is composed of two DC-DC converters.31) yields (11) (12) ωζ1 = −ζ2 (3.2. it has two control signals. are obtained 2a2 α02 + α12 + β12 + A2 + 2B2 (0) ζ1 = 4 (11) ζ1 = aα0 α1 (12) ζ1 = aα0 β1 + AB (21) α12 − β12 − A2 ζ1 = 4 (22) α β 1 1 ζ1 = 2 (0) ζ2 = ζ20 (11) ζ2 = α1 (12) ζ2 = β1 − 2aAB (21) ζ2 = aA2 (22) ζ2 = 0. Control of the DC-AC boost converter by energy shaping 29 Expanding these expressions in Fourier terms yields (0) (11) (12) (21) (22) ζ1 = ζ1 + ζ1 cos ω t + ζ1 sin ω t + ζ1 cos 2ω t + ζ1 sin 2ω t (3.

e. (3.(3. the two control laws are easily obtained.2.7)–(3. Note that.2. κ2 (x). Control law u2 is obtained by using symmetry. It is desired to obtain an output voltage Vo = 220 √2 sin(50 · 2π t) from an input voltage Vin = 48V . 4 whose differetation is: Ḣ = −Γ21 k(ζ2 − ζ20 )2 − Γ22 k(ζ4 − ζ40 )2 ≤ 0. The desired frequency and voltage amplitude are f = T1 = 50Hz and 220Vrms. Therefore. Energy shaping control for generation of oscillations order to obtain the control law for the other part of the system. R = 100Ω. .39) x2 + 2ax1 x2 − ax4 x1 1 + a2 (2x24 − 3x2 x4 + x22 + x4 ẋ2 ) + k2 Γ2 (ζ4 − ζ40 ) + ω 2 (ζ3 − ζ30 ) u2 = . In order to obtain this voltage. C = 250µ F. x2 ).8) there is a sim- ilar structure for the pairs of current and voltage of both boost DC-DC converters.33 and B = 9. respectively. and B is chosen so that x2 and x4 are always positive. The control laws are 1 + a2 (2x22 − 3x2 x4 + x24 + x2 ẋ4 ) + k1 Γ1 (ζ2 − ζ20 ) + ω 2 (ζ1 − ζ10 ) u1 = . The stability is proved taking: 1 H = (Γ21 + Γ22 ).14 · 102 rad s .40) x4 + 2ax3 x4 − ax2 x3 where Γ1 (ζ1 .7)–(3..01 ≪ 1 . the parameters are A = 3. i. 3. ωn > 5ϖ and a 2 = 0. 2 These simulations are performed considering. ζ4 ) = ω 2 (ζ3 − ζ30 )2 + (ζ4 − ζ40 )2 − µ . By comparing the normalized full model Eqs.10) and (3.4 Simulation results The following simulation shows how the controller is applied in a practical case. L = 250µ H.41) Γ2 (ζ3 .37 with ω = 0.25) has to be the half of the desired output voltage ampli- tude. κ1 (x) (3. (3.24)–(3. ζ2 ) = ω 2 (ζ1 − ζ10 )2 + (ζ2 − ζ20 )2 − µ (3.42) The expressions for the time derivatives ẋ2 and ẋ4 are taken directly from the normalized equations of the boost inverter.078 in the normalized variables (x1 . Parameter A in Eqs. ωn = 4 · 103 rad s and ϖ = 2π f = 3. (3.30 3.

5 shows that.1T s (remind that T is the commutation frequency period). converging to the desired behaviour very fast.3 shows the results of a simulation using a commutation frequency of 50KHz and employing a sample time of 0. Figure 3. the control law signal oscillates between 0. Note that the system does not show overshoot. ζ4 ) (dashed). If the circuit is designed for more suitable values of the duty cycle. x2 ) (solid) and (x3 . 3. The reason is that the previous design does not force the phase shift between signals v1 and v2 to be in anti-phase (180◦ phase shift). The next section deals with this problem.3: a) Evolution of (x1 . As pointed out by the jury member this signal has values smaller than 0.4 shows the boost inverter output voltage. x3 ζ1 . the proposed controller would also lead to satisfactory results. ζ2 ) (solid) and (ζ3 . It can be seen that the desired amplitude is not achieved. x4 ) (dashed). ζ4 x2 .08 and 0. x4 0 8 −1 6 −2 4 −3 −5 0 5 0 50 100 x1 . The control signals are shown in Fig. a) b) 14 3 2 12 1 10 ζ2 . Control of the DC-AC boost converter by energy shaping 31 Figure 3.1. .6.Chapter 3. this goal is not achieved. what is not good for the implementation. ζ3 Figure 3. as a result. Figure 3. Both DC-DC converters achieve the desired limit cycle. b) evolution of (ζ1 . This is a circuit design problem.17. For the parameter chosen in the application.

04 0. 600 550 500 V1V2(V) 450 400 350 300 0 0.1 Time(s) Figure 3. Energy shaping control for generation of oscillations 300 200 100 Vout(V) 0 −100 −200 −300 0 0.02 0.32 3.06 0.02 0.04 0.4: Output voltage of the boost inverter.08 0.1 Time(s) Figure 3.06 0.08 0.2. .5: Output voltages of the first (solid) and second (dashed) boost DC-DC converters.

3. a phase controller (PHC). The normalized voltage of the second DC-DC converter. The method is illus- trated in Fig. which is added to the nominal frequency. .Chapter 3. 3. These are the inputs to the PHC.08 0. inspired by the configuration of a phase-lock loop (PLL) [66]– [1]. 3.1 Boost inverter synchronization The objective is to synchronize voltage signals x2 and x4 in anti-phase. the voltage signal did not present the phase shift mentioned before. The output is a frequency variation. is the signal to be synchronized with x4 in anti-phase.2 0 0 0.3 Synchronization problem The controllers developed above for boost inverters do not synchronize the two parts of the circuit with a phase shift of 180◦ since each one controls independently a DC-DC converter. u2 0. in such a way that they present a phase shift to 180◦ . ω . it is necessary to synchronize these signals.4 0. x4 . The output of the converter is a sinusoidal signal of that resulting frequency. as in the case of synchronization with the electrical grid. Control of the DC-AC boost converter by energy shaping 33 1 0.06 0. is added.39).7. In order to get the desired output voltage. 3. is taken as a reference signal and the normalized voltage of the first DC-DC converter.1 Time(sec) Figure 3.02 0. in the above design. In this section. The PHC allows us to achieve the desired phase shift between the output of the two DC-DC converters as well as to synchronize the boost inverter output with respect to a specified voltage signal. x2 .8 0. in the Control 1 block and the resultant frequency is entered in (3.6 u1 . Therefore.04 0. ω̃ .6: Time evolution of the control laws.

39) and (3. e.3. then A2 Kvd A2 Kvd ω̃ (t) = sin(ϕi (t) − π ) = − sin(ϕi (t)). being eliminated by the LPF.40) (apart from the phase shift between x2 and x4 as desired). In the following. ϕi′ is constant. x′2 .34 3. once filtered by a low pass filter (LPF). is obtained by passing voltage x2 through a high pass filter (HPF) in order to eliminate its continuous component. x2 and x4 evolve as sinusoidal signals: x2 = A sin((ω + ω̃ (t))t + ϕi′ ) + B ≈ A sin(ω t + ϕi (t)) + B (3. Assuming that both HPFs eliminate the bias terms. it is desired that ϕi = 2nπ with n ∈ Z.8. it can be assumed that. Note. an intuitive explanation of the correct behavior of the full system is presented. [66]. after a transient period. 2 2 . For this reason. the signals that enter into the multi- plier in Fig. is a measure of the deviation of the phase shift with respect to 90◦ . x′4 is obtained after passing x4 through another HPF. Likewise. In this way. The PHC block diagram appears in Fig. in such way that its output.44) where the origin of time has been chosen in such a way that ϕi (t) represents the phase shift between x2 and the desired behavior for x2 . Assuming that the LPF filters out every sinusoidal signal of frequency greater or equal than ω . It is assumed that ω̃ (t) is small and varies slowly.g. The multiplier obtains the product.43) x4 = A sin(ω t + π ) + B (3. Likewise.7: Block diagram of boost DC-AC converter with output voltages in anti-phase by the PHC. Synchronization problem PHC ω̃ x2 x4 Control Converter R Converter Control 1 1 2 2 u1 u2 ω Figure 3. 3. changing its sign and integrating it. one of the inputs of the multiplier. x′2 × x′4 . 3. Under this assumption it can be expected that the introduction of the PHC does not affect the normal behavior of the controllers (3.8 are x′2 ≈ A sin((ω t + ϕi (t)) x′4 = A cos(ω t + π ) +CPHC where CPHC is generated by the integrator.

which is quite acceptable. the harmonics of the fundamental frequency wave of the obtained output is quite satisfactory. but it is thought that.008( 2 2 + 2 2 j)) The value of the PHC gain is Kvd = 5 · 10−4. The high pass filter applied is: 1.4s . s+ω The LPF is a second order Butterworth filter [69]: 1 √ √ √ √ . As can be seen. sin(α ) cos(β ) = 12 (sin(α + β ) + sin(α − β )) has been employed. from Eq. which corresponds to the desired behavior. Figure 3. This result justifies the first harmonic approximations carried out during the design of the control law.Chapter 3. the approximation does not work when the circuit parameters are not chosen adequately. when . (3. On the other side. 2 Obviously ϕi (t) converges to 2nπ with n ∈ Z.43). Of course. Control of the DC-AC boost converter by energy shaping 35 x′2 x2 HPF × LPF Kvd ω̃ −1 ω x4 HPF s x′4 Figure 3. this is only valid for the chosen parameters and it does not prove the usefulness of the law in a general sense. The results of the PHC application are shown in Fig. Simulation results The previous values are used for the boost inverter parameters. it is easy to obtain ϕ̇i ≈ ω̃ .9. 3.11 shows the ripple in the inductance currents. Voltages v1 and v2 in anti-phase. and thus. 3.008( 22 − 2 2 j))(s + 0.45) (s + 0. In Fig. In this expression. (3.8: Conceptual block diagram of the PHC. Figure 3. A2 Kvd ϕ̇i ≈ − sin(ϕi (t)). The output signal has a total harmonic distortion (THD) below 0. In fact.22% for a 50-Hz output voltage.12 shows the signal spectrum of the signals v2 and v4 .10 the boost inverter output voltage is represented. where Kvd is a positive design parameter.

.64 0.04 0.7 Time(s) Time(s) Figure 3.02 0. a) b) 300 300 200 200 100 100 Vout(V) Vout(V) 0 0 −100 −100 −200 −200 −300 −300 0 0.36 3.66 0.7 Time(s) Time(s) Figure 3.08 0.1 0.1 0.04 0.6 0.64 0.68 0.6 0.06 0.62 0. In a) the transient time is shown and in b) the steady-state is shown.68 0.3.08 0.06 0.9: Output voltage of the first (solid) and second (dashed) boost DC-DC converters.66 0. Synchronization problem a) b) 600 600 550 550 500 500 V1V2(V) V1V2(V) 450 450 400 400 350 350 300 300 0 0. In a) the transient time is shown and in b) the steady-state is shown.02 0.10: Output voltage with PHC.62 0.

Control of the DC-AC boost converter by energy shaping 37 i1 i2 100 50 i(A) 0 −50 −100 0.6 0.11: Inductance currents.68 0.64 0. .12: Output voltage signal spectrum.66 0.62 0.7 t(s) Figure 3. 25 20 Magnitude (dB) 15 10 5 0 0 50 100 150 200 250 Frequency (Hz) Figure 3.Chapter 3.

′ A For simplicity. In this case.13: Block diagram of boost DC-AC converter with output voltage synchronized with the electrical grid. 3. For this. current and power levels). 3. the approximations will yield good results. 3. the stability analysis of the full system is not delivered. g = ω sin ω t − 2 . 3.13. as is shown in Fig.46) 2 The values used in this simulation for the filter parameters and gain. are the same ones used previously. an inverter is necessary to inject energy from production plants into the electrical grid. whose structure is shown in Fig. Synchronization problem the circuit is designed properly (taking into account the voltage.3.38 3. . which is similar to the previous subsection. x2 is synchronized with the grid voltage using a phase shift of 180◦ by using PHC1. In this case.2 Synchronization with the electrical grid In some applications.15. the problem is to syn- chronize the voltage output signals with the pre-specified signal. Grid PHC1 PHC2 ω̃1 x2 x4 ω̃2 Control Converter R Converter Control 1 1 2 2 u1 u2 ω Figure 3. Kvd .8.3. 48]. x4 ) are treated with two PHCs. Signal x4 is synchronized with the grid voltage using a zero phase shift by means of PHC2 π shown in Fig. 3. the normalized voltage signals of both DC-DC converters (x2 .14 and which is similar to the PHC in Fig. such as renewable energy plants. Notice once more that these approximations are common in the literature [47. Simulation results The grid voltage is 2 Vgrid = 220 √ sin(100π t) (3.

The performance of the synchronization of the boost DC-AC converter with the electrical supply voltage is represented in Fig. 3. which are supposed to be constant.15: Conceptual block diagram of PHC2.3. The control laws designed in this chapter depends on the value of the resistive load. The method is based on energy-shaping methodology. Control of the DC-AC boost converter by energy shaping 39 x′2 x2 HPF × LPF Kvd ω̃ −1 1 g HPF s g′ Figure 3. which generates a limit cycle guaranteeing the system stability. The resulting controller achieves the objective by adding a phase controller. .14: Conceptual block diagram of PHC1.16 showing satisfactory behavior.Chapter 3. The same idea is used in order to solve the problem of grid electrical synchronization. Next chapter will deal with unknown and/or slowly varying loads. Nevertheless.4 Conclusion A control strategy for the complex nonlinear boost inverter was presented. x′4 x4 HPF × LPF Kvd ω̃ +1 1 g HPF s g′ Figure 3. it has an important relevance: the system does not require any external reference signals. which is not necessarily known. The obtained control law is a complex expression.

4.1 0.16: Electrical supply voltage (solid) and simulated output voltage synchronized with PHCs (dashed).05 0.40 3.2 t(s) Figure 3. Conclusion 300 200 100 0 Vo (V ) −100 −200 −300 0 0.15 0. .

This is a common problem in the field of electronics. 135]. A state observer for some of the con- verter variables is designed even when the state variables are measured. which contains enough information to make this parameter observable. as the one presented in previous chapter. a control law for the nonlinear boost inverter has been designed. This observer is designed based only on a one-sided circuit. 64. that the load is unknown or/and change slowly. the phase-lock system is not considered in this analysis. Nevertheless. The fact that the boost converter model is a 4th -order system makes the design of the adaptation law more involved. Different control strategies have been applied to provide a solution to this standard problem in switched-mode converters [28. the study of the full two- sided circuit is avoided due to symmetry considerations. 41 . 94. which guaranties the system stability. In this chapter an adaptive control is designed for the boost inverter in order to cope with unknown and/or varying resistive load (see Fig. Likewise. The resultant adaptive control is tested by means of simulations. 4. were used in [108] for the case of the boost converter. For simplicity.1). Adaptation mechanism for similar controllers. 4.1 Design of an adaptive control An adaptive law (or a load observer) is proposed to cope with load variations and/or load uncertainties. it is usual. Therefore. a phase controller has been proposed in order to achieve the desired phase in the output voltage signal. 63. In order to analyze the stability of the full system singular perturbation analysis is used [76]. This development has been performed assuming known load.Chapter 4 Adaptive control In the previous chapter.

7)-(3. note that xl and y are measurable variables.1.1: Controlled boost inverter with observer.1 In what follows. and thus accessible for control use. x2 ]T .8). ym . Dl = . The model problem for one-sided circuit (left part of the Fig. it is assumed that both voltage and current. Remark 4.2) y = x2 − x4 (4. and 0 −u1 0 1 Ul = . Remark 4. Design of an adaptive control â ADAPTIVE x̂2 CONTROL OBSERVER x̄ V t −V CONTROL u1 DC-DC BOOST x2 1 CONVERTER 1 + V x̄ V Vout Vin t ω̃ PHASE t LOAD −V CONTROLLER −V − CONTROL u2 DC-DC BOOST CONVERTER 2 2 x4 V t −V Figure 4.3) (3. 2. that y ∈ R1 and ym ∈ R2 . are measur- able. can be rewritten compactly as: x˙l = Ul xl + aDl y + El (4.42 4. u1 0 −1 0 Note.2 From remark 4.3) ym = Mxl (4.4) with xl = [x1 . M = I2×2 . El = . .1) ȧ = 0 (4.1. x4 can be considered as an input.

6) x̃˙l = −K x̃l + ãDl y (4. as will be shown below. Note that even if xl is accessible. α I. (4.1. K ∈ R2×2 are constant design matrix.7) ã˙ = −β (xl . Therefore. (4. K . the adaptation law designed here requires the additional (or extended) state observer.2 Error equation Assume that a is a constant parameter (ȧ = 0) or that it changes slowly (ȧ ≈ 0) and define the following error variables: x̃l = xl − x̂l . 4. α >0 and P = I be the trivial solution of PK T + KP = −Q. with Q = 2α I.1)–(4. From Eq. (4. Adaptive control 43 4. plus an adaptation law for parameter a. the adaptation law has the following structure: x̂˙l = Ul xl + âDl y + El + K(xl − x̂l ) (4.1. x̂l ).1 Adaptation law The proposed adaptation law is comprised of a state observer for one side of the inverter boost. Error equations are now derived from (4.9) γ .2.4): K0 (ym − ŷm ) = K0 (Mxl − M x̂l ) = K(xl − x̂l ) where K0 .5) can be used.4) together with (4. the real state of xl and y in Eq.8) Let K be of the form. x̂l ). Now. ˙ ã˙ = −â. This will become clear during the analysis of the error equation system. x̂l is the estimated state of xl and â is the estimated value of a. (4.Chapter 4.6) where β (xl .5) â˙ = β (xl . From remark 4. x̂l ) is the adaptation law to be designed. introducing ã2 V = x̃Tl Px̃l + (4.5)–(4. ã = a − â.

y) = 0 corresponds to the single point (x̃l = 0. The following lemma summarizes the above results. it is proved that error variables x̃l and ã are bounded. y) is negative everywhere. i. ã. Moreover.3 Stability properties The observer and the adaptive law error equations are now fully defined. â˙ = γ (DTl Px̃l )y.13) In addition.44 4.12) The stability properties of these equations follow from the Lyapunov function. as long as y 6≡ 0. Note that x̃l ≡ 0 that implies x̃˙l ≡ 0. γ The adaptation law is now designed by canceling the terms in parentheses. (4. (4. note that V̇ (x̃l . Design of an adaptive control it follows that ã˙ V̇ = −x̃Tl Qx̃l + 2ã T x̃l PDl y + γ â˙ T T = −x̃l Qx̃l + 2ã x̃l PDl y − . 4. consider the level set Vc = V (x̃l . observe that if y behaves as a sinusoidal (as is expected from the control problem formulation) the unique asymptotic solution for ã is ã = 0. ã. These equations are: x̃˙l = −K x̃l + ãDl y (4. it follows V̇ = −x̃Tl Qx̃l From standard Lyapunov arguments [76]. defined above. For this. From Eqs. ∀t ≥ 0.10). the maximum invariant set in V̇c (x̃l .11) ã˙ = −γ (DTl Px̃l )y. ã. assuming that y 6≡ 0. (4.e. is only obtained if ã(t)Dl y(t) ≡ 0. every solution starting in Vc approaches this point as t → ∞.1. V . except on the line x̃l = 0. Note that with choice (4. that the manifold y(t) ≡ 0 has to be carefully analyzed since can cause problems (e. asymptotic stability is established by LaSalle’s invariance principle [76]. ã.g.12).11)–(4.1. Note. (4. y) ≤ c0 for sufficiently large c0 > 0 and where V̇ (x̃l . in Eq.10) 4. . Consequently. y) ≤ 0. ã = 0) Therefore.13).

A rigorous explanation has not been possible to provide it a cause of the system and control nature. thus avoiding y(t) = x2 − x4 = 0. and the observer (4. can be com- pactly rewritten as: ẋ = U (u1.(3. The PHC objective is to achieve x2 + x4 = 0.Chapter 4. where a∗ is the exact value of a. The open-loop two-sided inverter (3. ∀t ≥ 0. E = 1 . ii) limt→∞ x̂l (t) = x(t).8) plus (2. see Chapter 3. D = 0 . respectively ).4). Lemma 4. (3. . (from Eq. x2 .14) y = x2 − x4 (4.1)–(4.2. These properties are independent of the evolution of the system state variables. x3 .5)–(4.2 Stability considerations of the full closed-loop system In the previous section. a∗ ). 4. if y(t) 6≡ 0. â are bounded. iii) limt→∞ â(t) = a. The stability of the complete system is analyzed in this section.39) and Eq.1 Tuned system The tuned system is defined as the ideal closed-loop system controlled by the tuned feedback laws u∗1 = κ1 (x.3 Consider the open-loop system (4. and 0 −u1 0 0 0 1 u1 0 0 0 −1 0 0 0 0 −u2 . Adaptive control 45 An intuitive explanation about the right system performance (as will be seen by simulation below) is the PHC introduction.6) with K = α I such that K is a solution for PK T + KP = −Q. U = 0 0 u2 0 1 0 4.7)-(2.40). u2 )x + aDy + E (4. the stability properties have been presented for the extended observer. then the observer states have the following properties: i) The estimated states x̂l .7)-(3. x4 ]T . a∗ ) and u∗2 = κ2 (x.8) normalized.15) with x = [x1 .

a∗ ) and u∗2 = κ2 (x. They correspond to periodic sinusoidal solutions of period T = 2π /ω . respectively. 4. âM }]. â). [min{a∗ . a∗ ). u∗2 )x −U (u∗1 . it achieves an asymptotically orbitally stable periodic solution. û2 = κ2 (x.41)–(3. âm }.19) = f (x) + [U (û1.25) and (3.46 4. a∗ ) is written as ẋ = U (û1 . . y∗ = x∗2 − x∗4 is also sinusoidal. it has been shown that functions Γ1 and Γ2 defined in (3. i.2. âM ] and denote ã . x∗ (t) = x∗ (t + T ). 0 I ∂∂ua2 |a=āˆ where. u∗2 )x (4. u∗2 )] x.e. because state x is directly measured. f (x) (4.26) states ẋ = U (u∗1. and 0 −1 I. u∗2 ) −U (û1. â). the control laws that are effectively applied depend on the estimation. being I ∂∂ua1 |a=āˆ " # 0 T (x) .2 Closed-loop system In practice. â). a∗ ))x + aDy + E (4.18) and. of parameter a. x̂l . (4. â) and û2 = κ2 (x.42) tend to zero. u∗1 = κ1 (x. Note that these control laws depend on state x and not on their estimations. û2 ) = T (x)ã. The closed-loop equation resulting from the use of û1 = κ1 (x. The role of x̂l is to make possible the design of the adaptation law for parameter a. In Section 3. 1 0 .24)–(3. This control laws are denoted as û1 = κ1 (x. .17) . max{a∗ . κ2 (x. â. a∗ − â.16) = U (κ1(x.2. û2 )x + aDy + E +U (u∗1. āˆ takes any value belonging to the interval A . û2 ) −U (u∗1. Stability considerations of the full closed-loop system The tuned system given in (3.20) Let us assume that â ∈ [âm . u∗2 )x + aDy + E (4. Consequently. Applying mean-value theorem [76] yields U (u∗1 .

|ã| ≤ εa } be a compact domain that includes the asymptotic periodic solutions from the tuned system and the exact value of a i. Adaptive control 47 The term T (x)ã captures the mismatch between the estimated and the true value of the load.20) together with the observer error system yields the complete set of closed- loop equations. In view of the discussion above. The stability consideration discussed here will be based on the time- scale separation. it is necessary to follow the next steps: • introduce ā = αã . T (x)ã has ∀(x. • select γ = α • define ε = 1 α .23) remain that K = α I.21) as the slow subsystem. and free of singularities ii) limã→0 T (x)ã = 0. (4. analytic. a∗ . respectively.4 For small enough constants εx > 0 and εa > 0.e.23) can be seen as the fast subsystem and equation (4. x∗ ) ≤ εx . this term has the following property: Property 4. Then.3 Singular perturbation form In order to rewrite the system above in the standard singular perturbation form. the following properties: i) it is continuous. Putting (4.22) ã˙ = −γ (DTl Px̃l )y. with y = y(x) ẋ = f (x) − T (x)ãx (4. ã) ∈ M. The main idea is that with the suitable choice of gains (as discussed below). Let M = {(x.Chapter 4.21) x̃˙l = −α x̃l + ãDl y (4.22)-(4. 4. ã) : dist(x.2. Note again that this time-scale separation should be enforced by a particular choice of the observer and adaption constants α and γ . observer equation (4.

48 4. x) = −(DTl Px̃l )y According to the singular perturbation analysis.24). how the observer gain is related to γ . the adapta- tion gain. ā(ã)]T yields the general form ẋ = f (x) − T (x)α ā(ã)x (4. Replace this solution in the slow subsystem (4. where ε > 0 is small parameter (for a larger value of α ).21)–(4. z) (4. ensures the convergency of the observer and adaptation parameter.25) with x(t0 ) = x0 .2.5 The perturbed variable parameter. z = φ (x). i. Stability considerations of the full closed-loop system With these considerations. Note that. Letting z = [x̃l .e. γ . These relationships with respect to the tuning parameter. ω . ε = ς (ã). and −x̃l + ā(ã)Dl y g(z. γ . ε ā˙ = −(DTl Px̃l )y. ω2 k γ ≫ max ω 4 . z) = 0. x ∈ R4 . k2 . must fulfill 1 1 ε ≪ min . z(t0 ) = z0 .24) ε ż = g(x. z ∈ R3 .25) by finding the roots of the equa- tion g(x. Eqs. . (4. this particular selection of gains imposes relative gains for the adaptation. Find a stationary solution of the fast subsystem (4. 2. a. and find the resulting slow system ẋ = f (x) − T (x)φ (x)x. and for a side effect. the next steps must be followed: 1. Check the boundary layer properties of the fast subsystem along one particular solution of ẋ = f (x) − T (x)φ (x)x. and defines precisely. 3.23) are rewritten: ẋ = f (x) − T (x)α ā(ã)x ε x̃˙l = −x̃l + ā(ã)Dl y. Remark 4. k. and desired frequency.

Adaptive control 49 4.2. (4. (4. and by re-scaling time t to the stretched time coordi- nates τ = (t − t0 )/ε . then x̃l z = φ (x) = =0 ā(ã) becomes an isolated root.27) dτ . Now. i. However. and infinite solutions for ā. step 2 is considered. dτ which can be rewritten as: d ẑ = J(y p )ẑ = J(τ . Note that DTl PDl = 2.Chapter 4.e x̃l = 0 2 ā(ã)y (x) = 0 which means that if y ≡ 0. and taking into account that ā = a−â α = 0. ω . i. The fast subsystem (4.25) along one particular solution of the quasi-steady-state x p (t).5 Boundary layer fast subsystem The next step is to evaluate the stability of the boundary layer system in the finite time inter- val t ∈ [t0.4 Slow sub-system The previous step 1 requires to find the roots of x̃l = ā(ã)Dl y 0 = −ā(ã)DTl PDl y2 .26) which is nothing other than the tuned system whose solutions x(t) = x∗ (t) are sinusoidal. for instance.e. 4. the slow model is written as: ẋ = f (x) − T (x) · 0 · x = f (x). For the previous particular solution. â = a. This is obtained by evaluating the fast subsystem (4. ε )ẑ.25) evaluated along this trajectory is d x̃ˆl = −x̃ˆl1 dτ 1 d ˆ x̃l = −x̃ˆl2 − āˆ(ã)y p dτ 2 d āˆ = x̃ˆl2 y p .t1 ].2. if y 6≡ 0. there is one solution for x̃l = 0. and that the above equation has multiple solutions. in the particular tuned solution y∗ = A cos(ω t).

50 4.2. Stability considerations of the full closed-loop system

with

−1 0 0

J = 0 −1 −y p (4.28)

0 yp 0

Under these conditions, system (4.27) is reduced to the autonomous linear system

d

ẑ = J(τ , ω , 0)ẑ = J(y p 0 )ẑ. (4.29)

dτ

Consider the y p0 ∈ Dx , with Dx , {x : |y| = |x2 − x4 | > ε0 }. The above system has the

following properties.

**Property 4.6 The eigenvalues of J(y p ), for [t, x p, z] ∈ [t0 ,t1] × Dx × R3 , are all strictly nega-
**

tive, i.e.

λ1 = −1 (4.30)

( p )

−1 +1 − 4y p 2

λ2 = Re <0 (4.31)

2

( p )

−1 − 1 − 4y p 2

λ3 = Re < 0, (4.32)

2

where ε0 > 0 is a constant.

**Therefore J(y p ) is Hurwitz in the considered domain. As a result, there exists a matrix
**

P(y p ) = P(y p )T > 0 and a Q(y p ) > 0 such that the standard Lyapunov equation holds:

P(y p )J(y p) + J(y p )T P(y p ) = −Q(y p ).

**From standard Lyapunov arguments, it follows that for all t ∈ [t0,t1 ],
**

t − t0

||ẑ(t, ε )|| ≤ c1 exp −λmin (Q(y p )) .

ε

Tikhonov’s theorem [76] can now be used to summarize the previous result.

**Theorem 4.7 There exists a positive constant ε ∗ such that for all y p0 ∈ Dx , and 0 < ε < ε ∗ ,
**

the singular perturbation problem of (4.24)-(4.25) has a unique solution, x(t, ε ), z(t, ε ) on

[t0,t1 ], and

x(t, ε ) − x p(t) = O(ε ) (4.33)

z(t, ε ) − ẑ p(t/ε ) = O(ε ) (4.34)

Chapter 4. Adaptive control 51

**hold uniformly for t ∈ [t0,t1], where ẑ p (τ ) is the solution of the boundary layer model (4.29).
**

Moreover, given any tb > t0 , there is ε ∗∗ ≤ ε ∗ such that

z(t, ε ) = O(ε )

holds uniformly for t ∈ [tb,t1 ] whenever, ε < ε ∗∗ .

**In order to extend this result to an infinite time interval, it is necessary that the boundary
**

layer system is exponentially stable in a neighborhood of the tuned slow solution x p (t) for

all t ≥ t0 . This may not be a simple proof, and it will be left for future investigation. Instead,

the effectiveness of this approach is shown below using simulation.

**An intuitive yet not completely rigorous explanation for the resulting good behavior in
**

the infinite time interval can be given with the help of Fig. 4.2. Notice that the Hurwitz nature

of Jacobian (10.13) is only lost when y = x2 − x4 = 0. Since the fast motion, z, evolves with

almost constant y (vertical lines in Fig. 4.2), y will not reach the value zero during this

motion provided that y is initially far enough from zero. Once the slow manifold is reached,

the slow variable will evolve in the domain z = 0. This domain corresponds to the case when

the adaptation mechanism has reached its objective and parameter a is correctly estimated.

In this domain y may reach the value zero but, intuitively, it is assumed that the system, once

the adaptation law has reached the correct value, will present a behavior that is similar to the

known load case, whose stability is proved in Chapter 3.

0.015

0.01

kzk

0.005

0

12

3

10 2

8 1

0

6 −1

−2

4 −3

x2 x1

**Figure 4.2: Evolution of two trajectories in the state subspace (x1 , x2 , kzk). The last part of the
**

trajectory is in the plane kzk = 0.

52 4.3. Conclusions

4.2.6 Simulations

The inverter parameter values are the same as those for the known load case given in the

Subsection 3.2.4, where the load resistance has been 50Ω and, therefore, a = 0.01. The

desired output is

2

Vo = 220 √ sin(100π t).

2

**At time t = 0s, the chosen value for the adaptation parameter is â = 0.001 (which corre-
**

sponds to R0 = 1000Ω, i.e. the relative error is 90%). Later, at time t = 0.5s, a load variation

is produced from R = 100Ω to R0 = 1000Ω, such that, parameter a is again equal to 0.01

**Once again, a commutation time of 50KHz is employed resulting a sample time of 0.1T
**

s.

**Figures 4.3 and 4.4 show the evolution of the output voltage and the voltages of every
**

boost DC-DC after t = 0s, respectively. Note that the circuit tends to the desired behavior.

During this period the adaptation mechanism does not destabilize the system.

**Figures 4.5 and 4.6 show the evolution of the output voltage and the voltages of every
**

boost DC-DC around t = 0.5s, respectively. Note that the circuit continues with the desired

behavior. The time scale is the real time scale before the change of variable. Note that during

this time, when the perturbation in the resistance and, thus, the corresponding adaptation

mechanism is activated, the output signal does not undergo any significant variation.

**The adaptation of parameter a is represented in Figs. 4.7 and 4.8 where the load-change
**

instants in the transition and steady-state are zoomed respectively. Note that the adaptation

is very fast relative to the time scale of the system. In each of these graphs two evolutions

are presented for two different values of ε . Note the smaller ε is, the faster the adaptation is.

4.3 Conclusions

**In this chapter an adaptation law is added to the previous control law in order to deal with a
**

common and important problem in the field of electronics: slowly varying and/or unknown

loads. For that, an adaptive control for unknown load is developed, which adapts the load

very fast with respect to the time evolution of the system. The method is based on using a

state observer on one-sided inverter and assuming that the state variables are measured.

The stability of the complete system is proved by rewriting the system in the standard sin-

4: Output voltages of the first (solid) and second (dashed) boost DC-DC converters with the adaptation for an unknown load in t = 0s.06 0.04 0. .Chapter 4.08 0.02 0.1 t(s) Figure 4.02 0.08 0. v2 (V ) 500 450 400 350 300 0 0.1 t(s) Figure 4. 600 550 v1 .3: Output voltage with the adaptation of an unknown load in t = 0s.04 0. Adaptive control 53 300 200 100 Vo (V ) 0 −100 −200 −300 0 0.06 0.

6: Output voltages of the first (solid) and second (dashed) boost DC-DC converters with the adaptation for an unknown load in t = 0.3.45 0.5 0.5 0.54 4.5s.45 0. Conclusions 300 200 100 Vo (V ) 0 −100 −200 −300 0. 600 550 v1 .5: Output voltage with the adaptation of an unknown load in t = 0.55 t(s) Figure 4.55 t(s) Figure 4.5s. . v2 (V ) 500 450 400 350 300 0.

01 0.5 0.5 0.5 0.005 0 0 ã −0.01 0.01 −0. The perturbation is at t = 0s.01 in a) and ε = 0.Chapter 4.005 0 0 ã ã −0.5 t(s) t(s) Figure 4.5 0. Adaptive control 55 a) b) 0.001 in d).7: Time-evolution of the fast variable ã with ε = 0.005 0.01 0.01 0.01 −0. .8: Time-evolution of the fast variable ã with ε = 0.01 0. a) b) 0.5 0.005 ã −0.005 −0.005 −0. The perturbation is at t = 0.005 0.005 −0.001 in b).01 in c) and ε = 0.5s.01 0 2 4 0 2 4 t(s) x 10−5 t(s) x 10−5 Figure 4.

Conclusions gular perturbation form.56 4. ε . the observer matrix parameter. and the system frequency. an extension of this development could be done assuming that only the currents are measurable and including experimental results in order to validate all assumptions established in this work. α . is achieved in the analysis of the boundary layer fast subsystem. will be an objective for further investigation. and the perturbed variable parameter. γ . . Another impor- tant relationship between the perturbed variable parameter. ε . The assumption that voltage and current are measurable simplifies the observation prob- lem. No persistant signals are required to prove the stability and the no noise is included in the measurable signals. ω . are achieved. The stability proof extension for an infinite time interval.3. Finally. the stability is es- tablished by means of Tikhonov’s theorem [76]. As future work. hence some relationship between the adaptation gain.

(those regions are referred to regions in which such constraints are not active). In this chapter. a controller has been developed for the boost inverter. This attraction region is estimated by using a novel method developed in this chapter. The term saturation-like constraints is used for non-linear functions γ (u) that appear in the system model and they become the identity. Estimating an attraction domain may be involved if there are physical system constraints.91. Some of these tools could be further developed for application to non-polynomial systems as well [31]. Application of 57 . 146]. including saturation-like constraints. 151]. to estimate a region composed of all initial conditions corresponding to trajec- tories that converge towards the right system behavior. the objective is to estimate a satisfactory attraction domain for the boost inverter taking into account physical system constraints.156]. 76] and the references therein). There exist powerful mathematical tools that can be used in the computation of the maxi- mum acceptable level for polynomial systems [32. The system will be driven into this attraction domain by a starting phase. Functions of this sort include typical control signal saturation as well as others. 124. There exist many published methods to estimate the region of attraction (see. this is common on the field of electronics [13. A kind of such methods is based on Lyapunov theory: closed Lyapunov-function level surfaces enclose (conservative) estimations for the region of attraction [76]. These methods often employ polynomial systems [85. That is. containing control signal satura- tions. However.Chapter 5 Estimation of the attraction domain In the previous chapter. Other constraints on the state variables can be considered as well. Global stabil- ity of the closed-loop system has been guaranteed by a Lyapunov function. such as rate limiters. 68. for example. state and control-signal constraints including saturations have been disregarded. in certain regions of the state space that include the desired behavior. γ (u) = u. 111. This problem may present a high degree of difficulty due to the system and control-law nonlinearities. for ex- ample [54.

the trajec- tories of the system tend to the curves Γi = 0 for i = 1.40)) for boost inverter not has been only de- signed. but has been also proved that for all initial conditions except the origin.58 5. Nevertheless. makes control law (3. this problem becomes much simpler. These constraints are of several types: C1. However. 5. Usually saturation-like functions are only considered in the case of linear systems [5. 2) the desired attractor is not an equilibrium point but a limit cycle. this approach is employed to the boost inverter to estimate an attraction region. A simple idea that solves the problem of estimation of the attraction domain for poly- nomial non-linear systems (and some others) with saturation-like constraints and state con- straints is presented.40) not to be feasible in the full state space. This obvious idea may be successful in hard problems when all other methods fail. For sake of simplicity. there is no need to look for a Lyapunov function while estimating the domain of attraction and. In cases like these. which are one of the most common nonlinearities in practice.2 a control law (Eqs. (3. Using the Lyapunov function of this analysis. In this chapter. On the other hand. saturation-like functions. The search for a Lyapunov function by means of the numerical estimation method may be seen as an advantage as the user would not be required to propose a Lya- punov function. 114]. the estimated attraction region is included in the domain where the saturation-like constraints are not active and. 2. 2. namely rational functions.39)–(3. certain difficulties should be mentioned here: 1) the system equations are quite involved and can even present non-polynomial terms. Furthermore. Saturation-like constraint: sat10 (ui ) for i = 1. the computational method has to solve a much more difficult problem and it will be hard to tackle with systems of moderate complexity. this constraint is ‘soft’ in the sense that if . The application of the method produces good. there are several constraints in the state variable that make this analysis useless from the practical point of view. therefore. Problem statement these methods would imply to seek for Lyapunov functions in order to be able to deal with the constraints. 110. Both complications make the use of any other analysis method a formidable task.1 Problem statement In Section 3. results. thus. the phase controller dynamic is not taken into account either the adaptation law.1. 21. are usually out of the scope of these techniques.39)–(3. The idea is to take advantage of the unconstrained global stability anal- ysis and use this result to obtain a ‘conservative’ estimation of the region of attraction for the constrained case. in the application of this method to the boost inverter. Therefore. the method intro- duces a new source of conservatism. however. albeit conservative.

This means that the system state must remain within the boundaries of a pre-specified admissible (‘safe’) region. As for control designs. i= 2.40) are zero. such constraints are typically dis- regarded and the resulting control law is applied to the actuator. that is. 4. Capacitor voltages must be strictly positive in this circuit. The estimation of the domain of attraction should take into account these constraints. In this way. the resulting attraction domain may be affected by con- straints γ . 5. where γ (·) is a saturation-like function. This constraint is actually contained in C1. in every control system. However. u). the control signal is subject to physical constraints such as saturations. since in a neighborhood D of the desired attractor they are not active. rate-limiters. the control law is not feasible when any of the denominators in (3.2 is no longer valid for the system with constraints. Assume that there exists a ‘forbidden’ region in the state space. Formally. The analysis can also take into account state variable constraints in the following sense. i = 2. 4. the analysis of Section 3. Normally. γ (α (x)) = α (x) ∀x ∈ D. This study deals with the estimation of this attraction domain based on a stability analysis that neglects the constraints. The point may nonetheless still lie inside the attraction domain of the desired limit cycle. since denominators close to zero would imply large (positive or negative) values for ui . (5. Consider a control system type defined as such: ẋ = fa (x. the actual control signal is u = γ (ud ) = γ (α (x)). It is however quite common to neglect the actuator constraints in the stability analysis so as to simplify the analysis. Estimation of the attraction domain 59 the system arrives at a point where the constraints are violated. the local stability property is not usually affected by these constraints. C2. Therefore. if the de- signed control law is ud = α (x).2 An approach of estimation of the attraction domain. which implies xi > 0. etc. C3.1) . the problem can be stated as follows: Actual system. these constraints are saturation-like. The objective of this work is to obtain a (possibly conservative) estimation for the region of attraction of the resultant system taking these physical constraints into account. Finally. This is a ‘hard’ constraint since this situation should be avoided.39)–(3.Chapter 5. In fact. where x is the state variable. This approach is valid when the actual expression for u is used in the stability analysis of the resultant system.

. Unconstrained system Assume that an approximate model of the system is ẋ = f (x. u) ≡ fa (x.3 Consider system (5. u ∈ Rnu . The advantage of the relative ease with which it is obtained.1 The control objective is not necessarily the stabilization of an equilibrium point. due to physical considerations. u). ∂∂Vx f (x. α (x)) ≤ 0. A conservative estimation of the region of attraction can then be easily obtained. as seen in the examples in Section 3. △ Assumption 5.1) with control law u = α (x). that is. The key is clearly to ensure that the system state remain within the boundaries of the region where saturations are not active. is compromised by the fact that it may be far too conservative. assumption 5.1). Assumption 5.2) for a given control objective. Let be A = D ∩ T .2) where function f : Rn → Rn and. Let M be the largest invariant subset of the set for which V̇ = 0 in Ω. besides. By the LaSalle invariance principle. Notice that if the original Lyapunov theorem is used to prove global stability. Remark 5. Assume that a control law u = α (x) has been designed for the unconstrained model (5. Furthermore. The problem lies in the estimation of the domain of attraction. u). Function fa may include saturation-like functions. f (x. Nevertheless. where g : Rn → Rng . It is assumed that this set can be estimated by a set of inequalities g(x) ≥ 0. but perhaps the stabilization of limit cycles. the intersection between the safe region and the region where the saturation-like functions are not active. where x ∈ S ⊂ Rn . the previous assumption is also fulfilled. The reader can con- sider that this approximate model includes neither the saturation-like functions nor the state constraints.2 guarantees that the trajectories of the unconstrained model tend to M . for instance. Assumption 5.2 also guarantees local stability for system (5. the state of the system must not go out of an admissible region T. An approach of estimation of the attraction domain. however. It is implicitly assumed that this is the desired behavior.2.60 5. can be considered.2. in many problems this simple idea may give satisfactory results. in D.2 There is a widely known radially unbounded Lyapunov function V (x). thus introducing new constraints. in which a compact positively invariant set Ω. (5.

Therefore. the present method is conservative. u) with constraints in both the state variables and the control input g(x) ≥ 0. the problem is reduced to finding a value c > 0 such that g(x) ≥ 0 at the points where V (x) ≤ c. In order to use numerical tools for the determination of c. Nevertheless. the optimization problem can be stated as follows: . Furthermore.5 Since M ∩ Ωc ⊂ M . Proof: Since in Ωc the saturation-like constraints are satisfied. The statement can be vali- dated by applying LaSalle’s invariance principle. In this case the conservativeness is mainly due to two facts: • The estimation of the region of attraction is restricted to domains in which V ≤ c. the constraints g(x) ≥ 0 are satisfied. there may be points where the saturations are active in the actual attraction domain.2 and 5. Using Theorem 5.Chapter 5. all trajectories of the system with constraints starting at Ωc tend to M ∩ Ωc .4 Under assumptions 5. the results for the un- constrained system are valid in Ωc . • The method considers the saturation-like functions as hard constraints.3.4. Remark 5. assume that there exists a constant c > 0 such that in the set Ωc = {x : V (x) ≤ c}. as will be seen in the next sections. Then. A ‘conservative’ estimation for the attraction domain of the system with constraints is given by the following theorem: Theorem 5. Remark 5. The problem lies in estimating a region of attraction for the real system with constraints when this control law is applied. Estimation of the attraction domain 61 Now the problem can be transformed as follows: Given a control system ẋ = f (x.6 As with other techniques for estimation of attraction domain. assume that a control law u = α (x) has been designed such that global stability is confirmed when no constraints are taken into account. the theorem guarantees the desired asymptotic behavior for the system with constraints. V̇ ≤ 0 in Ωc and Ωc is positively invariant. since V (x) is radially unbounded Ωc is compact.

the constraints gi (x) ≥ 0 are satisfied at the points on the boundary of Ωc .8 The region of attraction is estimated without the necessity of computing V̇ .9 Functions f (x. Remark 5.. u) and g(x) are polynomial.2. . thus. For this. A multivariate polynomial p(x) is said to be a SOS. To observe this. i = 1. if there exist polynomials f1 (x). thereby increasing problem feasibility. thus. An approach of estimation of the attraction domain.2. As functions pi ≥ 0. The pi functions lend even more degrees of freedom.. In this work. .. . the above constraints are reduced to pi (x)gi (x) ≥ εi > 0. The purpose of constraint (5.1 Sum of squares optimization Sum of squares optimization is an optimization technique based on the Sum Of Squares (SOS) decomposition for multivariate polynomials. fm(x). Furthermore. A SOS program has the following form [117]: Minimize the linear objective function rT c. . a new assumption is needed. N.. The introduction of εi parameters constitute a new source of conservatism. in the interior of this set. (5. . N. these constraints are also satisfied.3) is to validate the Theorem 1 hypothesis. . Problem 5. 5. such that: m p(x) = ∑ fi2 (x) i=1 and therefore. The small εi constants are pre-specified and are necessary in order to avoid problems at the points where pi (x) = 0. p(x) ≥ 0 [117]. .. notice that at the boundary of the set Ωc . V (x) = c and. V (x) − c < 0 and. sum-of-squares optimization is used in order to solve this problem.7 Maximize c subject to: (V (x) − c) + pi (x)gi (x) − εi ≥ 0 i = 1.3) where pi (x) are unknown semi-definite positive functions and εi > 0. Assumption 5. where c is a vector formed from the (unknown) coefficients of: .62 5.

. i=1 where w is the linear objective function weighting coefficients vector. This method . which in turn are solved efficiently. e. j (x) = 0 for j = 1. calls the SDP solver. (5... i = 1. . for j = M1 + 1. j (x) + ∑ pi (x)gi. . any solution to SOS problem 5..11 Assumption 5. . Currently.. the application examples in the next sec- tion) can be considered. . 5.3 Application to the boost inverter The method developed before is used in order to obtain an estimation of the attraction domain for the boost inverter when system physical constraints are taken into account. M2 . This problem is more restricted than that presented in the previous section. and converts the SDP solution back to that of the solution of the original problem.. 2. . . SOS- TOOLS [116] is a Matlab toolbox that performs this conversion automatically..g.10 Maximize c subject to: (V (x) − c) + pi (x)gi (x) − εi are SOS. Several com- mercial as well as non-commercial software packages are available to solve SDPs. 2. j (x) + ∑ pi (x)gi. N1 • sum of squares pi (x). . N2 such that N g0. M1 . i=1 N g0. Nevertheless.g. .9 can be relaxed since other types of functions. . for i = N1 + 1.Chapter 5.. .7. The problem stated in the previous section can be addressed solving the following SOS problem: Problem 5.10 is a solution to problem 5. such as trigono- metric functions [109] or rational functions (e. Remark 5. j (x) represent certain scalar constant coefficient polynomials. N. SOS programs are solved by reformulating them as semi-definite programs (SDPs).4) where pi are unknown SOS polynomials. . . . j (x) are SOS. for i = 1. using interior point methods. and gi.. Estimation of the attraction domain 63 • polynomials pi (x). .

39)–(3. the problem to solve is minimize (−c) (5.39)–(3.5)–(2. (5. under no constraints. constraints (1)–(3) can be written as polynomial constraints: • di (x) − ni (x) ≥ 0 i = 1. 2 • x2 > 0 • x4 > 0 Thus. Remind that the Lyapunov function used is: Γ21 Γ22 V= + . which are given by (3.39) and (3. Furthermore.40) are not polynomial but rational functions. in a neighborhood of this curve. Otherwise. writing them as quotient of polynomials ui (x) = ni (x)/di (x) all the constraints can be formulated in standard form. control laws (3. By numerical inspection.40) are not valid for this problem.6) . With this consideration in mind.5) 2 2 The constraints are (only constraints C1 and C2 are presented here.8) with control laws (3. by continuity. Application to the boost inverter is useful because the model and control law have a relative high degree and complexity. all trajectories (except the one starting at the origin) of system (2. for the circuit parameters given below. 2. 2 • ui (x) ≥ 0 i = 1. d(x) > 0 on Γi (x) = 0. Nevertheless. For this. the global stability proof for the unconstrained problem is available by means a Lyapunov approach. Therefore. In Chapter 5. constraint C3 will be discussed later): • ui (x) ≤ 1 i = 1.40) tend to the desired limit cycle.1 it has been proved that. 2 • x2 > 0 • x4 > 0. it can be assumed that polynomial d(x) does not vanish at any point of the objective curve Γi (x) = 0 i = 1.64 5. 2 • ni ≥ 0 i = 1. the sign of d(x) is constant along Γi (x) = 0 and.3. it can be checked that. The expressions for u1 and u2 .

the constraint x2 ≥ 0 is violated. which corresponds to V (x(1) ) = 33.16) implies d(x) ≥ n1 (x) + ε1 and d(x) ≥ n2 (x) + ε2 .4.66 GHz Intel Core2): 23. This result is probably conservative as has been pointed out in Remark 5.02. saturations are neglected in many stability analysis.11) (V (x) − c) + p6 (x)x4 − ε6 ≥ 0 (5. For this a method for the estimation of the attraction region considering general physical constraints is presented.9) (V (x) − c) + p4 (x)n2 (x) − ε4 ≥ 0 (5.4 Conclusions The problem considered in this chapter is the estimation of the attraction domain for the boost inverter with the control law proposed in Chapter 3.10) (V (x) − c) + p5 (x)x2 − ε5 ≥ 0 (5. The following analysis can be directly modified for the case when d(x) < 0. by numerical inspection. for V (x) ≤ c. for V (x) ≤ c. Estimation of the attraction domain 65 subject to: (V (x) − c) + p1 (x)(d1 (x) − n1 (x)) − ε1 ≥ 0 (5.2 5. As a way to corroborate this result.10) implies n1 (x) ≥ ε3 > 0 and n2 (x) ≥ ε4 > 0. This implies that d(x) > 0 in V (x) ≤ c. Software SeDuMi [144] was used as the SDP solver under SOSTOOLS.1 0. The values for parameters εi are chosen equal to 10−6 while the chosen order for the unknown polynomials pi is 3. This is a common situation since. This makes that the computed attraction domain is a ‘conservative’ estimation.9)–(5. it has been found that for x(1) = (0 − 0. which does not present a global stability due to certain physical constraints. This method is useful even when the degree and complexity of the equations is high.2. This approach can be applied to systems with a global Lyapunov stability achieved without considering saturations and other kind of limitations. while constraints (10. finding the maximum Lyapunov level in such a way that constraints are fulfilled inside it. respectively.15)–(10. respec- tively. con- straints (5.8)⊤.8) (V (x) − c) + p3 (x)n1 (x) − ε3 ≥ 0 (5. 5.26. The idea is to take advantage of the Lyapunov level sets.12) Notice that constraints C3 are considered in the previous set of constraints.6.7) (V (x) − c) + p2 (x)(d2 (x) − n2 (x)) − ε2 ≥ 0 (5. Indeed. Results The values of the circuit parameters are taken from Subsection 3. .Chapter 5. The solution is obtained in approximately ten minutes on a PC (1.

such as SOS. For simplicity reasons neither phase controller nor adaptive control has been taken into account. In the application to the boost inverter the system as the constraints are rewritten in a polynomial form. . Consequently. Conservativeness of the method has also been discussed.4.66 5. as the method requires. Conclusions For application of the method. Therefore. the problem is transformed in a sum of squares optimization problem. there exist cases where SOS programming have been applied to trigonomet- rical and other terms [109]). the closed-loop system needs to be polynomial or ra- tional (however. powerful computational tools exist when the system is polynomial.

Part II Controlling a DC-DC Vdd-Hopping converter 67 .

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65nm and.1. looks for architecture and design solutions that allow the production of embedded computational platforms in its scalability limit.minalogic.com/ 2 The common computational unit of a SoC is composed of clustered nodes [74] 69 . Consequently. 6. ARAVIS project (Architecture avancée Re-configurable and Asynchrone pour Video et radio logicielle Intégrée Sur puce) sponsored by Minalogic1 . an example of this problem is shown. In Fig. such as PCs. The ARAVIS project is focused on three technology keys: • re-configurable structure with respect to applicability requirements. The main problem in this kind of scale is the occurrence of technology variability phenomenon [154]. It proposes a generalization of certain techniques in order to obtain a solution to the technology variability problem in 32nm. 1 http://www. It can be accom- plished by programming the flexible interconnections between the clustered nodes of the SoC computational unit [113].Chapter 6 Introduction The development of low-power electronic devices has raised up in recent years. even. mobile devices and digital consumer equipments. that generates quite disparate performances in a same chip. what will represent an input toward the development of a new paradigm. a new architecture must be developed in order to answer to this issue. Very-Large- Scale Integration (VLSI) is mostly used in products related to information technology. Motivated by the Moore’s law and market evolutions [132]. Currently System on Chips (SoCs) technology: 90nm. 45nm can not be applied any more to the technology of 32nm due to the semiconductor material behavior in small scale. This part of the thesis is included in the ARAVIS project context. It presents a fault or low performance of a computational node2 in high speed.

in order to release the com- munication constraints between remote points. 122]. which are at the limit of the scalability.70 Figure 6. 65. and • dynamic management of the power consumption and activity with respect to con- straints are achieved by control theory application [30. This second part of the . what is one of the challenges in future embedded architecture.2 shows chips integration in 32nm scale.2: Integration of future 32 nm chips. power consumption and Quality of Service (QoS). to be designed in order to make the perfor- mance fits the requirement.1: Technology variability problem in a chip in a computational node working in high speed. Figure 6. • Globally asynchronous locally synchronous method [92]. This dynamic management is especially difficult for 45nm and 32nm. minimizing the energy losses on a chip. The last key looks for achieving a good trade-off between activity. Figure 6. Advanced control strategies have. therefore.

3 shows these different control loops. . No. of Instructions2. Figure 6. For this dynamic control loop in frequency and voltage is more and more important in the embedded systems [122]. the power-saving. Vdd f. Introduction 71 thesis focuses on designing control strategies for certain loop of the chip that optimizes the energy consumption. one of the challenges in the ARAVIS project is the energy- consumption reduction in SoCs. which can be got by means of automatic control methods. Deadlines1 Speed2. cluster computational power and management of the quality of service provided by the application [30]. 6. Thus.3: Sketch of the three control loops.Chapter 6.Hopping Vdd . these control loops allow the adaptation of computational power in the cluster level. Deadlines2 QoS Controller Figure 6. Cluster Cluster f.Hopping Programmable Programmable Ring Ring Energy Controller Energy Controller Speed1. Control loops can be applied in different architecture levels: cluster frequency and voltage supply. and hence. Vdd Processing Nodes Processing Nodes Voltage Controller Voltage Controller Vdd .1 Optimization of the energy consumption in SoCs As has been mentioned before. No. Generally. the power consumption can be reduced if the local core voltage or/and the clock frequency are decreased. of Instructions1.

applying ‘robust control’. Note that this converter is composed by two supply sources and a Power Supply Selector (PSS) [99]. 3 P-channel Metal-Oxide-Semiconductor field-effect transistor. however. 136]. This solution reaches a control that can reduce or. Dynamic Voltage Scaling (DVS) is a known technique that manages the system power consumption [27. 157] adapted to Globally Asynchronous and Locally Synchronous Systems (GALS) systems [92]. 89. This mode of operation provides additional flexibility. In [39]. 6. computational limitations and global energy consumption. reducing the converter required size. DVS is applied in every synchronous block. which provides good performance. that is why.4. In this structure.2 Vdd-Hopping DC-DC converter Microprocessors in SoC have a computational load that requires a time-varying performance. if they reach to operate at the minimum performance level required by the active software processes.72 6. Therefore. DC-DC converters are a key element in a DVS mechanism.2. The main idea for GALS systems is to replace the global clock by several independent synchronous blocks. The last control loop employed in this kind of architecture looks for a trade-off between QoS. limits SoC scaling properties due to the size of inductive component. these converters have a different structure than the standards ones. . Vdd-Hopping DC-DC converter Another control loop is used in order to achieve an energy-performance trade-off. Vdd-Hopping converter is specially interesting. However. The system must not always work in the maximum power level if it can work in other lower power levels. since they can adapt this supply voltage. the SoCs can achieve a substantial energy efficiency. Every synchronous block op- erates with an own internal clock and they are communicated asynchronously by each other. whose basic structure is showed in Section 6. A dynamic continuous buck converter for DVS systems was presented in [88]. a Vdd-Hopping DC-DC converter was developed. This fact allows to use energy-aware converter structures such as DVS architectures. a control solution has been presented. It. because they must change the operating voltage in a dynamic way [23]. because it may deal with Local Dy- namic Voltage Scaling (LDVS) [23. In the framework of SoC miniaturization. even. reject the influence of the variability problem. This is possible if each task is performed before to certain deadline [45]. it is called LDVS. The operation principle is to adjust the processor supply voltage to the minimum level of performance required by the system application. the inductive element is replaced by a set of PMOS transistors3. Consequently.

Likewise. also on the clock frequency. and sometimes. Introduction 73 The Vdd-Hopping converter. thus the load only depends on the voltage vc . source and bulk. A PSS is constituted by a group of PMOS transistors connected in parallel with common drain. This reduces the dissipated energy when the unit running is at low speed. for a unit running at nominal speed and a low voltage supply. the load model provided in [98] is employed. vc is the output voltage of the system. Other component in the PSS is a control block that provides a control signal uk for the PMOS transistors.4: DC-DC Vdd-Hopping converter structure. but separated gates in order to scale the output voltage from a low voltage level to a high voltage level (rising transient-period) and from a high voltage level to a low voltage level (falling transient-period). is basically made up of a PSS and two external supply voltages. Besides it generates a reference signal vr . A high voltage supply. This model approaches a low frequency in function of the core voltage. Vh . C. and a dynamic resistance. . In this thesis. It is composed of a current supply. the PMOS transistor that connects the Vl to the voltage output vc is switched on when Vl is the selected power supply.Chapter 6. Vl . that orders to the PSS to start the hopping sequence and the error voltage signal from a comparator e. ωn [98]. rL .5. a local power manager signal (LPM). Furthermore. 6. for a unit running at reduced speed. representing the dynamic and short-circuit consumption. It is shown in Fig. vc . Ileak . a capacitance. as has been mentioned before. Load model The load model taken in this work is an impedance which depends on the core voltage. this control block has as inputs: a clock signal (CLK). Vh Vl Set of PMOS uk vc e − CLK + CONTROL vr LPM Figure 6.

In addition. • small current peaks. A simple discrete controller was proposed in [99] to handle the two voltage levels of the Vdd-Hopping technique.3. 6. • fast transient periods.6 shows the control problem for the DC-DC Vdd-Hopping converter.74 6. Figure 6. • system stability. In this control structure only one transistor can be switched at each sampling time.3 Non-linear control application to Vdd-Hopping DC-DC converter Control objective for this kind of discrete DC-DC converter is to achieve the target voltage providing a correct and reliable operation during the switching transitions. Non-linear control application to Vdd-Hopping DC-DC converter C rL Ileak Figure 6. This limits the ability of the converter to make fast transient-periods. the employed voltage reference was a ramp with a computed slope to obtain the smallest possible current peaks. . and hence the possibility to optimize the energy consumption. allowing to ac- complish the main ARAVIS projet objective: SoCs miniaturization. Therefore. the control must achieve: • high energy efficiency.5: Load model. • robustness with respect to parameter uncertainty. • robustness with respect to delays and • easy implementation.

a set of high-performance control laws for the DC-DC Vdd-Hopping converter is developed. fast transient periods. it is also observed that the transient current peaks are reduced. the computational cost is increased. offering a suitable system performance by simulation even if it is time-varying. However. robustness with respec to parameter uncertainty. [8]. an adaptive controller is proposed for an unknown load resistive component. This allows to obtain a richer set of control sequences and. It will be seen that the most suitable controller is the one based on Lyapunov theory. However. an optimal evolution of the voltage reference will be computed applying optimal control theory [80. 103]. minimum current peaks and a suitable performance with unknown load resistive parameter.7 shows a sketch of this high performance controller.3. The different controllers are compared in terms of: transient response. . a better expected performance with respect to the issues previously mentioned. This optimal voltage reference is computed looking for minimizing the current peaks as well as energy losses.Chapter 6. 155]. Secondly. As a side effect. robustness with respec to delays and easy implementation. without the constraint that only one transistor can be switched at each sampling time. The controllers are developed in order to improve the tracking capability and its regulation characteristic.1 High-performance controllers In Chapter 7. Introduction 75 LDVS GALS Globally Asynchronous Local Dynamic Voltage and Locally Synchronous Scaling Architecture Systems Vdd-Hopping Converter Stability of the PSS + Two voltages sources closed-loop system CONTROL!!!!! high energy efficiency. Firstly. quality of the induced load current and power consumption. thus. small current peaks. 86. 6. Figure 6. Figure 6. which are very common properties in the field of microelectronics [70.6: DC-DC Vdd-Hopping converter control problem. this controller is enhanced in order to achieve a high energy saving.

7: Vdd-Hopping converter closed-loop with optimal reference and adaptation parameters. The controller with a feasible structure is a ‘linear controller. this controller is selected and developed taking into account the objectives given before to obtain a suitable controller for the ARAVIS project. it does not corresponds to a feasible solution for the ARAVIS project context. The only drawback is that it has a complex implementation. ADAPTIVE CONTROL OPTIMAL v∗ + Vdd-HOPPING vc CONTROL REFERENCE CONVERTER - Figure 6. Furthermore. 120]. An inno- vative approach based on saturations with time-varying limits that manages the current peaks during the transient periods is proposed for this controller. Now. Conse- quently. it reduces notably energy consumption. being energy-aware. . In summary. In Chapter 8. 87. This new developed controller must be easy to implement and maintain all the good characteristics obtained by the controller mentioned previously in Chapter 7. For this. what can exclude it from the ARAVIS project scope. there is one with a simple implementation. Non-linear control application to Vdd-Hopping DC-DC converter In spite of the good advantages that this enhanced controller offers. what makes it to present a simple implementation. another controller is devel- oped in Chapter 8 based on the one that presents the easiest implementation from the set of controllers previously presented. it presents much more computational blocks (more complex implementation) than the controller proposed in [99] and thus. 6.3. although.3. Nevertheless. this proposed ‘advanced linear controller’ is fo- cused on limiting the current peaks while transient periods are reduced.2 Energy-aware controller The previous proposed controller provides very suited properties. Hence. it takes a relevant interest in the industrial applications [17. this controller does not provide the best system performance. an ‘advanced linear controller’ is developed in Chapter 8. energy-efficiency is improved when a step voltage reference is used instead of a ramp voltage reference.76 6. from this structure. it does not only reduces the current peaks but achieves also a fast transient response and reduces energy dissipation. Among the set of controllers presented before. 84.

6. a com- parison with a previous controller published in [99] is performed. it is extended to the continuous-time version of the ENARC. This controller coincides with the ‘advanced linear controller’ mentioned before.3. there is a saturation with limits depending on system state. As the Vdd-Hopping model as the continuous-time version of the ENARC controller are nonlinear. Then. It is shown that this con- troller can diminish the energy consumption 96% with respect to the previous published controller.Chapter 6. This continuous-time controller has a saturation mechanism. the previous advanced controller is discretized. since the Vdd-Hopping system with the load is an hybrid system between analog and digi- tal elements (the controller will be implemented digitally). These results will be validated in the ARAVIS project by using VHDL-AMS4 simulator. an approximate global stability analysis of the equilibrium is developed for the Vdd-Hopping system with the continuous-time version of the ENARC controller [9]. controllers applied in the industry are implemented in discrete-time. This makes the analysis involve. This analysis is based on LaSalle’s invariance principle [76]. This is a very used powerful software. For simplicity. 152]. . It is capable to define the behavior of mixed-signal systems. The stability property is analyzed in Chapter 9. Introduction 77 Generally. because it describes digital systems as well as analog systems. Thanks mainly to its innovative current-peak aware the ENARC control becomes attractive for industrial applications. This assumption is very common [71.3 Approximate stability analysis for the energy-aware controller In Chapter 9. This analysis allows to have an intuition of the closed-loop system behaviour with the discrete ENARC controller. a preliminary stability analysis is performed for the Vdd-Hopping system with the ‘linear controller’ proposed in the set of high-performance controllers developed in Chapter 7. Among their nonlinearities. For the last characteristic. the system can work in three 4 It is a hardware description language used in electronic design automation. small current peaks. Hence that. other control objectives are achieved: faster transients. this analysis is performed in continuous-time and it is not rigorous. and easy implementation. In order to show the consumption energy saving that this controller may achieve. it is remarked that this controller needs less computational blocks than the other controllers presented above. For sake of simplicity. It is expected that the ENARC controller is physically implemented in the new generation of SoCs of 45nm and/or 36nm developed in the project context. This control law is patent pending under the name of ENergy-AwaRe Control (ENARC) [6]. In addition.

The delays are presents in the input and output of the control block for computational and synchronization issues. Once the global stability analysis is ensured for the ENARC controller. The stability proof is performed in two parts. delays and parameter uncertainties have not been considered in the Vdd-Hopping . Firstly. this controller is improved in order to satisfy the control objective of achieving robustness with respect to uncertain parameters and delays. Non-linear control application to Vdd-Hopping DC-DC converter operating-modes: non-saturated system (Region I). the control ob- jective that must be dealt with are: the robustness under delay presence and parameter un- certainties. e Ω2 Region II P2 Region I Region III σ Figure 6. This analysis applies LaSalle’s invariance principle for a bounded domain limited by a Lyapunov level curve and the saturation limit lines. it crosses the saturation limit to the Region I without being able to return towards the saturated mode. saturated system in the upper limit (Re- gion II) and saturated system in the lower limit (Region III). in Chapter 10.8 represents this idea. respectively.3.8: Representation of the system operating regions 6.3.4 Advanced energy-aware controller Previously. which not only satisfies certain requirements for SoCs. and that. Secondly. Now. an energy-aware controller has been presented. it is proved that the system in saturated mode converges to the non-saturated mode in finite time.78 6. It is proved that the equilibrium is placed in Region I. Figure 6. it is also proved that the system converges to the desired point in Region I. but their stability properties have been also proved. So far.

Chapter 6. Introduction 79

**system. In SoC, however, these issues are very usual [112, 140]. The controller presents
**

delays due mainly to two reasons: synchronization issues and power-performance trade-

off [45]. In addition, another point to take into account is the parameter uncertainties, which

can cause an unpredictable impact on the power, performance and reliability of the system

[34, 93].

**In Chapter 10, the ENARC controller is improved dealing with delays and parameter
**

uncertainties. A sub-optimal ‘conservative’ control tuning approach for the control gains is

presented based on linear control theory. This method is sub-optimal because, for simplic-

ity, it is developed for an approximate ENARC controller version that does not consider the

current-peaks management. The sub-optimal control gains are obtained solving a H∞ control

problem [26, 53, 101]. This problem is dealt with Lyapunov Krasovskii theory [53, 138],

which provides some stability conditions through Linear Matrix Inequalities (LMIs). Con-

sequently, a robust equilibrium stability as well as a robust disturbance rejection under pa-

rameter uncertainties are ensured for a delay-time system. This kind of approach are used in

industrial applications [14, 129].

**In this chapter, the robustness properties achieved by the closed-loop system with the
**

sub-optimal constants applied to the ENARC controller are shown by simulations.

**In summary, the ENARC controller with the sub-optimal constants applied to the Vdd-
**

Hopping DC-DC converter can satisfy all the control objectives mentioned before for low-

power technology. Therefore, it can have an important impact in the recent trends in the

miniaturization of electronic devices.

80 6.3. Non-linear control application to Vdd-Hopping DC-DC converter

Chapter 7

**High-performance control for the DC-DC
**

Vdd-Hopping converter

**The development of low-power electronic devices has raised up in recent years. Very-Large-
**

Scale Integration (VLSI) is mostly used in information technology related products, such

as PCs, mobile devices and digital consumer equipments. In a System on Chip (SoC), sev-

eral levels of supply voltages are required to reduce power consumption. It can be reached

applying the Dynamic Voltage Scaling (DVS) concept, which is an interesting method that

manages dynamically the microprocessor supply voltage Vdd according to various loading

conditions.

**DC-DC converters may be used in order to apply the DVS concept. Among this kind
**

of converters, a high efficiency discrete converter is found: the DC-DC Vdd-Hopping con-

verter [99], which is implemented applying, as its name references, the Vdd-Hopping ap-

proach [75, 106, 128]. This technic delivers two distinct small voltage levels with a very

small current, according to the required performance level. Consequently, it achieves a high

energy-efficiency. Therefore, its operation principle is to vary the voltage from a low voltage

level to a high voltage level, and reciprocally.

**A controller for this DC-DC converter must be developed taking into account the context
**

where it will be implemented. One of the main control problem in low-power DC-DC con-

verters is to achieve a high energy-efficiency. Furthermore, DC-DC Vdd-Hopping converters

must be able to adapt to various loading conditions and achieve high efficiency over a wide

load-current range, which is critical for extended battery life. Moreover, to keep the rate

of change of the device voltage providing a correct and reliable operation during the switch

transition is also important.

In this chapter, a set of controllers for the Vdd-Hopping converter is developed, obtaining

81

the execution of the control laws designed here) is performed before a deadline and that the minimum required local clock frequency that guaranties the critical path (longest path delay) of the whole chip is fulfilled [45]. The main objective is that the core voltage vc achieves the high and low voltage levels by switching the PMOS transistors. firstly the frequency is fallen.4 shows this connected Vdd-Hopping structure.1 shows an electrical representation of the Vdd-Hopping converter without the low voltage supply. the clock fre- quency has to satisfy that the task (for instance.2. Figure 7. the power consumption in a SoC can be reduced if the local core voltage or/and the clock frequency are decreased. On the contrary. one transistor must always be switched on. that is why a GALS systems is developed in the ARAVIS project where the Vdd-Hopping converter is embedded. the obtained high performance controller can acquires a high consideration on electronic devices. Generally. connected to the load that has been described in Section 6.1. 7. 106. at least. Consequently. 6. 128] in order to obtain a LDVS archi- tecture for a GALS system. in order to take into account all of these issues in a GALS system when the frequency and voltage have to rise. what is very important in the field of microelectronics. Mathematical model of Vdd-Hopping mechanism a high-performance. 6. when the frequency and voltage have to fall. 7. In this configuration. and later the voltage is fallen.4).82 7. Figure. firstly the voltage is rising and later the frequency is rising.1 Mathematical model for control design For simplicity the low voltage supply. since it does not need passive components.1 PMOS transistors are modeled as ideal resistors when they are switched . Among these proposed controllers. Likewise. Nor- mally. is disregarded for control design purposes (see Fig.1. Vl . an adap- tive controller is proposed to deal with the unknown load resistive parameter. Assumption 7. Vl . Likewise. the one that offers a best transient performance is selected and enhanced with the aim to deal with the unknown resistive com- ponent of the load as well as to minimize the dissipated energy and current peaks.. Current peaks and power consumption are minimized by computing an optimal evolution for the voltage reference.1 Mathematical model of Vdd-Hopping mechanism The discrete DC-DC Vdd-Hopping converter presented in [99] for SoCs shows several ad- vantages: high efficiency and reduced size. This converter uses the Vdd-Hopping technique [75.

The current through the set of PMOS transistors. uk ∈ U = {1. High-performance control for the DC-DC Vdd-Hopping converter 83 CONTROL uk M1 R1 M2 R2 Mn−1 Rn−1 + Mn RN Il (vc) IMPEDANCE vc Vh Z(vc) − Figure 7. fclk ) = Idyn + Ishort + Istat + Icap (7. thus. it can be assumed that all transistors have the same transistor resistance R0 = R1 = R2 = . R0 is the PMOS transistor resistance. voltage supply and load. = RN .1: Vdd-Hopping. . Il . In this work.. as mentioned in Section 6. Kdyn . They are considered to have the same electrical characteristic. depends on voltage vc and control signal uk . (7. . . where Ruk .4) Ileak = Kleak (7. Vth is the . Likewise.2.5) dvc Icap = C .3) Ishort = Kshort fclk (vc − 2Vth )3 (7.Chapter 7. (7. the load model presented in [98] is employed: Il = f (vc . 2. Kstat and Kleak depending on the real consumption estimation.2) Idyn = Kdyn fclk vc (7. Thus. Il varies during the hopping transients.1) Ruk uk uk is the number of transistors switched on.6) dt where C. In this kind of system.N} and it is the control variable. . The voltage loop equation yields the relationship Vh − vc R0 Il (vc ) = . on and as resistors with infinite resistance when they are switched off.

vc . the asso- ciated error voltage equation is ė = −β e + b(vr −Vh )uk − buk e + β vr + δ + v̇r . with system (7.84 7.2: Load model. which must fulfill vc > 2Vth . Later. and on load parameter C. t f − t0 t0 where t0 and t f are the initial and final time. where vr is a voltage reference. Mathematical model of Vdd-Hopping mechanism threshold voltage. CR1 L > 0 and δ .2 shows the representation of the load model used in this research. R0 . Figure 7. The voltage equation can be expressed as v̇c = −β vc + b(Vh − vc )uk − δ . (7. which represents the clock fre- quency.2)–(7. may be approximated as a function of the core voltage. (7. rL dt. • b . vr − vc . Il IMPEDANCE Icap Idyn + Ishort C rL Ileak Figure 7.1. firstly. Assume that RL has the same value in the falling transient period. Thus.7) where • β .1). And fclk . Eqs. For simplicity reasons. Let us combine the specific form of the load. an constant average value of rL is taken in order to design controllers. rL represents the dynamic resistance. the real time-varying parameter.8) . Ileak C > 0 depend on the load. will be taken into account. (7. in the rising transient period.6). CR1 0 > 0 depends on PMOS resistance. The averaged load resistance RL is given by Z tf 1 RL . Define the voltage error as: e . respectively. rL .

and different control methodologies are used in each case. Likewise.4 shows a simulation for this controller by using Matlab.08V and the slope of the reference signal. . and system clock frequency is ωn = 500MHz. Remark 7.2V . under the form: uk = satN 1 {uk−1 + sign(e)} (7. 7. vc . This signal has a slope specified by the designer. no more than one transistor switches at each sampling time according to the sign of the voltage error. 7. N = 24 is taken as the total number of PMOS transistors in the model shown in Fig.2 − ∆h .067 · 106V /s.9) was the only published controller. the capacitance is C = 9nF while Kleak = 1. ∆h depends on the voltage supply. High-performance control for the DC-DC Vdd-Hopping converter 85 7. Note that. Previously to the works developed in this thesis [8.2. must be Vch = Vh − ∆h where ∆h ∈ R and is small. The system resistances are RL = 27. All these controllers are designed to provide stable behaviors. fulfilling the requirements mentioned before.41Ω. 9]. Note that the performance presents an oscillatory behavior.2 For physical reasons. the threshold voltage is Vth = 0. Therefore.2 Control laws The objective of this section is to present some high-performance control laws for the Vdd- Hopping converter. 7.8V and the high voltage level Vch = 1.4V . is ∆h = 0. PMOS resistance and load parameter. Fig.9) In this law. is 1.67 · 10−3. control (7.3 shows the implementation of this controller. Vh . Some simulations are performed. which is inspired by [99]. vr .7Ω and R0 = 31. this controller has the limitation that one only transistor can be switched on or off at every sampling time. In these simulations. such that the behavior of the closed-loop system with the different controllers are shown. follows a linear time evolution between the low voltage level Vl = 0. The sampling frequency has the same value that the clock frequency. at least.1. vr .1 Control proposed in [99] The development of the set of the high performance controllers for the Vdd-Hopping con- verter is inspired by the ‘intuitive control’ used in [99]. The difference between the high voltage supply. the maximum voltage achieved.Chapter 7. with important current peaks. one active transistor must be always switched on. and the high core voltage. The voltage supply is Vh = 1. Figure 7. Vc h . The reference signal.

Control laws will be designed using directly the nonlinear continuous-time equation (7. Assumption 7.86 7. as long as the number of transistor is limited by 1 and N. Remark 7.8). respectively. the closed-loop system performance can be enhanced. 84.2. It has to be designed to cope with possible steady-state errors. it will be seen that. since they corresponds to the lower or higher voltage level.2 Controller No. 120]. other control alternatives are proposed without the constraint that only one transistor can be switched on or off.3 Every control law is designed in such a way that the desired output voltage corresponds to one of the saturation bounds 1 or N. namely a PI (Proportional- Integral) controller. This approach is very common in the field of automatic control [71. This introduces a saturation in every control law for the Vdd-Hopping converter.2. 81]. However. The time evolution for the reference signal employed in [99] is maintained in the sim- ulations of each developed controller in this section. 1: linear controller The first proposed controller is based on a linear structure.4 The sampling time is chosen in such a way that the controllability and observability properties are preserved. In what follows. 7. This controller is the most common industrial control solution [17. later. The implementation of these discrete-time controllers are shown by block diagrams. This will lead to a continuous-time controller expression that will be approximately discretized. . Control laws CONTROL vr + 1 e vc − −1 + uk satN 1 uk−1 + z −1 Figure 7. by means of choosing an suitable reference.3: Intuitive control from [99].

6 0.5 0.6 0.10) where σ corresponds to R t+Ts 1 t edt and being Ts = ωn the sampling time.9 1 t(s) −6 x 10 c) 0. number of transistors. High-performance control for the DC-DC Vdd-Hopping converter 87 a) Nmax=24 20 NTrans 10 Nmin=1 0 0 0. c) current. For this. low and high voltage level.2 Vch=1.2 0.2 0. The tuning process must take into account the sampling frequency.11) b(Vh −Vl ) ωn2 K2 = .2 0.10) can suffer wind-up.06 I(A) 0.7 0. load parameters and PMOS resistance.7 0.5 0. the closed-loop system is asymptotically stable to the equilibrium point [e.6 0. Evolution of: a) number of PMOS transistors switched on. The proposed control law is: 1 round {K1 e + K2 σ } . the closed- loop system is linearized around a set point. constraints on ξ are obtained.04 0. Il .4 0. i. σ ] = [0.1 0.8 0.1 0. This phenomenon has .4: Intuitive control. The closed-loop system with control (7.12) b(Vh −Vl ) being ukl the minimum value of transistors that have to remain switched on.7 0. uk l = 1. the mini- mum value of uk .e. and ξ is a design parameter.1 0.12 V(V) 1 Vl= 0. The constants K1 and K2 are tuned off line.5 0.Chapter 7.08 0. uk = satN (7.8 0. K = [K1 . σ̄ ].3 0.02 0 0 0.8 0 0.9 1 t(s) −6 x 10 b) Vh= 1. such that. b) vr (dashed) and vc (solid). This tuning mechanism is 2ξ ωn − (ukl b + β ) K1 = (7.8 0.9 1 t(s) −6 x 10 Figure 7.3 0. A tuning method is proposed to ensure the right system performance.3 0. such that. In Chapter 9..4 0. K2 ] are defined by ensuring that A + BK is Hurwitz.4 0. (7.

08].88 7. for digital implementation. Nevertheless. 0. the equilibrium stability will be able to be guaranteed according to Chapter 9. 7. . (7.13) where K2 K̄1 . K1 − (7. In this simula- tion is chosen as design parameter value ξ = 0. (7. It is highlighted that in the performed simulations this effect has not displayed.5 shows the approximate discretization of this controller. CONTROL vr K̄2 + + ek + + vc K̄1 − − z −1ek−1 + uk uk−1 round satN 1 + Figure 7. K2 Ts . as it can be seen in Fig.15) are common relationships between continuous. Fig. 7.and discrete- time system [104].6 shows a simulation of the system (7. Control laws not been studied and it is a future work.14)–(7. The discretization of this controller is: uk = sat1N {uk−1 + round(K̄1 ∆ek + K̄2 ek )} .14) 2 K̄2 .2.15) Equations (7.05. it still presents some peaks in the current signal. Therefore.13). Figure 7.5: Digital PI controller.1) results [0. This controller could be the most suitable for physical implementation not only because it requires a reduced number of computational blocks.01. it provides better performance in both voltage and current variables with respect to the intuitive controller. Moreover.1 (in Section 9.6. The interval I defined in Lemma 9. Next up. but also because it does not require model information.8) with control (7.

Remind that σ = R t+Ts t edt.2 0.16) b(Vh + e − vr ) where K3 and K4 are positive constant. . Evolution of: a) number of PMOS transistors switched on. High-performance control for the DC-DC Vdd-Hopping converter 89 In summary.2 0.4 0. a) NTrans 20 10 0 0 0.2: feedback linearization The second proposed controller is designed by using feedback linearization technique. The controller has the following form: edt + β (vr − e) + v̇r + δ R t+Ts K3 e + K4 t uk = (7.05 0 0 0. This leads to a continuous-time linear system in closed-loop.2 0. this control law can make that the system achieve the suited stability prop- erties. The aim of this method is that the closed-loop system becomes ė = −K3 e − K4 σ .Chapter 7.2.4 0.8 0 0.8 1 t(s) −6 x 10 b) 1.8 1 t(s) −6 x 10 Figure 7.2 V(V) 1 0.4 0. b) the vr (dashed) and vc (solid).6 0.1. 7. with the characteristic to requires a reduced number of computational blocks. c) the current Il .6: Control No.3 Controller No.6 0. which achieves the suited properties of a stable linear system.8 1 t(s) −6 x 10 c) I(A) 0. as will be seen in Chapter 9.6 0.

Eq.14)–(7.7 shows the implementation of the approximate discrete-time controller No. if K3 and K4 are positive and the next Lyapunov function is chosen: R t+Ts e2 ( t edt)2 Vlin = + K4 . Moreover. the saturation and rounding functions are necessarily considered in the discrete- time controller. These constants have been tuned by ensuring that the closed-loop system is Hurwitz. as will be shown below. K̄3 (ek − ek−1 ) + K̄4 ek + β Ts (vrk − ek ) + vrk − vrk−1 + δ Ts N uk = sat1 round (7. K3 − (7.: K4 K̄3 .e. i.8. obtaining a smoother current signal.19) Note that.15)).2.17) with K3 = 2. As a consequence.16) has the next discrete-time approxima- tion.3: Lyapunov-based design The last controller is designed guarantying closed-loop Lyapunov stability conditions for the equilibrium. the voltage evolves towards the voltage reference with hardly oscillations. 2. Control laws Note that.16) is guaranteed.17).4 Controller No. the controller (7. Once again the design is performed employing the continuous-time error equation (7. the dissipated energy will be reduced.18) 2 K̄4 .90 7. Nevertheless. The performance of the control (7. For physical implementation.4 and K4 = 1. 7.44 is displayed in Fig.1 (Eqs (7. 7.8). (7. it directly uses model parameters and needs a larger number of computational blocks. e = 0.17) bTs (Vh + ek − vrk ) where K̄3 and K̄4 follow the similar change of parameter given for K̄1 and K̄2 in Controller No. K4 Ts .2. this controller has two drawbacks. (7. then the equilibrium stability with control (7. Figure 7. . Observe that the current peaks have been reduced with respect to the ‘intuitive controller’. 2 2 which differentiation is V̇lin = −K3 e2 ≤ 0.

High-performance control for the DC-DC Vdd-Hopping converter 91 CONTROL vrk−1 z −1 + − + + βTs + − δTs + vr K̄4 + uk × + round satN + ek + + ÷ 1 vc K̄3 − − ek−1 z −1 Vh + + bTs − Figure 7. c) the current Il .Chapter 7.8 1 t(s) x 10 −6 b) 1.6 0.6 0. .8 1 t(s) x 10 −6 c) I(A) 0.4 0.8 1 t(s) x 10 −6 Figure 7. b) the vr (dashed) and vc (solid). 2.2 V(V) 1 0.4 0.2 0.4 0.8 0 0.6 0. Evolution of: a) number of PMOS transistors switched on.2 0.2 0.05 0 0 0.7: Digital feedback linearization control.8: Control No. a) NTrans 20 10 0 0 0.

CONTROL vrk−1 z −1 + − + δTs + + vr × uk βTs + round satN + ek ÷ 1 vc − Vh + + bTs − Figure 7.10. e = 0 is asymptotically stable. (7. Control laws Consider the following Lyapunov function candidate e2 Vlyap = .9: Digital Lyapunov control. (7. . 2 Its time derivative is V̇lyap = −β e2 + (b(vr −Vh )uk − buk e + β vr + δ + v̇r )e.2. (7.92 7.9 shows a block diagram of this discrete-time controller.21) considering the saturation and rounding function for physical implementation purposes is: β Ts vrk + vrk − vrk−1 + δ Ts N uk = sat1 round .21) b(Vh + e − vr ) then Eq.20) will be V̇lyap = −β e2 ≤ 0. The approximate discrete-time version of Eq. (7.22) bTs (Vh + ek − vrk ) Figure 7. the application of this controller to the Vdd-Hopping converter reduces the current peaks. (7. Note that. 7. Therefore.20) The negativeness of V̇ can be assured canceling the undesired terms. This can be done by choosing β vr + v̇r + δ uk = . The performance of this controller is displayed by simulation in Fig.

since this decomposition is computed after the simulation. However.8).3 Performance evaluation In this section a performance evaluation is performed for the resulting voltage and current signals.8 1 t(s) −6 x 10 b) 1. Note that the obtained performance is similar to the one obtained with the feedback linearization controller (see Fig.10: Control No. Likewise.8 1 t(s) −6 x 10 Figure 7.8 1 t(s) −6 x 10 c) I(A) 0.Chapter 7.4 0. Table 7. after applying the previous controllers.9. Compare Fig 7. this controller presents less computational blocks.8 0 0.6 0.6 0.1 presents the mean and variance of the voltage error signal and maximum peak of the current signal. 7. b) the vr (dashed) and vc (solid). Evolution of: a) number of PMOS transistors switched on. The voltage signal performance is evalu- ated by computing the mean and variance of the voltage error. Note that.7 and Fig. all the new proposed controllers improve the system performance with respect . 7.2 0. High-performance control for the DC-DC Vdd-Hopping converter 93 obtaining smoother voltage and current evolutions. 3. This PSD is computed using all the recorded data.2 0. the current signal performance is evaluated by computing the maximum current peaks produced as well as its Power Spectral Density (PSD). c) the current Il . 7.2 0. a) NTrans 20 10 0 0 0.2 V(V) 1 0.05 0 0 0.4 0.4 0.6 0.

Likewise. This non-smooth behavior of the transient current may result in a higher energy consumption.11. The purpose of this subsection is to evaluate the energy cost associated with each one of the controllers presented in previous section.0 · 10−2 Contr.2 show the dissipated energy during the rising transient period.32 · 10−3 6.3 ((d) in Fig.5 · 10−2 Contr.59 · 10−5 4. 1 2. 7. Figure 7. 3 2.12 and Tab. the accumulated dissipated energy in the transient period depends on the control law employed.2 and No. Observe that controller No.3.52 · 10−3 4. 7. 7. since it provides the best performance.3 in the previous section. the smallest dissipated energy is achieved with Controller No. No. Likewise.3. No. This can be observed in Table 7. Peak Intuitive 3. i. among these new proposed controllers.1 Energy evaluation In the set of PMOS.94 7. 7. 2 2. equilibrium stability has been guarantied for Con- troller No. on the switching sequence. since it provides the best voltage and current performance.37 · 10−5 0. This is due to the smoother behavior of voltage and current signals obtained with these controllers. Performance evaluation Mean Error Var. No. From this point of view. (b) and (c) in Fig.3.5 · 10−2 Table 7.4 · 10−3 2.1 will be proved in a chapter dedicated to such purpose (Chapter 9) because of its com- plexity. 7. The estimation of the dissipated energy in the PMOS transistors during the transient- period is Z tf Ed = (Vh − vc )Il dt t0 where t0 is the initial time and t f is the final time in such transient period. undesirable oscillatory current profile can be obtained with certain controllers.66 · 10−5 0.1 and in Fig.11). . Error Max.e. the most interesting one is Controller No.. note that.11) provides a PSD smaller than the other controllers (see (a). to the solution given in [99].5 · 10−2 Contr. Furthermore.3. For instance. Curr.1: Performance evaluation. Note that the energy consumption for all controllers presented above is improved with respect to the intuitive controller.24 · 10−3 3. equilibrium stability of Controller No.54 · 10−5 2.

.2 Summary The intuitive control proposed in [99] provides a reasonable tracking at the expense of an oscillatory behavior due to its own limitation.1 6. This involves that the current signal time profile presents a high frequency behavior with some substantial peaks.8 Table 7.3.8 Controller No.11: Power spectral density. This seems to be the main cause of a larger dissipated energy.Chapter 7.2 6.2 Controller No. 7. DISSIPATED TOTAL ENERGY (µ J) Intuitive control 7.2: Total energy dissipated in rising transient period.3 4.2 Controller No. High-performance control for the DC-DC Vdd-Hopping converter 95 −80 −80 −90 −90 Power/frequency(dB/Hz) Power/frequency(dB/Hz) −100 −100 −110 −110 −120 −120 −130 −140 −130 −150 −140 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35 Frequency (MHz) Frequency (MHz) (a) Intuitive controller (b) PI controller −80 −80 −90 −90 Power/frequency(dB/Hz) Power/frequency(dB/Hz) −100 −100 −110 −110 −120 −120 −130 −130 −140 −140 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35 Frequency (MHz) Frequency (MHz) (c) Feedback linearization controller (d) Lyapunov Controller Figure 7. in particular when the total PMOS parallel resistances are larger.

which is due to the smoother behavior of the voltage and current time profiles.2) yields a smother current and voltage time- profiles.12: Energy dissipated during the rising transient period. Therefore.5 3 t(s) x 10 −7 Figure 7.1) does not need model knowledge. the controller depends directly on the resistive load parameter. they may be en- hanced by changing the voltage signal reference and adapting the resistive load parameter. Lyapunov’s controller (Controller No.3 2 1 0 0. This controller also reduces the current peaks with respect to the intuitive controller.5 2 2. it directly needs system knowledge and presents more computational blocks.2 3 Control No. The dissipated energy reduction according to this intuitive controller is 5%.3.5 1 1. The highlight of this controller is its energy consumption reduction.1 5 Energy 4 Control No. Generally. Although the Lyapunovs controller presents very nice characteristics. Linear control (Controller No. Firstly. In terms of energy consumption. This involves that the controller reduces by 32% the energy consumption with respect to the ‘intuitive control’. Control by linearization (Controller No. note that.96 7. this controller im- proves the ‘intuitive control’ by 14%.3) requires also model knowledge and a certain number of computational blocks. a signal reference can be computed looking for minimizing the dissipated energy and the current peaks as well. reducing the current peaks. Performance evaluation −6 x 10 7 Intuitive 6 Control No. These two issues will be seen in the next section. However. an adaptive controller can be designed to cope with variations and/or uncertainties on this load parameter. the power consumption can be reduced if the local core voltage or/and the . And secondly.

1. The proposed control architecture including the optimal reference and the adaptation mechanism is shown in Fig. when the frequency and voltage have to fall.13. However. 86. as mentioned in Section 7. firstly the voltage is rising and later the frequency is rising. that is why a GALS systems is developed in the ARAVIS project where the Vdd-Hopping converter is embedded. The frequency is chosen in such a way that the task (for instance. by applying optimal control theory [80. 7.21)) presents very suited properties for the Vdd-Hopping converter. High-performance control for the DC-DC Vdd-Hopping converter 97 clock frequency are decreased. On the other hand. in order to take care of this issue when the frequency and voltage have to rise. Therefore. 7. difficult to estimate and may change with time. 155]. minimization of energy consumption and current peaks are desired.Chapter 7. β . However. ADAPTIVE CONTROL β̂ OPTIMAL v∗ + uk vc CONTROL SYSTEM REFERENCE - Figure 7. On the contrary. this parameter is. Normally. v∗c (t). On the one hand. in many occasions. note that the Lyapunov’s controller depends on the resistance load parameter. This can be achieved finding an appropriate evolution for the voltage reference. this controller can be improved.4 Advanced Lyapunov’s controller The Lyapunov’s controller (Eq. .13: Vdd-Hopping closed-loop with optimal evolution of the reference and adaptation pa- rameter. and later the voltage is fallen. firstly the frequency is fallen. a second objective is to design an adaptation law in order to obtain an estimation β̂ for the unknown parameter. (7. the execution of the control laws designed here) is performed before a deadline and that the minimum required local clock frequency that guaranties the critical path (longest path delay) on the corresponding clock domain [45].

(7.4.1 Optimal voltage reference computation Assume that the desired voltage is constant. The current peaks are due to the sudden change of the PMOS resistance at the sampling times. This graph supports the previous argument.14). In order to optimize the current peaks.t) is chosen in order to penalize: • voltage error e. (7. u.t)dt. 7. the continuous-time approximation for the current peaks is Vh − vc I˙l ≈ u̇. R0 Another way to achieve this same expression is taking time derivative of Il given by Eq. it can be shown by simulation that during a typical transient-period.1). the last term is very small (see Fig. u. and the dissipated energy. R0 R0 The same notation given above for u+ − k and uk is used here for variable Il . This simulation is performed using the same parameters given in Section 7. R0 R0 Nevertheless. and the total number of PMOS transistors switched on at the current sampling time is denoted by u+ k . The problem may be formulated as to find a continuous-time voltage reference trajectory from a voltage initial value vc (t0) to set-point vr . Advanced Lyapunov’s controller 7. This problem will be addressed applying continuous-time optimal control theory [80. ∆I.23) 0 where the final time τ is free and the Lagrangian L(e.98 7. 86. 155]. The total number of PMOS transistors switched on at the previous sampling time is denoted by u−k . a certain number of transistors will be switched on. Rigorously. time derivative of the current I˙l is included in the performance index.4. Take the following performance index Z τ J= L(e. Consequently. the time derivative of this current is Vh − vc v̇c I˙l = u̇ − u. These peaks ∆Il = Il+ − Il− are given by Vh − vc + Vh − vc ∆Il = (uk − u− k )= ∆uk . In every sampling time.2. . the number of PMOS transistors switched on or off in every sampling time is given by ∆uk = u+ − k − uk . minimizing current peaks. Therefore.

24) R0 R0 where q1 and q2 are positive weighting constants. the following Lagrangian is chosen 2 2 (Vh − vr + e)2 2 Vh − vr + e L = q1 e + q2 u + u̇ . This dissipated power is modeled as Pw = (Vh −vR0 c) u. Let us consider a 2-dimensional optimal control problem x = [e. (7. High-performance control for the DC-DC Vdd-Hopping converter 99 9 x 10 9 8 Current time−derivative terms 7 6 5 4 3 Vh −vc R0 u̇ 2 Vh −vc − Rv̇c0 u v̇c R0 u̇ − R0 u 1 0 0 1 2 3 4 5 6 t(s) x 10 −9 Figure 7.25) .14: Current time-derivative terms. the second one penalizes the dissipated power in the set of transistors and 2 the last one. For this. Thus. the current peaks. • dissipated power P = (Vh − vc )Il and • current peaks I˙l . the Hamiltonian function is (Vh − vr + e)4 u2 Vh − vr + e 2 2 H = q1 e + q2 + ν + λ1 [b(−Vh + vr − e)u + β + δ ] + λ2 ν . u̇. u] with ẋ = [ė. The first term of Eq. R20 R0 (7. where vc = vr − e. where ν . (7. ν ].Chapter 7.24) penalizes the voltage error.

4. λ1 . Advanced Lyapunov’s controller Solving the algebraic equation ∂ H(e. λ2 ) .100 7. ν .

.

.

∂ν .

2 Vh − vr + e which gives the optimal Hamiltonian expression (Vh − vr + e)4 u2 λ22 R20 H ∗ (e. e(0) = vr − vc (0) (7. the transversality condition H ∗ (τ ) = 0. λ1. the optimal voltage evolution v∗c = vr − e∗ can be derived. Solving (7. (7.31) e(τ ) = 0 (7. this is a nonlinear Boundary Value Problem (BVP) with a transversality condition. (7.34) and. from which. (7. λ ) is −λ2 2 R0 ν = ∗ . R20 2(Vh − vr + e)2 (7. ν =ν the optimal ν ∗ (x. Numerical solution . This evolution can be employed as reference for the controllers developed in Section 7. ∗ = 0. yields e∗ .35).30) ∂u R20 with the boundary conditions.32) u(0) = number of transistors switched on in t = 0.26) The optimal solution is associated with the set of differential equations: ∂ H∗ = b(vr −Vh − e)u + β + δ = ė (7.29) ∂e R20 2(Vh − vr + e)3 ∂ H ∗ 2q2 u(Vh − vr + e)4 = + bλ1 (vr −Vh − e) = −λ̇2 (7.27)–(7. λ2 ) = q1 e2 + q2 − + λ1 [b(vr −Vh − e)u + β + δ ]. since the final time τ is unknown.35) Note that.2.33) u(τ ) = number of transistors switched on in t = τ .28) ∂ λ2 2 Vh − vr + e ∂ H∗ (Vh − vr + e)3 2 ( λ 2 R0 ) 2 = 2q1 e + 4q2 u + − buλ1 − β λ1 = −λ̇1 (7.27) ∂ λ1 ∂ H ∗ −λ2 2 R0 = = u̇ = ν (7.

64 (7. The system parameters given in Section 7. In this case the Matlab function‘bvp4c’ has been employed.37) u(0) = 1 (7. a numerical solution is proposed. The nonlinear algebraic equations are solved iteratively by linearization.2 · 107t + 100. Therefore. providing an initial guess over a mesh and taking into account the boundary conditions. Furthermore. this function has been used iteratively in order to obtain a solution that fulfills condition (7.38) u(τ ) = N (7. i.34) and (7.41) Using as initial guess 8t e(t) = 0. which includes an initial mesh for this desired solution.2 · 107t 2 − 3. obtaining an ‘residual’ error is common. finding this numerical solution is also an involved task.39) The following values for the weighting constants are chosen1 . Function bvp4c [130] combines the solution of Initial Value Problem (IVP) for Ordinary Differential Equations (ODEs) and the solution of algebraic equations. Thus. the next boundary conditions are selected: e(0) = vr − vc (0) (7.31)–(7.35) with (7. For this. Thus. There is not so many tools that cope with this kind of problems. a guess for the desired solution must be provided by designers.3e−10 8 u(t) = 24 − 23e−10 t λ1 (t) = 106t + 105 λ2 (t) = −3. . they have been chosen in a trial-and-error procedure. This is due to the fact that can have more than one solution and.35). thus. Function bvp4c controls the error of the numerical solution and adapts the mesh in every iteration to obtain an accurate numerical solution with a modest number of mesh points.27)–(7. when output voltage goes from the low voltage level to the high voltage level. (7.Chapter 7.32.36) e(τ ) = 0 (7.e. checking by simulations the solutions obtained. 1 As usual in optimal control problems. High-performance control for the DC-DC Vdd-Hopping converter 101 The problem raised before: finding a solution for (7. Nevertheless. is a complex problem because it is a nonlinear BVP with a four dimensional character and it has a transversality condition.40) q2 = 0. it is considered the rising transient period. Function bvp4c is not directly applicable for the present problem since it cannot handle the transversality condition. being a non-shooting code. q1 = 0. then the solution provided by function bvp4c is a good solution. If the residual error is small.2 are reported.35).

102 7.4. Advanced Lyapunov’s controller

Note that this initial guess has a complex form and, because it has been difficult to obtain.

As mentioned before, this problem is a complex problem, and finding a solution has been

very involved. However, with the future numerical methods, it is expected that new tools for

this kind of problem will be researched and developed.

**The nonlinear BVP (7.27)–(7.30) with the specified boundary conditions (7.36)–(7.39)
**

reaches the numerical solution shown in Fig. 7.15. Note that, the boundary conditions in

e∗ and u∗ are satisfied when τ = 23.3 · 10−9 s. From e∗ , the optimal evolution of the voltage

reference v∗ can be obtained.

**Figure 7.16 shows the evolution of H ∗ , whose value at τ = 23.3 · 10−9s is close to zero,
**

fulfilling the transversality condition.

Notice that, this voltage reference has been computed for the rising transient period. For

the falling transient period, a similar procedure can be applied.

a) b)

0.4 25

u∗ (NTrans)

20

0.3

e∗ (V )

15

0.2

10

0.1

5

0 0

0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5

t(s) −8 t(s) −8

x 10 x 10

4

x 10 c) d)

8 1000

0

6

−1000

4

λ1∗

λ2∗

−2000

2

−3000

0 −4000

0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5

t(s) −8 t(s) −8

x 10 x 10

**Figure 7.15: Optimal numerical solution. a) error evolution, b) control evolution, c) λ1 evolution and
**

d) λ2 evolution.

Chapter 7. High-performance control for the DC-DC Vdd-Hopping converter 103

12

x 10

3.5

3

2.5

2

H∗

1.5

1

0.5

0

−0.5

0 0.5 1 1.5 2 2.5

t(s) −8

x 10

Figure 7.16: H ∗ evolution.

7.4.2 Adaptive feedback control design

**The Lyapunov’s controller (Section 7.2) has been designed under the assumption that the
**

parameter β is known. In this section, an adaptive law is proposed in order to cope with the

case when the load parameter β is unknown.

**Let us denote β̂ as the estimated value for the load parameter. This estimated parameter
**

will be used in control law (7.21) instead of its real value. The application of this law to

system (7.8) yields

ė = −β e + β vr − β̂ vr . (7.42)

**Let us assume that β is a constant parameter which involves β̇ = 0 (the case when β is
**

time-varying will be discussed in next section) and define

˙

β̃ = β − β̂ , β̃˙ = −β̂ .

For the adaptive control system, the next Lyapunov function candidate is proposed

e2 β̃ 2

W= + , (7.43)

2 2 γ1

where γ1 is a positive design parameter that may define the adaptation speed.

104 7.5. Simulation of the advanced Lyapunov’s controller

Differentiating W with respect to time, yields

β̃˙

!

Ẇ = −β e2 + β̃ vr e + .

γ1

**Note that β > 0, as has been seen above. The adaptive law is designed by canceling the
**

term in brackets, i.e.:

˙

β̂ = −β̃˙ = γ1 vr e. (7.44)

This achieves Ẇ = −β e2 .

**Asymptotic stability is established by LaSalle’s invariance principle [76]. For this, con-
**

sider the level set Wc = W (e, β̃ ) ≤ c0 for sufficiently large c0 > 0, where Ẇ ≤ 0. This set is

compact and positively invariant.

Note that Ẇ = 0 on e = 0. Furthermore, note from Eq. (7.42), that

e(t) ≡ 0 ⇒ ė(t) ≡ 0 ⇒ β̃ (t) ≡ 0.

**Therefore, the maximum invariant set in Wc with Ẇ = 0 corresponds to the single point
**

P1 = (e = 0, β̃ = 0), thus, every solution starting in Wc approaches the desired point P1 as

t → ∞.

7.5 Simulation of the advanced Lyapunov’s controller

In this section, some simulations using the parameter presented in Section 7.4 are performed.

The resulting controller (7.22) is

**β̂ Ts v∗rk + v∗rk − v∗rk−1 + δ Ts
**

( )

N

uk = sat1 round (7.45)

bTs (Vh + ek − v∗rk )

where v∗rk and v∗rk−1 comes from the discretization of the optimal voltage reference, which has

been previously obtained. For implementation, the values of v∗rk can be stored in a table. In

the same way, β̂ is adapted by the discrete-time approximation of the adaptation law (7.44):

β̃k = β̃k−1 − Ts γ1 v∗rk ek

22)) and 0.e. Besides.2 are used in the simulations. the adaptive control introduces a delay in the system response.8 0 0. Note that β approaches its real value.8µ J using the Lyapunov controller (Eq. That means 90% energy saving.8 1 t(s) −6 x 10 c) I(A) 0.Chapter 7. As initial estimated values is taken: β̂ = 0. The accumulated dissipated energy in the rising transient period is 4. Likewise. 7.17: Vdd-Hopping with control (7.4 0.4 0.3ns. small current peaks and faster transient periods are obtained.9 · 107 for vc = Vh . The bounds on β are: βmin = 1.8 1 t(s) −6 x 10 Figure 7. a) NTrans 20 10 0 0 0.45) and adaptation β̂ . High-performance control for the DC-DC Vdd-Hopping converter 105 The data reported in Section 7. In order to perform more realistic tests. (7. b) vr (dashed) and vc (solid) and c) current Il .4 0.6 0.45). the transient period is reduced to 23. Note that when the adaptation mechanism is imple- mented the system can achieve a similar performance to the case of known load. (7. the reliability and efficiency of the controller (7.6 0.18.2 0. it is time-varying.. in spite of the fact that β is time-varying. has been validated. Figure 7. In addition.6 0. Although. thanks to the obtained voltage reference the energy consumption is reduced.38 · 107 for vc = Vl and βmax = 5.45)). a more precise model for the load is considered in such a way that β depends on rL .2 0. Consequently. .2 0.05 0 0 0. which uses the opti- mal voltage reference and the adaptation mechanism.8 1 t(s) −6 x 10 b) 1.17 shows the closed-loop performance by employing the optimal voltage ref- erence and the adaptation mechanism. i.5µ J using the advanced Lyapunov controller (Eq. Evolution of a) number of PMOS transistors switched on. the fact. The adaptation of the load resistive component β is shown in Fig. Observe that the time- evolutions of β̂ and β are superimposed.2 V(V) 1 0.

because it is a BVP with transversally condition for a 4th -order optimal problem. In addition. 86. Nevertheless. a set of controllers has been designed for a Vdd-Hopping converter.106 7. A method to obtain an optimal reference has been developed applying optimal control theory [80. In a performance evaluation presented in Section 10. and . These control approaches allow to diminish energy consumption and current peaks and deal with unknown load parameters.6 Conclusion In this work. This is not only for a better signal performance but also for a better energy consumption. 7. The good results obtained with the set of controllers developed in this chapter come from applying control theory as well as the possibility to let such controllers to switch more than one transistor at once. It has been a involved task.5 to the set of controllers. as has been seen in Section 10.β̂ 2 0 0 1 2 3 4 5 6 t(s) x 10 −7 Figure 7. if both optimal and adaptive control are developed. that an optimal reference has been computed from of this problem.6.5. Nevertheless. 155]. This controller is a very simple controller with a strong limitation: only one transistor can be switched on or off in every sampling time. the problem stated for this method presents a high com- plexity. it has been concluded that the best one seems to be Lyapunov’s controller. This numerical solution has been obtained using the Matlab function bvp4c. Most of these controllers improve performance over the one used in [99] in terms of transient responses.18: Time-evolution of β̂ (solid) and β (dashed). this controller has a small energy consumption as well as small current peaks and faster transient-periods. respectively. Conclusion 7 x 10 6 4 β . that there exists a time-varying load resistive component is not relevant for the right system performance. this controller can be enhanced. Hence.

as is common in practice. Nevertheless. Moreover. This fact makes that the total energy saving with respect to the intuitive controller used in [99] is 93% reduction. at the same time that all nice achieved properties are maintained. since it requires more computational blocks. a new controller will be developed to cover this drawback. it presents a more complex physic implementa- tion. High-performance control for the DC-DC Vdd-Hopping converter 107 it is expected that new mathematic tools will be developed to make easier to compute this voltage reference. This controller reduces energy consumption as well as current peaks and transient-periods.Chapter 7. In addition. an adaptive strategy is developed in order to deal with the load modeling error. The suited performance of the results in the Vdd-Hopping converter has been shown by simulations. . an advanced controller which does not need knowledge of the load resistive parameter has been obtained. This result achieves a reduction of current peaks and 90% energy saving with respect to the previous Lyapunov controller. Next chapter. in order to prove the reliability of this adaptive controller. it has been introduced by simulation that parameter β is time-varying. In summary.

108 7.6. Conclusion .

This control law only needs to know the set-point. It is patented under the name of ENergy-AwaRe Control (ENARC) [6]. 120]. That is why the controller with presents the less number the computa- tional blocks from the set of controller proposed before is chosen and enhanced in order to accomplish all control objectives. From this controller.Chapter 8 Energy-aware controller for the Vdd-Hopping converter In the previous chapter a set of high-performance controller has been designed for the DC- DC Vdd-Hopping converter. From the set of controllers. what can be translated in a complex implementation in certain industrial applications. 109 . which reduces the current peaks. It is based on a PI structure [84. Nevertheless. In addition. the one that provides a better per- formance has been selected and some developments have been done to fulfill with low-power technology requirements. it is expected that it is implemented in the innovated 45nm or/and 36nm SoC developed in ARAVIS. These facts involve an important diminishing of energy consumption. Moreover. as in the ARAVIS project. it presents some number of computational blocks. As an im- portant innovation. The pro- posed solution is a discrete-time control mechanism. an optimal nonlinear energy-aware controller is obtained. its computing cost have been reduced. the proposed a control introduces a saturation with time-varying limits. this controller will be simulated in VHDL-AMS. which does not need to track any time- indexed voltage reference. In the ARAVIS project.

The ‘linear control’ proposed in Section 7. e. Figure 8. this expression is here advocated Vh − vc ∆Il = ∆uk . Previously. The relevant characteristic of this controller is that presents a rela- tive low number of computational blocks. that is. Observe that current variable directly depends on the number of PMOS transistors switched on. which can be considered as a new variable that augmentes R the system dimension. deal- ing with a tracking problem.1) in Section 7. Constants K1 and K2 are chosen with the tunning mechanism (7.g. the reference will be constant.1 Control design without current-peak managing In this section. uk = satN (8. uk . what makes to obtain faster transient periods. Now.11)– (7. (7. The time-varying reference is changed by a step reference. This makes it interesting in industry. It is due to the current definition (Eq. In Section 7. important current peaks can be generated being able to damage the system. an expression that relates the current variation with the number of tran- sistor switched on or off in every sampling time has been given. Nevertheless.1).110 8.2) R0 .2 (Eq. (8. In order to make easier the reading.e. This looks for making faster transient periods.1. 8. (7. the constant reference generates a no-desired important current-peak (as has been predicted before). Current-peaks can be managed by introducing a pre-specified maximum admissible current-peak constraint. This current-peak constraint is defined in the Vdd-Hopping system by ∆Ilmax .1 shows a simulation to display the stability properties of this control law.. Note that this current peak is not symmetric when system is falling down.4.. a step. Nevertheless. it has been enhanced assuming that more than one transistor is switched at once and.2 Control redesign with current-peak managing The controller presented before is modified in order to achieve a high-performance from a point of view of current-peaks.1) where σ corresponds to tt+Ts edt.10)) has been: 1 {round(K1 e + K2 σ )} . Control design without current-peak managing 8. smaller current for lower voltage. Therefore. a controller based on linear control theory is designed to cope with possible steady-state errors [105]. i.2 are employed in this simulation. let us consider a stabilization point problem. introducing an on-line saturation mecha- nism.12). The data reported in Section 7. which may increase the dissipated energy as well as can damage the physical system.

(8.2 0.8 1 t(s) −6 x 10 b) 1.6 0.8 1 t(s) −6 x 10 c) I(A) 0. the maximum in minimum admissible ∆uk are R0 ∆uM k = ∆Ilmax . in such a way that Vh − vc ∆Ilmax ≤ ∆uk ≤ ∆Ilmax .6 0. It comes from the discrete property of the Vdd-Hopping converter.2 V(V) 1 0. αkM (8. (8.6) k . i. Thus.6 0.e.4) Vh − vc R0 ∆um k =− ∆Il . Energy-aware controller for the Vdd-Hopping converter 111 NTrans a) 20 10 0 0 0.Chapter 8.2 0.4 0. as is seen in [99].8 0 0.3) R0 This constraint can be introduced in the system by saturating the maximum and minimum PMOS transistors that can be switched on or off and every sampling time. αkm .8 1 t(s) −6 x 10 Figure 8.. control (8.4 0.1) is modified in order to consider current-peaks ᾱ M uk = satN 1 round(satᾱkm (K1 e + K2 σ )) .1: Control (8. Note that the saturation limits depends on the output voltage. while that its core voltage is a continuous-time variable. Assume that a maximum admissible current variation for Eq.4 0. (8.5) Vh − vc max being αkM > 0 and αkm < 0.1) with step reference.1 0 0 0.2 0.2) is defined as ∆Ilmax . b) vr (dashed) and vc (solid) and c) current Il . (8. Evolution of a) number of PMOS transistors switched on.

1 The current peak constraint must allow to switch. This controller is composed of: . That is why control (8. As uk is determined by a rounding function. it can be obtained Vch −Vlow Vc −Vlow ∆Ilmax ≥ min(∆uk ) = h 1 R0 R0 where min(∆uk ) is the minimum number of PMOS transistors that can be switched on or off in every sampling time.6) to be an innovated controller for the Vdd-Hopping converter. and where αkm and αkM are given in Eqs. The optimization of the energy dissipation is a crucial point in the miniaturization of microsystems. N (8. Control redesign with current-peak managing where the current-peak constraints are employed according to next expressions: ᾱkM . the minimum of (∆uk ) must be larger or equal than 1 in order to have that the constraint ∆Ilmax allows switching at least one transistor. (8.2.2.5). one transistor in or- der to guarantee that the system achieves the desired voltage level. at least.15) in Section 7. uk−1 + αkm . the admissible current peak constraint has to be larger than a minimum bound guaranteeing this condition.2.2.9) k where K̄1 and K̄2 follows the transformation given in (7.6) is ap- proximately discretized. an important reduction of the dissipated energy is achieved by means of a trade-off between faster transient period and small current-peak as will be shown below.3). 8. The structure of the ENARC controller is shown in Fig. As a side effect. (8.112 8. uk−1 + αkM (8. (8.14)–(7.8) Remark 8. This controller is patent pending under the name of ENergy-AwaRe Controller (ENARC) [6]. the controllers are implemented in discrete-time.4)–(8. From Eq.1 Time discretization Usually. The aware management of the current-peaks makes Control (8. Therefore. 8.7) ᾱkm . yielding the structure αkM uk = sat1 uk−1 + round(satα m (K̄1 ∆ek + K̄2 ek )) .

• A rounding for digital control signal and • an output saturation mechanism. The stability will be analyzed in Chapter 9.11)–(7. adjusted by a tuning method given by Eqs (7.14)–(7.12). On-line ūsk current limits ∆Imax mechanism ūsk satN 1 Figure 8. 1. On-line ∆usk ADC K̄1 saturation ek−1 mechanisms 4. ∆uM k and ∆uk . • A current limit mechanism. Consequently. 8. • A saturation mechanism that limits the maximum and minimum switched-transistor variation computed before.Chapter 8.1. m The limits over the switched-transistor variation are necessary in order to ensure that a maximum admissible current peak ∆Ilmax is respected.12) K̄1 = −19. some simulations are performed to display system signal evolutions. as has been chosen in Section 8.15) and Eqs. (7.27.2 Simulation of ENARC controller in the Vdd-Hopping system Now. that limits the minimum and maximum PMOS tran- sistor number switched on at every sampling time. Rounding Memory mechanism ∆ūsk 5. For this. the reported parameter values from Section 7.10) K̄2 = 39.Output saturation ∆uM mechanism k ∆um k ūsk−1 Memory 2. (8.2 are chosen. K̄1 and K̄2 . Error Tracking Filter vr vrk ADC K̄2 vc vck ek ∆uk 3.2. The reference signal is a step. some values of αkm and αkM can be stored in a table. For implementation.11) . Energy-aware controller for the Vdd-Hopping converter 113 • two gains. (7.11)–(7. from Eqs. that computes on-line the maximum and minimum number of PMOS transistors switched in every sampling time.2: ENARC structure patented in [6]. respectively.3 (8. in such a way that asymptotic stability of the equilibrium of the closed-loop system is guaranteed.

8 1 t(s) −6 x 10 d) I(A) 0.3: ENARC with step reference.114 8.6 0.8 1 t(s) −6 x 10 Figure 8. and thus.(8. with the ENARC con- troller more than one transistor may be switched in every sampling-time and a step reference . a) NTrans 20 10 0 0 0.6.6 0. Remember that in the control structure published in [99] only one transistor can be switched at each sampling time and a ramp reference has been employed. R0 Figure 8. on the switching sequence.6 0. Il .2 0. Energy-consumption evaluation. Note. that the system response obtains faster transient period and reduces considerably the current peak with respect to the previous controller (see Fig. c) current.4 0. Evolution of the: a) number of PMOS transistors switched on. b) vr (dashed) and vc (solid).4 0.1).2 0.8 1 t(s) −6 x 10 b) 1.2.05 0 0 0. 8. Control redesign with current-peak managing The maximum admissible current peak constraint is chosen according to the equation given in Remark 8.2 V(V) 1 0. The cumulated dissipated energy in the set of PMOS during the rising transient time de- pends on the type of control law employed. let us discuss the main objective concerning to the controller: the energy consump- tion.1 Vc −Vl ∆Il = h 0.2 0.4 0. Now.3 shows a simulation of the resultant closed-loop system with Eq.9).8 0 0. However.

which will be taken into account in Chapter 10. . a step reference has been used. it only needs to know the two desired voltage levels. The features that have not yet been studied are the presence of delay as well as parameter uncertainty. some important advances have been developed for the ‘linear controller’ (Controller No. the ENARC controller reduces the energy consumption a 96%.. This controller has an energy-aware management of current-peaks in the set of PMOS transistors. 96% reduction. thus that.e. This mechanism is an innovative controller for the discrete Vdd-Hopping converter ap- plied in the ARAVIS project. And thus. Energy-aware controller for the Vdd-Hopping converter 115 has been employed. The energy consumption is much higher using the ‘intuitive’ controller than using the ENARC controller..2µ J (with the control published in [99]) to 0. a non-smooth behavior of the current signal and a larger transient time may result in a higher energy consumption. 8. i. thus. Note. This controller has been compared with the ‘intuitive’ control used in [99]. A nonlinear discrete-time controller has been designed for the Vdd-Hopping system with the aim of reducing the dissipated energy.Chapter 8. to switch more than one transistor in a same sampling time. but it also has a simple implementation. The energy consumption during the rising transient time has been re- duced from 7. It is focused on achieving the project global objective. The ENARC controller does not only have the same properties that the high-performance Lyapunov controller developed in Chapter 7. the closed-loop stability of Vdd-Hopping with ENARC will be studied in next chapter.3 Conclusions In this chapter. In addition.1. The ‘linear con- troller’ has a relevant interest due to its simple implementation. since it requires a relative low number of computational blocks. As a side effect the transient-periods are diminished. This result comes from the pos- sibility to control more than one transistor at once. In addition.26µ J (with ENARC). in Section 7. it may present special interest for industrial applications in the fields of microelectron- ics. i.2) proposed for the Vdd-Hopping system.e. In this context.

3.116 8. Conclusions .

This characteristic makes it attractive for industrial applications [17. The complexity of the discrete system with the ENARC 117 . the convergence and stability of the equilibrium of the closed-loop Vdd-Hopping is not reliable. a preliminary equilibrium stability analysis of the closed-loop system is studied when the controller does not consider the current peak issues. Among them its low computational cost can be highlighted. (7.6) is employed. 120]. Therefore. assuming that the ENARC stability property is ensured through its continuous-time version (this continuous-time version of the ENARC has been presented in control (8. Then. This controller has been the ‘linear controller’ presented in Section 7. This controller introduces a type of nonlinearity: a saturation with dynamic limits. a stability analysis is performed when control (8. which may fulfill most of the specific control objectives for the Vdd-Hopping converter. As Vdd-Hopping model is continuous. the equilibrium stability of the system with the ENARC has been not studied. a controller has been developed based on a linear structure.6)). The stability analysis presented here is not rigorous because it is based on some system approximations in continuous time.2 (Eq. in that chapter. This is a nonlinear discrete-time energy-aware controller called ENARC. mentioned in Chapter 6. 84.10)). 152].7) with the ENARC controller developed in Chapter 8. This is a very common assumption [71. the sta- bility analysis is performed in continuous-time. The stability analysis is based on LaSalle’s invariance principle [76]. However. For simplicity. This fact makes that the nonlinear closed-loop system works in three operating-modes: non-saturated system.Chapter 9 Approximate stability analysis of the DC-DC Vdd-Hopping converter In Chapter 8. saturated system in the upper limit and saturated system in the lower limit. It is seen that the equilibrium is in non-saturated mode. This chapter focuses on studying the stability of the nonlinear system (7.

This analysis is based on LaSalle’s invariance principle [76].7) of the Vdd- Hopping converter with control (7. a stability analysis is performed for the nonlinear model (7. where ukh is the upper-bound of uk .7) under the control law given in (9. These tuning equa- tions depend on a design parameter ξ . Stability with control (7. The next step concerns the stability analysis of the closed-loop system. uk = K1 e + K2 σ (9..e.118 9.10) does not allow to find another simple way to prove the global stability. . i. Assume that the tuning of these control parameters is achieved according to the previous rules. Notice that K2 > 0 from Eq.1.1). the equation of the control is recalled.1) Remember that σ = t R t+Ts edt and the control parameters K1 and K2 are constant and chosen according to the tuning mechanism (7. The following theorem establishes the global stability of system (7. Then. thus it is clear that the interval I is not empty.1 Stability with control (7.1 Consider the interval ukl b + β ukl b + β ωn I= .2 The term ωn 2(bukh + β ) is always positive from the parameter properties given in Section 7. then the following inequalities are satisfied K1 > 0 and K1 (bukh + β ) − K2 < 0.10) In this section. 9. 2ωn 2ωn 2(bukh + β ) If ξ is chosen in I. ukh = N. K1 and K2 have certain desired properties.12).10) developed in Section 8. the saturation that limits the number of the PMOS transistors switched on as well as the rounding function are disregarded. such that.12) described in Chapter 7. For simplicity.1. To help the reading of the thesis. + . The following lemma deals with tuning the parameter ξ . (7. there is always a possibility to find the suitable values for the control parameters K1 and K2 . Lemma 9. Remark 9.1.11)–(7.

2) into the right-hand side of (9. 2b(Vh − vr ) 2 Notice that. σ ) = + K2 . b is positive. the reference voltage vr is constant. More- over.7) with the controller (9. the high voltage Vh is greater than the reference voltage vr . the following equation is obtained ė = −(β + buk )e + (vr −Vh )bwk . is introduced: wk . Thus.7). Now. (9. the control constant K2 is positive.1). its equilibrium satisfies the equation 0 = (vr −Vh )būk + β vr + δ . the positivity of β and b is guaranteed. Proof: From the dynamics of system (7. According to the assumption of the theorem. from Section 7. Note that ūk corre- sponds to the saturation bounds 1 and N when the set point is the lower and higher values. an expression of the control input at the equilibrium is straightforwardly obtained: β vr + δ ūk = = K2 σ̄ .3) Rewriting the dynamic of system (7. it is clear that uk is positive and consequently so is β +buk +K2 . (9. Thanks to (9. V is indeed a positive definite function of e and σ .Chapter 9.3 Consider system (7. V can be expressed as follows e2 (uk − ūk − K1 e)2 V (e.2).5) 2b(Vh − vr ) 2K2 . As has been seen just before.4). Thus.1. the new variable wk . respectively. Approximate stability analysis of the DC-DC Vdd-Hopping converter 119 Theorem 9.1) and (9. Then. Consider the Lyapunov function candidate of the form: e2 (σ − σ̄ )2 V (e. the equilibrium of the system is globally stable. yields: ė = −(β + buk )e + (vr −Vh )bwk + (vr −Vh )būk + β vr + δ . σ ) = + .4) Substituting the expression of ūk from (9. to satN The next step of the proof is based on the Lyapunov’s theorem. if K1 and K2 are posi- tive. (9. From the system properties. as has been defined in Remark 7. which represents the difference between the control uk considered at any position and at the equilibrium. respectively. Since the control uk is equal 1 {round(K1 e+K2 σ )}.2) (Vh − vr )b where v̄c and σ̄ are the equilibrium values of vc and σ .7) using this new variable. (9.3. uk − ūk .

6).6).6) b(Vh − vr ) Note that K1 and K2 have been assumed positive. σ ) = 0. σ ) is negative everywhere. In next section. (9. (9. since e(t) ≡ 0 ⇒ ė(t) ≡ 0 ⇒ 0 ≡ −(vr −Vh )bK2 σ + β vr + δ .7) with control (9. This is represented in Fig. Then. σ ) ≤ c1 for sufficiently large c1 > 0. Unless σ = σ̄ . For this. K2 Introducing (−K1 e2 + K1 e2 ) in the previous equality and assuming that the differentiation of u̇k from Eq.1). (Vh − vr )bK2 Consequently. The last equation is satisfied in vr + δ σ≡ = σ̄ . thus. . σ ) ≤ 0. Stability with control (7. (9. this is impossible from the closed-loop system (7.1) has been established. (9.1) is u̇k = K1 ė + K2 e. 9.120 9. this result will be employed to analyze the global stability with control (8. and uk = ūk +wk is assumed be positive. every solution starting in Ω1 approaches P2 as t → ∞. This set is compact and positively invariant. where V̇ (e.10) The differentiation of the function V along the trajectories of (9.1. V (e. Asymptotic stability is established by LaSalle’s invariance principle [76].1) leads to (β + b(ūk + wk ))e2 V̇ = − − K1 e2 + b(Vh − vr ) 1 [(K1 ė + K2 e) − (K1 ė + K2 e)] ·[(K1 e + K2 σ ) − K2 σ̄ − K1 e] . the differatation of the function can be expressed as: (β + b(ūk + wk )) V̇ = − + K1 e2 . σ ) = 0 corresponds to the single point P2 = (e = 0. σ = σ̄ ). In summary.1. Therefore. notice that V̇ (e. σ ) ≥ 0 V̇ (e. the maximum invariant set in Ω1 with V̇ (e. the global stability of the Vd-Hopping with Eq. con- sider the level set Ω1 = V (e. From Eq. except on the line e = 0.

The equation of control (8. An added difficulty is that the limits of the saturations depend on the state e. and it is nonlinear due to control saturations.4)–(8. Approximate stability analysis of the DC-DC Vdd-Hopping converter 121 e Ω1 P2 σ Figure 9.2 Stability with control (8. to make easier the reading: ᾱ M uk = satᾱkm (K1 e + K2 σ ). 9.6). (9. it is the continuous-time version of the ENARC controller. the objective of this section is to extend the proof before to control (8.7)–(8. (8. (8.9) Vh − vc max as has been defined in Eqs. Here. The stability analysis comes from dividing the space (e. where the system does not saturates.7) k with R0 ᾱkM = uk−1 + αkM = uk−1 + ∆Il (9. σ ) in three regions (see Fig 9.8).8) Vh − vc max R0 ᾱkm = uk−1 + αkm = uk−1 − ∆Il .2): • Region I.5) and Eqs.6) Based on the previous study. the saturation that limits the number of the PMOS transistors switched on as well as the rounding function are also disregarded for simplicity reasons. . (9. Note that.1: Representation of the compact set Ω1 .Chapter 9.6) is expressed here.

• Region III. For the first part. In the first part. convergence to the desired point. uk = ūk .122 9.8)–(9. VhR−v 0 c ∆Imax > 0. Remark 9. Stability with control (8.. next expression in continuous- time can be taken into account ᾱ M u̇k = satᾱkm (K1 ė + K2 e).2 and that ∆Imax is also positive according to Section 8.10) k Equation before comes from Eq.6 In Region II. (9. once the system is in Region I is proven.9) Firstly. The proof will be defined in two parts. This is easy to see from Eq. Assumption 9. if K1 is constant and positive. is in Region I.7) satisfies • u̇k > αkM (e) > 0 K1 ∆Imax • ük ≤ εM < 0 being εm .5 For system (7.7) and Eqs.2) and Eqs. where the system saturates in the upper limit. which define the convergence to the non-saturated region (Region I).2.8) with a suited sampling time.9): R0 K2 σ̄ + V ∆Imax ūk = sat h −vc R0 (K2 σ̄ ).2. (9. two properties are performed for the saturated cases (Region II and III). i. Then. next property is defined for Region II: Property 9. where the system saturates in the lower limit. C = constant • e>0 . These properties are based on the variable u̇k .4 The equilibrium of system (7. (9.8)–(9. convergence to the non-saturated region in finite time will be proven.(9.6) • Region II. K2 σ̄ − V −vc ∆Imax h Notice that Vh − vc and R0 are positive as it has been defined in Section 7.e. since it is directly affected by the saturation limits: αkm (e) and αkM (e). (9. In the second part.7). system (7.

Parameters C and ∆Imax are positive according to Section 7.1).9) and vc .2 and Section 8. (9.7 u̇k is decreasing with time derivative that is bounded away from zero. respectively.2: Representation of the system operating regions. (9. Be- sides. the following property is defined for Region III: Property 9.1). respectively. εM comes from differentiating u̇k and employing the definition of αkM (e) from Eq. .2. system (7. vr − e (as has been seen in Section 7.8).Chapter 9. (9. Remark 9.7) satisfies • u̇k < αkm (e) < 0 K1 ∆Imax • ük ≥ εm > 0 being εm .8 In Region III.9).6. Parameters C and ∆Imax are positive according to Section 7. Approximate stability analysis of the DC-DC Vdd-Hopping converter 123 e Region II Region I Region III σ Figure 9. as is shown in Property 9. (9.8) and vc . if K1 is constant and positive. Secondly.2.2 and Section 8. C = constant • e<0 where αkm (e) is defined by Eq.8) in finite time. 9. Besides. and hence it will reach αkM (e) (see Eq. εm comes from differentiating u̇k and employing the definition of αkm (e) from Eq. where αkM (e) is defined by Eq. vr −e (as has been seen in Section 7.

9. system (7. K2 > 0 and K1 (bukh + β ) − K2 < 0.e. 9. and hence it will reach αkm (e) (see Eq.6) Remark 9. Region II (see Fig..124 9. as has been seen in Eq. and taking into account the Assumption 9. as is shown in Property 9. For this.3) is studied. i.9) in finite time. with time derivative that is bounded away from zero.2. These properties and remarks about the different regions allow to prove the convergence of variable u̇k to the saturation limits. . the case when system saturates in the upper saturation limit.10 If the next conditions are satisfied: K1 > 0. Employing u̇k which is affected directly by αkM (e).8.10). next lemma can be stated Lemma 9. It is desired to prove that: u̇k → αkM (e) e Region II Region I Region III σ Figure 9.3: Region II in the representation of the system operating regions.5 then.9 u̇k is creasing. Proof: Firstly.7) saturated in the upper or lower saturation limit converges to the non-saturation region in a finite time. Stability with control (8.7) with controller (9. (9.

11).11) Vh − vr + e Note that b and (Vh − vc ) are positive from Section 7. (8. ukh . Therefore. form Property 9. And Property 9.2. (9. (9.8. then the last inequality is satisfied Ẇ < 0. The first inequality comes from applying u̇k = K1 ė + K2 e > 0.6. from the statement the pos- itivity of K1 is also established. K1 (bukh + β ) − K2 < 0 is fulfilled. The proof for Region III (see Fig.6 maintains u̇k > 0 in this region. applying Property 9.10. (Vh − vr + e) Next up. . Furthermore. Approximate stability analysis of the DC-DC Vdd-Hopping converter 125 For this.Chapter 9. this first term is defined as ς (e) . it is ensured that u̇k converges to the boundary. In addition.12) Rewriting Eq. 9. αkM (e) is differentiated αkM (e) Ẇ = −b(Vh − vc )K1 u̇k + −K1 (buk + β ) + K2 + ė.4). (9. For simplicity. A maximum bound of uk .6. Besides. from Property 9. the first term on the right-hand side is negative for every time instant. such that the next inequalities are satisfied αk (e) Ẇ = −ς (e) + −K1 (buk + β ) + K2 + ė Vh − vr + e αk (e) K2 e < −ς (e) + K1 (buk + β ) − K2 − Vh − vr + e K1 αk (e) K2 e < −ς (e) + K1 (bukh + β ) − K2 − Vh − vr + e K1 < 0. thus −ė < KK21e . is taken in the second inequality. From Lemma 9. it is known that e < 0. b(Vh − vc )K1 u̇k > 0.4) is symmetric to the one developed before for Region II. from Eq. the following Lyapunov function candidate is selected: W = u̇k − αkM (e) = K1 ė + K2 e − αkM (e) > 0. Differentiating αkM (e) Ẇ = K1 ë + K2 ė + ė.

By Lemma 9. from the lemma stated before about the convergence of the saturated region to the non-saturated region. Theorem 9. From Lemma 9. σ ) = c1 for sufficiently large c1 and the sat- uration limits.4: Region III in the representation of the system operating regions. the maximum invariant set with V̇ (e. σ = σ̄ ). σ ) = 0 corresponds to the single point P2 = (e = 0.6) e Region II Region I Region III σ Figure 9.4 and the global stability property of the Region I established in Theorem 9.10.7).5 represents the set Ω2 . There exists a set Ω2 limited by the level curve V (e. As has been seen in Section 9. Proof: There exist two state space regions corresponding to the case when system saturates in the upper limit (Region II). the equilibrium localization given in Remark 9.7) with controller (9. and when the system saturates in the lower limit (Region III). Finally. In addition. LaSalle principle establishes that every system evolution in Ω2 approaches P2 as t → ∞.126 9. Stability with control (8.11 If K1 and K2 are positive.2. the proof is concluded by using the assumptions K1 and K2 that are constant and positive. next theorem ensures the global stability property of the system (7. then the equilibrium of system (7.10 the state of the system reaches Ω2 in finite time.8 guarantee that the system once is in Region I can not cross this saturation lines towards Regions II or III. . Now. Properties 9. the system operating in Region II or III converges to the non- saturated region (Region I) in finite time.3. and K1 (bukh + β ) − K2 < 0. K1 (bukh + β ) − K2 < 0 and by advocating the La Salle’s invariance principle.7) with controller (9.7) is globally stable. Figure 9. which is compact and positively invariant.6 and 9.1.

Approximate stability analysis of the DC-DC Vdd-Hopping converter 127 e Ω2 Region II P2 Region I Region III σ Figure 9. The proof of this stability analysis has been based on LaSalle’s invariance principle. 9. The analysis presented here has been performed for a continuous-time version of the ENARC controller. This analysis follows LaSalle’s invariance principle for a domain bounded by Lyapunov level and the saturation lines. When system is saturated. saturated in the upper limit and saturated in the lower limit.5: Representation of the invariant set Ω2 . making difficult to prove global stability.3 Conclusions In this chapter the equilibrium stability of the nonlinear Vdd-Hopping system when control (9. This controller does not manage the occurrence of current peak in the system. The rigorous global stability analysis deals with three operating modes: no saturated. the analysis has been extended to prove equilibrium stability with the innovative nonlinear controller (9. This kind of assumptions is very common in control theory . it will converge to the non- saturated mode in finite time without being able to return to the non-saturated case. It has been ensured that the equilibrium is located in the non-saturated mode.1) has been analyzed . It has been assumed that the stability property is maintained for the discrete-time ENARC controller. Next up. The saturation limits depends on the system state. This controller manages current peaks through saturations.7).Chapter 9.

128 9. 152]. These issues will be seen in Chapter 10. Conclusions [71.3. The only control objectives that have not yet been considered is the equilibrium robust- ness in view of delays presence and parameter uncertainties that the system can suffer. .

Therefore. the longer the delay is. Figure 10. which ensures system performance. the h1 -sample-period delay de- pends on the local clock frequency1 [38]. In many cases. That is why. this chapter focuses on system robustness with respect to delays and parameter uncertainties in the Vdd-Hopping system at the same time that the stability is guaranteed. there is a minimum required local clock frequency that guaranties the critical path (longest path delay) on the corresponding clock domain circuit [45]. Furthermore. and hence.1 shows Vdd-Hopping mechanism including delays. The size of this last delay depends on a trade-off between power consumption and performance. 140]. it is possible to have a low frequency. this fact produces that the computational speed diminishes. for the local clock. there is a computational h1 -sample- period delay associated with computational issues in the control block output. the power consumption can be reduced if the local core voltage or/and the clock frequency are decreased. The system has a compu- tational h2 -sample-period delay at the control block input required to ensure that the system is synchronized with the cluster clock [77]. in Chapter 9 a stability analysis of the equilibrium has been performed. The performance requirement is that the task is performed before a deadline. On the other hand. 129 . an energy-aware controller has been designed for the Vdd-Hopping converter. Likewise. applications do not require the full computational power at any time. This converter satisfies control requirements for this low-power converter implemented in the ARAVIS project context. However. in such a way that the size of the existing delay decreases. it is considered that the delays are fixed and 1 The higher the clock frequency is. Therefore. a low frequency of 200MHz is taken here. This frequency introduces an one-sample-period delay in the control block output. In order to cover all control requirements specified in Chapter 6. Generally. to allow reducing the power consumption. In some cases. They are common issues in SoC [112.Chapter 10 Sub-optimal control considering delays and parameter uncertainties In Chapter 8.

disregards the current peak management. disturbance rejec- tion as well as robustness of the system with respect to delays and uncertain parameters. for sim- plicity.1. but is time-varying rL . an attraction domain is estimated in such a way that a regional stabilization for the saturated control is guaranteed.1: Sub-optimal control tuning for the ENARC controller. The designed controller guarantees asymptotic stability. In these simulations is taken into account that the load dynamic parameter is not constant RL . 62]. as mentioned in Chapter 7. K1 K2 L Figure 10. delays presence and parameter uncertainties must be considered in the de- sign of the controller. it has been taken as constant in Section 7. Likewise. vr + e CONTROL uk Vdd-HOPPING LOAD vc z −h2 z −h1 R0 + R .7) for fixed parameters. An evaluation of the two control tuning approaches developed in this part of the thesis for the ENARC controller is performed. Although this tuning method deals with the current peak management.130 known. In this process. Likewise. perturbation rejection and delays were not considered either.1 provides a range of values for param- eter ξ that guarantees equilibrium asymptotic stability for system (7. The other relevant issue in low-power technology are the parameter uncertainties. it does not consider that some system parameters may be uncertain.C . The control design procedure given in Lemma 9. 93]. In order to ensure the robustness of the Vdd-Hopping converter with respect to un- certain parameters and delays presence. In summary. The robustness properties of the closed-loop system with the sub-optimal control tuning design applied to the ENARC controller are tested by simulations. the saturation in the controller is con- sidered [26. The problem is expressed in terms of Linear Matrix Inequalities (LMIs). For this. which can generate a non-desirable performance and lack of reliability of the system [34. a ‘conservative’ sub-optimal tuning approach for K̄1 and K̄2 is now developed for an approximate ENARC controller version that. 50]. the system is rewritten into a suitable state-space form to formulate a robust H∞ problem that can be solved by using Lyapunov-Krasovskii theory [53. Remember that for control purposes. . This stability analysis has been performed in Chapter 9.

1) is guaranteed in a point within an uncertainty interval for the low level voltage. • R0 ∈ [Rm M 0 .1. respectively. Taking this notation and considering a small sampling period. whose corresponding extremes are • uk ∈ [ukl = 1.2) where h . Likewise.1 The asymptotic stability of system (10. Il . an approximate version of the ENARC controller is taken. Ts = ωn . . . From Fig.3) ukl Rm L + R0 M ukl Rm L + R0 m M RL (ukhVh − RM 0 Kleak ) RM m L (ukh Vh − R0 Kleak ) Ih . b and δ and ωn that defines the Ts in model (10. h1 + h2 and K = [K̄1 K̄2 ]. 10. RL ] . ukh = N]. TsM ]. This approxi- mate time-discretization is performed by using forward euler method [104]. . • Ts ∈ [Tsm . (10. for simplicity. Remark 10. R0 ].4) ukh RM L + R0 M ukh RML + R0 m . the applied control law is uk−h1 = satN 1 {uk−1−h1 + Kxk−h }. can be considered uncertain. we are going to formulate the problem rewriting the system (7. Ih . Ts .8) in an approx- imate discrete-time form considering both delays and uncertain parameters. • RL ∈ [Rm M L .1 Problem statement In this section. The parameters RL . Sub-optimal control considering delays and parameter uncertainties 131 10.1). bounded by m RL (ukl Vh − RM 0 Kleak ) Rm m L (ukl Vh − R0 Kleak ) Il . and within an uncertainty interval for the high level voltage.1) 1 Remember that the sampling frequency takes the clock frequency value. (10. note that h1 and h2 are the number of sampling periods in the input and in the output of the control block.Chapter 10. Considering the state xk = [ek ek−1 ]T . (10. by assuming that the sampling time is small enough to the system evolution. (10. R0 and C that correspond to β . Each uncertain parameter is within an uncertainty interval. the associated approximated discrete-time voltage error equation after employing forward Euler method is ek+1 = (1 − Tsβ )ek + Ts b(vr −Vh )uk−h1 + Ts (β vr + δ ) − bTs uk−h1 ek .

then. assume that there exist K. Consequently. Likewise. 10. Problem statement Other added problem is that the system can suffer some exogenous disturbances. with λmk ≥ 0.2 [67]. Then.1) can be rewritten ek+1 = (1 − Ts β )ek + Ts b(vr −Vh )(uk−1−h1 + α (m) Kxk−h +(1 − α (m) )Gxk−h ) + Ts (β vr + δ ) − bTs uk−1−h1 ek (10. h1 and h2 .1. for all k > 0. G ∈ R 1×n such that 1 < uk−1−h1 + Gxk−h < N. defining 2 2 Ωα . then n o satN1 {uk−1−h1 + Kxk−h } ∈ Co α (m) (uk−1−h1 + Kxk−h ) + (1 − α (m))(uk−1−h1 + Gxk−h ). and Control (10.2) is robust with respect to delays as well as parameter uncertainties. ∑ λmk = 1 m=1 m=1 where the vertices of the polytope are given by α (m) . for xk in R n . m = 1.2) and an alternative form.1 Alternative representation for the saturated control (10. this opti- mal K must guarantee asymptotic stability and disturbance rejection for the known constant delays.1) Firstly. 1 < uk−1−h1 + Gxk−h < N. 2. 2P is a positive matrix defined to guarante system stability.2) admits the following representation 2 ∑ h i uk−h1 = λm k (α (m)(uk−1−h1 + Kxk−h ) + (1 − α (m))(uk−1−h1 + Gxk−h ) m=1 2 ∑ h i = λm k uk−1−h1 + α (m) Kxk−h + (1 − α (m) )Gxk−h ) . m=1 being ∑2m=1 λmk = 1.132 10.5) for m = 1. Lemma 10. 1 . P1 2 > 0 ∈ R n×n and c > 0 such that for any xk ∈ X. . some lemmas are given to rewrite the saturated control (10. ∑ λmk α (m) . Lemma 10. Eq. where X = xk : xTk P1 xk ≤ c−1 . the main objective is to find the optimal gain K in such away that Control (10. (10. for all 0 ≤ λmk ≤ 1.2) and the error equation (10. 2.3 Assume that there exists G ∈ R 1×n .1.

11) . Sub-optimal control considering delays and parameter uncertainties 133 10. (10.8) where 2 − Ts β − Ts buk−h1 Ts β − 1 + Ts buk−1−h1 A= . 1 0 Ts b(vr −Vh ) B= . uk−1−h1 . Next expression is achieved from (10.6) is applied to (10.3 Stability and disturbance rejection problem Equation (10.6) Ts b(vr −Vh ) Now. For this.8) can be rewritten in the following explicit closed-loop form with an L2 per- turbation added. (10. (10. 1]. 0] (10. is obtained.7) This can be rewritten in the following matrix form: (m) xk+1 = A(uk−h1 . allow to system (10. xk+1 = Axk + B(α (m) K + (1 − α (m) )G)xk−h + Bw wk m = 1. ∀l ∈ [−h. Eq. with α (m) = [0. N]. 10. (10. in such a way that a H∞ problem can be formulated. 2.9) xl = φl . uk−h1 and uk−1−h1 are treated as uncertain parameters.1. uk−1−h1 )xk + Būk−h m = 1.1) ek+1 − (1 − Ts β )ek − Ts (β vr + δ ) + bTs uk−h1 ek uk−h1 = . 2.10) zk = I2 xk . 2.1.1) rewrite it in a state-space form. whose values will be inside the uncertainty interval [1. Ts b(vr −Vh ) and it is delayed one sampling period ek − (1 − Ts β )ek−1 − Ts (β vr + δ ) + bTs uk−1−h1 ek−1 uk−1−h1 = .2 State-space representation The saturated control and error equation.5) obtaining ek+1 = (2 − Tsβ )ek − (1 − Ts β )ek−1 + Ts b(vr −Vh )(α (m)K + (1 − α (m) )G)xk−h −Ts b(uk−h1 ek − uk−1−h1 ek−1 ). m = 1. an expression for the dynamic part of the controller. 0 (m) being ūk−h = (α (m) K + (1 − α (m) )G)xk−h for m = 1. (10.Chapter 10. (10. as redefined before. 2.

respectively. such that Vk+1 − Vk along the solution of (10. zk .134 10. (10. bw2 1 bw2 2 where xk .9) is performed via a descriptor model transformation [51]. −h ≤ l ≤ 0. and the output vector zk is less or equal to γ . a) Lemma 10.4 The problem is to find a X(P1. 10.13) The solution to this problem guarantees the system stability as well as the disturbance rejection for the time-delay system (10. the closed-loop system (10. a vector G and K such that.2 H∞ control design In order to cope with this problem a mathematical manipulation of Eq. H∞ control design with bw1 1 bw1 2 Bw = . i. Moreover. The descriptor approach is just a variable change.8) and b) there exists a Lyapunov-Krasovskii functional Vk > 0. controlled output and exogenous disturbance input.9) is manipulated in order to achieve the previous objectives. hence. c). and for any perturbation input.12) when the system is not perturbed.2.e. such that. for all γ ≥ γ ∗ the L2 gain between the perturbation vector wk . (10.11). φk is the initial condition and h ≥ 0 ∈ R is a fixed and known delay. wk ∈ R n are the state vector.1 Descriptor model transformation Equation (10. (10.2. which makes easier to work with Lyapunov-Krasovskii functional [52]. 10. γ ∗ ≥ 0. ∀wk ∈ L2 for φl = 0.9)–(10. a de- scriptor model transformation is applied. kzk k22 − γ 2 kwk k22 < 0. there exists a min- imum disturbance attenuation. For this. Problem 10. .3 holds and.9) fulfills Vk+1 −Vk < 0.

2 Condition for state-space representation Firstly. m = 1. (10.16) which correspond to " # (i) N − 2uk−1−h1 −G 1 xTk−h 1 ≥ 0. in order (i) (i) to guarantee 1 < uk−1−h1 + Gxk−h < N.15) and " # (i) −1 + 2uk−1−h1 G 1 1 xTk−h ≥ 0. A + B(α K + (1 − α (m) )G) − I2 (m) −I2 yk m = 1. 0}. where uk−1−h1 = {1. 0 −yk + Axk − xk + B(α (m) K + (1 − α (m) )G)xk + Bw wk From xk−h = xk − ψk . E . 2. (10. (10. 2. N} ∀x ∈ X given in (10.Chapter 10. m = 1. These matrices can be rewritten in a suitable form by employing the Schur’s comple- ment.17) ∗ cNP1 xk−h for (10. 2. i=k−h Next. this system can be compactly written as: 0 0 E x̄k+1 = Āx̄k − ψk + w. (10. x̄k .9) is rewritten in the descriptor form [51]: xk+1 yk + xk = . .17) and (10. k .3). ∑ yi . next LMIs from (10. Sub-optimal control considering delays and parameter uncertainties 135 Considering: k−1 yk . applying P̄1 = Q1 P1 Q1 and pre and post-multiplying by diag{1. for i = 1. Eq. .4 is dealt with.15) (i) 2 ≤ (1 + cxTk−h P1 xk−h ) ≤ 2(uk−1−h1 + Gxk−h ).18) ∗ cP1 xk−h for (10. i = 1.18) are obtained " # " # c Y c Y (i) ≥ 0. 2. (i) ≥ 0. ψk . i = 1.14) B(α K + (1 − α )G) (m) (m) Bw k where I2 I2 x Ā . 10. Q1}. it is seen that. From [49]. (10. Likewise defining Y = GQ1 .2. 2.19) ∗ (N 2 − 2Nuk−1−h1 )P̄1 ∗ (−1 + 2uk−1−h1 )P̄1 respectively. 2. the condition a) of the Problem 10. xk+1 − xk . (10. it is necessary that next equations are satisfied (i) 2N ≥ N(1 + cxTk−h P1 xk−h ) ≥ 2(uk−1−h1 + Gxk−h ) (10. diag{I2 .16).

the condition b) of the Problem 10.25) for m = 1. 62]. then objective (10.21) being V1. 2. being P2 Hermitian. Fulfillment of condition (10.9)–(10.19) plus the following LMIs are satisfied: T 0 S 0 Ā PĀ − EPE + diag{In . 2.k +V2. S > 0. hR} −ĀT P + ĀT P B(α K + (1 − α )G) (m) (m) 0 Bw Γ .k .9)–(10. Delay-dependent as well as delay-independent criteria are considered in V2. (10.k .20) P1 P2 Define P . (10. G ∈ R 1×n . Next. H∞ control design 10.11) is asymptotically stable and there is a value γ ∗ such that for γ < γ ∗ condition (10.136 10. T .k and V3. (m) <0 ∗ − 1h R − S 0 ∗ ∗ −γ 2 In (10.24) i=k−h where V1. P1 > 0 ∈ R n×n such that the LMIs (10. P2 0 For this purpose.14) without delays.13) is looked for.2.3 Control design Now. a sufficient condition for asymptotic stability and disturbance rejection is derived. If there exist S. (10. P1 > 0 (10.k guaranties asymptotic stability of system (10. Take ζ .k = ∑ xTi Sxi .4 can be formulated in terms of Linear Matrix Inequalties (LMIs) [53]. .k +V3.k = x̄Tk EPE x̄k .5 Consider system (10. then the equilibrium of the closed-loop system (10. Theorem 10.. R.2. where h > 0 ∈ R is a known constant delay and K.23) n=1 i=k−n k−1 V3. respectively [53.12) plus condition (10. as Lyapunov-Krasovskii candidate is considered Vk = V1.k = ∑ ∑ yTi Ryi .22) h k−1 V2.13) is fulfilled. [x̄k ψk wk ]T . R>0 (10.11) with energy-bounded wk and control law ūk−h = α (m) Kxk−h + (1 − α (m) )Gxk−h for m = 1.13) is satisfied if Vk+1 −Vk + xTk xk − γ 2 wTk wk ≤ ζ T Γ0 ζ < 0.

m = 1. in this section. stability as well as disturbance rejection for the time-delay Vdd-hopping system.3 Robust control tuning Now.1 are taken into account. where 0 ηk = −x̄Tk ĀP ψ − ψkT [0 α (m) K T BT + (1 − α (m) )GT BT ]PĀx̄k α (m) BK + (1 − α (m) )BG k m = 1. to obtain a robust saturated control under .25) are obtained. the uncertain parameters given in Section 10. Lyapunov-Krasovskii method yields: V1. Sub-optimal control considering delays and parameter uncertainties 137 Proof: The goal is to satisfy Vk+1 − Vk + zTk zk − γ 2 wk T wk < 0 for both disturbance rejection and asymptotic stability of the equilibrium for system (10.k+1 −V2. That means. 2.k = x̄Tk+1 EPE x̄k+1 − x̄Tk EPE x̄k n o = x̄k Ā − ψk [0 α K B + (1 − α )G B ] + wk [0 Bw ] T T T (m) T T (m) T T T 0 0 ×P Āx̄k − (m) ψk + w − x̄Tk EPE x̄k α BK + (1 − α )BG (m) Bw k = x̄Tk [ĀT PĀ − EPE]x̄k + ηk + νk . Bw Bw k h 0 0 1 V2.k+1 −V3.23) and applying Jensen Inequality [61].14).k = xTk Sxk − xTk−h Sxk−h = xTk Sψk + ψkT Sxk − ψkT Sψk These developed expressions are applied to inequality (10. 2. 0 0 νk = wTk [0 BTw ]P T wk + x̄k ĀP w + wk [0 BTw ]PĀx̄k . in such a way that the LMIs (10. V3.20).k+1 −V1.k = hyTk Ryk − ∑ yTk−n Ryk−n ≤ x̄Tk 0 hR x̄k − ψkT Rψk h n=1 This inequality is obtained developing Eq.Chapter 10. guarantying the properties achieved above. (10. 10.

j = 1..5 proof. Then. satisfying those properties. namely n n Ω= ∑ λ jΩ j. 128. Q1 . Robust control tuning parameter uncertainties. In } and taking Q1 = P2−1 > 0 and P̄1 = Q1 P1 Q1 .11) with energy-bounded wk and the control law uk−h = Kxk−h where h ≥ 0 ∈ R is a known constant delay and K.. G ∈ R 1×n . For this. 2. ... Pre and post-multiplying LMI (10. 0 ≤ λ j ≤ 1. Theorem 10. Therefore. . [A BK Bw α uk−h1 uk−1−h1 ] and assume that Ω ∈ C o{Ω j . 128}. . are satisfied. where ( j) T T T Γ̄1 ..6 Consider system (10. in the vertices j and i. P̄1 + Q1 A( j) − 2Q1 + α ( j) B( j) + (1 − α ( j) )Y T B( j) . 128 such that the LMIs (10.25) by Q = diag{Q1 . this theorem follows Theorem 10.138 10.19) and ( j) ( j) Γ̄1 Γ̄2 −α ( j) B( j) T − (1 − α ( j))B( j)Y + S̄ Bw Q1 ∗ P̄1 − 2Q1 + hR̄ −α ( j) B( j) T − (1 − α ( j))B( j)Y Bw Q1 Γ̄( j) . . Denote Ω . Proof: This is an extension of Theorem 10... S̄ > 0 ∈ R n×n for j = 1.9)–(10. Q1 A( j) + A( j) Q1 − 2Q1 + α ( j) T T B( j) + (1 − α ( j) )Y T B( j) + α B( j) T +(1 − α )B( j)Y + In ( j) T T T Γ̄2 .. the following sufficient condition is achieved: Theorem 10.26) ∗ ∗ − R̄h − S̄( j) 0 ∗ ∗ ∗ −γ 2 Q 1 j = 1. for some.. the equilibrium is asymptotically stable as well as the disturbances are rejected in the entire polytope.3.. G = Y Q1 and R̄.5 for a polytopic uncertainties with some mathematical manipulations. 128. . Q1 . If there exist T.. ∑ λj = 1 j=1 j=1 ( j) ( j) and being the vertices of the polytope described by Ω j = [A( j) B( j) K Bw α ( j) uk−h1 ( j) uk−1−h1 ] for j = 1.. Q1 . < 0. R̄ = Q1 RQ1 .Y ∈ R n×1 and Q1 ∈ R n×n with K = T Q−1 −1 1 . P̄1 .5 is extended in the case of polytopic uncertainties. S̄ = Q1 SQ1 . (10.

Note that even if the control constant tuning is conservative. this method can be applied for any L2 exogenous disturbance. • load dynamic resistance. The uncertain parameters take the following ranges: • transistor characteristic.4 Sub-optimal control result In this section. obtained from T and Q1 in Theorem 10. P1 = 736.Chapter 10.09 This was obtained for c = 7.5 and consequently guaranties both robust stability and robust disturbance rejection for a fixed delay. fulfills Theorem 10. from 25Ω to 38Ω. from 55. X. the previous sub-optimal control tuning is applied with the data reported in Section 7. Corollary 10.28) 0.7 This robust control tuning method is conservative due to the definition of the matrix P. The extension of this approach considering the saturation mechanism of the ENARC controller is open for future work. as well as. there is a feasible solution. the clock frequency is taken fclk = 200MHz. the attraction domain.46Ω. C. ωn . from 125MHz to 600MHz. However.0004 0.6) are resolved. • load capacitance. any perturbation was not taken into account. This frequency introduces an one-sample-period delay (h1 = 1) in the control block output due to a power-performance trade-off.27) K̄2 = 12114. Likewise h2 = 2.45 .56. Sub-optimal control considering delays and parameter uncertainties 139 Remark 10. (10. Now. from 1pF to 1nF and • clock frequency. LMIs (10. RL .931 In this computation. . obtaining K̄1 = −7179 (10.6. thus h = 3. Then. R0 .0008 ·1011 and G = −35.0008 1.2.53Ω to 72.8 Gain K. 0. 10.

The closed-loop system robustness (with K̄1 = −7179 and K̄2 = 12114) is displayed when the sampling frequency is ωn = 200MHz in Fig.797.5.155V ].3 and K̄2 = 39. RL . the delay is h = 3 and the load dynamic resistance. In this kind of systems. 10. 0. 10. Likewise. will be time-varying.3.2 (K̄1 = −19. Observe that the effect of the delay is shown in system response.133V . For these simulations. an example shows that system performance is sensitive to K̄1 and K̄2 .5. Note that the system in the low voltage level converges to 0.5. Il = [0. a comparison between the performance achieved with respect to the control gains obtained by the previous control tuning given in Section 7. the high voltage level converges to 1. Note that the equilibrium is robust with respect to parameter uncertainties and delay. 1. the parameters values given in Section 7. This is shown in Fig.5.4 and 10. rL . These tests show once again the system robustness. and the gains got by the sub-optimal control tuning (K̄1 = −7179 and K̄2 = 12114) is made. Therefore. 0. which is inside the interval given by (10. system converges to the uncertain intervals. which are inside the interval given by (10.3 Uncertain load parameter Finally.677V and 0.5. it is assumed that the electrical characteristic of the PMOS can suffer changes. .3).1 Uncertain clock frequency.2R0 % is changed.8R0% and 1. 10.140 10.2 and the data given above are taken.132V.5 Simulation Results In this section some simulations are performed in order to show the properties that the closed-loop system can achieve when the sub-optimal control gains are used in the ENARC controller. 10.2 and ωn = 400MHz in Fig. Ih = [1.27). 10.675V.4). Simulation Results 10. Likewise.799V ]. respectively. 10. We want to remark that in the following simulations. For this.2 Uncertain PMOS resistance In this first evaluation. clock frequency can be changes.

4 0.2 V(V) 1 0.2: ωn = 200MHz and K̄1 = −7179 and K̄2 = 12114.2 0.4 0.2 0. b) vr (dashed) and vc (solid).8 0 0.6 0.3: ωn = 400MHz and K̄1 = −7179 and K̄2 = 12114.2 0.8 0 0.4 0.2 0.8 1 t(s) −6 x 10 b) 1.4 0.4 0. .2 0. Evolution of the: a) number of PMOS transistors switched on.8 1 t(s) −6 x 10 Figure 10.4 0.05 0 0 0.02 0 0 0.2 0. a) NTrans 20 10 0 0 0.2 V(V) 1 0.6 0. Evolution of the: a) number of PMOS transistors switched on.6 0.6 0.8 1 t(s) −6 x 10 d) I(A) 0.6 0.8 1 t(s) −6 x 10 b) 1. Sub-optimal control considering delays and parameter uncertainties 141 NTrans a) 20 10 0 0 0.8 1 t(s) −6 x 10 Figure 10.6 0.8 1 t(s) −6 x 10 d) I(A) 0.Chapter 10. b) vr (dashed) and vc (solid). c) current Il . c) current Il .

142 10.8 1 t(s) x 10 −6 b) 1.4 0.8 1 t(s) x 10 −6 d) I(A) 0. Simulation Results a) NTrans 20 10 0 0 0.2 V(V) 1 0.4 0.6 0.6 0.02 0 0 0.8R0 % and K̄1 = −7179 and K̄2 = 12114.2R0 % and K̄1 = −7179 and K̄2 = 12114.4 0.2 0.8 1 t(s) x 10 −6 Figure 10.2 0.5.8 0 0. a) NTrans 20 10 0 0 0.02 0 0 0.8 1 t(s) x 10 −6 b) 1.2 0.2 0.8 0 0.4: 0.4 0.8 1 t(s) x 10 −6 d) I(A) 0. Evolution of the: a) number of PMOS transistors switched on. b) vr (dashed) and vc (solid). b) vr (dashed) and vc (solid). .2 V(V) 1 0.2 0. c) current Il .2 0.6 0.5: 1.4 0.6 0. c) current Il .6 0.6 0.4 0. Evolution of the: a) number of PMOS transistors switched on.8 1 t(s) x 10 −6 Figure 10.

The lack of knowledge of the load in the real applications of these systems may achieve this change of three order of magnitude. Fig.8 0 0. Sub-optimal control considering delays and parameter uncertainties 143 The capacitance employed in the previous simulations have been C = 1nF.6. .7 the system performance is satisfactory. In Fig.7 shows the simulation employing the sub-optimal control tuning. However.e.4 0.8 1 t(s) −6 x 10 d) I(A) 0.27.6: C = 1pF and K̄1 = −19. it can be seen a wrong behavior of the controller when the previous control tuning given in Section 7. we want to perform an evaluation of the two control tuning approaches pre- sented in this part of the thesis. i. in Fig. a) NTrans 20 10 0 0 0.27. K̄1 = −19. b) vr (dashed) and vc (solid). In the follow- ing.6 Evaluation of the tuning methods In this section. c) current Il .2 V(V) 1 0.4 0. 1000 times smaller. This example shows the great robustness of the system when the sub-optimal control tuning is employed.3 and K̄2 = 39.2 0. Some simulations using both the original and sub- optimal control tuning are made. 10.2 0..02 0 0 0.2 K̄1 = −19. the system does not respond to voltage variation. 10.3 and K̄2 = 39.6.2 0.Chapter 10. 10.4 0.6 0. it is desired to validate the system robustness when C = 1pF. 10.27 are used. Nevertheless.8 1 t(s) −6 x 10 b) 1.6 0. Evolution of the: a) number of PMOS transistors switched on.8 1 t(s) −6 x 10 Figure 10.3 and K̄2 = 39.6 0. Note that in Fig 10.

8 1 t(s) x 10 −6 Figure 10. In order to test the achieved properties. Later.2 0. delays. Evolution of the: a) number of PMOS transistors switched on. it is desired to extend this result regarding the saturation mechanism that manages the current peaks.6 0. per- turbation rejection and uncertain parameter as well as stability issues.7: C = 1pF and K̄1 = −7179 and K̄2 = 12114. could guarantee that these current peaks are small. Nevertheless. fast transient periods.8 1 t(s) x 10 −6 d) I(A) 0. For this. Consequently. that ensures a maxi- mum variation of the switched transistors in every sampling time. the closed- loop system with this method also offers a high energy efficiency.6 0. in Chapter 9. The second tuning method was developed in this chapter. this tuning mechanism takes into account the management of the current peaks and the fast transient periods in such a way that a high energy efficiency is achieved. It was developed focussed on ensuring the equilibrium convergence around of a set point for the linearized closed-loop system.02 0 0 0. in this approach was not considered the man- agement of the current peaks.2 0.6 0.2 0.6. Moreover.8 1 t(s) x 10 −6 b) 1.4 0. the saturation of the total number of PMOS transistors.4 0. system delays and parameter uncertainties have not been studied . and thus. some . it was called sub-optimal control mechanism. Evaluation of the tuning methods a) NTrans 20 10 0 0 0. c) current Il . it consideres a closed-loop system closer of the real one.8 0 0. It was developed taking into account the saturation of the total number of transistors. An estimation of an attraction domain.4 0. This last control tuning takes into account more control objectives. b) vr (dashed) and vc (solid). an approximate stability analysis for the nonlinear system and the approximate continuous-time ENARC controller with this first tuning approach was performed.144 10.2 V(V) 1 0. As future work. The first tuning method for the ENARC controller was presented in Chapter 7. However.

This controller achieves almost of the control requirements for SoCs technology. . 101]. These improvements make that system is more energetically efficient. In this chapter. parameter uncertainties and delays have been disregarded.. what makes this controller feasible for industry applications. An evaluation of the two tunning methods presented in this part of the thesis have been performed taking into account the approximations employed in both approaches. the controller with the current peak management) with this sub-optimal tuning approach. Generally. Furthermore. It can be seen. the closed-loop system has a robust equilibrium stability with respect to parameter uncertainties and delays. these important issues have been dealt with. The control has been based on H∞ theory applied to time-delay systems [26. with this development.e. the system is rewritten in a state-space form. A controller. This kind of method to tune a linear controller are employed in industrial applications [14. For this. Conservativeness of the method for the Vdd-Hopping system has been discussed. pending patent under the name ENARC. Furthermore. Sub-optimal control considering delays and parameter uncertainties 145 simulations are done employing the ENARC controller (i.Chapter 10.. to switch more than one tran- sistor in a same sampling time. This controller has an energy-aware management of current-peaks in the set of PMOS transistors. A future research will be performed.7 Conclusions An energy-aware control has been developed for the Vdd-Hopping system. parameters can change due to task requirements or can be varying on time. Nevertheless. in order to extend this result considering the current peak management in the control signal. the right system behavior. thus. 10.e. An sub-optimal ‘conser- vative’ control tuning approach has been developed for the ENARC controller in order to achieve a robust closed-loop system with respect to the parameter uncertainties and delays. some LMIs have been de- veloped following Lyapunov-Krasovskii method. it presents a relative low number of computational blocks. it only needs to know the two set-points. this kind of systems have delays due to synchronization issues and performance constraints. 53. i. As a side effect the transient-periods are diminished. was designed for the Vdd-Hopping system with the aim of reducing the dissipated energy. 129]. all control requirements specified in Chapter 6 have been achieved. it has been showed that energy-consumption is reduced a 96%. Finally. System robustness has been showed by means of some simulations. For this. a step reference is used. In addition. In a comparison performed with an ‘intuitive’ controller published in [99]. This result comes from the possibility to control more than one transistor at once. Therefore.

• fast transient periods. • robustness with respect to parameter uncertainty. This controller has the next properties: • high energy efficiency. . it achieves an interesting relevance for SoCs applications and. thus. • robustness with respect to delays and • easy implementation. • small current peaks.146 10. in this work a controller for the Vdd-Hopping system has been obtained. in ARAVIS project implementation. in order to validate its performed. • system stability. An implementation of the ENARC controller in VHDL-AMS will be performed in the project context. Hence.7. Conclusions In summary.

that does not require any reference signal. Its structure is the result of employing DC-DC converters in this kind of technology. the thesis is com- posed of two parts. It is no-minimum phase 4th order nonlinear system. and the proposition of an estimated attraction region have been coped with. where 147 . Furthermore. it has relevant interest in this field due to the project context. sponsored by the international competitiveness pole Mina- logic. obtaining a boost inverter. Although. this thesis deals with a DC-AC converter for applications of medium or high power. as no purely resistive and known loads. The control problem was tackled in the ‘Département d’Automatique de GIPSA-Lab’ at the ‘Institut Polytechnique de Grenoble’ and at the ‘Institut National de Recherche en Informatique et en Automatique de Grenoble’ (France). its simple model may not be attractive for control applications. Its structure is based on a double DC-DC boost converter. Due to the dissimilar natures of both applications mentioned before. Its main objective is to achieve the desired voltage with a suitable control law. Specifically. Both converters are regarded with respect to their work contexts. And the second electronic application was raised in a project of the French government. hence. the associated control objectives are different. The first problem was developed in the ‘Departamento de Ingenierı́a de Sistemas y Automática’ at the ‘Universidad de Sevilla’ (Spain).Chapter 12 Conclusions and future work 12. called ARAVIS. and thus. and a DC-DC converter for low-power applications.1 Conclusions and contribution summary This thesis contributes to provide nonlinear control problem solutions to several classes of power converters. other problems. it is called ‘Vdd-Hopping converter’. The second part of the thesis is devoted to a discrete DC-DC converter for low-voltage application in SoC. The first part is focused on the control problem of the DC-AC converter. It is based on the Vdd-Hopping technic in order to fulfill Dynamic Voltage Scaling. This system is a 1st order nonlinear system.

A phase controller inspired by a phase-lock loop is presented in order to synchronize the two output voltages of both parts of the system. This must be reached with a controller that ensures the convergence to the desired equilibrium points. This problem comes from the real nature of the boost inverter. It takes ad- vantage of certain defined Lyapunov function. i. a general estimation method for this class of problem has been proposed. The control objectives come from the ARAVIS project. This method provides a relevant property. while the current peaks and the transient periods are minimized. 3.148 12. with the electrical grid. The last issue considered has been the estimation of an attraction region for the boost inverter. These developed works. and hence. the relevant aim for this DC-DC converter is to achieve a high-efficiency. By means of developing a control adaptive for the unknown or/and slowing varying load connected to the boost inverter. 2. the desired output voltage is always achieved. since the sys- tem needs no reference signal. 5. respectively. have been not considered in this thesis to make a simple reading. Inspired by this estimation problem of an attraction region for the boost inverter. the most important contribu- tions have been: 1. raising a . Conclusions and contribution summary it is dealt with. for this. It provides a set of initial conditions corresponding to trajectories that con- verge towards the desired system behavior. which has several constraints. 4. its analysis and implementation are easier. that ensures global stability. This makes that the system has not global stability with the Lyapunov function obtained from energy shaping approach.1. The previous problems dealt with before have been extended to a load that is not purely resistive but also has an inductive component. For the first part. the energy shaping approach employed to obtain the control structure ensures global stability. Global stability of the full system is proved by using singular perturbation method. In this context. as the inverter control law as the adaptive controller developed for the boost inverter with an inductive load were published in [10] and in [12]. controlling the boost inverter circuit. including saturations. This control adaptive needs of a state observer for some variables.. the system is rewritten in the suitable form by using time-scale separation. since they are just an extension. However.e. global stability and robust behaviour with respect to delays and parameter uncertainties. the most important contributions of this thesis are highlighted. although all vari- ables are measured. the system is autonomous. Next up. Furthermore. A control law for the boost inverter has been designed based on an energy shaping ap- proach for oscillation generation. as for example. This idea is extended to synchro- nize the circuit with an external signal.

A global stability analysis of the nonlinear model of the Vdd-Hopping converter with the nonlinear controller presented before has been developed. A set of high-performance controllers has been proposed. Consequently. 4. Here. as is common in control. The stability analysis of the closed-loop system has been involved due mainly to the saturation limits depending on the system state. Conclusions and future work 149 simple optimization problem. 2. In addition. It is assumed that the stability properties in discrete-time are conserved. some delays can be presented due to the regarded work context of the Vdd-Hopping converter. it is not a suitable solution for the ARAVIS project. In order to satisfy the objectives. the provided contributions have been: 1. For this. They are obtained resolving some Linear Matrix Inequalities (LMIs). An innovative controller for the DC-DC Vdd-Hopping converter has been developed based on the control structure with the smallest computational cost from the set of control solutions proposed before. depending on the specific application. The last contribution is performed with respect to delays in parameter uncertainties. the previous Lyapunov function. For this. has been employed. This control solution in spite of providing nice properties to the Vdd-Hopping converter behaviour. For simplicity. as well as. reducing the current peaks and diminish- ing the transient periods. some developments have been made to this controller. On the other hand. From the set of controllers. the system parameters can be diverse and time-varying during the transient periods. The global analysis is ensured by LaSalle’s invariance principle. This controller has been designed based on energy- aware concept.Chapter 12. applying optimal and adaptive control theory. an optimal tuning mechanism for these control gains based on H∞ theory is proposed. The second part of the thesis is focused on the control problem of the DC-DC Vdd- Hopping converter. the problem is to find the optimal gains for the controller. This method is applied to the boost inverter. . Its originality is due to its current-peak managing through saturations with dynamic limits depending on the state of the system. has a relevant drawback: its computational cost is very large. The method provides a good ‘conservative’ estimation for the inverter. These controllers have been developed by applying several control theories focused on reaching the desired equilib- rium point by the closed-loop system. this analysis has been performed in continuous-time. Therefore. 3. This fact makes that the estimation is ‘conservative’. It covers almost all requirements in low-power technology. This problem is resolved rewriting it as a sum of squares optimization. These delays can be considered as one only constant delay. the one that provides a best performance is selected. On the one hand. as well. its simple structure is remarkable for industrial applications. They may be caused by synchronization issues. by providing an energy-performance trade-off. It achieves the desired equi- librium points increasing the energy saving.

5. to extend this analysis (which has been performed employing singular perturbation analysis) for a infinite time. 4. Finally. 2. this will allow to compare this control law with other controllers that have been already published for the same inverter. In the Vdd-Hopping converter: 1. An extension of the proposed adaptive control can be performed considering that not all the states are measured. . Extension of the stability analysis of the closed-loop system in discrete-time. 3.2 Future work Following the investigations described in this thesis. . Future work which have been developed by Lyapunov Krasovskii method.150 12. A physic implementation of the boost inverter will be made in order to test the per- formance of the control law proposed from applying energy shaping. in order to test its real approximate behaviour before to implement it in SoCs. An implementation of the controller proposed in this thesis will be performed in VHDL-AMS. A better numerical solution to obtain an optimal voltage reference for the Lyapunov controller will be performed with another advanced mathematical tool.2. These LMIs ensure the equilibrium robustness with respect to delays and parameter uncertainties. 12. To find a less conservative solution to estimate the attraction region by employing another advanced tool to solve the sum of squares optimization problem. the next future work will be taken up: In the boost inverter: 1. In the case of the global stability analysis to the system with the adaptive controller. it can be concluded that nonlinear control theories can be powerful tools to pro- vide solutions of several natures in industrial applications. in such a way that global stability of these systems is guaranteed. 3. In addition. 2.

Extension of the sub-optimal tuning approach for the control gains considering the saturation of the current peak management.Chapter 12. . Conclusions and future work 151 4.

Future work .2.152 12.

Control of the boost DC-AC converter with RL load by energy shaping. C. Canudas-de-wit. Spain. South Africa. Gordillo. C. C. Albea and E. Singapore. 1-3 Oct. Canudas De Wit. Control Adaptativo del Inversor Boost. C. Orlando. M. XXVIII Jornadas de Automtica. 2. 7th IFAC Symposium on Nonlinear Control Systems (Nol- cos’07). Gordillo and C. XXIX Jornadas de Automtica. Albea and F. T. 6-11 July 2008. 6. New Or- leans. Gordillo. F. 34th IEEE Conference of the IEEE Industrial Electronics Society (IECON’08). 22-24 August 2007. Russia. Alamo. 46th IEEE Conference on Decision and Control (CDC’07). 2008. 1er IEEE Multi-conference on Systems and Control (MSC’07). 2007. C. Albea. C. C. 4. 12-14 Dec. 1-3 Oct. Gordillo. 2008 3. Canudas-de-wit. Canudas-de-wit. 5-8 Huelva. C. 5-8 Sept. 5. Adaptive Control of the Boost Inverter with Load RL. Gordillo. LA. 7. Spain. C. 2007 8. Albea. ”Control Applications. Albea. Gordillo. USA. Albea. Florida. 153 . Estimation of the Region of Attraction for a Boost DC- AC Converter Control Law.List of Publications In conferences: 1. 3rd IEEE Multi-conference on Systems and Control (MSC’09). and F. 2007. Advanced Control Design for Voltage Scaling Converters. 9. Canudas De Wit and F. and F. 17th IFAC World Conference. 1er IEEE Multi-conference on Systems and Control (MSC’07).10-13 Nov. C. Canudas De Wit. Singapore. C. 8-10 July 2009. Fernandez Camacho. Fiacchini. Korea Republic. Gordillo. Adaptive model predictive control of the hybrid dynamics of a fuel cell system. Control and Stability Analysis for the Vdd-hopping Mechanism. 3-5 Sept.. Albea and F. C. Saint Petersburg. Albea. LA. C. 2007. C. and F. Tarragona. Albea and F. Adaptive Control of the Boost DC-AC Converter. Pretoria. Diseo de Controladores para Conver- tidores con Escalado de Tensin. USA. Gordillo.

M. Ortega. C. Albea. Albea and C. . C. Canudas De Wit. On the estimation of attraction domains for polynomial sys- tems with constraints. Albea. Gordillo. Albea and F. Salas and F. Aplicacion del control Hinf al PPCAR. 3. date: 22 January 2009. Gordillo. 32th IEEE Conference of the IEEE Industrial Electronics Society (IECON’06). 2. Adaptive Control Design for a Boost Inverter. Almeria. High Performance Control Design for Dynamic Voltage Scaling Devices. C. XXVII Jornadas de Automtica. 4. C. Dispositif de commande numrique pour un tableau de transistors PMOS en parallele Patent No: 08/07342. 2006 11. C. Albea. Gordillo and C. Spain. F. Almeria. . Canudas De Wit. Control del Convertidor Boost DC-AC por moldeo de En- erga. Aracil Santoja. 2008 Publ. 2006. Patent: 1. C. Rubio. submitted 2009. Gordillo. C. (under preparation). Canudas de Wit. accepted August 2010. F. C. Canudas De Wit. and F. R. C. Application to electronic converters” (submitted).2. Albea C. Paris. Albea C. 12. 6-9 Sept. Gordillo and C.154 12. 6-9 Sept. Robust Control for Low-Power Con- verters (under preparation). Control of the boost DC-AC converter. France. Spain. G. Future work 10. Gordillo and J. 6-10 Nov. in Engineering Control Technology. F. published September 2010... Filing date: 22 Dec. XXVII Jornadas de Automtica. F. 2006 In journals: 1. Albea and F.

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