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The Tricon is designed with a fully triplicated architecture

throughout, from the input modules through the main processors


(MPs) to the output modules.

Theory of Operation

Fault tolerance in the Tricon is achieved which takes control if a fault is detected memory for use in the hardware voting
by means of a Triple-Modular Redun- on the primary module during opera- process.
dant (TMR) architecture. The Tricon tion. The hot-spare position can also be
The individual input table in each main
provides error-free, uninterrupted used for online system repairs.
processor is transferred to its neigh-
control in the presence of either hard
boring main processors over the propri-
failures of components, or transient
etary TriBus. During this transfer,
faults from internal or external sources. Main Processor Modules
hardware voting takes place. The
The Tricon is designed with a fully trip- A Tricon system contains three main TriBus uses a direct memory access
licated architecture throughout, from processor (MP) modules to control (DMA) programmable device to
the input modules through the main three separate channels of the system. synchronize, transmit, vote and
processors to the output modules. Each main processor operates in compare data among the three main
Every I/O module houses the circuitry parallel with the other two main proces- processors.
for three independent channels, sors, as a member of a triad.
which are also referred to as legs.
Auto Spare Auto Spare
Each channel on the input modules
reads the process data and passes Input I/O Bus Output
that information to its respective Leg Main Leg
A Processor A
TriBus
main processor. The three main A

processors communicate with each Input Main TriBus


Output
other using a proprietary high-speed Leg Processor I/O Bus Leg Voter
B B
B
bus system called the TriBus. Input Output
Termination TriBus Main Termination
Processor
Once per scan, the three main Input I/O Bus C Output
Leg Leg
processors synchronize and commu- C C
nicate with their two neighbors over
the TriBus. The Tricon votes digital
input data, compares output data, Simplified Tricon Architecture
and sends copies of analog input
data to each main processor. A dedicated I/O and COMM processor If a disagreement is discovered, the
on each main processor manages the signal value found in two out of three
The main processors execute the data exchanged between the main tables prevails, and the third table is
control program and send outputs processors and the I/O modules. A trip- corrected accordingly. One-time differ-
generated by the control program to the licated I/O bus is located on the chassis ences which result from sample timing
output modules. The output data is backplane and is extended from chassis variations can be distinguished from a
voted on the output modules as close to to chassis by means of I/O bus cables. pattern of differing data. The three
the field as possible, which enables the independent main processors each
Tricon to detect and compensate for any As each input module is polled, the new
maintain data about necessary correc-
errors that might occur between the input data is transmitted to the main
tions in local memory. Any disparity is
voting and the final output driven to the processor over the appropriate channel
flagged and used at the end of the scan
field. of the I/O bus. The input data from each
by the built-in Fault Analyzer routines
input module is assembled into a table
For each I/O module, the system can to determine whether a fault exists on a
in the main processor and stored in
support an optional hot-spare module particular module.

3
Theory of Operation

After the TriBus transfer and input data priate channel of the corresponding The main processor modules receive
voting have corrected the input values, output module over the I/O bus. For power from dual power modules and
these corrected values are used by the example, Main Processor A transmits power rails in the main chassis. A
main processors as input to the user- the appropriate table to Channel A of failure on one power module or power
written control program. (The control each output module over I/O Bus A. rail will not affect the performance of
program is developed in the TriStation The transmittal of output data has the system.
software and downloaded to the main priority over the routine scanning of all
processors.) The 32-bit main micropro- I/O modules.
cessor executes the user-written control Bus Systems and
The I/O and COMM processor
program in parallel with the neigh-
manages the data exchanged between
Power Distribution
boring main processor modules. Three triplicated bus systems are etched
the main processors and the communi-
The user-written control program cation modules using the communica- on the chassis backplane: the TriBus,
generates a table of output values based tion bus, which supports a broadcast the I/O bus and the communication bus.
on the table of input values, according mechanism. The TriBus consists of three indepen-
to the rules built into the control dent serial links which operate at 25
The model 3008 Main Processors
program by the customer. The I/O megabits per second. The TriBus
provide 16 megabytes of DRAM,
processor on each main processor synchronizes the main processors at the
which is used for the control program,
manages the transmission of output beginning of a scan. Then each main
sequence-of-events data, I/O data, diag-
data to the output modules by means of processor sends its data to its upstream
nostics and communication buffers.
the I/O bus. and downstream neighbors. The TriBus
In the event of an external power performs one of two functions with the
Using the table of output values, the I/O
failure, the integrity of the user-written data:
processor generates smaller tables,
program and the retentive variables is
each corresponding to an individual Transfer of data onlyfor I/O,
protected for a minimum of six months.
output module in the system. Each diagnostic and communication data.
small table is transmitted to the appro-
Comparing data and
flagging disagreements
Dual Power Rails
for the previous scans
output data and memory of
Dual-Power +3.3 Volts user-written control
Regulators +5 Volts
802.3 Network program.
(RJ-45) Reserved for

DIAG Read (DB25)


Modbus (DB9) future use An important feature of the
Tricons fault-tolerant archi-
Diag Bus
Up
Clock/ I/O & COMM Fault Tolerant tecture is the use of a single
Stream Main Processor I/O Modules
(to other NVRAM Processor I/O Bus 375Kb transmitter to send data to
Down MPC860A
MPS) 32 KB MPC860A
Stream both the upstream and down-
stream main processors. This
COMM Bus Communication
2Mb Modules ensures receipt of the same
32 Bit bus Shared 32-Bit Bus data by the upstream
Memory
128K processor and downstream
processor.

FLASH TriBus DRAM DRAM


6 MB FPGA 16 MB 16 MB

Up Stream Down Stream


TriBus
Up Stream Down Stream
(to other MPS)

Main Processor (Model 3008) Architecture

4
I/O Bus ELCO Connectors for I/O Termination

Power
The triplicated I/O bus transfers data Terminal Terminal Strip
Strip
between the I/O modules and the main #1

processors at 375 kilobits per second. Terminal


Strip
1 2 3 4 5 6

#2
The triplicated I/O bus is carried along TriBus
the bottom of the backplane. Each
channel of the I/O bus runs between
Power
one of the three main processors and Supply
#1
the corresponding channels on the I/O
module.
Dual
Power
The I/O bus can be extended between Rails
chassis using a set of three I/O bus
cables. Power Channel A
Supply
#2 Channel B Comm
Channel C Bus

Communication Bus
Channel A
The communication (COMM) bus Channel B
I/O
Bus
runs between the main processors and Channel C

the communication modules at 2


megabits per second. Right I/O Module *
Main
Typical Logical Slot
Processors Left I/O Module *
Power for the chassis is distributed A, B, & C
across two independent power rails Communication Module

down the center of the backplane. * Either the left module or right module functions as the active or hot-spare module.
Every module in the chassis draws Backplane of the Main Chassis
power from both power rails through
dual power regulators. There are four
sets of power regulators on each input Digital Input Modules tion module, determines the respective
and output module: one set for each of The Tricon supports two basic types of states of the input signals, and places
the channels A, B and C and one set for digital input modules: TMR and single. the values into input tables A, B and C
the status-indicating LED indicators. The following paragraphs describe respectively. Each input table is regu-
digital input modules in general, larly interrogated over the I/O bus by
followed by specifics for TMR and the I/O communication processor
Field Signals single modules. located on the corresponding main
processor module. For example, Main
Each I/O module transfers signals to or Every digital input module houses the Processor A interrogates Input Table A
from the field through its associated circuitry for three identical channels over I/O Bus A.
field termination assembly. Two posi- (A, B and C). Although the channels
tions in the chassis tie together as one reside on the same module, they are On TMR digital input modules, all crit-
logical slot. The first position holds the completely isolated from each other ical signal paths are 100 percent tripli-
active I/O module and the second posi- and operate independently. A fault on cated for guaranteed safety and
tion holds the hot-spare I/O module. one channel cannot pass to another. In maximum availability. Each channel
Termination cables are connected to the addition, each channel contains an 8-bit conditions signals independently and
top of the backplane. Each connection microprocessor called the I/O commu- provides isolation between the field and
extends from the termination module to nication processor, which handles the Tricon. (The 64-point high-density
both active and hot-spare I/O modules. communication with its corresponding digital input module is an exceptionit
Therefore, both the active module and main processor. has no channel-to-channel isolation.)
the hot-spare module receive the same
Each of the three input channels asyn- DC models of the TMR digital input
information from the field termination
chronously measures the input signals modules can self-test to detect stuck-
wiring.
from each point on the input termina- ON conditions where the circuitry

5
Theory of Operation

tory feature of a fail-


FIELD CIRCUITRY TYPICAL POINT (1 of 32) INTELLIGENT I/O CONTROLLER(S) TRIPLICATED
I/O BUS safe system, which
AC/DC Input Circuit Individual Opto-Isolation Intelligent I/O Controller(s) must detect all faults
in a timely manner and
- +
Threshold Detect Input Bus
A upon detection of an
Proc
Opto-Isolator Mux Xcvr input fault, force the
Individual Point Field Termination

Opto- measured input value


Isolator
Dual
Port
to the safe state.
RAM Because the Tricon is
- +
B
optimized for de-ener-
Threshold Detect Input Bus
Opto-Isolator Mux
Proc
Xcvr gize-to-trip applica-
tions, detection of a
Opto-
Isolator Dual fault in the input
Leg-to-Leg Port
Isolation
Bridge
Rectifier Optical
RAM circuitry forces to
AC
- + Smoothing Isolation OFF (the de-energized
C
Threshold Detect Input
Mux
Proc
Bus state) the value
Opto-Isolator Xcvr
reported to the main
Opto-
Isolator Dual processors by each
Control Signal Port
RAM channel.

Architecture of TMR Digital Input Module with Self-Test (DC Model) Digital Output
Modules
cannot tell whether a point has gone to stuck-OFF fault conditions within the There are four basic types of digital
the OFF state. Since most safety sys- non-triplicated signal conditioners in output modules: dual, supervised, DC
tems are set up with a de-energize-to- less than half a second. This is a manda- voltage and AC voltage. The following
trip capability, the ability to
detect stuck-ON points is an TRIPLICATED
INTELLIGENT I/O CONTROLLER(S) FIELD CIRCUITRY TYPICAL POINT (16)
important feature. To test I/O BUS

for stuck-ON inputs, a A


A
switch within the input cir- Bus
Xcvr
Proc
Point
Register
Output
Switch
cuitry is closed to allow a Drive
Circuitry
+V
zero input (OFF) to be read
* *
by the isolation circuitry. A and B
A B

The last data reading is A


Loopback
Detector

Output
Switch
B to
frozen in the I/O communi- Drive C other
B Bus Point Circuitry points
cation processor while the Xcvr
Proc
Register

test is running.
B
On single digital input Output
Switch
modules, only those Drive
Circuitry
portions of the signal path
which are required to ensure C Bus
Proc
Point * *
Xcvr Register C A and B
C
safe operation are tripli- Output
cated. Single modules are Switch
Drive LD
optimized for those safety- Circuitry

A
critical applications where B Loopback
C Detector
low cost is more important RTN
than maximum availability. to
other
* All output switches are opto-isolated. points
Special self-test circuitry
detects all stuck-ON and Architecture of 16-Point Supervised Digital Output Module

6
paragraphs describe digital output
modules in general, followed by ANALOG INPUT
CIRCUIT
SIGNAL
CONDITIONING
INDIVIDUAL ADC
FOR EACH LEG
INTELLIGENT
I/O CONTROLLER(S)
TRIPLICATED
I/O BUS
specifics for the four types. TYPICAL POINT

Every digital output module A


Bus
houses the circuitry for three Amp ADC Proc Xcvr
identical, isolated channels. Each
Mux
channel includes an I/O micro-
processor which receives its
output table from the I/O commu- Field Terminations
Bus B
Individual Point Amp ADC Proc
nication processor on its corre- Xcvr

sponding main processor. All of


Mux
the digital output modules, except
the dual DC modules, use special
quadruplicated output circuitry Amp ADC Proc Bus C
Xcvr
which votes on the individual
output signals just before they are Mux
applied to the load. This voter
circuitry is based on parallel-
series paths which pass power if Architecture of TMR Analog Input Module
the drivers for channels A and B,
or channels B and C, or channels A and the input table in each main processor is continuously checked for correctness
C command them to closein other corrected accordingly. In TMR mode, by loop-back inputs on each point
words, 2-out-of-3 drivers voted ON. the mid-value data is used by the which are read by all three micropro-
The quadruplicated voter circuitry control program; in duplex mode, the cessors. If a fault occurs in the driving
provides multiple redundancy for all average is used. channel, that channel is declared faulty
critical signal paths, guaranteeing and a new channel is selected to drive
Each analog input module is automati-
safety and maximum availability. the field device. The designation of
cally calibrated using multiple refer-
driving channel is rotated among the
Each type of digital output module ence voltages read through the
channels, so that all three channels are
executes a particular Output Voter multiplexer. These voltages determine
tested.
Diagnostic (OVD) for every point. the gain and bias that are required to
Loop-back on the module allows each adjust readings of the analog-to-digital
microprocessor to read the output value converter (ADC).
Field Terminations
for the point to determine whether a Analog input modules and termination Various termination options are avail-
latent fault exists within the output panels are available to support a wide able for field wiring of the Tricon
circuit. variety of analog inputs, in both chassis, including external termination
isolated and non-isolated versions: 0-5 panels (ETPs) and fanned-out cables.
VDC, -5 to +5 VDC, 0-10 VDC, 4-20
Analog Input Modules mA, thermocouples (types K, J, T, E), An ETP is an electrically-passive
On an analog input module, each of the and Resistive Thermal Devices (RTDs). printed circuit board to which field
three channels asynchronously wiring is easily attached. An ETP
measures the input signals and places passes input signals from the field to an
the results into a table of values. Each Analog Output Module input module or passes signals gener-
of the three input tables is passed to its ated by an output module directly to
The analog output module receives
associated main processor module field wiring, thereby permitting
three tables of output values, one for
using the corresponding I/O bus. The removal or replacement of the input or
each channel from the corresponding
input table in each main processor output module without disturbing field
main processor. Each channel has its
module is transferred to its neighbors wiring.
own digital-to-analog converter (DAC).
across the Tricon. The middle value is One of the three channels is selected to A fanned-out cable is a lower-cost alter-
selected by each main processor, and drive the analog outputs. The output is native to an ETP when using digital

7
Theory of Operation

3HHUWR3HHU lers, and other external devices on


Ethernet networks.
Each TCM has four serial ports, two
Ethernet network ports, and one debug
port (for Triconex use).
A single Tricon controller supports up
'&6(QYLURQPHQW
to four TCMs, which reside in two
logical slots. This arrangement
75,&21&KDVVLV
'&6%XV provides a total of sixteen serial ports
and eight Ethernet network ports.
Enhanced Intelligent
'&6 Communication Module (EICM)
2SHUDWRU Supports RS-232, RS-422, and RS-485
:RUNVWDWLRQ
serial communication with external
devices at speeds up to 19.2 kilobits per
second. The EICM provides four serial,
*36 opto-isolated ports which can interface
with Modbus masters, slaves, or both;
03V 7&0V or a TriStation. The module also
provides a Centronics-compatible
parallel port.
Network Communication Module
7UL6WDWLRQ 0RGEXV6HULDO 0RGEXV6HULDO (NCM)
 6ODYH 0DVWHU
The NCM supports Ethernet (802.3)
DODUPDODUPDODUPDODUPDODUP

DODUPDODUPDODUPDODUPDODUP
communication at 10 megabits per
DODUPDODUPDODUPDODUPDODUP
second for Triconex-proprietary proto-
$QQXQFLDWRU cols and applications.
The NCM also supports OPC Server
which can be used by any OPC client.
Sample of the TCM Communication Capabilities In addition, users can write their own
applications using the TSAA protocol.
input or digital output modules. One distributed control systems (DCS). The The NCMG enables time synchroniza-
end of a fanned-out cable connects to main processors broadcast data to the tion to a GPS device.
the Tricon backplane and the other end communication modules across the
provides 50 fanned-out leads, each indi- communication bus. Data is typically Hiway Interface Module (HIM)
vidually labeled with a pin number that refreshed every scan; it is never more The HIM acts as an interface between a
matches the connector signals. than two scan-times old. For more Tricon controller and a Honeywell TDC
information, see Communication 3000 Distributed Control System
Capabilities on page 61. (DCS) by means of the Hiway Gateway
Communication Modules and Local Control Network (LCN). The
Tricon Communication Module
By means of the communication HIM enables higher-order devices, such
(TCM)
modules described in this section, the as computers and operator worksta-
The Tricon Communication Module tions, to communicate with the Tricon.
Tricon can interface with Modbus
(TCM) enables a Tricon controller to
masters and slaves, other Triconex Safety Manager Module (SMM)
communicate with Modbus devices
controllers in a Triconex peer-to-peer
(masters or slaves), a TriStation PC, a The SMM acts as an interface between
network, external hosts on Ethernet
network printer, other Triconex control- a Tricon controller and a Honeywell
networks, and Honeywell and Foxboro
Universal Control Network (UCN), one

8
of three principal networks of the TDC and diagnostic information to I/A oper- Model 2870H HART Analog Output
3000 DCS. The SMM appears to the ator workstations in display formats Interface Module
TDC 3000 as a safety node on the that are familiar to Foxboro operators.
Universal Control Network (UCN),
See Product Specifications on
allowing the Tricon to manage process- Power Supply Modules
page 17 for specifications of the TCM,
critical points within the overall TDC Each Tricon chassis houses two power
EICM, NCM, SMM, HIM, and ACM.
3000 environment. The SMM transmits modules arranged in a dual-redundant
all Tricon aliased data and diagnostic configuration. Each module derives
information to TDC 3000 operator power from the backplane and has inde-
HART Communication
workstations in display formats that are pendent power regulators for each
familiar to Honeywell operators. Highway Addressable Remote Trans-
channel. Each can support the power
ducer protocol (HART) is a bi-direc-
Advanced Communication requirements for all the modules in the
tional industrial field communication
Module (ACM) chassis in which it resides, and each
protocol used to communicate between
feeds a separate power rail on the
The ACM acts as an interface between intelligent field instruments and host
chassis backplane. The power modules
a Tricon controller and a Foxboro Intel- systems over 4-20 mA instrumentation
have built-in diagnostic circuitry which
ligent Automation (I/A) Series DCS. wiring. Triconex offers these compo-
checks for out-of-range voltages and
The ACM appears to the Foxboro nents to enable HART communication
over-temperature conditions. A short
system as a safety node on the I/A between HART devices in the field and
on a channel disables the power regu-
Series Nodebus, allowing the Tricon to Configuration and Asset Management
lator rather than affecting the power
manage process-critical points within Software running on a PC:
bus.
the overall I/A DCS environment. The
Model 2770H HART Analog Input
ACM transmits all Tricon aliased data
Interface Module

Architecture of Power Subsystem

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