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POWER QUALITY ISSUES, CAUSES AND

MITIGATION DEVICES IN POWER SYSTEM

Dr. Mahesh Kumar
Electrical Engineering Department
Indian Institute of Technology, Madras

EE IIT Madras

INDIAN INSTITUTE OF TECHNOLOGY MADRAS
Research Directions: Power Quality Research
Laboratory

THEORETICAL ASPECTS

Control Algorithms
(Generation of
Reference Quantities)

Topological: VSI Topologies

Switching Control Design and Implementation
Strategies Algorithms Issues

EE IIT Madras

INDIAN INSTITUTE OF TECHNOLOGY
MADRAS

Team Work: “ If I have seen further than others, it is by
standing upon the shoulders of giants” – Sir Isaac Newton
My Research Team: Power Quality Potential (‘PQP’)

Ph.D. Researchers

karthikeyan vincent_george sasitharan koti_electrical ganjikuntask
@ee.iitm.ac.in @yahoo.com @smail.iitm.ac.in @yahoo.com @gmail.com

M.S. Researchers

linashpk srikanthan123 harsha.vugadi balu_karanki anil.ramakuru ee08s004
@ee.iitm.ac.in @yahoo.co.in @gmail.com @yahoo.com @gmail.com @smail.iitm.ac.in

M.Techs

EE IIT Madras
praveen.239
@gmail.com
haimuralimail
@gmail.com

“Power Quality Improvement using Active Power Filters” 2. INDIAN INSTITUTE OF TECHNOLOGY MADRAS Projects (Completed) 1. “Development of Integrated Renewable Energy Power Park with Coordinated Control and Embedded Power Quality Aspects” EE IIT Madras . “Design and development of dedicated Custom Power Park driven by innovative control algorithm with proper coordination of its devices” 2. “Mitigation of unbalance and harmonics in power distribution system using Static Var Compensators” Projects (Ongoing) “Load Compensation and Voltage Regulation with Non-stiff and Unbalanced voltage source” “Future” Projects (Future) 1.

Government of India Department of Science and Technology EE IIT Madras . IITM MHRD. INDIAN INSTITUTE OF TECHNOLOGY MADRAS Our Financial Support Centre for Industrial Consultancy & Sponsored Research (IC&SR).

it is not over heated etc. ‰For Transmission people. However the power quality has many aspects. less outage.‰Power quality has a different meaning to different people. The following parameters of power system network are taken into consideration while taking power quality issues. proper flow of active and reactive power. For instance: ‰For Genco people it means that generator is not overrated in terms of real and reactive power. it means that more transmission efficiency. transmission and distribution network. load harmonics and power factor should not create threat to utility etc. EE IIT Madras . we can say the power quality means balanced and sinusoidal waveforms of voltage in power generation. However in general. balanced and sinusoidal quantities over the transmission network ‰For Distribution people it means proper voltage of distribution bus.

Broad Classification Transients Short Duration Variations <=> RMS variations Long Duration Variations Voltage Unbalance Waveform Distortions Voltage fluctuations Power Frequency Variations EE IIT Madras .

TRANSIENTS TRANSIENTS in power system refer events which are undesirable and momentary in nature. EE IIT Madras . swells to interruptions. gEnd users view transient anything unusual that might be observed on the power supply ranging from voltage sags. gAnother definition describes transient as the part of the variable that disappears during transition from one steady state to another. gUtility engineers view transients as surge from lightening strokes for what surge arresters are used for protection.

TRANSIENTS CLASSIFICATION Waveform Classification gIMPULSIVE TRANSIENTS g Lightning gOSCILLATORY TRANSIENTS g Capacitor Energization g Restrike during Capacitor de-energization g Line or Cable Energization gMULTIPLE TRANSIENTS g Current chopping g Multiple strikes g Repetitive switching actions EE IIT Madras .

gThey are damped quickly by the resistive circuit elements and do not propagate far from their source. For example 1.2 µs and then decays to its half value in 50µs. gThe most common cause for the impulsive transient is lightening EE IIT Madras .2×50µs 2000V impulsive transient means that the transient rises from zero to its peak of 2000V in 1. IMPULSIVE TRANSIENT gIt is sudden and non-power frequency change in the steady state condition of voltage or current or both that is unidirectional in polarity either positive or negative g It is characterized by the rise and decay times which can be revealed by dominant frequency in their spectral content.

Impulsive transient can travel over some distance along the utility lines and can excite the natural frequency of the power system and produce oscillatory transient response. IMPULSIVE TRANSIENT The shape of Impulsive transient vary based on network components and viewed differently at different points of the network. EE IIT Madras .

components. Oscillatory Oscillatory transients transients are are natural natural transients transients and and therefore therefore frequently frequently occur occur than than impulsive impulsive transients transients Based Based on on the the oscillatory oscillatory frequency frequency components. 2. High High frequency frequency oscillatory oscillatory transient transient 2. 1. 3. Medium Medium frequency frequency oscillatory oscillatory transient transient 3. OSCILLATORY TRANSIENTS ItIt is is sudden sudden and and non-power non-power frequency frequency change change inin the the steady steady state state condition condition of of voltage voltage or or current current or or both both that that Includes Includes both both positive positive and and negative negative values. values. the the oscillatory oscillatory transient transient can can be be classified classified into into three three categories categories 1. Low Low frequency frequency oscillatory oscillatory transient transient EE IIT Madras .

0 ppuu 90 0 ituddee 2.0 mmaaggnnitu EE IIT Madras . reessuulltt Offtteenn r al O Oscillatory Transients ooffllooccal ssyysstteem m e rreesspponsse o n primary frequency component > 500 kHz High Frequency Oscillating Transients 5 kHz < primary frequency component < 500 kHz Medium Frequency Oscillating Transients primary frequency component < 5 kHz Low Frequency Oscillating Transients r apaaccititoor DDuueettooccapizattioionn erg iza bbaannkkeennerguennccyy q e wwitithh freequ andd f r Hz an 330000--900 H2z.

Depending upon the fault conditions and the system conditions. Short duration voltage variations are caused by ¾ fault conditions in the network ¾ the energization of large loads which require high starting current ¾ intermittent loose connections in the power wiring.SHORT DURATION VOLTAGE VARIATIONS RMS VARIATIONS Short duration voltage variations encompasses voltage dips and short interruptions. the faults can cause ¾ Temporary voltage drops (voltage sag) ¾ Temporary voltage rises (voltage swell) ¾ Temporary loss of voltage (voltage interruptions) EE IIT Madras .

It is usually caused by energization of heavy loads.5 cycles to one minute.9 pu. starting of large rating motors etc. Voltage sag due to SLG fault EE IIT Madras Voltage sag motor starting .1 to 0. at the power frequency for durations from 0. VOLTAGE SAG Voltage sag can be defined as a decrease in voltage between 0.

3% Source: Source: A A book book on on ‘Power ‘Power Quality’ IIT Madrasby Quality’ EE by Sankaran Sankaran CRC CRC Press Press )) .16kV connected to 480 V bus through a 480V transformer of rating 100 kVA. It is 4. The voltage sag caused by starting of this induction motor is computed as follows. AN EXAMPLE ON VOLTAGE SAG Consider a 50 hp induction motor with a full load current of 60 A at 480 V ac .0*860/(120√2) = 25.16 kV / 480 V. 100 kVA. 5 % leakage reactance as shown in Current Rating 60 A 50 hp 3-phase IM figure.120 kA=120 A Voltage drop due to the starting inrush current=5. Full load current of the 100 kVA transformer at 480 V =(100/3)/(480/√(3))=0. 4. 120 A 5% reactance It is found that during first half of the cycle current attains a peak of 860 A.

¾It is usually caused by fault conditions. The severity of voltage swell during fault condition depends on fault location. VOLTAGE SWELL-I ¾A swell is defined as an increase between 1.8 pu in rms voltage or current at the power frequency for durations from 0.5 cycle to one minute. system impedance. EE IIT Madras Voltage swell due to SLG fault . grounding. They are not as common as voltage sag.1 pu and 1. ¾Swells are characterized by their magnitudes and durations. switching off heavy loads and energization of capacitor banks.

for ungrounded system line to ground voltage SLG fault reaches to √3=1.73 pu. VOLTAGE SWELL-II Ungrounded system are more susceptible to over voltages than grounded system. EE IIT Madras . while as in grounded system. there will be little or no voltage rise on un-faulted phases due to low impedance path provided by sub-station transformer. For example.

equipments failures and control mal- functioning. ‰It is usually caused by power system faults. Interruptions are usually measured by their durations since magnitude is always less than 0. ‰Interruptions are usually measured by their durations since magnitude is always less than 0.1 pu for a period of time not exceeding 1 minute. VOLTAGE INTERRUPTION-I ‰An interruption occurs when the supply voltage or load current decreases to less than 0.1 pu.1 pu. EE IIT Madras .

VOLTAGE INTERRUPTION-II For example. ƒDelayed re-closing of protective device may cause momentary or temporary interruptions. Voltage interruption due to fault and EE IIT Madras subsequent enclosures operation . Voltage sag occurs between the time a fault initiates and the protective device operates. ƒSome interruptions may be preceded by voltage sag when these interruptions are due to faults on the source system. a fault takes place in system and protection device operates. The duration of an interruption depends on operations time of utility devices. Instantaneous re-closing generally limit the interruption to less than 30 cycles.

i.e.D.SHORT DURATION VOLTAGE VARIATIONS RMS VARIATIONS Short duration voltage variations can be further classified into three categories. Dissertation Dissertation zur zur Erlangung Erlangung desdes akademischen akademischen Grades Grades Doktoringenieur Doktoringenieur (Dr.D.) (Dr. Ph. momentary and temporary .-Ing.) .-Ing. instantaneous. Source: Source: Power Power Quality Quality Studies Studies in in Distribution Distribution Systems Systems Involving EE IIT Madras Involving Spectral Spectral Decomposition Decomposition A A Ph.

these can be classified as. Like short term variations. ‰Under Voltages ‰Over Voltages ‰Sustained Interruptions EE IIT Madras . Long duration variations generally results of system faults but are caused by load variations on the system and system switching operations. LONG DURATION VOLTAGE VARIATIONS-I Long Duration Variations encompass rms deviations of voltage longer than one minute.

switching off a large load). the long duration voltage variation is considered a sustained interruption. These are result of load switching (e. ¾Long Interruptions: When the supply voltage has been zero for a period of time in excess of 1 minute. Under-voltages may result from a large load switching on or from a capacitor bank switching off. ¾Under Voltage: An under-voltage is a decrease in the rms ac voltage to less than 90% at the power frequency for a duration longer than 1 minute. incorrect tap settings on transformers.g.. Voltage interruptions longer than one minute are often permanent and require human intervention to repair the system for restoration. poor voltage regulation. EE IIT Madras . or energizing a capacitor bank). LONG DURATION VOLTAGE VARIATIONS-II ¾Over Voltage: An over-voltage is an increase in the rms ac voltage greater than 110% at the power frequency for a duration longer than 1 minute.

Arc furnaces. The major source of voltage imbalance is single- phase loads on a three-phase circuit. also leads to voltage imbalances. The geometric arrangement of transmission lines and different mutual interactions between phases. traction supplies and heavy current test systems also contribute to voltage unbalances. resistance melting furnaces. EE IIT Madras . VOLTAGE IMBALANCE-I Voltage unbalances occur in electrical power supply systems due to the asymmetry of load currents.

⎡v sa 0 (t ) ⎤ ⎡1 1 1 ⎤ ⎡v sa (t )⎤ ⎢ v (t ) ⎥ = 1 ⎢1 a a 2 ⎥⎥ ⎢⎢v sb (t )⎥⎥ ⎢ sa1 ⎥ 3 ⎢ ⎢⎣v sa 2 (t )⎥⎦ ⎢⎣1 a 2 a ⎥⎦ ⎢⎣v sc (t ) ⎥⎦ t1 +T 2 − j ( wt −π / 2 ) V sa 012 = T ∫ sa 012 v (t ) e dt tt Vsa0 = Vsa0 ∠Vsa0 V sa1 = V sa1 ∠V sa1 V sa 2 = V sa 2 ∠V sa 2 EE IIT Madras . negative and zero sequence components as per the following equation. VOLTAGE IMBALANCE-II Symmetrical component theory is used to determine positive.

Voltage Imbalance can be defined as the ratio of either the negative. KU0=Va0 / Va1 Ku2=Va2 / Va1 Figure shows an example of these two ratios for a one week trend of imbalance on a residential feeder.or zero sequence component to the positive sequence component to specify the percent unbalance as given below. VOLTAGE IMBALANCE-III Finally . EE IIT Madras .

WAVEFORM DISTORTION Waveform distortion is defined as a steady state deviation from an ideal sine wave of power frequency principally characterized by the spectral content of the deviation. It can be broadly classified into five categories… ™ DC Offset ™ Harmonics ™ Inter-harmonics ™ Notching ™ Noise EE IIT Madras .

Contd… DC OFFSET ‰ The presence of a dc voltage or current in an ac power system is termed dc offset. ‰ Direct current in alternating current networks can have a detrimental effect by biasing transformer cores so they saturate in normal operation. WAVEFORM DISTORT. This also introduces even harmonics due to half wave rectification. DC may also cause the electrolytic erosion of grounding electrodes and other connectors. This causes additional heating and loss of transformer life. This can occur as the result of a geomagnetic disturbance at higher latitude or due to the effect of half-wave rectification. EE IIT Madras .

WAVEFORM DISTORT. the Total Harmonic Distortion (THD). ◘ Sometimes it is common to use a single quantity. as a measure of the effective value of harmonic distortion. Contd… Harmonics Harmonics are sinusoidal voltages or currents having frequencies that are integer multiples of the frequency at which the supply system is designed to operate. Harmonics are major threat to healthy operation of power system. ◘ Harmonic distortion levels are described by the complete harmonic spectrum with magnitudes and phase angles of each individual harmonic component. EE IIT Madras . ◘ Harmonic distortion originates in the nonlinear characteristics of devices and loads on the power system.

Saturable devices Saturable devices produce harmonics due to mainly iron saturation in transformers. EE IIT Madras . UPS. SMPS. 30% of fundamental 2. Contd… Source of Harmonics General categories of harmonic sources: 1. Power electronic based converters/devices Power electronic based loads draw power only during portions of the applied voltage waveform. Operating electrical devices around knee point creates flatness in voltage with 3rd harmonic approx. These include power electronic converters. Computers monitors. machines etc. WAVEFORM DISTORT. printers etc. TVs.

WAVEFORM DISTORT. Contd… Harmonics-illustration EE IIT Madras .

WAVEFORM DISTORT.. figure shows severe voltage distortion (6-8% THD) on the secondary bus of a customer that has a large amount of nonlinear (UPS) loads EE IIT Madras . Contd… Harmonics-illustration The .

WAVEFORM DISTORT.Harmonics fields in the stator-causes motor to rotate at various forward and backward speeds ¾ Effect on meters EE IIT Madras . ¾ Effect on transformers/machines ¾ Over-stressing of power factor correction capacitors (PFC) ¾ Skin effect ¾ Losses in the motor. ¾ Neutral conductor over-heating. Contd… EFFECT OF HARMONICS Effect of harmonics are many as listed below.Eddy currents .

4-w system. I ao = ( I a + Ib + I c ) / 3 = I n ⎫ ⎪ Using. Symmetrical I a1 = ( I a + a Ib + a I c ) / 3 ⎬ 2 component theory ⎪ (Fundamental. but zero sequence components add to neutral wire. Triplen harmonics directly add to give large neutral current. Which amounts to 240% almost 3 times of power conductor rating EE IIT Madras . harmonics) I a 2 = ( I a + a Ib + a I c ) / 3 ⎭ 2 Over loaded neutral Positive and negative sequence components sum to zero. In a 3-φ. the sum of three phase currents flow through neutral conductor. The example is shown for PC load which draws 80% of 3rd har. Contd… HARMONICS: ILLUSTRATION Neutral Conductor Overheating Neutral overloading appears to be most common problems in commercial buildings. WAVEFORM DISTORT.

⎜⎜ ∑ I n ⎟⎟ ⎜⎜ ∑ I n ⎟⎟ THDI = ⎝ n = 2 ⎠ THDV = ⎝ n = 2 ⎠ I1 I1 PF = P = (1 + PH P1 ) PF1 S 2 2 2 2 1 + THDV +THDI +THDV *THDI ∞ Where. Contd… Quantification of Harmonics 1. TDD: Total Demand Distortion: ⎜⎜ ∑ I n ⎟⎟ THDI = ⎝ n = 2 ⎠ I EE IIT Madras . Pn = ∑ Vn In cos φn n=1 1/ 2 ⎛ ∞ 2⎞ 2. WAVEFORM DISTORT. THD: Total Harmonic Distortion: 1/ 2 1/ 2 ⎛ ∞ 2⎞ ⎛ ∞ 2⎞ It is defined as.

WAVEFORM DISTORT. Tuned LC filters: Traps the harmonic component for which a filter is designed 2. Contd… Control of Harmonics 1. Active power filters: These are generalized filter which are adaptive in nature and compensates load dynamically EE IIT Madras .

cyclo- converters. Contd… Interharmonics Voltages or currents having frequency components that are not integer multiples of the frequency at which the supply system is designed to operate (e.. ¾ The effects of inter-harmonics are not well known. WAVEFORM DISTORT. EE IIT Madras .g. induction motors and arcing devices. ¾ The main sources of inter-harmonic waveform distortion are static frequency converters. 50 Hz or 60 Hz) are called inter-harmonics. They induce visual flicker in display devices such as CRTs. They can appear as discrete frequencies or as a wide-band spectrum.

The notches may come sufficiently close to zero introduces errors in instruments and control systems that rely on zero crossings to derive frequency or time.phase converter that produce continuous dc current. Contd… Notching Notching is a periodic voltage disturbance caused by the normal operation of power electronics devices when current is commutated from one phase to another. The notches occur when the current commutates from one phase to another. there is a momentary short circuit between two phases pulling the voltage as close to zero as permitted by system impedances. WAVEFORM DISTORT. For example of voltage notching from a three. EE IIT Madras . During this period.

or found on neutral conductors or signal lines. isolation transformers. and line conditioners. control circuits. ¾ The problem can be mitigated by using filters. arcing equipment. ¾ Noise in power systems can be caused by power electronic devices. loads with solid-state rectifiers. Contd… Noise Noise is defined as unwanted electrical signals with broadband spectral content lower than 200 kHz superimposed upon the power system voltage or current in phase conductors. EE IIT Madras . and switching power supplies. WAVEFORM DISTORT.

9 pu to 0. rapidly fluctuating loads such as arc furnaces and electric welders Small voltage flicker may not be harmful to electronic equipment.1 pu occurring at frequencies less then 25 Hertz (25Hz). but is more of a nuisance because it causes annoying.e. 0. noticeable changes in lighting levels. Flicker is caused by large. EE IIT Madras . VOLTAGE FLUCTUATIONS Flicker can be defined as small amplitude changes in voltage levels i.

¾ On large interconnected utility systems. a large block of load being disconnected. ¾ However. or a large source of generation going off. especially those supplied by on-site generators.g. frequency is generally stable and deviations are rarely a problem until there are faults on the bulk power transmission system. on smaller power systems. frequency deviations can cause electronic equipment to malfunction and affect the speed of motor driven clocks. POWER FREQUENCY VARIATIONS Power Frequency Variations are defined as the deviation of the power system fundamental frequency from it specified nominal value (e. 50 Hz or 60 Hz). EE IIT Madras .line.

injection transformers. ►Custom power devices. CUSTOM POWER DEVICES ►Like FACTs devices. Custom Power Devices are also power electronic based controllers in medium voltage distribution systems for the purpose of supplying a level of reliability and/or power quality that is needed by electric power customers sensitive to power quality variations. active power filters/conditioners. converters. or controllers. include static switches. ►Custom power devices are also known as DSTATCOM. A DVR called dynamic voltage restorer is a series compensation device and used for regulation of bus connected to the sensitive loads EE IIT Madras . master control modules. and/or energy storage modules that have the ability to perform current interruption and voltage regulation functions in a distribution system to improve reliability and/or power quality. inverters.

MITIGATION USING CUSTOM POWER DEVICES
Once PQ problems are known, the next step is to mitigate them. In
the following sections, the various strategies/techniques of PQ
problems mitigation will be highlighted. The ultimate aim of any
power quality investigation is to solve/mitigate the power quality
problem. The PQ problems mitigation using custom power devices
involves the following.

¾Power factor correction
¾Harmonics elimination
¾Unbalance load mitigation
¾Voltage sag/swell and interruption
mitigation

¾Voltage transient mitigation
¾Flicker mitigation
EE IIT Madras

CUSTOM POWER DEVICES CLASSIFICATION
In a broad sense custom power devices can be classified into three
categories:

¾Shunt devices; generally called as DSTATCOM in current
control mode or shunt active power filter. The main objective is to
inject the current at the point of common coupling in order to
provide:
9 Load balancing
9 Power factor correction
9 Harmonic elimination
9 Voltage regulation
¾Series devices; generally called as series active power
filter or DSTATCOM in voltage control mode. These are also
known as Dynamic Voltage Restorer (DVR). Their main objective
is to inject the voltage in series with feeder in order to provide the
following:

9 Voltage regulation (sag/swell)
9 Elimination of voltage harmonics

EE IIT Madras

DSTATCOM STRUCTURE

Schematic of DSTATCOM (a) Conventional (b) Power converter based

DSTATCOM consists of

9 Power converter (voltage or current source inverter)
9 DC storage capacitors to support converter operation
9 Interfacing inductors through which DSTATCOM is
connected to the point of common coupling
EE IIT Madras

cheaper g Energy storage of capacitive elements is more efficient g easily expandable to multi-level versions Using current source inverters Voltage source inverter g CSIs are more reliable and fault tolerant g well suited for accurate control Disadvantages g Higher losses. POWER CONVERTER TOPOLOGIES Using voltage source inverters g VSIs are lighter. higher initial cost VSIs are however preferred over CSIs. because of the VSIs are more efficient. lower in initial cost than the EE CSIs IIT Madras Current source inverter .

connected load Î Star-connected load ‰ 3-phase. 4-wire supply g Active power filter topology ‰ Shunt active power filter ‰ Series active power filter ‰Series active and shunt passive power filter (Hybrid filters) ‰ Unified power quality conditioner (UPQC) g Implementation uses following types of converters ‰ Voltage source inverters (VSIs) ‰ Current source inverters (CSIs) ‰ Active power filter with hybrid energy source EE IIT Madras . Classification of Active Power Filters g Supply systems influence the choice of filter topology ‰ Two wire supply ‰ Three phase three wire supply Î Delta.

if LOAD widely used configuration to eliminate the harmonics in currents due to nonlinear loads Series active power filter [DVR] : The compensator is connected before the load in series with the mains through a vc matching transformer. + LOAD The Dynamic Voltage Restorer is a particular implementation for eliminating voltage swells and sags on sensitive equipment. vs is il mainly used at load distribution centres.Shunt active power filter [Akagi 94]: TOPOLOGIES The aim of the compensator is to inject the harmonic currents to cancel out the harmonic currents of the load. vs used to eliminate the voltage distortions and to is _ Vf il balance and regulate the terminal voltage. It also helps in damping out the the harmonic propagation caused by resonance with the line vc impedance and passive shunt filters EE IIT Madras .

LOAD widely used configuration to eliminate the Shunt passive harmonics in currents due to nonlinear loads filter Unified Power Quality Conditioner vc vs Hybrid Combination of both active shunt and active is _ Vf il series filter + LOAD if shares single common capacitor ( inductor) However they are expensive and their control is rather complex because of large vc number of switching devices and the Series active filter Shunt active filter coordination between the twoEEmodes IIT Madras UPQC . TOPOLOGIES Hybrid Power Active Filter The required rating of the series active filter is considerably smaller than that of conventional one vs il is _ Vf + mainly used at load distribution centres.

CONTROL ALGORITHMS FOR ACTIVE SHUNT POWER COMPENSATOR (FILTER) ) Averaging and sampling techniques ) The FFT techniques ) The capacitor error voltage and PI controller ) Instantaneous reactive power theory(p-q theory) ) Generalized reactive power theory ) Theory of instantaneous symmetrical components EE IIT Madras .

Averaging and Sampling Control Algorithms Techniques [Gyugyi 78. [Miller] v sa i sa i fab v sb i sb ilab Bγca Bγab 1 1 T Bγab = ∫ ( vbc ia + v ca ib − v ab ic ) dt 3 3V 2 T 0 v sc i sc ilbc ilca 1 1 T Bγbc = ∫ ( − vbc ia + v ca ib + v ab ic ) dt 3 3V 2 T 0 Bγbc 1 1 T Bγca = ∫ ( vbc ia − v ca ib + v ab ic ) dt 3 3V 2 T 0 (a) C Bγab = − 1 1 ⎡ i 3 2 V T ⎢⎣ a v sa = 0 dv sa dt > 0 + ib v sb = 0 dv sb dt > 0 − ic v sc = 0 dv sc dt > 0 ⎥ ⎦ ⎤ Bγ ≡ M1 1 1 ⎡ ⎤ L/2 M2 L / 2 Bγbc = − ⎢⎣ − ia v sa = 0 + ib v sb = 0 + ic v sc =0 (b) 3 2V T dv sa dt > 0 dv sb dt > 0 dv sc dt > 0 ⎥ ⎦ Averaging and sampling techniques 1 1 ⎡ ⎤ Bγca = − ⎢⎣ ia v sa = 0 − ib v sb = 0 + ic v sc =0 3 2V T dv sa dt > 0 dv sb dt > 0 dv sc dt > 0 ⎥ ⎦ However the above techniques can eliminate only fundamental reactive power in the steady state EE IIT Madras . 79].1.

(b) If by any chance the value of K becomes negative. the inverter will supply both the source and the load. 97] voltage Sine wave g An error is formed using e = vc ref − vc sensor generator sin ωt Load current Vc ref g The sine waveform is generated in vc + error k k sin ω t + voltage PI sensor − controller − phase with the source voltage and its i∗f magnitude is k = K p e + K i ∫ e dt VSI with current control g The reference current is then if il generated i*f = il − k sin ω t vs is LOAD Drawbacks (a) It has a very slow response. KKM 96. Control Algorithms 3. EE IIT Madras . Jou 96. Capacitor Error Voltage and PI controller [Torrey 95.

v sb . PQ theory [Akagi 83. c respectively. if vsa . For a 3-phase. 4-wire system . vsc and isa . time varying loads. Using α − β − o transformation ⎡io ⎤ ⎡1 / 2 1/ 2 1 / 2 ⎤ ⎡ila ⎤ ⎡vo ⎤ ⎡1/ 2 1/ 2 1/ 2 ⎤ ⎡va ⎤ ⎢ ⎥ ⎢ ⎥⎢ ⎥ ⎢ ⎥ 2⎢ ⎥⎢ ⎥ ⎢i ⎥ = 2 ⎢ 1 −1/ 2 − 1 / 2 ⎥ ⎢ilb ⎥ v = ⎢ α ⎥ 3⎢ 1 − 1 / 2 − 1 / 2 ⎥ ⎢vb ⎥ ⎢α⎥ 3⎢ ⎥⎢ ⎥ ⎢v ⎥ ⎢ 0 3 2 − 3 2⎥ ⎢v ⎥ ⎢i ⎥ ⎢ 0 3/ 2 − 3 / 2⎥⎦ ⎢⎣ilc ⎥⎦ β ⎣ ⎦ ⎣ / / ⎦ ⎣ c⎦ ⎣ β⎦ ⎣ ⎡ po ⎤ ⎡vo 0 0 ⎤ ⎡io ⎤ ⎢p ⎥ = ⎢ 0 ⎥⎢ ⎥ The power matrix : ⎢ ⎥ ⎢ vα vβ ⎥ ⎢iα ⎥ ⎢⎣q ⎥⎦ ⎢ 0 ⎣ − vβ vα ⎥⎦ ⎢⎣iβ ⎥⎦ p3φ (t ) = va ia + bbib + vcic Total 3-phase power: = vα iα + vβ iβ + voio EE IIT Madras = p (t ) + po (t ) . 84] P-q theory can eliminate all unbalances and harmonics caused by non-linear. isc be source voltages and supply currents in phase a. Control Algorithms 4.i sb . provided source voltages are balanced and the power converter has infinite bandwidth. b.

Control Algorithms P-q theory (Contd…) q ia a vc ib ~ ~ b Furthermore p = p + p po = p o + po q = q + q~ c ic vb va io o p + po From power matrix q: Circulating energy between phases ⎡i∗fα ⎤ ⎡ vα − vβ ⎤ ⎡ ~ ⎤ ⎢ ⎥= 1 ⎢ p + ∆ p⎥ p+po: Instantaneous 3-phase active power ⎢ vα ⎥⎦ ⎢ ⎢i∗ ⎥ vα2 + vβ2 ⎣vβ ⎥ ⎣ fβ ⎦ ⎣q ⎦ α pl β o ∆ p = p o + p loss po ∆P ~ Source p+~ po q C Compensator EE IIT Madras Power flow related to α − β − o reference frame .

EE IIT Madras . generate. Aredes 97. by inverse α − β − o transformation va isa ila ⎡i∗fa ⎤ ⎡ ⎤ vb L 0 ⎤ ⎢io ⎥ isb ⎢ ⎥ ⎡1/ 2 1 Source isc O ⎢i∗ ⎥ = 2 ⎢1/ 2 −1/ 2 ⎥⎢∗ ⎥ A vc ⎢ fb ⎥ ⎢ 3 / 2 ⎥ ⎢i fα ⎥ For compensated system io = 0 i fa D 3⎢ i fc ⎢i∗ ⎥ ⎣1/ 2 −1/ 2 − 3 / 2⎥⎦ ⎢ ∗ ⎥ ⎣i fβ ⎦ vc ref vc ⎢⎣ fc ⎥⎦ Voltage Voltage source regulator inverter g P-q theory is however is ploss ia i∗fa challenged when the source Active filter Dynamic i fa ib hysteresis i fb voltages are unbalanced ic controller i∗fc current control i fc i∗fb g It needs large number of va vb vc transducers for measurements and intensive computation 3-phase 4-wire active power filter Few schemes are also available in literature [ CL Haung 93. Haung 99]. P-q theory (Contd…) Control Algorithms Finally we. reference currents in 3-phase system. which claims to apply modified p-q theory in unbalanced source voltage conditions.

99] It has following features g It is much simpler than p-q theory g It does not require complex transformation of currents and voltages g It does not require many definitions of various powers This theory provides a simple algorithm. provided we have balanced voltage source and high band width current source. 98B. which makes compensation for any kind of unbalance and harmonics in the load. GJ 98A. EE IIT Madras .5. Theory of Instantaneous Symmetrical Components [Layon.

Comp.) Compensation of Star-connected load According to this theory..Theory (Contd... 4-wire distribution system ∑ 2 v si i = a .c vba + β (v sc − v sa ) i ∗fb = ilb − (Plavg + Ploss ) ∑ v si2 i = a .c Plav = Average load power Ploss = Losses in the inverterEE IIT Madras where β = tan φ 3 . c v sc + β (v sa − v sc ) ∗ i fc = ilc − (Plavg + Ploss ) 3-phase. Control Algorithms Instantaneous Symm.b . the reference currents for 3-phase. 4-wire distribution systems are.b .b. vsa + β (vsb − vsc ) ∗ i fa = ila − (Plavg + Ploss ) ∑ 2 vsi i =a .

) Compensation of Delta-connected load The reference currents are.. Comp.. v sa i sa i *fab i *fca v sb i sb ilab v sab − β v sc i fab = ilab − ( Plavg + Ploss ) * v sc i sc ∆ ilbc ilca v sbc − β v sa i fbc = ilbc − ( Plavg + Ploss ) * ∆ i *fbc v sca − β v sb i fca = ilca − ( Plavg + Ploss ) * ∆ Delta-connected load Where vsab = vsa − vsb ∆ = vsab 2 + v2 + v2 sbc sca EE IIT Madras . Control Algorithms Instantaneous Symm. Theory (Contd..

6. vb ib O phase Definitions of Powers: Source vc ic A D For the instantaneous space vectors and are. v t = [va vb vc ] and i t = [ia ib ic ] the following terms are defined Three phase systems in reference to definitions of powers Instantaneous active power: p = v ⋅ i = va ia + vbib + vcic ⎡qa ⎤ T ∆ ⎢ ⎥ ⎡ vb vc vc va va vb ⎤ Instantaneous reactive power: q = v × i = ⎢qb ⎥ = ⎢ ⎥ ⎢ ⎥ ⎢⎣ ib ic ic ia ia ib ⎥⎦ ⎢⎣ qc ⎥⎦ def p def q × v i p = [iap ibp icp ] T = v iq = [iaq ibq icq ]T = v ⋅v v ⋅v def def Instantaneous apparent power s = v i and power factor λ = p s EE IIT Madras . GENERALIZED INSTANTANEOUS REACTIVE POWER THEORY va ia L 3.

b .b . c 1 i*fc = ilc − isc = ilc − ( ps vsc + qsa vsb − qsb vsa ) ∑ vsj2 j = a . REFERENCE CURRENT GENERATION The compensated source current in vector form in terms of desired source active and reactive power is given as qs × v s ps v s i s = i sq + i sp = + vs ⋅ vs vs ⋅ vs Therefore.c EE IIT Madras .b .c 1 i*fb = ilb − isb = ilb − ( ps vsb + qsc vsa − qsa vsc ) ∑ vsj2 j = a . reference compensator current is given as i *f = il − i s Converting above vector form to time domain expressions 1 i*fa = ila − isa = ila − ( ps vsa + qsb vsc − qsc vsb ) ∑ vsj2 j = a .

REALIZATION OF DSTATCOM (Three Phase DSTATCOM Topologies) EE IIT Madras .

4-wire compensated distribution system with generalized active power filter EE IIT Madras . SOME IMPORTANT Three -Phase DSTATCOM Topologies 3-phase.

Three-phase. three-leg topology with 3 dc storage capacitors T0 PCC a b c S1a S3a vc1 + . S4a S1a S1b S3b vc2 + . EE IIT Madras . S4c S1c Drawbacks (a) It uses three capacitors and it is very difficult to regulate the capacitor voltages (b) It uses 12 power switches. S4b S1b S1c S3c vc3 + n' .

The presence of isolation transformers does not allow the dc component of the C dc VSIs load current to be compensated EE IIT Madras . Three Independent Single-phase VSI supplied from a common dc storage capacitor ‹Each VSI is connected to the network through a transformer ‹It contains three H-bridge VSIs that are connected to a common dc storage capacitor ‹The purpose of including the transformers is to provide isolation between the inverter legs. This prevents the dc storage capacitor from being shorted through switches in different inverters ila LOAD isa PCC The topology however is not LOAD suitable for compensation of loads containing dc components in LOAD addition to ac components in the vsc i fa load current.

THREE-PHASE. EE IIT Madras . THREE-LEG TOPOLOGY ila LOAD isa PCC ‹The structure consists of LOAD three-phase VSI connected to common dc capacitor LOAD v sc isc i fa ‹The topology is not suitable for loads containing zero sequence currents as zero C sequence currents through the CSIs path N-n.

EE IIT Madras . i1 i fa i fb i fc + ‹The topology does not use the C1 vc1 S1 S3 S5 Rf io isolation transformer hence it . NEUTRAL CLAMPED INVERTER TOPOLOGY vsa i sa ila LOAD ‹ It uses two identical N vsb isb ilb n capacitors and the neutral of LOAD vsc isc ilc source and load is clamped at the VSI LOAD common point of the capacitor. a Lf can be used so dc offset in the Lch n' + b c S2 load current can be compensated. v c2 S4 S6 provided the two capacitors - C2 i2 voltage are at their reference value.

harmonics and also the switching frequencies of the inverter. So tracking this current is extremely difficult. ‹ Using fourth leg of the inverter. this current is tracked to prevent any current to flow in the supply current. zero sequence current is routed to path n-n’ containing switching frequency harmonics. ‹ How the current in path n-n’ contains unbalance. EE IIT Madras . This not only increases then cost but also the switching losses in the inverter. It needs a inverter of very high bandwidth. 3-PHASE 4-LEG TOPOLGY ‹ When the compensator is working.

LOAD N vsb isb ilb harmonics and dc offsets in load LOAD n vsc currents. the dc currents also pass + Rf S7 S1 S3 S5 through the dc capacitors. But due to DC offset S8 vc2 current the voltage of individual - C2 i2 capacitors drift. isc ilc LOAD Chopper VSI ‹ Due to dc offset current in load i1 i fa i fb i fc currents. ‹ Voltage drift problem of capacitors is solved using chopper circuit. NEUTRAL CLAMPED INVERTER CHOPPER TOPOLOGY ‹ This topology was proposed as a part of my research work and called as neutral clamped inverter chopper topology. vsa ila isa ‹ It can compensate the unbalance. The D7 C1 vc1 io voltage across capacitors is . EE IIT Madras . a Lf n' c maintained constant by separate PI Rch ich Lch + b S2 D8 S4 S6 control loop.

EE IIT Madras .

15 A HC11 HC6 HC5 Lf Rf MS-1 S1 S3 S5 HV4 + G1 G3 G5 1:2 vc1 C1 - 230 V HV6 n' 50 Hz S4 S6 S2 + HV5 G4 G6 G2 vc2 C2 - Auxiliary supply EE IIT Circuit for 3-phase 4-wire Madras compensated system Power . DESIGN AND DEVELOPMENT OF DSTATCOM-I HC8 isa HC1 PCC ila a vsa HC9 HV1 isb HC2 ilb Three 400 V b vsb HV2 Phase HC10 isc HC3 50 Hz ilc Load c vsc HC4 i0 n HV3 N inn ' 3-phase variac ifa ifb ifc HC7 0-270 V.

ilc D I/O vla . i fc circuit A I/O vc = vc1 + vc2 Parallel From Hall Port Effect current +15V-15V GND and voltage Isolated Power Pulses transducers Host PC Supply with isolated +15 V GND +5 V supplies to Vp Up Wp +15V IPM -15V DC Power +5V Blanking Circuit Opto Isolator 230 V. vlb . ilb . vlc Signal DSP 2812 Conditioning Processor i fa . 50 Hz Supply GND For IPM Logic GND Overview of logic level circuitry for active power filter implementation EE IIT Madras . DESIGN AND DEVELOPMENT OF DSTATCOM-II ila . i fb .

e. √ Conversion of bipolar to uni-polar signals with all necessary protection √ Synchronizing circuits. i. i. algorithm EE IIT Madras (code) implementation to generated switching commands to the switches pf VSI .e. Blanking and protection circuit to IGBTs √ Isolation and driver circuits (C) Interfacing circuits. √ Voltage source inverter √ DC link storage system √ Interface inductors (b) Signal conditioning circuits for DSP. DESIGN AND DEVELOPMENT OF DSTATCOM-II The design and development of STATCOM using involves three main steps: (a) Design of power circuits.

voltages and currents to the low level signal preferably within the range of ±5 V. i. DESIGN AND DEVELOPMENT OF DSTATCOM-III The major components of DSP based static compensators are the following: ¾ Conversion of power quantities in the power distribution network. ¾ Conversion of bipolar low level signals representing voltage and currents at power level to 0-3 V compatible with DSP ¾ Development of blanking circuit ¾ Development of isolation circuit ¾ Supply power modules for logic circuit and IPMs ¾ Interfacing circuits to DSPs ¾ Code implementation and running EE IIT Madras the program .e.

1. CONVERSION OF POWER QUANTITIES TO LOW LEVEL SIGNALS-I + HT -15 V +15 V -15 V +15 V Rvi ii + ii + + Input . M Outout Outout Ro Rvo voltage voltage GND -HT GND Hall effect voltage sensor Hall effect current sensor EE IIT Madras . LA 55-P LV 25-V Input voltage io current io M .

CONVERSION OF POWER QUANTITIES TO LOW LEVEL SIGNALS-II Hall effect voltage sensor and current sensor with the control card EE IIT Madras .

CONVERSION OF POWER QUANTITIES TO LOW LEVEL SIGNALS-III Integrated Hall effect voltage and current transducer Module EE IIT Madras .

CONVERSION OF LOW LEVEL BIPOLAR SIGNAL TO UNIPOLAR SIGNAL 3.5V 10k Circuit details EE IIT Madras PCB for signal conditioning .9k 10k 12k 10k Output Input TL064 TL064 TL064 D ZD -1.2.

BLANKING CIRCUIT-I S1 S3 S5 + G1 G3 G5 vc1 C1 - n' S4 S6 S2 + G4 G6 G2 vc2 C2 - EE IIT Madras .

2k 16 15 14 2 4 S a shot MODULE 13 S a shot S a shot GND 10 12 74LS123 4 S a shot Sa 1.2k G4 74LS123 3 2 8 CL100 1 7408 4050 B1 A1 GND 220 Ω CLR Sa +5V Circuit details Sa EXPERIMENTAL W/V S a shot G1 = Sa • Sa shot G4 = Sa • Sa shot Sa S a shot td td EE IIT Madras PCB for blanking circuit . BLANKING CIRCUIT-II +5V +5 V 18k 470 pF 220 Ω Rext CL100 Cext TO OPTO ISOLATOR Vcc G1 Sa 1.

ISOLATION CIRCUIT FOR IPM 2812 Blanking Opto-Isolation- Processor Circuit driver Circuit VCC(+15V) 1 8 NC 2 7 220 ohm I/P from blanking I/P .01 micro f circuit 360 ohm 3 6 GND O/P O/P to IPM 4 5 NC GND PCB for isolation circuit Circuit details EE IIT Madras .

ISOLATION POWER SUPPLY +15V D1 D3 Cdc 7815 GND D4 Cdc 7915 D2 -15V 220 / V2-0-V2 Circuit details S1 S3 S5 + G1 G3 G5 vc1 C1 - n' S4 S6 S2 + G4 G6 G2 vc2 C2 - EE IIT Madras Isolated power supply module .

INTERFACING CIRCUIT DETAILS -I expansion XTAL1/0scin Analog 30 MHz A/D converter Parallel Port JTAG JTAG Controller TMS320F2812 I/O expansion IBM Compatible External JTAG Interfacing description EE IIT Madras .

INTERFACING CIRCUIT DETAILS -II Interfacing various EE IIT components Madras to DSP .

e s sor INTERFACING l Proc FA Si gna 812PG CIRCUIT i gital 20F2 D M S3 DETAILS -III T Level-3 INTEGRATED u it c cir SIGNAL i s ing r on nc h CONDITIONING. EE IITBlanking Madras and Protection ul Module a g with Synchronizing and DSP units components to DSP Re . Level-2 Sy du le mo PROCESSING n ing it io d con MODULES nal sig ated n it r u FOR POWER teg ly In p p su wer QUALITY p o dc Level-1 ted Integrated Signal Conditioning.

i 2 S4 S6 S2 DSP based DSTATCOM-clip EE IITPower Intelligent Madras Modules . POWER COMPONENTS-I vsa isa PCC ila LOAD vsb isb ilb N LOAD n vsc isc ilc LOAD ifa i fc i1 S1 S3 S5 Lf C1 G1 G3 G5 + vc1 Rf - n' a b c i0 + G4 G6 G2 i0 vc2 C2 .

POWER COMPONENTS OF DSTATCOM-Neutral Clamped VSI vsa isa PCC ila LOAD vsb isb ilb N LOAD n vsc isc ilc LOAD ifa i fc i1 S1 S3 S5 Lf C1 G1 G3 G5 + vc1 Rf - n' a b c i0 + G4 G6 G2 i0 v C2 .c2 S2 i 2 S4 S6 Switching Performance Mitsubishi’s Intelligent Power EE IIT Madras Modules: PM50RVA120 . 7.

POWER COMPONENTS OF DSTATCOM-H Bridge VSI ila LOAD isa PCC LOAD LOAD v sc i fa Opto-isolation Mod ule #1 Opto-isolation Module C dc VSIs #2 IPM #1 IPM #2 Mitsubishi’s EE IIT Madras two Intelligent Power Modules (PM50RVA120) to form H-bridge VSI .

INTEGRATED CONTROL HARDWARE SET-UP FOR H-BRIDGE DSTATCOM a d s L o ce cto rs o u r du l ta g e S ter ce I n Vo Inver r fa Inte ff ect s l E er Haalnsduc Tr n m mo C o g t o uplin f EE IIT Madras n Poi Co .

POWER COMPONENTS SEMIKRON’s EE IITtwo level VSI Madras .

THREE-LEVEL VOLTAGE SOURCE INVERTER ifa ifc S1 S3 S5 Lf G1 G3 G5 Rf Vdc a b c i0 G4 G6 G2 S4 S6 S2 Mitsubishi’s two Intelligent Power Modules EE IIT Madras (PM50RVA120) to form H-bridge VSI .

COMPLETE VIEW OF THREE LEVEL VSI BASED DSTATCOM Signal conditioning. processing and control modules Power modules and transducer circuit EE IIT Madras .

OTHER FACILITIES TO CONDUCT PQ RESEARCH EXPERIMENTAL STUDY SEMIKRON’s three level EE IIT VSI Module Madras .

monitoring and recording units of experimental EE IIT Madras setup EE IIT Madras . control. MONITORING AND DISPLAY UNITS Data acquisition.

HARDWARE SET-UP VIEW IN PQ
LABORATORY

EE IIT Madras

DSP DETAILS

EE IIT Madras

DSP VERSUS DAS

(a) DSP systems are stand alone systems while DAS are
system dependent

(b) DSP systems are less costly over DAS for similar
specification

(c) DSPs have bit field structure approach giving better
accessibility and control

(d) DSPs are provided with flash memory to retain the
code even in power failure case

EE IIT Madras

S/H circuits to allow simultaneous sampling od analog data etc. EE IIT Madras . DSP FEATURES AND SELECTION (a) Fixed point and floating point DSP (b) Processor speed (C) Inbuilt analog to digital channels and sampling speed of A/D converter (d) Digital input and digital output port bits (e) Memory available for different types of variables (f) Other features like availability of timer/counters.

0 MW 5. Softwares: Driver for CCS + Full C2000 Code Composer Studio 7. Clock speed: 150MHz 4.Based on the requirements of load compensation it is found that TMS 320F2812 is the most suitable choice. Number of Processor: 1 3.Host Plateform: TMS320F2812 2. Expansion Options: 3 expansion connectors 6. External Memory: 1. Necessary cables and accessories EE IIT Madras . It possesses the following features: 1. USB Emulator: XDS510 USB Emulator with USB cable and drivers 8.

Data (if CONT RUN=0) Directional Regs for outputs Give SOC Reset and Configure ADCTRL1.MAX_CONV and CHSELSEQ Regs ADCIN(A0-A9) RESULT(0-9) Do Computations on Acquired Signals Give SOC by setting corresponding bit in ADCTRL2 Set EOS INT Flag Generate Output pulses No EOS INT Flag is NOP set? Yes Sequence has to be Reset Data acquisition for Result only if Regs to variables EE IIT Madras CONT RUN=0 DATA(0-N) RESULT(0-N) .IFR to Disable all interrupts Clear End of conversion flag and Rest Sequence Configure Mux Control.SCSR2 Disalbling Watch Dog.ADCTRL2.Configure ADCTRL3 Powering ON ADC Clear IMR.SEQUENCE OF STEPS TO CONFIGURE 320F2812 TO DEVELOP SOURCE CODE Start Configure SCSR1.

EXPERIMENTAL STUDY EE IIT Madras .

EXPERIMENTAL STUDIES Three phase source voltages with DC bus voltage EE IIT Madras .

¾ Unbalanced source currents (load currents) with neutral current before compensation ¾ Balanced source currents and neutral current after compensation without PI Controller EE IIT Madras ..Experimental Results Contd.

. ¾ Three phase filter currents and neutral current EE IIT Madras .Experimental Results Contd.

.Experimental Results Contd. ¾ Capacitor voltages after including PI controller with a reference voltage of 440 Volts EE IIT Madras .

No Current Compensation (%) Compensation (%) 1 isa 8.81 4..25 3 isc 6.84 5.54 4.02 EE IIT Madras . THDs in three phase currents Phase THD before THD after S.19 2 isb 13.Experimental Results Contd.

THANKS EE IIT Madras .