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(Autonomous)

Four Year B.Tech III Semester End Examinations, November - 2017

Regulation: R16

DIGITAL SYSTEM DESIGN

Time: 3 Hours Max Marks: 70

All questions carry equal marks

All parts of the question must be answered in one place only

UNIT - I

1 a) Convert the following Hexadecimal numbers to their Decimal equivalent numbers. [7M]

i)

ii)

i) 785.56 ii) EAF1

b) Perform the following Subtraction using 2s complement. [7M]

i) 15-17 ii) 25-13

2 a) Given the 8bit data word 01011011, generate the 12 bit composite word for the hamming [7M]

code that corrects and detects single errors.

b) Perform the following addition using excess-3 code. [7M]

i) 386+756 ii) 1010 + 444

UNIT - II

3 a) State and prove the following Boolean laws. [7M]

i) Associative law ii) Distributive law

b) Find the complement of the following Boolean functions and reduce them to [7M]

minimum number of literals.

i) (bc'+ a'd) (ab' + cd') ii) b'd + a'bc' + acd + a'bc

4 a) Minimize the following function using K-map. [7M]

i) F (A, B, C, D) = m (1,3,5,7,9,10,11,12,15)

b) Using the tabular method, obtain the minimal expression for f = m (1,2,3,5,12,13,15) [7M]

UNIT III

5 a) Design a combinational circuit with three inputs and one output. The output is 1 when the [7M]

binary value of the inputs is less than 3, otherwise the output is zero.

b) Design 3 bit gray code to binary code converter using logic gates and universal [7M]

gates?

6 a) Design and implement a 4 bit binary serial adder using three full adders and one half [7M]

adders? State how many full adders and half adders are required to design n bit binary

serial adder?

b) Implement full adder using two half adders and one OR gate and also construct full adder [7M]

using decoder and OR gates?

UNIT IV

7 a) Design a circuit for long sequence of pulses enters a two inputs two output synchronous [7M]

sequential circuit which is required to produce an output z=1, whenever the sequence 1101

occurs?

b)

Design 3bit synchronous down counter using T flip-flops and state the flow of sequence using [7M]

excitation table?

8 a) Draw the logic diagram of a SR latch using NOR gates. Explain its Operation using [7M]

excitation table.

b) Design a 3bit up/down counter which count up when the control signal M=1 and counts [7M]

down when control signal M=0?

UNIT V

9 a) List out capabilities and limitations of finite state machines? State the state diagram ,state [7M]

table and state reduction for completely specified FSM?

b) Draw the merger graph and obtain the set of maximal compatibles for the incompletely [7M]

specified machine whose state table is given in fig1

NS

PS

I1 I2

A E,0 B,0

B F,0 A,0

C E,- C,0

D F,1 D,0

E C,1 C,0

F D,- B,0

Fig-1

10 a) Convert the following Mealy machine into a corresponding Moore Machine. [7M]

NS, Z

PS

X=0 X=1

A C, 0 B, 0

B A, 1 D, 0

C B, 1 A, 1

D D, 1 C, 0

Fig-2

b) A clocked sequential circuit is provided with a single input x and single output z, whenever [7M]

the input produces a string pulsed 111 or 000 and at the end of the sequence it produces an

output z=1 and overlapping is also allowed.

i) Obtain state diagram and state table.

ii) Find equivalence classes using partition method.

DIGITAL SYSTEM DESIGN

L T P C CIA SEE Total

AEC002 Foundation

3 1 - 4 30 70 100

Contact Classes: 45 Tutorial Classes: 15 Practical Classes: Nil Total Classes: 60

OBJECTIVES:

The course should enable the students to:

I. Formulate and solve problems involving number systems and operations related to them and

generate different digital codes.

II. Describe and analyze functions of logic gates and optimize the logic functions using K -map and

Quine - McClusky methods.

III. Demonstrate knowledge of combinational and sequential logic circuits elements like Adders,

Multipliers, flip-flops and use them in the design of latches, counters, sequence detectors, and similar

circuits.

IV. Design a simple finite state machine from a specification and be able to implement this in gates and

edge triggered flip-flops.

Review of number systems: Decimal, binary, octal and hexa decimal, base conversion methods,

complements of numbers; binary codes: Binary coded decimal, excess-3, gray codes, error detecting and

error correcting codes.

UNIT-II BOOLEAN ALGEBRA AND THEOREMS Classes:10

Boolean algebra: Postulates and theorems; Logic gates and truth tables, representation of switching

functions, sum of products and product of sums forms, karnaugh map representation, minimization using

karnaugh map Quine - McClusky method of minimization.

UNIT-III DESIGN OF COMBINATIONAL CIRCUITS Classes: 08

Design of combinational circuits using conventional AND, OR, NOT, NAND, NOR and EX-OR gates;

Adders and subtractors: Half adder, full adder, half subtractor, full subtractor.

Parallel adder, serial adder, carry look ahead adder, binary coded decimal adder, 1s complement

subtractor, 2s complement subtractor.

Flip Flops: SR flip flop, JK flip flop, D flip flop, T flip flop, excitation tables, race around condition,

master slave flip flop; Counters: Design of synchronous and asynchronous counters; Shift registers:

Modes of operation, bidirectional shift registers, ring counters, Johnson counters.

CAPABILITIES AND MINIMIZATION OF SEQUENTIAL

UNIT-V Classes: 09

MACHINES

Synchronous sequential circuits: State table, state diagram, state assignment, state minimization;

Sequential circuits example: Sequence detectors, binary counters; Mealy and Moore machines:

Capabilities and limitations of finite state machine, state equivalence and machine minimization of

completely specified or incompletely specified machines, partition method, Merger table and graph

method.

Text Books:

1. M. Morris Mano, Michael D. Ciletti, Digital Design, Pearson Education/PHI, 3rd Edition, 2008.

2. Zvi. Kohavi, Switching and Finite Automata Theory, Tata McGraw Hill, 3rd Edition, 2004.

3. John M. Yarbrough, Digital logic applications and design, Thomson publications, 2nd Edition, 2006.

Reference Books:

2. A. Anand Kumar, Switching Theory and Logic Design, Prentice Hall of India, 1st Edition, 2014.

Web References:

1. mcsbzu.blogspot.com

2. http://books.askvenkat.com

3. http://worldclassprogramme.com

4. http://www.daenotes.com

5. http://nptel.ac.in/courses/117106086/1

E-Text Books:

1. https://books.google.co.in/books/about/Switching_Theory_and_Logic_Design

2. https://www.smartzworld.com/notes/switching-theory-and-logic-design-stld

3. https://www.researchgate.net/.../295616521_Switching_Theory_and_Logic_Design

4. https://books.askvenkat.com/switching-theory-and-logic-design-textbook-by-anand-kumar/

5. http://www.springer.com/in/book/9780387285931

I. COURSE OUTCOMES

After completing this course the student must demonstrate the knowledge and ability to:

1. Understand number systems, binary addition and subtraction, 2s complement representation and

operations with this representation and understand the different binary codes.

2. Explain switching algebra theorems and apply them for logic functions.

3. Identify the importance of SOP and POS canonical forms in the minimization or other optimization

of Boolean formulas in general and digital circuits.

4. Discuss about digital logic gates and their properties.

5. Evaluate functions using various types of minimizing algorithms like Boolean algebra.

6. Evaluate functions using various types of minimizing algorithms like Karnaugh map or tabulation

method

7. Design Gate level minimization using K-Maps.

8. Analyze the design procedures of Combinational logic circuits.

9. Understand bi-stable elements and different types of latches and flip-flops.

10. Analyze the design procedures of small sequential circuits.

11. Understand the concept of Shift Registers.

12. Analyze the design procedures of Synchronous Counters.

13. Analyze the design procedures of Asynchronous Counters.

14. Understand and analyze the design a finite state machine.

15. Understand and analyze the merger gaphs.

INSTITUTE OF AERONAUTICAL ENGINEERING

(Autonomous)

Proficiency

Program Outcomes Level

assessed by

Engineering knowledge: Apply the knowledge of mathematics, H Lectures,

PO1 science, engineering fundamentals, and an engineering specialization to Assignments,

the solution of complex engineering problems. Exercises.

Problem analysis: Identify, formulate, review research literature, and S Hands on

PO2 analyze complex engineering problems reaching substantiated Practice

conclusions using first principles of mathematics, natural sciences, and Sessions.

engineering sciences.

Design/development of solutions: Design solutions for complex N --

engineering problems and design system components or processes that

PO3 meet the specified needs with appropriate consideration for the public

health and safety, and the cultural, societal, and environmental

considerations.

Conduct investigations of complex problems: Use research-based S Lab sessions,

PO4 knowledge and research methods including design of experiments, Exams

analysis and interpretation of data, and synthesis of the information to

provide valid conclusions.

Modern tool usage: Create, select, and apply appropriate techniques, H Design

PO5 resources, and modern engineering and IT tools including prediction Exercises.

and modeling to complex engineering activities with an understanding

of the limitations.

The engineer and society: Apply reasoning informed by the contextual N --

PO6 knowledge to assess societal, health, safety, legal and cultural issues

and the consequent responsibilities relevant to the professional

engineering practice.

Environment and sustainability: Understand the impact of the S Oral discussions

PO7 professional engineering solutions in societal and environmental

contexts, and demonstrate the knowledge of, and need for sustainable

Ethics: Apply ethical principles and commit to professional ethics and

development. N --

PO8

responsibilities and norms of the engineering practice.

Individual and team work: Function effectively as an individual, and H Seminars

PO9

as a member or leader in diverse teams, and in multidisciplinary Discussions

Communication:

settings. Communicate effectively on complex engineering S Seminars, Paper

activities with the engineering community and with society at large, Presentations

PO10 such as, being able to comprehend and write effective reports and

design documentation, make effective presentations, and give and

receive clear instructions.

Project management and finance: Demonstrate knowledge and S

PO11 understanding of the engineering and management principles and apply Discussions,

these to ones own work, as a member and leader in a team, to manage Exams

projects and in multidisciplinary environments.

Life-long learning: Recognize the need for, and have the preparation S Development of

PO12 and ability to engage in independent and life-long learning in the Mini Projects

broadest context of technological change.

Program Specific Outcomes Proficiency

Level

Assessed by

Professional Skills: The ability to research, understand and implement H Lectures and

PSO1 computer programs in the areas related to algorithms, system software, Assignments

multimedia, web design, big data analytics, and networking for efficient

analysis and design of computer-based systems of varying complexity.

Problem-Solving Skills: The ability to apply standard practices and S Tutorials

PSO2 strategies in software project development using open-ended

programming environments to deliver a quality product for business

success.

Successful Career and Entrepreneurship: The ability to employ S Seminars and

PSO3 modern computer languages, environments, and platforms in creating Projects

innovative career paths, to be an entrepreneur, and a zest for higher

studies.

THE PROGRAM OUTCOMES

Program

Course Program

Specific

Outcomes Outcomes

Outcomes

PO PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO1 PO1 PO1 PSO PSO PSO

1

S S 0 1 2 1

S 2 3

1 H H S S

2 S S S S S S S S S S

3 H H S S S S S

4 H H H S S S S S S

5 H H S H S S S H

6 H H H S H S S S H S S S

7 S S H S S S S S S H S S

8 S S H S S S S S S S S S

9 H H S S S H H S S

10 S S S S S S S S S S

11 H H S S S S S

12 S S H S S S S S S H S S

13 S S H S S S S S S S S S

14 H H S S S H H S S

15 H H H S H S S S H S S S

MAPPING OF MODEL QUESTION PAPER QUESTIONS TO THE

ACHIEVEMENT OF COURSE OUTCOMES

Number CO1 CO2 CO3 CO4 CO5 CO6 CO7 CO8 CO9 CO10 CO11 CO12 CO13 CO14 CO15

1(a) H

1(b) H

2(a) H

2(b) H

3(a) H

3(b) H

4(a) S H H H

4(b) H H H

5(a) H S S S H H

5(b) H S S H H

6(a) H S S H H

6(b) H S S H H

7(a) H S H H H S S H

7(b) H S H H H S S H S

8(a) H H S S H S

8(b) H H S S H

9(a) H H S S H H H

9(b) H H S S H H H

10(a) H H S S H H H

10(b) H H H S H H H

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