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1. Embedded Systems
An embedded system is a computer system with a
dedicated function within a larger mechanical or
electrical system, often with real-time
computing constraints. It is embedded as part of a
complete device often including hardware and
mechanical parts. Embedded systems control many
devices in common use today. Ninety-eight percent of
all microprocessors are manufactured as components of
embedded systems.

Modern embedded systems are often based

on microcontrollers (i.e. CPU's with integrated memory
or peripheral interfaces), but ordinary microprocessors
(using external chips for memory and peripheral interface circuits) are also common, especially
in more-complex systems. In either case, the processor(s) used may be types ranging from
general purpose to those specialized in certain class of computations or even custom designed for
the application at hand. A common standard class of dedicated processors is the digital signal
processor (DSP).

Since the embedded system is dedicated to specific tasks, design engineers can optimize it to
reduce the size and cost of the product and increase the reliability and performance. Some
embedded systems are mass-produced, benefiting from economies of scale. Embedded systems
range from portable devices such as digital watches and MP3 players, to large stationary
installations like traffic lights, factory controllers, and largely complex systems like hybrid
vehicles, MRI, and avionics. Complexity varies from low, with a single microcontroller chip, to
very high with multiple units, peripherals and networks mounted inside a large chassis or

1.1 Components of an Embedded System

An Embedded System is composed of 3 major units-

1. Hardware

Power Source
Clock Oscillator Circuits
Reset Circuit

Interrupt Handler
Serial Communication and Parallel Ports
Driver Circuits- Input device interfacing and Output interfacing.

2. Software

Application Software
Real Time Operating System (RTOS).

1.2 Microcontroller
A microcontroller (or MCU for microcontrolle
r unit) is a small computer on a
single integrated circuit. In modern
terminology, it is a system on a chip or SoC.

A microcontroller contains one or

more CPUs (processor cores) along with
memory and programmable input/output
peripherals. Program memory in the form
of RAM, NOR flash or OTP ROM is also often included on chip, as well as a small amount
of RAM. Microcontrollers are designed for embedded applications, in contrast to
the microprocessors used in personal computers or other general purpose applications consisting
of various discrete chips.

Microcontrollers are used in automatically controlled products and devices, such as automobile
engine control systems, implantable medical devices, remote controls, office machines,
appliances, power tools, toys and other embedded systems. By reducing the size and cost
compared to a design that uses a separate microprocessor, memory, and input/output devices,
microcontrollers make it economical to digitally control even more devices and processes. Mixed
signal microcontrollers are common, integrating analog components needed to control non-
digital electronic systems.

Some microcontrollers may use four-bit words and operate at frequencies as low as 4 kHz, for
low power consumption (single-digit milliwatts or microwatts). They will generally have the
ability to retain functionality while waiting for an event such as a button press or other interrupt;
power consumption while sleeping (CPU clock and most peripherals off) may be just nanowatts,
making many of them well suited for long lasting battery applications. Other microcontrollers

may serve performance-critical roles, where they may need to act more like a digital signal
processor (DSP), with higher clock speeds and power consumption.

1.3 Microprocessor
A microprocessor is a computer
processor which incorporates the functions
of a computer's central processing unit
(CPU) on a single integrated circuit
(IC), or at most a few integrated
circuits. The microprocessor is a
multipurpose, clock driven, register based,
digital-integrated circuit which
accepts binary data as input, processes it
according to instructions stored in
its memory, and provides results as output. Microprocessors contain both combinational
logic and sequential digital logic. Microprocessors operate on numbers and symbols represented
in the binary numeral system.

The integration of a whole CPU onto a single chip or on a few chips greatly reduced the cost of
processing power, increasing efficiency. Integrated circuit processors are produced in large
numbers by highly automated processes resulting in a low per unit cost. Single-chip processors
increase reliability as there are many fewer electrical connections to fail. As microprocessor
designs get better, the cost of manufacturing a chip (with smaller components built on a
semiconductor chip the same size) generally stays the same.

Before microprocessors, small computers had been built using racks of circuit boards with
many medium- and small-scale integrated circuits. Microprocessors combined this into one or a
few large-scale ICs. Continued increases in microprocessor capacity have since rendered other
forms of computers almost completely obsolete, with one or more microprocessors used in
everything from the smallest embedded systems and handheld devices to the
largest mainframes and supercomputers.

Comparison between Microprocessor and Microcontroller

Microprocessor assimilates the function of a Microcontroller can be considered as a small
central processing unit (CPU) on to a single computer which has a processor and some other
integrated circuit (IC). components in order to make it a computer.
Microprocessors are mainly used in designing Microcontrollers are used in automatically
general purpose systems from small to large and controlled devices.
complex systems like super computers.
Computational capacity of microprocessor is very Less computational capacity when compared to
high. Hence can perform complex tasks. microprocessors. Usually used for simpler tasks.
A microprocessor based system can perform A microcontroller based system can perform single
numerous tasks. or very few tasks.
Microprocessors have integrated Math Microcontrollers do not have math coprocessors.
Coprocessor. Complex mathematical calculations They use software to perform floating point
which involve floating point can be performed calculations which slows down the device.
with great ease.
The main task of microprocessor is to perform the In addition to performing the tasks of fetch, decode
instruction cycle repeatedly. This includes fetch, and execute, a microcontroller also controls its
decode and execute. environment based on the output of the instruction
In order to build or design a system (computer), a The IC of a microcontroller has memory (both
microprocessor has to be connected externally to RAM and ROM) integrated on it along with some
some other components like Memory (RAM and other components like I / O devices and timers.
ROM) and Input / Output ports.
The overall cost of a system built using a Cost of a system built using a microcontroller is
microprocessor is high. This is because of the less as all the components are readily available.
requirement of external components.
Generally power consumption and dissipation is Power consumption is less.
high because of the external devices. Hence it
requires external cooling system.
The clock frequency is very high usually in the Clock frequency is less usually in the order of
order of Giga Hertz. Mega Hertz.
Instruction throughput is given higher priority In contrast, microcontrollers are designed to
than interrupt latency. optimize interrupt latency.
Have few bit manipulation instructions Bit manipulation is powerful and widely used
feature in microcontrollers. They have numerous
bit manipulation instructions.
Generally microprocessors are not used in real Microcontrollers are used to handle real time tasks
time systems as they are severely dependent on as they are single programmed, self-sufficient and
several other components. task oriented devices.

2 Types of Microcontrollers
1. 8051 Microcontroller
In 1981, Intel Corporation introduced an 8-bit microcontroller called the 8051. This
microcontroller had 128 bytes of RAM, 4K bytes of on-chip ROM, two timers, one serial
port, and four ports (each 8-bits wide) all on a single chip. At the time it was also referred to
as a "system on a chip." The 8051 is an 8-bit processor, meaning that the CPU can work on only
8 bits of data at a time. Data larger than 8 bits has to be broken into 8-bit pieces to be processed
by the CPU. The 8051 has a total of four I/O ports, each 8 bits wide.


1.1.1 Vcc- Pin 40 provides supply voltage to the chip. The

voltage source is +5V.
1.1.2 Vss/GND- Pin 20 is the ground.
1.1.3 XTAL1 and XTAL2- The 8051 has an on-chip
oscillator but requires an external clock to run it. Most
often a quartz crystal oscillator is connected to inputs
XTAL1 (pin 19) and XTAL2 (pin 18). The quartz crystal
oscillator connected to XTALI and XTAL2 also needs
two capacitors of 30 pF value. One side of each
capacitor is connected to the ground.
1.1.4 Reset/RST- Pin 9 is the RESET pin. It is an input and
is active high (normally low). Upon applying a high
pulse to this pin, the microcontroller will reset and
terminate all activities. This is often referred to as a
power-on reset. Activating A power-on reset will cause
all values in the registers to be lost. It will set program
counter to all 0s. In order for the RESET input to be Figure 1. 8051 Pin Diagram
effective, it must have a minimum duration of two
machine cycles. In other words, the high pulse must be high for a minimum of two
machine cycles before it is allowed to go low.

1.1.5 EA - The 8051 family members, such as the 8751/52, 89C51/52, etc. all come with on-
chip ROM to store programs, In such cases, the EA pin is connected to Vcc .For family
members such as the 8031 and 8032 in which there is no on-chip ROM, code is stored on
an external ROM and is fetched by the 8031/32. Therefore, for the 8031 the EA pin must
be connected to GND to indicate that the code is stored externally. EA, which stands for
"external access," is pin number 3 j in the DIP packages. It is an input pin and must be
connected to either Vcc or GND. In other words, it cannot be left unconnected.

1.1.6 PSEN - This is an output pin. PSEN stands for "program store enable." In an 8031- based
system in which an external ROM holds the program code, this pin is connected to the OE
pin of the ROM.
1.1.7 ALE: ALE (address latch enable) is an output pin and is active high. When connecting an
8031 to external memory, port 0 provides both address and data. The ALE pin is used for
de-multiplexing the address and data by connecting to the G pin of the 74LS373 chip.

1.1.8 PORT-0: Port 0 occupies a total of 8 pins (pins 32 - 39). It can be used for input or output.
To use the pins of port 0 as both input and output ports, each pin must be connected
externally to a 10K-ohm pull-up resistor. This is due to the fact that Port 0 is an open drain.
Open drain is a term used for MOS chips in the same way that open collector is used for
TTL chips. In any system using the 8051 /52 chips, we normally connect PO to pullup
resistors. With resistors connected to port 0, in order to make it an input, the 'port must be
programmed by writing 1to all the bits. Port 0 is also designated as ADO - AD7, allowing it
to be used for both address and data. When connecting an 8051/31 to an external memory.
Port 0 provides both address and data. The 8051 multiplexes address and data through port
0 to save pins.

1.1.9 PORT-1: Port I occupies a total of 8 pins (pins I through 8). It can be used as input or
output. In contrast to port 0, this port does not need any pull-up resistors since it already
has pull-up resistors internally. Upon reset, port 1 is configured as an input port. .If port 1
has been configured as an output port, to make it an input port again; it must be
programmed as such by writing 1s to all its bits.

1.1.10 PORT-2: Port 2 occupies a total of 8 pins (Pins 21 through 28). Just like Port 1, Port 2 does
not need any pullup resistor since it already has pull-up resistors internally. Upon reset,
port 2 is configured as an input port. To make port 2 an input, it must programmed as such
by writing I to all its bits. In many systems based on the 8051, P2 is used as simple I/O.
However, in 803 l-based systems, port 2 must be used along with P0 to provide the 16-bit
address for external memory. Since an 8051/31 is capable of accessing 64K bytes of
external memory, it needs a path for the 16 bits of the address. While P0 provides the lower
8 bits via AO - A7, it is the job of P2 to provide bits A8 - A 15 of the address. In other
words, when the 8051/31 is connected to external memory, P2 is used for the upper 8 bits
of the 16-bit address, and it cannot be used for I/O. Table 1. - Port 3 functions
P3 Bit Function Pin No.
1.1.11 PORT-3: Port 3 occupies a total of 8 pins, pins 10
P3.0 RxD 10
through 17. It can be used as input or output. P3
P3.1 TxD 11
does not need any pull-up resistors, just as P1 and
P3.2 INT0 12
P2 did not. Although port 3 is configured as an
P3.3 INT1 13
input port upon reset, this is not the way it is most
P3.4 T0 14
commonly used. Port 3 has the additional function
P3.5 T1 15
of providing some extremely important signals such
P3.6 WR 16
as interrupts.
P3.7 RD 17


Figure 2. - 8051 Architecture

1.2.1. ALU:
It is 8 bit unit. It performs arithmetic operation as addition, subtraction, multiplication, division,
increment and decrement. It performs logical operations like AND, OR and EX-OR. It
manipulates 8 bit and 16 bit data. It calculates address of jump locations in relative branch
instruction. It performs compare, rotate and compliment operations. It consists of Boolean
processor which performs bit, set, test, clear and compliment. 8051 micro controller contains 34
general purpose registers or working registers.2 of them are called math registers A & B and 32
are bank of registers.
Accumulator (A): It is 8 bit register. Its address is E0H and it is bit and byte accessible.
Result of arithmetic & logic operations performed by ALU is accumulated by this
register. Therefore it is called accumulator register. It is used to store 8 bit data and to
hold one of operand of ALU units during arithmetical and logical operations. Most of the
instructions are carried out on accumulator data. It is most versatile of 2 CPU registers.
B-register: It is special 8 bit math register. It is bit and byte accessible. It is used in
conjunction with A register as I/P operand for ALU. It is used as general purpose register
to store 8 bit data.

1.2.2. Program Status Word (PSW) Register: Figure 3- PSW register

The program status word (PSW) register is an 8-bit register. It is also referred to as the flag
register. Although the PSW register is 8 bits wide, only 6 bits of it are used by the 8051. The two
unused bits are user-definable flags. Four of the flags are called conditional flags, meaning
that they indicate some conditions that result after an instruction is executed. These four are CY
(carry), AC (auxiliary carry), P (parity), and OV (overflow).
Carry (CY) flag- This flag is set whenever there is a carry out from the D7 bit. This flag
bit is affected after an 8-bit addition or subtraction. It can also be set to 1 or 0 directly by
an instruction such as "SETB C" and "CLR .C" where "SETB C" stands for "set bit
carry" and "CLR C" for "clear carry".
Auxiliary carry (AC) flag - If there is a carry from D3 to D4 during an ADD or SUB
operation, this bit is set; otherwise, it is cleared. This flag is used by instructions that
perform BCD (binary coded decimal) arithmetic.
Parity (P) flag- The parity flag reflects the number of 1s in the A (accumulator) register
only. If the A register contains an odd number of 1s, then P = 1. Therefore, P = 0 if A
has an even number of 1s.
Overflow (OV) flag - This flag is set whenever the result of a signed number operation is
too large, causing the high-order bit to overflow into the sign bit. In general, the carry
flag is used to detect errors in unsigned arithmetic operations. The overflow flag is only
used to detect errors in signed arithmetic operations
Register Bank Select (RS) Bit Table 2- Register Banks
Bits PSW3 and PSW4 are known as RS0 (Register
RS0 RS1 Register Bank Address
Bank Select Bit 0) and RS1 (Register Bank Select Bit
1). They are used to select the register bank in which
0 0 0 00h-07h
the data is going to be stored.
0 1 1 08h-0fh
User Flag 0(F0) and Reserved Bit
1 0 2 10h-17h
They are present in the register for future use.
1 1 3 18h-1fh
1.2.3. Program Counter (PC)
Program Counter (PC) is a 2-byte address which tells the 8051 where the next instruction to
execute is found in memory. It is used to hold 16 bit address of internal RAM, external RAM or
external ROM locations. 8051 can access program addresses 0000 to FFFFh, a total of 64K bytes
of code. When the 8051 is initialized PC always starts at 0000h and is incremented each time an
instruction is executed. It is important to note that PC isnt always incremented by one and never
decremented. Also, not all members of the 8051 have the entire 64K bytes of on-chip ROM

1.2.4. Data Pointer Register (DPTR):

It is a 16 bit register used to hold address of external or internal RAM where data is stored or
result is to be stored. It is used to store 16 bit data. It is divided into2- 8bit registers, DPH-data
pointer higher order (83H) and DPL-data pointer lower order (82H). Each register can be used as
general purpose register to store 8 bit data and can also be used as memory location. DPTR does
not have single internal address. It functions as a base register in base relative addressing mode
and in-direct jump.

1.2. 5. RAM Memory Space Allocation in 8051 Scratch Pad
There are 128 bytes of RAM in the 8051. The 128 bytes of RAM inside 30-7F
the 8051 are assigned addresses 00 to 7FH. They can be accessed directly Bit Addressable
as memory locations. These 128 bytes are divided into three different RAM
groups as follows. 2F-20
A total of 32 bytes from locations 00 to 1F hex are set aside for Register Bank 3
register banks and the stack. 1F-18
A total of 16 bytes from locations 20H to 2FH are set aside for bit- Register Bank 2
addressable read/write memory. 17-10
A total of 80 bytes from locations 30H to 7FH are used for read
Register Bank
and write storage, or what is normally called a scratch pad. These
80 locations of RAM are widely used for the purpose of storing
data and parameters by 8051 programmers.
Register Bank 0
1.2.6. ROM in 8051 Figure 4- RAM in 8051
Some family members have only 4K bytes of on-chip ROM (e.g., 8751,
AT895 J) and some, such as the AT89C52 have 8K bytes of ROM. Among the 8051 family
members, 8751 and AT8951 have 4Kb of on chip ROM. This 4Kb of ROM memory has memory
address of 0000-FFFF. Therefore, the first location address of on chip ROM of this 8051 has an
address of 0000 and the last location has the address of FFFF.

1.2.7. Special Function Registers (SFR)

The 8051 microcontroller has 11 SFR. The special function registers have addresses between
80H and FFH. These addresses are above 80H, since the addresses 00 to 7FH arc addresses of
RAM memory in inside the 8051. Not all the address space of 80 to FF is used by the SFR, The
unused locations 80H to FFH are reserved and must not be used by the 8051 programmer.

Table 3 Special Function Registers

A Accumulator
B Arithmetic Operations
DPTR Data Pointer, Addressing External Memory
IE Interrupt Enable
IP Interrupt Priority
P x(x=0,1,2 and 3) I/O Port Latch
SP Stack Pointer
PSW Program Status Word
TMOD Timer/Counter Mode
TCON Timer/Counter Control
TH x(x=0,1,2) Timer/Counter x high byte
TL x(x=0,1,2) Timer/Counter x low byte
PCON Power Control
SCON Serial Control
SBUF Serial Data Buffer

Timer is a clock that controls the sequence of an event while counting in fixed intervals of time.
A Timer is used for producing precise time delay. Secondly, it can be used to repeat or initiate an
action after/at a known period of time. The 8051 has two timers: timer0 and timer1. They can be
used either as timers or as counters. Both timers are 16 bits wide. Since the 8051 has an 8-bit
architecture, each 16-bit is accessed as two separate registers of low byte and high byte.

1.4.1 Basic registers of the Timer

Both Timer 0 and Timer I are 16 bits wide. Since the 8051 has an 8-bit architecture, each 16-bit
timer is accessed as two separate registers of low byte and high byte. Each timer is discussed
1. Timer 0 registers
The 16-bit register of Timer 0 is accessed as low byte and high byte. The low byte register is
called TL0 (Timer 0 low byte) and the high byte register is referred to as TH0 (Timer 0 high
byte). These registers can be accessed like any other register, such as A, B, R0, R1, R2, etc.
These registers can also be read like any other register.

2. Timer 1 registers
Timer 1 is also 16 bits register split in 2 bytes- TH1 (Timer 1 high byte) and TL1 (Timer 1 low
byte).They are same as Timer 0.

1.4.2 TMOD (Timer Mode) Register GATE C/T M1 M0 GATE C/T M1 M0

Both timers 0 and 1 use the same register, TIMER 0 TIMER 1
called TMOD, to set the various timer
operation modes. TMOD is an 8 bit register Figure 5- TMOD Register
in which the lower 4 bytes are set aside for
Timer 0 and the upper 4 bytes are for Timer 1.In each case, the lower 2 bits are used to set the
timer mode and the upper 2 bits are used to specify the operation.

The other bit of the TMOD register is the GATE bit. This is because every timer has a means of
starting and stopping. Some timers do this by software, some by hardware, and some have both
software and hardware controls. The timers in the 8051 have both. The start and stop of the timer
are controlled by way of software by the TR (timer start) bits TR0 and TR1. This is achieved by
the instructions "SETS TRl" and "CLR TRl" for Timer I, and "SETS TR0" and "CLR TR0" for
Timer 0. The SETB instruction starts it, and it is stopped by the CLR instruction. These
instructions start and stop the timers as long as GATE = 0 in the TMOD register. The hardware
way of starting and stopping the timer by an external source is achieved by making GATE = 1 in
the TMOD register. However, to avoid further confusion for now, we will make GATE = 0,
meaning that no external hardware is needed to start and stop the timers. In using software to
start and stop the timer where GATE = 0, all we need are the instructions "SETS TRx" and "CLR
2. C/T (clock/timer)
This bit in the TMOD register is used to decide whether the timer is used as a delay generator or
an event counter, If C/T = 0, it is used as a timer for time delay generation, The clock source for
the time delay is the crystal frequency of the 8051.

If C/T = 0, the crystal frequency attached to the 8051 is the source of the clock for the timer. This
means that the size of the crystal frequency attached to the 8051 also decides the speed at which
the 8051 timer ticks. The frequency for the timer is always 1/12th the frequency of the crystal
attached to the 8051.
3. M1 & M0
M0 and M1 select the timer mode .There are three modes: 0, 1, and 2, Mode 0 is a 13-bit timer,
mode 1 is a 16-bit timer, and mode 2 is an 8-bit timer.
Table 4- Timer Mode Selection
M0 M1 Mode Operation
0 0 0 l3-bit timer mode
0 1 1 8-bit timer/counter THx with TLx as 5-bit prescaler
16-bit timer mode.16-bit timer/counters THx and
TLx are cascaded; there is no prescaler
1 0 2 8-bit auto reload. 8-bit auto reload timer/counter;
THx holds a value that is to be reloaded into TLx
each time it overflows.
1 1 3 Split timer mode
TCON (Timer Control) Register TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
TCON is an 8-bit register. Its bits are used for Timer 1 Timer 0 Timer1 Timer 0
generating interrupts internal or external. The
most important bits of the timer TR and TF are also in it. TR Figure 6- TCON Register
(timer run) and TF (timer overflow) bits which we use in
almost all over timer applications are in it.
Table 5- TCON Register functions
Name Serial No. Function
TF1 TCON 7 Timer 1 Overflow Flag. Set by hardware when timer/counter 1
overflows. Cleared by hardware as the processor vectors to the
interrupt service routine
TR1 TCON 6 Timer 1 run control bit. Set/Cleared by software to turn
Timer/Counter 1 on/off.
TF0 TCON 5 Timer 0 Overflow Flag. Set by hardware when timer/counter 1
overflows. Cleared by hardware as the processor vectors to the
interrupt service routine
TR0 TCON 4 Timer 0 run control bit. Set/Cleared by software to turn
Timer/Counter 1 on/off.
IE1 TCON 3 External interrupt 1 edge flag. Set by CPU when the external interrupt
edge (H-to-L transition) is detected. Cleared by CPU when the
interrupt is processed. Note: This flag does not latch low-level
triggered interrupts
IT1 TCON 2 Interrupt 1 type control bit. Set/cleared by software to specify falling
edge/low-level triggered external interrupt.
IE0 TCON 1 External interrupt 0 edge flag. Set by CPU when the external interrupt
edge (H-to-L transition) is detected. Cleared by CPU when the
interrupt is processed. Note: This flag does not latch low-level
triggered interrupts

IT0 TCON 0 Interrupt 0 type control bit. Set/cleared by software to specify falling
edge/low-level triggered external interrupt.

Timer as a Counter

Timers can also be used as counters counting events happening outside the 8051. When the
timer/counter is used as a timer, the 8051s crystal is used as the source of the frequency. When
it is used as a counter, however, it is a pulse outside the 8051 that increments the TH, TL
registers, In counter mode, notice that the TMOD and TH, TL registers are the same as for the
timer . If C/T = 0, the timer gets pulses from the crystal. In contrast, when C/T = 1, the timer is
used as a counter and gets its pulses from outside the 8051. Therefore, when C/T = 1,the counter
counts up as pulses are fed from pins 14 and 15. These pins are called T0 (Timer 0 input) and T 1
(Timer 1 input), Notice that these two pins belong to port 3. In the case of Timer 0, when C/T =
1, pin P3.4 provides the clock pulse and the counter counts up for each clock pulse coming from
that pin. Similarly, for Timer 1, when C/T = 1 each clock pulse coming in from pin P3.5 makes
the counter count up.


Computers transfer data in two ways: parallel and serial.
In parallel data transfers, often 8 or more lines (wire conductors) are used to transfer data to
a device that is only a few feet away. Examples of parallel transfers are printers and hard
disks; each uses cables with many wire strips. Although in such cases a lot of data can be
transferred in a short amount of time by using many wires in parallel, the distance cannot be
In serial communication, the data is sent one bit at a time, in contrast to parallel
communication, in which the data is sent a byte or more at a time. To transfer to a device
located many meters away, the serial method is used. The 8051 has serial communication
capability built into it, thereby making possible fast data transfer using only a few wires


Figure.7 Serial Communication Figure.8. - Parallel Data Transfer

1.4.1 Basics of Serial Communication

When a microprocessor communicates with the outside world, it provides the data in byte-sized
chunks. In some cases, such as printers, the information is simply grabbed from the 8-bit data
bus and presented to the 8-bit data bus of the printer. This can work only if the cable is not too
long, since long cables diminish and even distort Signals. Furthermore, an 8-bit data path is
expensive. For these reasons, serial communication is used for transferring data between two
systems located at distances of hundreds of feet to millions of miles apart.

For serial data communication to work the byte of data must be converted to serial bits using a
parallel-in-serial out shift register; then it can be transmitted over a single data line which means
that at the receiving end there must be a serial-in-parallel-out shift register to receive the serial
data and pack them into a byte. Of course, if data is to be transferred on the telephone line, it
must be converted from 0s and 1s to audio tones, which are sinusoidal-shaped signals. This
conversion is performed by a peripheral device called a modem, which stands for

Serial data communication uses two methods, Asynchronous and Synchronous. The
synchronous method transfers a block of data (characters) at a time, while the asynchronous
method transfers a single byte at a time. It is possible to write software to use either of these
methods, but the programs can be tedious and long. For this reason, there are special IC chips
made by many manufacturers for serial data communications. These chips are commonly
referred to as UART (universal asynchronous receiver-transmitter) and USART (universal
synchronous asynchronous receiver-transmitter).The 8051 chip has a built-in UART.

1.4.2 Types of Data Transmission Mode

In a Simplex transmission mode, the communication between sender and receiver occur only in
one direction. That means only the sender can transmit the data, and receiver can only receive the
data. The receiver cannot reply in reverse to the sender. The entire channel capacity is only
utilized by the sender.

In a Half-duplex transmission mode, the communication between sender and receiver occurs in
both the directions but, one at a time. The sender and receiver both can transmit and receive the
information but, only one is allowed to transmit at a time. The entire channel capacity is utilized
by the transmitter, transmitting
at that particular time.

In a Full duplex transmission

mode, the communication
between sender and receiver
can occur simultaneously.
Sender and receiver both can
transmit and receive
simultaneously at the same
time. The entire capacity of the
channel is shared by both the Figure 9- Simplex, Half and Full Duplex Data Transmission
transmitted signal traveling in
opposite direction.

1.4.3 Data Framing

Asynchronous serial data communication is widely used for character-oriented transmissions,

while block-oriented data transfers use the synchronous method. In the asynchronous method,
each character is placed between start and stop bits. This is called Framing. In data framing for
asynchronous communications, the data, such as ASCII characters, are packed between a start bit
and a stop bit. The start bit is always one bit, but the stop bit can be one or two bits, The start bit
is always a 0 (low) and the stop bit(s) is 1 (high).

Stop 0 1 Start
Space 1 0 0 0 0 0 Mark
Bit D7 D0 Bit
Goes out last Goes out 1st

Figure 10- Data Framing

When there is no transfer, the signal is 1(high), which is referred to as mark. The 0(low) is
referred to as space. The data transmission begins with start, followed by D0 (LSB) then the rest
of the bits until the D7 (MSB), and finally the one stop bit indicating the end.


To allow compatibility among data communication equipment made by various manufacturers,

an interfacing standard called RS232 was set by the Electronics Industries Association (EIA) in
1960. In J 963 it was modified and called RS232A. RS232B and RS232C were issued in 1965
and 1969, respectively. Today, RS232 is the most widely used serial I/O interfacing standard.
This standard is used in PCs and numerous types of equipment. However, since the standard was
set long before the advent of the TTL logic family, its input and output voltage levels are not
TTL compatible, In RS232, 1 bit is represented by -3 to -25 V while 0 bit IS +3 .to +25 V,
making -3 to +3 undefined. For this reason, to connect any RS232 to a microcontroller system,
we must use voltage converters such as MAX232 to convert TTL logic levels to RS232 voltage
levels, and vice versa. MAX232 IC chips are commonly referred to as line drivers.

1.4.5 MAX232

Since the RS232 is not compatible with today's microprocessors and

rnicrocontrollers, we need a line driver (voltage converter) to convert
the RS232's signals to TTL voltage levels that will be acceptable to the
8051's TxD and RxD pins. One example of such a converter is
MAX232 from Maxim Corp. The MAX232 converts from RS232
voltage levels to TTL voltage levels, and vice versa. One advantage of
the MAX232 chip is that it uses a +5 V power source which, is the same
as the source voltage for the 805 I. In other words, with a single +5 V
power supply we can power both the 8051 and MAX232, with no need
for the dual power supplies that arc common in many older systems.
Figure 11.-MAX232


Analog-to-digital converters arc among the most widely

used devices for data acquisition. Digital computers use
binary (discrete) values, but in the physical world
everything is analog (continuous). Temperature, pressure
(wind or liquid), humidity, and velocity are a few
examples of physical quantities that we deal with every
day. A physical quantity is converted to electrical
(voltage, current) signals using a device called a
transducer. Transducers arc also referred to as sensors.
Sensors for temperature, velocity, pressure, light, and
many other natural quantities produce an output that is
voltage (or current). Therefore, we need an analog-to-
digital converter to translate the analog signals to digital
numbers so that the microcontroller can read and process
An ADC has n-bit resolution where n can be 8,10,12,16 or Figure 12.-ADC0808/0809
even 24 bits. The higher-resolution ADC provides a smaller
step size, where step size is the smallest change that can be discerned by an ADC. In addition to
resolution, conversion time i another major factor in judging an ADC.
Conversion time is defined as the time it takes the ADC to convert the analog input to a digital
(binary) number. The ADC chips are either parallel or serial. In parallel ADC, we have 8 or more
pins dedicated to bringing out the binary data, but in serial ADC we have only one pin for data

1.5.1 ADC0808/0809
ADC0808 is a converter which has 8 analog inputs and 8 digital outputs. ADC0808 allows us to
monitor up to 8 different transducers using
only a single chip. This eliminates the need for Table 7. - ADC0808/0809 Binary Codes
external zero and full scale adjustments.
ADC0808 is a monolithic CMOS device, Selected Analog Channel C B A
offers high speed, high accuracy, minimal IN0 0 0 0
temperature dependence, excellent long-term
IN1 0 0 1
accuracy and repeatability and consumes
IN2 0 1 0
minimal power. These features make this
IN3 0 1 1
device ideally suited to applications from
IN4 1 0 0
process and machine control to consumer and
automotive applications. IN5 1 0 1
IN6 1 1 0
In the ADC0808/0809, V (+) and V (-) set IN7 1 1 1
ref ref
the reference voltage. If Vref (-) = Ground and Vref (+) = 5 V, the step size is 5 V/256 = 19.53
mV. Therefore, to get a 10 mV step size we need to set Vref (+) = 2.56 V and Vref (-) = Gnd.

We use A, B. and C addresses to select INO - IN7, and activate ALE to latch in the address. SC
is for start conversion. SC is the same as the WR pin in other ADC chips. EOC is for end-of-
conversion, and OE is for output enable (READ). The EOC and OE arc the same as the INTR
and RD pins respectively.

A single microcontroller can serve several devices. There are two ways to do that: interrupts or
In the interrupt method, whenever any device needs its service the device notifies the
microcontroller by sending it an interrupt signal. Upon receiving an interrupt signal, the
microcontroller .interrupts whatever it is doing and serves the device. The program
associated with the interrupt is called the interrupt service routine (ISR) or interrupt handler.
In polling, the microcontroller continuously monitors the status of a given device; when the
status condition is met, it performs the service. After that, it moves on to monitor the next
device until each one is serviced. Although polling can monitor the status of several devices
and serve each of them as certain conditions are met, it is not an efficient use of the
The advantage of interrupts is that the microcontroller can serve many devices (not all at the
same time, of course); each device can get the attention of the microcontroller based on the
priority assigned to it. The polling method cannot assign priority since it checks all devices in a
round robin fashion. More importantly, in the interrupt method the microcontroller can also
ignore (mask) a device request for service. This is again not possible with the polling method.
The most important reason that the interrupt method is preferable is that the polling method
wastes much of the microcontrollers time by polling devices that do not need service. So in
order to avoid tying down the microcontroller, interrupts are used.

1.6.1Six interrupts in the 8051

In reality, only five interrupts are available to the user in the 8051, but many manufacturers' data
sheets state that there are six interrupts since they include reset. The six interrupts in the 8051 are
allocated as follows.
1. Reset. When the reset pin is activated, the 8051 jumps to address location 0000.
2. Two interrupts are set aside for the timers: one for Timer 0 and one for Timer I. Memory
locations OOOBH and 00 IBH in the interrupt vector table belong to Timer 0 and Timer
1, respectively.
3. Two interrupts are set aside for hardware external hardware interrupts, Pin numbers 12
(P3.2) and 13 (P3.3) in port 3 are for the external hardware interrupts INTO and INT I,
respectively. These external interrupts are also referred to as EX1 and EX2. Memory
locations 0003H and 00 13H In the interrupt vector table are assigned to INTO and INTI,
respectively. .
4. Serial communication has a single interrupt that belongs to both receive and transmit. The
interrupt vector table location 0023H belongs to this interrupt.

1.6.2 Interrupt Enable Register EA -- ET2 ES ET1 EX1 ET0 EX0
Figure 13- IE Register
Table 7- IE Register
Name Pin No Function
EA IE7 Disables all interrupts. If EA = 0, no interrupt is acknowledged. If EA=1, each
interrupt source is individually enabled or disabled by setting or clearing its
enable bit.
- IE6 Not implemented, reserved for future use
ET2 IE5 Enables or disables Timer 2 overflow or capture interrupt (8052 only).
ES IE4 Enables or disables the serial port interrupt.
ET1 IE3 Enables or disables Timer 1 overflow interrupt
EX1 IE2 Enables or disables external interrupt 1.
ET0 IE1 Enables or disables Timer 0 overflow interrupt.
EX0 IE0 Enables or disables external interrupt 0.

1.6.3 Interrupt priority

When 8051 is powered up, the priorities are assigned according to the table-
Table 8- Interrupt Priority upon Reset
The priority can be manipulated as per Interrupt Sign Priority
requirements of the user by using the Interrupt
External Interrupt 0 INT0 Highest
Priority Register, which is an 8 bit register, bit
Timer Interrupt 0 TF0 High
External Interrupt 1 INT1 Normal
Timer Interrupt 1 TF1 Low
Serial Communication RI+TI Lower
Timer 2(8052 only) TF2
Figure 19- IP Register Lowest

Table 9- IP Register Functions

Name Pin No Function
- IP7 Reserved
- IP6 Reserved
PT2 IP5 Timer 2 interrupt priority bit(8052 only)
PS IP4 Serial Port interrupt priority bit
PT1 IP3 Timer 1 interrupt priority bit
PX1 IP2 External interrupt 1 priority bit
PT0 IP1 Timer 0 interrupt priority bit
PX0 IP0 External interrupt 0 priority bit

2. PIC Microcontrollers
Microchip made its first simple microcontroller, which they called PIC.
Originally this was developed as a supporting device for PDP computers to
control its peripheral devices, and therefore named as PIC, Peripheral
Interface Controller. Thus all the chips developed by Microchip have been named as a class by
themselves and called PIC. Microchip itself does not use this term anymore to describe their
microcontrollers; however use PIC as part of product name. They call their products MCUs.

The PIC microcontroller family is manufactured by Microchip Technology Inc. Currently they
are one of the most popular microcontrollers, used in many commercial and industrial
applications. Over 120 million devices are sold each year.
The PIC microcontroller architecture is based on a modified Harvard RISC (Reduced Instruction
Set Computer) instruction set with dual-bus architecture, providing fast and flexible design with
an easy migration path from only 6 pins to 80 pins, and from 384 bytes to 128 Kbytes of program

PIC microcontrollers are available with many different specifications depending on:
Memory Type
A. Flash B. OTP (One-time-programmable)
C. ROM (Read-only-memory) D. ROMless
InputOutput (I/O) Pin Count
A. 418 pins B. 2028 pins
C. 3244 pins D. 45 and above pins
Memory Size
A. 0.51 K B. 24 K C. 816 K D. 2432 K
E. 4864 K F. 96128 K
Special Features
A. CAN (Controller Area Network) B. SPI (Serial Peripheral Interface)
C. I2C (Inter Integrated Controller) D. Ethernet

Although there are many models of PIC microcontrollers, the nice thing is that they are upward
compatible with each other and a program developed for one model can very easily, in many
cases with no modifications, be run on other models of the family. The basic assembler
instruction set of PIC microcontrollers consists of only 33 instructions and most of the family
members (except the newly developed devices) use the same instruction set. This is why a
program developed for one model can run on another model with similar architecture without
any changes.

All PIC microcontrollers offer the following features:

A. RISC instruction set
Digital I/O ports
On-chip timer with 8-bit prescaler
Power-on reset
Watchdog timer
Power-saving SLEEP mode

High source and sink current
Direct, indirect, and relative addressing modes
External clock interface
RAM data memory
EPROM or Flash program memory

Some devices offer the following additional features:

Analog input channels
Analog comparators
Additional timer circuits
EEPROM data memory
External and internal interrupts
Pulse-width modulated (PWM) output
USART serial interface

Some even more complex devices in the family offer the following additional features:
CAN bus interface
I2C bus interface
SPI bus interface
Direct LCD interface
USB interface
Motor control

Although there are several hundred models of PIC microcontrollers, choosing a microcontroller
for an application is not a difficult task and requires taking into account these factors:
Number of I/O pins required
Required peripherals (e.g., USART, USB)
The minimum size of program memory
The minimum size of RAM
Whether or not EEPROM nonvolatile data memory is required
Physical size

The important point to remember is that there could be many models that satisfy all of these
requirements. You should always try to find the model that satisfies your minimum requirements
and the one that does not offer more than you may need. For example, if you require a
microcontroller with only 8 I/O pins and if there are two identical microcontrollers, one with 8
and the other one with 16 I/O pins, you should select the one with 8 I/O pins. Although there are
several hundred models of PIC microcontrollers, the family can be broken down into three main
groups, which are:
12-bit instruction word (e.g., 12C5XX, 16C5X)
14-bit instruction word (e.g., 16F8X, 16F87X)
16-bit instruction word (e.g., 17C7XX, 18C2XX)

All three groups share the same RISC architecture and the same instruction set, with a few
additional instructions available for the 14-bit models, and many more instructions available for
the 16-bit models. Instructions occupy only one word in memory, thus increasing the code
efficiency and reducing the required program memory. Instructions and data are transferred on
separate buses, so the overall system performance is increased.

2.1 PIC16F877

This microcontroller is a 40-pin device and is one of

the popular microcontrollers used in complex
applications. The device offers 8192 X14 flash
program memory, 368 bytes of RAM, 256 bytes of
nonvolatile EEPROM memory, 33 I/O pins, 8
multiplexed A/D converters with 10 bits of resolution,
PWM generator, three timers, an analog capture and
comparator circuit, USART, and internal and external
interrupt facilities.

2.2 PIC16F84
Figure 14- PIC16F877
This has been one of the most popular PIC microcontrollers for a very long time. This is an 18-
pin device and it offers 1024 X14 flash program memory, 36 bytes of data RAM, 64 bytes of
nonvolatile EEPROM data memory, 13 I/O pins, a
timer, a watchdog, and internal and external
interrupt sources. The timer is 8 bits wide but can
be programmed to generate internal interrupts for
timing purposes. PIC16F84 can be operated from a
crystal or a resonator for accurate timing. A
resistor-capacitor can also be used as a timing
device for applications where accurate timing is not

Figure 15- PIC16F84

2.3 Comparison with other Microcontroller


BUS WIDTH 8-bit for standard core 8/16/32-bit
CAN, Ethernet, SPI, I2S
SPEED 12 Clock/instruction cycle 4 Clock/instruction cycle
Some feature of RISC

Von Neumann architecture Harvard architecture
Average Low
PIC16,PIC17, PIC18, PIC24,
FAMILIES 8051 variants
NXP, Atmel, Silicon Labs,
MANUFACTURER Microchip Average
Dallas, Cyprus, Infineon, etc.
COST Very Low Average
OTHER FEATURES Known for its Standard Cheap
AT89C51, P89v51, etc.

2.4 CAN- Controller Area Network

A Controller Area Network (CAN bus) is a robust vehicle bus standard designed to
allow microcontrollers and devices to communicate with each other in applications without
a host computer. It is a message-based protocol, designed originally for multiplex electrical
wiring within automobiles, but is also used in many other contexts. CAN is a multi-master serial
bus standard for connecting Electronic Control Units [ECUs] also known as nodes. Two or more
nodes are required on the CAN network to communicate. The complexity of the node can range
from a simple I/O device up to an embedded computer with a CAN interface and sophisticated
software. The node may also be a gateway allowing a standard computer to communicate over a
USB or Ethernet port to the devices on a CAN network. All nodes are connected to each other
through a two wire bus. The wires are 120 nominal twisted pair.

2.5 I2C- Inter Integrated Circuit
IC (Inter-Integrated Circuit), is a multi-master, multi-slave, packet switched, single-
ended, serial computer bus invented by Philips Semiconductor (now NXP Semiconductors). It is
typically used for attaching lower-speed peripheral ICs to processors and microcontrollers in
short-distance, intra-board communication. Alternatively IC is spelled I2C.
IC uses only two bidirectional open-drain lines, Serial Data Line (SDA) and Serial Clock Line
(SCL), pulled up with resistors. Typical voltages used are +5 V or +3.3 V, although systems with
other voltages are permitted. The IC reference design has a 7-bit or a 10-bit (depending on the
device used) address space. Common IC bus speeds are the 100 Kbit/s standard modes and the
10 Kbit/s low-speed mode, but arbitrarily low clock frequencies are also allowed. Recent
revisions of IC can host more nodes and run at faster speeds (400 Kbit/s Fast mode,
1 Mbit/s Fast mode plus or Fm+, and 3.4 Mbit/s High Speed mode). These speeds are more
widely used on embedded systems than on PCs. There are also other features, such as 16-bit

The maximal number of nodes is limited by the address space and also by the total
bus capacitance of 400 pF, which restricts practical communication distances to a few meters.
The relatively high impedance and low noise immunity requires a common ground potential,
which again restricts practical use to communication within the same PC board or small system
of boards.

2.6 SPI- Serial Peripheral Interface

The Serial Peripheral Interface bus (SPI) is a synchronous serial communication interface
specification used for short distance communication, primarily in embedded systems. The
interface was developed by Motorola in the late 1980s and has become a de facto standard.
Typical applications include Secure Digital cards and liquid crystal displays.
SPI devices communicate in full duplex mode using master-slave architecture with a single
master. The master device originates the frame for reading and writing. Multiple slave devices
are supported through selection with individual slave select (SS) lines.
Sometimes SPI is called a four-wire serial bus, contrasting with three-, two-, and one-wire serial
buses. The SPI may be accurately described as a synchronous serial interface, but it is different
from the Synchronous Serial Interface (SSI) protocol, which is also a four-wire synchronous
serial communication protocol. But SSI Protocol employs differential signaling and provides
only a single simplex communication channel. The SPI bus can operate with a single master
device and with one or more slave devices.

If a single slave device is used, the SS pin may be fixed to logic low if the slave permits it. Some
slaves require a falling edge of the chip select signal to initiate an action. An example is
the Maxim MAX1242 ADC, which starts conversion on a highlow transition. With multiple
slave devices, an independent SS signal is required from the master for each slave device. Most
slave devices have tri-state outputs so their MISO signal becomes high impedance (logically
disconnected) when the device is not selected. Devices without tri-state outputs cannot share SPI
bus segments with other devices; only one such slave could talk to the master.

2.7 Advantages of PIC Microcontroller

1. They are reliable and malfunctioning of PIC percentage is very less.

2. Performance of the PIC is very fast because of using RISC architecture.
3. Power conception is also very less when compared to other micro controllers. When we
see in the programmer point of view interfacing is very easy, also we can connect analog
devices directly without any extra circuitry and use them.
4. Programming is also very easy when compared to other microcontrollers.

2.8 Disadvantages of PIC Microcontroller

1. The length of the program will be big because of using RISC (35 instructions).
2. Program memory is not accessible and only one single accumulator is present.

3. ARM Microcontrollers (ARM Microprocessors)
ARM machines have a history of living up to the expectations of
their developers, right from the very first ARM machine ever
developed. It all began in the 1980s when Acorn Computers Ltd.,
spurred by the success of their platform BBC Micro wished to
move on from simple CMOS processors to something more
powerful, something that could stand strong against the IBM
machines launched in 1981. The solutions available in the market
like the Motorola 68000 were not powerful enough to handle
graphics and GUIs leaving only one option with the company, make
their own processor.
ARM, originally Acorn RISC Machine, later Advanced RISC
Machine, is a family of reduced instruction set computing (RISC) architectures for computer
processors, configured for various environments. British company ARM Holdings develops the
architecture and licenses it to other companies, who design their own products that implement
one of those architecturesincluding systems-on-chips (SoC) and systems-on-modules (SoM)
that incorporate memory, interfaces, radios, etc. It also designs cores that implement
this instruction set and licenses these designs to a number of companies that incorporate those
core designs into their own products.
3.1 ARM Architecture
Processors that have a RISC architecture typically require fewer transistors than those with
a complex instruction set computing (CISC) architecture (such as the x86 processors found in
most personal computers), which improves cost, power consumption, and heat dissipation. These
characteristics are desirable for light, portable, battery-powered devices -
including smartphones, laptops and tablet computers, and other embedded systems.
For supercomputers, which consume large amounts of electricity, ARM could also be a power-
efficient solution.
The ARM core uses RISC architecture. RISC is a design philosophy aimed at delivering simple
but powerful instructions that execute within a single cycle at a high clock speed. The RISC
philosophy concentrates on reducing the complexity of instructions performed by the hardware
because it is easier to provide greater flexibility and intelligence in software rather than
hardware. As a result, a RISC design places greater demands on the compiler. In contrast, the
traditional complex instruction set computer (CISC) relies more on the hardware for instruction
functionality, and consequently the CISC instructions are more complicated. The RISC
philosophy is implemented with four major design rules:
InstructionsRISC processors have a reduced number of instruction classes. These classes
provide simple operations that can each execute in a single cycle. The compiler or
programmer synthesizes complicated operations (for example, a divide operation) by
combining several simple instructions. Each instruction is a fixed length to allow the
pipeline to fetch future instructions before decoding the current instruction. In contrast, in
CISC processors the instructions are often of variable size and take many cycles to execute.
PipelinesThe processing of instructions is broken down into smaller units that can be
executed in parallel by pipelines. Ideally the pipeline advances by one step on each cycle for

maximum throughput. Instructions can be decoded in one pipeline stage. There is no need
for an instruction to be executed by a mini program called microcode as on CISC
RegistersRISC machines have a large general-purpose register set. Any register can
contain either data or an address. Registers act as the fast local memory store for all data
processing operations. In contrast, CISC processors have dedicated registers for specific
Load-store architectureThe processor operates on data held in registers. Separate load
and store instructions transfer data between the register bank and external memory. Memory
accesses are costly, so separating memory accesses from data processing provides an
advantage because you can use data items held in the register bank multiple times without
needing multiple memory accesses. In contrast, with a CISC design the data processing
operations can act on memory directly.
These design rules allow a RISC processor to be simpler, and thus the core can operate at higher
clock frequencies. In contrast, traditional CISC processors are more complex and operate at
lower clock frequencies. Over the course of two decades, however, the distinction between RISC
and CISC has blurred as CISC processors have implemented more RISC concepts.

3.2 Comparison of ARM Microcontrollers with Others

8051 PIC ARM

Bus width 8-bit for standard core 8/16/32-bit 32-bit mostly also available in
Protocols LIN, CAN, Ethernet, CAN, USB, Ethernet, I2S, DSP,
SPI, I2S SAI (serial audio
interface), IrDA
Speed 12 Clock/instruction 4 Clock/instruction cycle 1 clock/ instruction cycle
ISA CLSC Some feature of RISC RISC

Memory Architecture Von Neumann Harvard architecture Modified Harvard architecture

Power Consumption Average Low Low
Families 8051 variants PIC16,PIC17, PIC18, ARMv4,5,6,7 and
PIC24, PIC32 series(A,C,M)
Community Vast Very Good Vast
Manufacturer NXP, Atmel, Silicon Microchip Average Apple, Nvidia, Qualcomm,
Labs, Dallas, Cyprus, Samsung Electronics, and TI
Infineon, etc. etc.
Cost (as compared to Very Low Average Low
features provide)
Other Feature Known for its Standard Cheap High speed operation

Popular AT89C51, P89v51, etc. PIC18fXX8, LPC2148, ARM Cortex-M0 to

Microcontrollers PIC16f88X, PIC32MXX ARM Cortex-M7, etc.

3.3 Advantages of ARM Microcontrollers
1. Low Power Consumption
2. Cost sensitive embedded application
3. Cheap and easy to develop
4. High performance, low code size and increased speed.

3.4 Disadvantages of ARM Microcontroller

Software has to be updated for each new version of ARM microcontroller.

3.5 NXPs LPC 21xx series (xx-31-38)

The LPC2131/32/34/36/38
microcontrollers are based on a
16/32-bit ARM7TDMI-S CPU
with real-time emulation and
embedded trace support, that
combine the microcontroller with
32 kB, 64 kB, 128 kB, 256 kB
and 512 kB of embedded high-
speed flash memory. A 128-bit
wide memory interface and
unique accelerator architecture
enable 32-bit code execution at
maximum clock rate. For critical
code size applications, the
alternative 16-bit Thumb mode
reduces code by more than 30 %
with minimal performance
penalty. Due to their tiny size and
low power consumption, these
microcontrollers are ideal for
applications where
miniaturization is a key
requirement, such as access
control and point-of-sale. With a
wide range of serial communications interfaces and on-chip Figure 16.-LPC2132
SRAM options of 8 kB, 16 kB, and 32 kB, they are very
well suited for communication gateways and protocol converters, soft modems, voice
recognition and low-end imaging, providing both large buffer size and high processing power.
Various 32-bit timers, single or dual 10-bit 8-channel ADC(s), 10-bit DAC, PWM channels and
47 GPIO lines with up to nine edge or level sensitive external interrupt pins make these
microcontrollers particularly suitable for industrial control and medical systems.

Features and benefits
1. Enhancements brought by LPC213x/01 devices
Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original LPC213x.
They also allow for a port pin to be read at any time regardless of its function.
Dedicated result registers for ADC(s) reduce interrupt overhead.
UART 0/1 include fractional baud rate generator, auto-bauding capabilities and handshake
flow-control fully implemented in hardware.
Additional BOD control enables further reduction of power consumption.

2. Key features common for LPC213x and LPC213x/01

16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 or HVQFN64 package.
8/16/32 kB of on-chip static RAM and 32/64/128/256/512 kB of on-chip flash program
memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation.
In-System Programming/In-Application Programming (ISP/IAP) via on-chip bootloader
software. Single flash sector or full chip erase in 400 ms and programming of 256 B in 1
Embedded ICE RT and Embedded Trace interfaces offer real-time debugging with the on-
chip Real Monitor software and high-speed tracing of instruction execution.
One (LPC2131/32) or two (LPC2134/36/38) 8-channel 10-bit ADCs provide a total of up
to 16 analog inputs, with conversion times as low as 2.44 s per channel.
Single 10-bit DAC provides variable analog output (LPC2132/34/36/38).
Two 32-bit timers/external event counters (with four capture and four compare channels
each), PWM unit (six outputs) and watchdog.
Low power Real-time clock with independent power and dedicated 32 kHz clock input.
Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400 kbit/s),
SPI and SSP with buffering and variable data length capabilities.
Vectored interrupt controller with configurable priorities and vector addresses.
Up to forty-seven 5 V tolerant general purpose I/O pins in tiny LQFP64 or HVQFN
Up to nine edge or level sensitive external interrupt pins available.
60 MHz maximum CPU clock available from programmable on-chip PLL with settling
time of 100 us.
On-chip integrated oscillator operates with external crystal in range of 1 MHz to 30 MHz
and with external oscillator up to 50 MHz.
Power saving modes include Idle and Power-down.
Individual enable/disable of peripheral functions as well as peripheral clock scaling down
for additional power optimization.
Processor wake-up from Power-down mode via external interrupt or BOD.
Single power supply chip with POR and BOD circuits:
CPU operating voltage range of 3.0 V to 3.6 V (3.3 V 10 %) with 5 V tolerant I/O pads.