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Tutorial Notes for Microcomputers

204-2014
Tutorial 1 (comments on digital logic):
The unit will be started by
informing the students of
the necessary back-
ground: Digital logic and
"C"
The first tutorial which
runs in the second week is
to review the logic re-
quirements. It is necessar-
ily only an overview.
Attendance is not necessary but recommended.
They should finish by at least being able to recog-
nise the symbols used in the background ppt logic
diagram and identify some connection characteris-
tics. e.g. How are the tri-state gates used in the dia-
gram?

Students may look for books and tutorials online etc


to supplement this.

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These IEC 60617-12 symbols generally used for
complex devices separate control and block func-
MSP430F261x
MSP430F241x
tions(above the indent) from data storage etc. below.
SLAS541I JUNE 2007 REVISED JULY 2011 www.ti.com

A simple example is used inINFORMATION


APPLICATION the diagram shown in
theP1lecture.
Port (P1.0 to P1.7), Input/Output With Schmitt Trigger
Pad Logic
P1REN.x

DVSS 0

DVCC 1 1
P1DIR.x 0 Direction
0: Input
1 1: Output

P1OUT.x 0

Module X OUT 1
P1.0/TACLK/CAOUT
P1.1/TA0
P1SEL.x P1.2/TA1
P1.3/TA2
P1IN.x P1.4/SMCLK
P1.5/TA0
EN P1.6/TA1
P1.7/TA2

Module X IN D

P1IE.x EN
P1IRQ.x
Q
Set
P1IFG.x

P1SEL.x
Interrupt
Edge Select
P1IES.x

AND gates
Negation
Schmidt trigger
Tri-state
Multiplexor
Flip-flops
Pullup resistor

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Tutorial 2:
A computer processors:

Que1:
Name the parts of a computer in its most gener-
alised form.
Ans1:
Memory
CPU (inc control unit and datapath functionality)
ALU Arithmetic and Logic Unit
Input/Output
Clock generator

Que 3:
Define the term bus in the computer context.
Ans 3:
A group of data paths (wires) shared between a
number of devices is known as a "Bus". In a
computer, there are three main groups (i.e. three
buses).

Que 4:
Name the three buses normally associated with a
computer.
Ans 4:
Address bus; Data bus; Control bus

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Que 5:
What distinguishes a microcontroller from a micro-
processor?
Ans 5:
A microprocessor is an integrated CPU generally all
on one chip.
A micro controller is a CPU plus integrated peripher-
al subsystems including memory and I/O

Que 6:
With a 16bit address bus how many locations can be
directly addressed? What is the highest address?
Give your answer in decimal and hexadecimal.
Ans 6;
65536 in decimal 0x010000 in hexadecimal for the
address locations
65535 and 0xFFFF for the highest address.

Que 7:
Name the types of registers likely to be found in a
CPU.
Ans 7:
Accumulator (an old name but still used)
General register
Index register
Stack pointer
Program counter
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Status Register (Condition code register )

Que 8:
The SR of MSP430 has 4 bits with the labels NZVC
(common to most micros). What do the initials stand
for and what do they represent as far as ALU opera-
tions are concerned?
Ans 8:
The flags show information about the status of the
result of an ALU operation.
N - Negative (2's complement - most significant bit
set)
Z - Zero
V - Overflow (2's complement arithmetic overflow)
C - Carry

Que 9:
What does the Program Counter do?
Ans 9:
The program counter holds the address of the next
instruction to be executed. It is incremented during
instruction load operations and may be set to new
values by branch and jump instructions etc.

Assembly language:

Ans 1:
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An opcode provides the processor with the informa-
tion about what operations to perform while the op-
erand provides information about the data to be op-
erated on. Either the data itself or where to find it.

Ans 2:
Data Transfer and manipulation
Arithmetic
Logic and bit
Data test
Branch
Function calls
(and for the S12 Fuzzy logic instructions)
Equivalent names can be used here.

Ans 3:
The operation is a bit wise logical AND so
R5 contains 1010 0101
Immediate data 0110 0111
Gives 00100101 or $25

Tutorial 3
Ans 1: Generally an initialisation function and the
specific operation function (either a get or put).

void LEDsInit(void)
enum bool LEDsPut(value)
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void switchesInit(void)
enum bool switchesPut(uc_8 &value)

Ans 2:
Stub is a skeleton of a function which provides the
interface functionality but not the actual executable
code. Generally it returns some default values. This
allows compilation and simulation of the calling code
without needing finalisation of the actual function.

Ans 3:
Finite State machine straight out of the lecture con-
tent.
Many embedded systems are simply examples of fi-
nite state machines.

Finite State Machines in general:


Use a switch statement to choose the state for exe-
cution

switch (state) {
case 1: {..............;break;}
case 2: {..............;break;}
case 3: {..............;break;}
case 4: {..............;break;}
case 5: {..............;break;}
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.......
default:{..........................}
}

Use a hierarchy of functions to represent what is


done in a state. A useful naming convention is fol-
lowed here.

Each state has the possibility of some functionality


on Entry. Then it has to Do whatever the state re-
quires and continues to do so while the Test re-
mains true.
Before leaving the state there may be other things
that have to be done and so we execute the eXit
function. The capitalised letter is used to indicate the
functionality included.

void state_01(void) {
state_01_E(); // Entry
do {
state_01_D(); // Do
} while {state_01_T()} // Test
state_01_X(); // eXit
}

Two state machines can be much simpler. This is the


generalised form
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Ans 4:

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Ans 5:

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Tutorial 4 :
Timing & Interrupts:
Que 1:
What are the three basic techniques for doing timing
of functions for embedded systems?
Ans 1:
Simulation with clock cycle counting. Generally a
single execution is followed and measured.
Toggling an output pin for external measurement
with a CRO. Generally good for repetitive but consis-
tent execution times but can deal with single mea-
surements.
Inserting specific functions into the code to initiate
measurement and terminate(collecting data). Can
handle multiple executions and build a record of ex-
ecution times.

Que 2:
When is the simulator useful to assist timing mea-
surements? When is it not useful (or more difficult to
use)?
Ans 2:

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Handling simple code execution is easy and records
clock ticks. If peripheral subsystems and interrupts
need to be included then configuring simulators be-
comes much more complex. For company specific
simulators may includes all functionality but for
generic simulators it may only be the processor itself
which is simulated.

Que 3:
Toggling a pin and observing the external effect is
quite an effective timing method. If the operation of
toggling takes 10microseconds and it is done both
before and after the code execution to be timed and
the CRO shows an execution time of 85microsec-
onds how long does the actual code take to execute
and why?
Ans 3:
75 microseconds. You only subtract one execution
from the total.

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Que 4:
The structure used by the TimeTest routines has 7
members. Draw a diagram which shows how these
are stored in memory. If the memory address of the
beginning of the struct is 0x1010 what is the address
of the first byte of maxcount?

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Address of maxcount is 0x101A

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Tutorial 5

Interrupts
Que1:
What is the context of a program which is saved
when an ISR starts to execute?

Que1 answer:
Sufficient information to be able to return to the orig-
inal program. The minimum is the value of the PC
and all the volatile information stored in the registers
which is overridden by ISR execution. In the
MSP430 the PC and the SR are saved on the stack.

Que 2:
When an ISR is finishing and another is pending
what happens to the context saved on the stack?

Que 2 answer:
For the S12 if another interrupt is pending then the
contents of the stack are left unchanged and the
starting address of the new interrupt loaded into the
PC.
For the MSP430 there is no special action per-
formed.

Que 3:
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Where does the interrupt starting address come from
when an ISR is to start execution?

Que 3 answer:
For each interrupt there is a unique entry in the In-
terrupt Vector Table. The entry is the starting ad-
dress of the ISR.

Que 4:
What is a critical section and how is it implemented?

Que 4 answer:
A critical section exists when any data may be cor-
rupted by access from the main program and any
ISR. In simple cases disabling all interrupts for the
duration of the time the data is being accessed by
the main program will work. If there are a number of
different critical sections associated with several
ISRs then it is appropriate to only disable the specif-
ic interrupt which could cause problems.

Que 5:
What conditions affect the Interrupt Latency expe-
rienced by an ISR?

Que5 answer:

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The longest period that an interrupt may be dis-
abled.
The period of time it takes to execute any interrupts
of a higher priority.
How long it takes for a program to stop what it is do-
ing and start executing the ISR.
How long it takes for the ISR to save the system
context and then to execute the code.

Que 6:
What is Foreground/Background processing and
how is it normally implemented?

Que 6 answer:
A timed interrupt routine handles the polling of input
information and any specific timed output opera-
tions. This is the Foreground task.
All remaining operations are handled in the Back-
ground task.

The Timer Subsystem

Que 8:
The timer overflow flag is set when the 16bit timer-
counter overflows. If the system clock is 25MHz and
a three bit prescaler is implemented as a binary

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power division operation. If the prescaler is %011
what is the time from one overflow to the next?

Que8 answer:
We divide the system clock by 8 so it is 3.125MHz or
0.32microsecs.
For a 16bit counter the count is 65536 for overflow
so the answer is
65536 * 0.32 microsecs = 20971.52 microsecs or
20.97152 millisecs.

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