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Understanding Atmega328P Microcontroller

(Lecture-9)

R S Ananda Murthy

Associate Professor
Department of Electrical & Electronics Engineering,
Sri Jayachamarajendra College of Engineering,
Mysore 570 006

R S Ananda Murthy Understanding Atmega328P Microcontroller


Specific Learning Outcomes

After completing this lecture, the student should be able to


Describe the general purpose registers in Atmega328P
MCU.
Describe the use of X, Y, and Z registers in Atmega328P
MCU.
Describe the ALU and data path in Atmega328P MCU.
Describe Status Register of Atmega328P MCU.
Describe the Stack Pointer in Atmega328P MCU.
Describe Power On Reset of Atmega328P MCU.
Describe AVR clock system in Atmega328P.
Describe power management features in Atmega328P.
Describe watch dog timer of Atmega328P.

R S Ananda Murthy Understanding Atmega328P Microcontroller


AVR CPU General Purpose Registers 328

D 7 . . . . . . . . . . . .D 2 D 1 D 0 Addr.
R0 0x00 Most instructions can access
R1 0x01 any register and complete
operation in one CPU clock cycle.
R2 0x02
...

...
There is also a 16-bit Stack Pointer.
R13 0x0D
R14 0x0E
R15 0x0F
Last three register pairs given below
R16 0x10 can be used as three 16-bit index
R17 0x11 registers to point at data memory.
... ...

R26 0x1A X Register Low-byte


R27 0x1B X Register High-byte
R28 0x1C Y Register Low-byte
R29 0x1D Y Register High-byte
R30 0x1E Z Register Low-byte
R31 0x1F Z Register High-byte

R S Ananda Murthy Understanding Atmega328P Microcontroller


X, Y, and Z Registers 16-bit Pointers to Data

15 XH XL 0
X-Register D7 . . . . . . . . . . D2 D1 D 0 D7 . . . . . . . . . . D2 D1 D 0
R27 (0x1B) R26 (0x1A)

15 YH YL 0
Y-Register D7 . . . . . . . . . . D2 D1 D 0 D7 . . . . . . . . . . D2 D1 D 0
R29 (0x1D) R28 (0x1C)

15 ZH ZL 0
Z-Register D7 . . . . . . . . . . D2 D1 D 0 D7 . . . . . . . . . . D2 D1 D 0
R31 (0x1F) R30 (0x1E)

Register pairs R27 and R26, R29 and R28, R31 and R30
known as X, Y, and Z registers can be used as 16-bit
address pointers for indirect addressing of the data space.

R S Ananda Murthy Understanding Atmega328P Microcontroller


Arithmetic Logic Unit (ALU) and Data Path

32 x 8 General
Purpose
Registers
Carry Bit
8 8

Status Register ALU


H, S, V, N, Z, C
Flags Result

Performs arithmetic, logical, or bit-function operations


between general purpose registers or between a register
and an immediate data within a single CPU clock cycle.
Can perform multiplication using on-chip 2-cycle multiplier.
Status Register is updated after all ALU operations, as
explained in the Instruction Set Reference.

R S Ananda Murthy Understanding Atmega328P Microcontroller


Status Register for Conditional Branching

Bit 7 6 5 4 3 2 1 0
0x3F (0x5F) I T H S V N Z C SREG
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0

I Global Interrupt Enable bit. Explained later.


T Bit Copy Storage. Explained later.
H Half carry flag. Explained later.
S Sign flag. S = N V. Explained later.
V Overflow flag. Explained later.
N The negative flag. N = MSB of result.
Z Zero flag. Z = 1 if result is 0. Z = 0 if result is 1.
C Carry flag. C = 1 if there is carry from D7.

R S Ananda Murthy Understanding Atmega328P Microcontroller


Stack in Atmega328P

The stack is a portion of data R/W memory which is mainly


used for storing temporary data, for storing local variables,
and for storing return addresses after interrupts and
subroutine calls.
The stack is implemented as Last-In-First-Out (LIFO),
growing from higher to lower memory locations.
The Stack Pointer points to the data R/W memory address
where the stack used by subroutine and Interrupt Service
Routine is located.
The Stack Pointer Register always points to the top of the
stack.
The Stack Pointer must be initialized with RAMEND, i.e.
the last address of the data R/W memory by the program
before any subroutine calls are executed or interrupts are
enabled.
R S Ananda Murthy Understanding Atmega328P Microcontroller
Stack Related Instructions

Working of stack and stack related instructions will be


explained later in more detail.

R S Ananda Murthy Understanding Atmega328P Microcontroller


SPH and SPL Registers

The Stack Pointer in AVR MCU is implemented as two 8-bit


registers in the SFR area.
The number of bits actually used is implementation
dependent.
Data space in some implementations of the AVR
architecture is so small that only SPL is needed. In this
case, the SPH Register will not be present.
In Atmega328P both SPH and SPL are present.

R S Ananda Murthy Understanding Atmega328P Microcontroller


Power On Reset (POR)

When Vcc is applied to the AVR microcontroller, it is


automatically reset.
This is known as Power On Reset (POR).
After POR, the Program Counter is loaded with the reset
address $0000 so that the instruction present in that
location is executed.
In Atmega328P, the user has to write a jump instruction
(JMP) at location $0000 to jump to the desired application.
Other events which can reset the MCU will be explained in
detail later.

R S Ananda Murthy Understanding Atmega328P Microcontroller


Clock Distribution in Atmega328P

R S Ananda Murthy Understanding Atmega328P Microcontroller


AVR Clock System

Clock Control Unit in side the chip generates clocks for


memory and IO devices.
Multiple clock signals are generated in side the chip.
All of the clocks need not be active at a given time.
In order to reduce power consumption, the clocks to
modules not being used can be halted by using different
sleep modes.
Default is internal 8 MHz R-C oscillator which is divided by
8 by prescaler to give a 1 MHz CPU clock.
Default CPU clock is only 5-10% accurate.
Option to use external crystal clock source (max 20 MHz)
is also available.
Selection of system clock by software will be explained later.

R S Ananda Murthy Understanding Atmega328P Microcontroller


Power Management Features in Atmega328P

Unused modules can be shut down to save power.


Six Sleep Modes Idle, ADC Noise Reduction,
Power-save, Power-down, Standby, and Extended Standby.
From power down mode the device can be made to wake
up on external reset or when the watchdog timer reset
occurs.
From power save mode the device can be made to wake
up on timer events.
Power management by software will be explained later.

R S Ananda Murthy Understanding Atmega328P Microcontroller


Watchdog Timer

When MCU is hanging due to any reason, the watchdog


timer will timeout and produce an internal reset signal to
load the Program Counter with the reset address $0000.
During normal operation, the MCU regularly restarts the
watchdog timer to prevent it from elapsing, or timing out.
More details about watchdog timer will be given later.

R S Ananda Murthy Understanding Atmega328P Microcontroller


License

This work is licensed under a


Creative Commons Attribution 4.0 International License.

R S Ananda Murthy Understanding Atmega328P Microcontroller

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