You are on page 1of 68

5 4 3 2 1

Project code: 91.4GW01.001(HM42-CP)


SYSTEM DC/DC
HM42-CP Block PCB P/N : 48.4GW01.011 X3
27Mhz
91.4GY01.001(JE40-CP)
91.4GZ01.001(SJV41-CP) RT8223
REVISION : -1 09920 91.4JD01.001(BA40-CP) INPUTS OUTPUTS
Diagram DCBATOUT
5V_S5
3D3V_S5
Clock Generator Intel CPU 24 49
RGB CRT
CRT
ICS9LRS3197AKLFT DDRIII Slot 0
D DDRII Channel A N11P-GE1 SYSTEM DC/DC D
3 800/1066 20
Arrandale N11M-GE1 RT8209E
LCD
PCI EXPRESS GRAPHIC LVDS 1CH
23
INPUTS OUTPUTS
DDRIII Slot 1 DDR II Channel B 4,5,..,9,10 WXGA+
21 X16
800/1066 Nvida 25 DCBATOUT 1D5V_S3
X2 HDMI
HDMI 50
14.318Mhz 22
FDIx8 DMIx4 SYSTEM DC/DC
RT8209E
INPUTS OUTPUTS
WEBCAM JE40_Power_ BD
23
Mini-Card 09738-1 1D05V_VTT
PCIE INTEL DCBATOUT 1D05V_S0
51
WLAN 38
BLUETOOTH
29
PCH HM42_Power_ BD SYSTEM DC/DC
RT9025
09737-1
Mini-Card 14 USB 2.0/1.1 ports USB 2.0 USB x 3 30
INPUTS OUTPUTS
USB 2.0
3G ETHERNET (10/100/1000Mb)
C 38 C

High Definition Audio SJV41_Power_ BD DCBATOUT 1D8V_S0


USB_BD 52
6 SATA ports 09740-1
Giga LAN 8 PCIE ports
09736-1 SYSTEM DC/DC
RJ45 PCIE ACPI 1.1
RT8209E
CONN 32 BCM57780 SJV41_LED_ BD INPUTS OUTPUTS
LPC I/F
31 09739-1
PCI/PCI BRIDGE DCBATOUT VGA_CORE
55
X1
X5
25Mhz Card Reader
25Mhz SD/MMC 37 SYSTEM DC/DC
AU 6433
37
MS/MS Pro/xD TPS5161
INPUTS OUTPUTS
MIC IN HD AUDIO
CODEC AZALIA SATA SATA HDD 26 DCBATOUT VCC_GFXCORE
INT MIC ALC272 33 47,48

B B
CPU DC/DC
PCB STACKUP ISL62882C
SPI INPUTS OUTPUTS
TOP SATA ODD 27
OP AMP 11,12,...,18,19 DCBATOUT VCC_CORE
GND 47,48
G1454 34
S X6
32.768Khz LPC Bus LPC debug 41
S Flash ROM CHARGER
GND LINE OUT 4MB 41 ISL88731C

BOTTOM KBC INPUTS OUTPUTS


X4 BA40_Power_ BD
ENE 3930 32.768Khz
SPI 09768-1
40 DCBATOUT BT+
2CH SPEAKER 53

A Diserete N11M A

Thermal Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Flash ROM Touch Int.
Sensor 39 Taipei Hsien 221, Taiwan, R.O.C.
128KB 41 PAD43 KB40 Title
G792
Block Diagram
CPU FAN Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 1 of 72
5 4 3 2 1
A B C D E
PCH Strapping Processor Strapping
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k Embedded DisplayPort.
- 10-k weak pull-up resistor. DisplayPort
Presence 0: Enabled - An external Display Port device is
INIT3_3V# Weak internal pull-down. Do not pull high. connected to the Embedded Display Port.
4 GNT3#/ Default Mode: Internal pull-up. CFG[3] PCI-Express Static 1: Normal Operation. 1
4
GPIO55 Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k weak Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
pull-down resistor).
CFG[0] PCI-Express 1: Single PCI-Express Graphics 1
INTVRMEN High (1) = Integrated VRM is enabled Configuration 0: Bifurcation enabled
Low (0) = Integrated VRM is disabled Select
GNT0#, Default (SPI): Left both GNT0# and GNT1# floating. No pull up
GNT1# required. CFG[7] Reserved - Clarksfield (only for early samples pre-ES1) - 0
Temporarily used Connect to GND with 3.01K Ohm/5% resistor
Boot from PCI: Connect GNT1# to ground with 1-k pull-down
resistor. Leave GNT0# Floating. for early Note: Only temporary for early CFD samples
Clarksfield (rPGA/BGA) [For details please refer to the WW33
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-k samples. MoW and sighting report].
pull-down resistor. For a common motherboard design (for AUB and CFD),
GNT2#/ Default - Internal pull-up. the pull-down resistor should be used. Does not
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers impact AUB functionality.
only. Not for mobile/desktops).

GPIO33 Default: Do not pull low.


Disable ME in Manufacturing Mode: Connect to ground with 1-k
pull-down resistor.

SPI_MOSI Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor.
3 Disable iTPM: Left floating, no pull-down required. 3
NV_ALE Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Disable Danbury: Connect to ground with 4.7-k weak pull-down
resistor.
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.
/GPIO[33] High (1) : Flash Descriptor Security will be in effect.
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC Weak internal pull-down. Do not pull high.
GPIO15 Weak internal pull-down. Do not pull high.
GPIO8 Weak internal pull-up. Do not pull low.
GPIO27 Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.

2 2
USB Table
PCIE Routing
Pair Device
LANE1 LAN 0 USB3
LANE2 MiniCard1 1 USB2
2 USB4
LANE3 MiniCard2 3 MINICARD1
4 WECAM
5 Touch Panel
6 NC
7 NC
8 NC
9 USB1(HS)
10 Finger Print <Variant Name>
1 11 Blue Tooth 1
12 MINIC2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
13 Cardreader Taipei Hsien 221, Taiwan, R.O.C.

Title

Table of Content
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 2 of 72
A B C D E

1D5V_S0_CLKGEN
0113 -1
1D5V_S0_CLKGEN
C366
1130 -SC

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C361 C359

SC10U6D3V3MX-GP
1D5V_S0 R3111 2
0R3J-0-U-GP 1D05V_S0

2
0R0603-PAD
0120 -1 1
R307
2

3D3V_S0 3D3V_S0

4 0R0603-PAD 1130 -SC 4


1 2 3D3V_CK505 1 DY 2 3D3V_CK505_IO R3061 2
R310 C360 C355 0R3J-0-U-GP

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C356 R308 C357 C358 C354
DY

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
0R3J-0-U-GP DY C353 DY

SC1U10V2ZY-GP
2

2
1130 -SC SA 0622 EMI

VGA_XIN1_L 1 2
OSC_SPREAD_L DY EC49
1 2 SC22P50V2JN-4GP
DY EC48 SC22P50V2JN-4GP

U16 1130 -SC


1D5V_S0_CLKGEN 1 10 CLK_PCIE_SATA_R 2 0R0402-PAD
1 R371 CLK_PCIE_SATA 12
3D3V_CK505 VDD96_1_5 SATAT_LR CLK_PCIE_SATA#_R2 0R0402-PAD R695
5 VDD27_3_3 SATAC_LR 11 1 CLK_PCIE_SATA# 12
3D3V_CK505_IO 15 VDDPCIEX_IO_LV
17 VDDPCIEX_1_5
18 3 DREFCLK_R 2 0R0402-PAD
1 R547 DREFCLK 12
VDDCPU_IO_LV DOT96T_LR DREFCLK#_R 0R0402-PADR411
1118 -SC 24
29
VDDCPU_1_5 DOT96C_LR 4 2 1 DREFCLK# 12
VDDREF_3_3
RNT1 23 CLK_CPU_BCLK_R 2 0R0402-PAD
1 R697 CLK_CPU_BCLK 12
3 VGA_XIN1_L CPUT_LR0 CLK_CPU_BCLK#_R0R0402-PAD R696 3
62 VGA_XIN1 1 4 6 27FIX CPUC_LR0 22 2 1 CLK_CPU_BCLK# 12
62 OSC_SPREAD SRN33J-5-GP-U 2 DY 3 OSC_SPREAD_L 7 20
27SS CPUT_LR1
CPUC_LR1 19

12,20,21 PCH_SMBCLK 32 SCLK_3_3


12,20,21 PCH_SMBDATA 31 13 CLKIN_DMI_R 2 0R0402-PAD
1 R367 CLKIN_DMI 12
SDATA_3_3 PCIEXT_LR CLKIN_DMI#_R
PCIEXC_LR 14 2 0R0402-PAD
1 R548 CLKIN_DMI# 12
GEN_XTAL_IN 28
GEN_XTAL_OUT X1
27 X2 GND96 2
GND27 8
GNDSATA 9
R316 CLK_EN 25 VTTPWRGD/PD#_3_3 GNDPCIEX 12 SA 0629 RF
FSC
12 CLK_ICH14 2 1 30 REF/FSLC GNDCPU 21
26
1130 -SC DY
C365 33R2J-2-GP CPU_STOP# GNDREF PCH_SMBDATA
16 NC#16 GND 33 1 2
1

3D3V_S0 ECT3 SC33P50V2JN-3GP


DY
SC4D7P50V2CN-1GP

DY
9LVS3197BKLFT-GP PCH_SMBCLK 1 2
2

71.93197.B03 ECT4 SC33P50V2JN-3GP

4
3
2ND = 71.08595.003
RN32
0113 -1 SRN10KJ-5-GP

1
2
CPU_STOP#
2 2

1118 -SC FSC 0 1


C364
SC12P50V2JN-3GP CLK_EN
1D05V_VTT 133MHz
1 2 GEN_XTAL_IN SPEED 100MHz
(Default) 1016 -SA Q18
1
1

R314 G VR_CLKEN# 47

. .
X2 10MR2J-L-GP R317
C363 X-14D31818M-50GP DY 2K2R2J-2-GP D
DY

.
.
.
SC12P50V2JN-3GP
2

S
1

1 2 GEN_XTAL_OUT_R 2 R313 1 GEN_XTAL_OUT


82.30005.A51 200R2J-L1-GP
FSC 2N7002E-1-GP
84.2N702.D31
2ND = 82.30005.901 2ND = 84.2N702.E31
2

3rd = 82.30005.B81
R315

SB 0813 CL = 10pF 2K2R2J-2-GP


Freq tolertance :+/- 30 ppm
1

1 UMA 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 3 of 72
A B C D E
5 4 3 2 1

D CPU1A 1 OF 9
B26 PEG_IRCOMP_R 1
R201
2 49D9R2F-GP
D
PEG_ICOMPI
PEG_ICOMPO A26
13 DMI_TXN0 A24 B27 R206
DMI_RX0# PEG_RCOMPO

AUBURNDALE
13 DMI_TXN1 C23 A25 EXP_RBIAS 1 2 750R2F-GP
DMI_RX1# PEG_RBIAS
13 DMI_TXN2 B22 DMI_RX2# PEG_RXN[15..0] 62
13 DMI_TXN3 A21 K35 PEG_RXN15
DMI_RX3# PEG_RX0# PEG_RXN14
PEG_RX1# J34
13 DMI_TXP0 B24 J33 PEG_RXN13
DMI_RX0 PEG_RX2# PEG_RXN12
13 DMI_TXP1 D23 DMI_RX1 PEG_RX3# G35

DMI
13 DMI_TXP2 B23 G32 PEG_RXN11
DMI_RX2 PEG_RX4# PEG_RXN10
13 DMI_TXP3 A22 DMI_RX3 PEG_RX5# F34
F31 PEG_RXN9
PEG_RX6# PEG_RXN8
13 DMI_RXN0 D24 DMI_TX0# PEG_RX7# D35
13 DMI_RXN1 G24 E33 PEG_RXN7
DMI_TX1# PEG_RX8# PEG_RXN6
13 DMI_RXN2 F23 DMI_TX2# PEG_RX9# C33
13 DMI_RXN3 H23 D32 PEG_RXN5
DMI_TX3# PEG_RX10# PEG_RXN4
PEG_RX11# B32
13 DMI_RXP0 D25 C31 PEG_RXN3
DMI_TX0 PEG_RX12# PEG_RXN2
13 DMI_RXP1 F24 DMI_TX1 PEG_RX13# B28
13 DMI_RXP2 E23 B30 PEG_RXN1
DMI_TX2 PEG_RX14# PEG_RXN0
13 DMI_RXP3 G23 DMI_TX3 PEG_RX15# A31

PEG_RXP15 PEG_RXP[15..0] 62
PEG_RX0 J35
H34 PEG_RXP14
PEG_RX1 PEG_RXP13
PEG_RX2 H33
13 FDI_TXN0 E22 F35 PEG_RXP12
FDI_TX0# PEG_RX3 PEG_RXP11
13 FDI_TXN1 D21 FDI_TX1# PEG_RX4 G33
13 FDI_TXN2 D19 E34 PEG_RXP10
FDI_TX2# PEG_RX5
C 13 FDI_TXN3 D18 FDI_TX3# PEG_RX6 F32 PEG_RXP9
C

Intel(R) FDI
13 FDI_TXN4 G21 D34 PEG_RXP8
FDI_TX4# PEG_RX7 PEG_RXP7
13 FDI_TXN5 E19 FDI_TX5# PEG_RX8 F33
13 FDI_TXN6 F21 B33 PEG_RXP6
FDI_TX6# PEG_RX9 PEG_RXP5
13 FDI_TXN7 G18 FDI_TX7# PEG_RX10 D31
A32 PEG_RXP4
PEG_RX11 PEG_RXP3
PEG_RX12 C30
13 FDI_TXP0 D22 A28 PEG_RXP2

PCI EXPRESS -- GRAPHICS


FDI_TX0 PEG_RX13 PEG_RXP1
13 FDI_TXP1 C21 FDI_TX1 PEG_RX14 B29
13 FDI_TXP2 D20 A30 PEG_RXP0
FDI_TX2 PEG_RX15
13 FDI_TXP3 C18 FDI_TX3 PEG_TXN[15..0] 62
13 FDI_TXP4 G22 L33 PEG_TXN15_L 1 2 C498
DIS_Muxless SCD1U10V2KX-5GP PEG_TXN15
FDI_TX4 PEG_TX0# PEG_TXN14_L
13 FDI_TXP5 E20 FDI_TX5 PEG_TX1# M35 1 2 C496
DIS_Muxless SCD1U10V2KX-5GP PEG_TXN14
13 FDI_TXP6 F20 M33 PEG_TXN13_L 1 2 C481
DIS_Muxless SCD1U10V2KX-5GP PEG_TXN13
FDI_TX6 PEG_TX2# PEG_TXN12_L
13 FDI_TXP7 G19 FDI_TX7 PEG_TX3# M30 1 2 C494
DIS_Muxless SCD1U10V2KX-5GP PEG_TXN12
L31 PEG_TXN11_L 2 C479
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN11
PEG_TX4# PEG_TXN10_L
13 FDI_FSYNC0 F17 FDI_FSYNC0 PEG_TX5# K32 1 2 C492
DIS_Muxless SCD1U10V2KX-5GP PEG_TXN10
E17 M29 PEG_TXN9_L 2 C477
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN9
13 FDI_FSYNC1 FDI_FSYNC1 PEG_TX6# PEG_TXN8_L
PEG_TX7# J31 2 C490
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN8
C17 K29 PEG_TXN7_L 2 C475
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN7
13 FDI_INT FDI_INT PEG_TX8# PEG_TXN6_L
PEG_TX9# H30 2 C488
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN6
F18 H29 PEG_TXN5_L 2 C473
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN5
13 FDI_LSYNC0 FDI_LSYNC0 PEG_TX10# PEG_TXN4_L
13 FDI_LSYNC1 D17 FDI_LSYNC1 PEG_TX11# F29 1 2 C500
DIS_Muxless SCD1U10V2KX-5GP PEG_TXN4
E28 PEG_TXN3_L 2 C502
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN3
PEG_TX12# PEG_TXN2_L
PEG_TX13# D29 2 C504
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN2
D27 PEG_TXN1_L 2 C506
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN1
PEG_TX14# PEG_TXN0_L
PEG_TX15# C26 2 C508
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXN0
1

PEG_TXP[15..0] 62
RN33 R481 L34 PEG_TXP15_L 2 C497
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP15
PEG_TX0
1 8 FDI_FSYNC1 DIS M34 PEG_TXP14_L 2 C495
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP14
B 2 7 FDI_LSYNC1
1KR2J-1-GP PEG_TX1
PEG_TX2 M32 PEG_TXP13_L 2 C480
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP13 B
3 6 FDI_LSYNC0 L30 PEG_TXP12_L 2 C493
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP12
2

PEG_TX3
4 5 FDI_FSYNC0 PEG_TX4 M31 PEG_TXP11_L 2 C478
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP11
K31 PEG_TXP10_L 2 C491
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP10
PEG_TX5 PEG_TXP9_L
SRN1KJ-4-GP
PEG_TX6 M28 1 2 C476
DIS_Muxless SCD1U10V2KX-5GP PEG_TXP9
DIS H31 PEG_TXP8_L 2 C489
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP8
PEG_TX7 PEG_TXP7_L
PEG_TX8 K28 2 C474
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP7
G30 PEG_TXP6_L 2 C487
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP6
PEG_TX9 PEG_TXP5_L
PEG_TX10 G29 2 C472
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP5
PEG_TXP4_L 2 C501
DIS_Muxless SCD1U10V2KX-5GP PEG_TXP4
1130 -SC PEG_TX11 F28
E27 PEG_TXP3_L
1
2 C503
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP3
PEG_TX12 PEG_TXP2_L
PEG_TX13 D28 2 C505
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP2
PEG_TXP1_L 2 C507
DIS_Muxless SCD1U10V2KX-5GP PEG_TXP1
For Graphics Disable , Pull-down to PEG_TX14 C27
C25 PEG_TXP0_L
1
2 C509
DIS_Muxless
1 SCD1U10V2KX-5GP PEG_TXP0
PEG_TX15
GND via 1-k 5% resistor
AUBURNF,CLARKUNF

62.10040.611
2ND = 62.10053.561 lab stuff 2nd,3rd and 4 th in BOM
3RD = 62.10055.341
4th = 62.10055.321 Eng add 1st source(62.10040.611)
0113 -1 Eng do not stuff 4 th in BOM
becasue 4 th have been purge ,so stuff 1st in BOM
A Del 3rd 62.10055.341 and 4th 62.10055.321 but CE said, 4th need stuff in PD if not any concern
Diserete N11M
A
3rd and 4th have been purged
CE will confrim SQM if it can add BOM
CE will release EC to add to BOM Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (1/7)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 4 of 72
5 4 3 2 1

1D05V_VTT CPU1B 2 OF 9
1 2 H_COMP3 AT23
R468 20R2F-GP COMP3 BCLK_CPU_P
BCLK A16 BCLK_CPU_P 16
1 2 H_CATERR# 1 2 H_COMP2 AT24 B16 BCLK_CPU_N BCLK_CPU_N 16
COMP2 BCLK#

AUBURNDALE
R241 49D9R2F-GP R466 20R2F-GP

MISC
CLOCKS
1 2 PROCHOT# 1 2 H_COMP1 G16 AR30
R189 68R2-GP R228 49D9R2F-GP COMP1 BCLK_ITP
BCLK_ITP# AT30
1 2 H_COMP0 AT26
R457 49D9R2F-GP COMP0 PEG_CLK_R
PEG_CLK E16 PEG_CLK_R 12
D16 PEG_CLK#_R PEG_CLK#_R 12
PEG_CLK#
D TPAD14-GP TP42 1 SKTOCC#_R AH24 SKTOCC#
A18 DPLL_REF_SSCLK SM_RCOMP_0 1 2
D
DPLL_REF_SSCLK DPLL_REF_SSCLK 12
A17 DPLL_REF_SSCLK# DPLL_REF_SSCLK# 12 R282 100R2F-L1-GP-U
H_CATERR# DPLL_REF_SSCLK# SM_RCOMP_1
AK14 CATERR# 1 2
R280 24D9R2F-L-GP

THERMAL
SM_RCOMP_2 1 2
F6 SM_DRAMRST# 16 R281 130R2F-1-GP
SM_DRAMRST# RN25 1D05V_VTT
16 H_PECI AT15 PECI
AL1 SM_RCOMP_0 SRN10KJ-5-GP
SM_RCOMP0 SM_RCOMP_1
SM_RCOMP1 AM1 1 4
AN1 SM_RCOMP_2 2 3
R194 1 SM_RCOMP2
47 H_PROCHOT# DY 2 0R2J-2-GP PROCHOT# AN26 PROCHOT#
PM_EXT_TS0# AN15 PM_EXTTS#0_R 20
PM_EXT_TS1# AP15 PM_EXTTS#1_R 21

DDR3
MISC
16,45 PM_THRMTRIP-A# AK15 THERMTRIP#

AT28 XDP_PRDY# 1 TP37 TPAD14-GP 1130 -SC


PRDY# XDP_PREQ#
PREQ# AP27
DPLL_REF_SSCLK R305 10R0402-PAD
2
AN28 XDP_TCLK DPLL_REF_SSCLK# R312 10R0402-PAD
2
TPAD14-GP TP39 H_CPURST# TCK XDP_TMS
1 AP26 RESET_OBS# TMS AP28

PWR MANAGEMENT
AT27 XDP_TRST#
TRST#

JTAG & BPM


AL15 AT29 XDP_TDI
13 H_PM_SYNC PM_SYNC TDI
AR27 XDP_TDO
TDO XDP_TDI_M
TDI_M AR29
16,59 H_PW RGD 1 R227 2 VCCPW RGOOD_1 AN14 VCCPWRGOOD_1 TDO_M AP29 XDP_TDO_M
C 0R0402-PAD
AN25 XDP_DBRESET# C
DBR#
1 R226 2 VCCPW RGOOD_0 AN27 VCCPWRGOOD_0
0R0402-PAD
1130 -SC AJ22
BPM0#
13 PM_DRAM_PW RGD 1 R242 2 DRAMPW ROK AK13 SM_DRAMPWROK BPM1# AK22
0R0402-PAD AK24
BPM2#
BPM3# AJ24
51 H_VTTPW RGD AM15 VTTPWRGOOD BPM4# AJ25
BPM5# AH22
BPM6# AK23
TPAD14-GP TP41 1 H_PW RGD_XDP AM26 AH23
TAPPWRGOOD BPM7#

15,30,36,37,40,41,45,59,62 PLT_RST# R232 1 2 PLT_RST#_R AL14 RSTIN#


1

1K5R2F-2-GP
R233
750R2F-GP AUBURNF,CLARKUNF
62.10040.611
2ND = 62.10053.561
2

3rd = 62.10055.341
4th = 62.10055.321
R295
PM_DRAM_PW RGD 1 2 PM_DRAM_PW RGD_1

1K5R2F-2-GP

B S3 B
1D5V_S0_DDR 1D5V_S0_DDR
CPU JTAG 3D3V_S0
1

1D05V_VTT
R271 R274
NON-S3 1K1R2F-GP DY 1K1R2F-GP XDP_TMS
R183
1 DY 2
51R2J-2-GP XDP_DBRESET# 1 2
XDP_TDI 1 DY 2 R197 1KR2J-1-GP
2

R451 51R2J-2-GP XDP_TDO_M


DRAMPW ROK PM_DRAM_PW RGD XDP_PREQ# 1 DY 2

2
R188 51R2J-2-GP
1

XDP_TDO 1 2 R169
R251 R294 R453 51R2J-2-GP 0R0402-PAD
NON-S3 3KR2F-GP
S3 750R2F-GP

1
XDP_TDI_M
0113 -1
2

XDP_TCLK 1 DY 2
R195 51R2J-2-GP

XDP_TRST# 1 2
R456 51R2J-2-GP

3D3V_S5

U11
A 45,52 1D5V_S0_PW RGD 1 B
UMA
A
VCC 5
2 A S3 PM_DRAM_PW RGD_1 Wistron Corporation
Y 4
3 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
GND Taipei Hsien 221, Taiwan, R.O.C.
74LVC1G08GW -1-GP
73.01G08.L04 Title
2ND = 73.7SZ08.DAH
CPU (2/7)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 5 of 72
5 4 3 2 1

CPU1D 4 OF 9

CPU1C 3 OF 9

AUBURNDALE
AUBURNDALE
21 M_B_DQ[63..0] SB_CK0 W8 M_CLK_DDR2 21
SB_CK0# W9 M_CLK_DDR#2 21
AA6 M_CLK_DDR0 20 M_B_DQ0 B5 M3 M_CKE2 21
SA_CK0 M_B_DQ1 SB_DQ0 SB_CKE0
20 M_A_DQ[63..0] SA_CK0# AA7 M_CLK_DDR#0 20 A5 SB_DQ1
P7 M_CKE0 20 M_B_DQ2 C3
M_A_DQ0 SA_CKE0 M_B_DQ3 SB_DQ2
A10 SA_DQ0 B3 SB_DQ3 SB_CK1 V7 M_CLK_DDR3 21
D M_A_DQ1 C10 M_B_DQ4 E4 V6 M_CLK_DDR#3 21 D
M_A_DQ2 SA_DQ1 M_B_DQ5 SB_DQ4 SB_CK1#
C7 SA_DQ2 A6 SB_DQ5 SB_CKE1 M2 M_CKE3 21
M_A_DQ3 A7 Y6 M_CLK_DDR1 20 M_B_DQ6 A4
M_A_DQ4 SA_DQ3 SA_CK1 M_B_DQ7 SB_DQ6
B10 SA_DQ4 SA_CK1# Y5 M_CLK_DDR#1 20 C4 SB_DQ7
M_A_DQ5 D10 P6 M_CKE1 20 M_B_DQ8 D1
M_A_DQ6 SA_DQ5 SA_CKE1 M_B_DQ9 SB_DQ8
E10 SA_DQ6 D2 SB_DQ9
M_A_DQ7 A8 M_B_DQ10 F2 AB8 M_CS#2 21
M_A_DQ8 SA_DQ7 M_B_DQ11 SB_DQ10 SB_CS0#
D8 SA_DQ8 F1 SB_DQ11 SB_CS1# AD6 M_CS#3 21
M_A_DQ9 F10 AE2 M_CS#0 20 M_B_DQ12 C2
M_A_DQ10 SA_DQ9 SA_CS0# M_B_DQ13 SB_DQ12
E6 SA_DQ10 SA_CS1# AE8 M_CS#1 20 F5 SB_DQ13
M_A_DQ11 F7 M_B_DQ14 F3
M_A_DQ12 SA_DQ11 M_B_DQ15 SB_DQ14
E9 SA_DQ12 G4 SB_DQ15 SB_ODT0 AC7 M_ODT2 21
M_A_DQ13 B7 M_B_DQ16 H6 AD1 M_ODT3 21
M_A_DQ14 SA_DQ13 M_B_DQ17 SB_DQ16 SB_ODT1
E7 SA_DQ14 SA_ODT0 AD8 M_ODT0 20 G2 SB_DQ17
M_A_DQ15 C6 AF9 M_ODT1 20 M_B_DQ18 J6
M_A_DQ16 SA_DQ15 SA_ODT1 M_B_DQ19 SB_DQ18
H10 SA_DQ16 J3 SB_DQ19
M_A_DQ17 G8 M_B_DQ20 G1 M_B_DM[7..0] 21
M_A_DQ18 SA_DQ17 M_B_DQ21 SB_DQ20 M_B_DM0
K7 SA_DQ18 G5 SB_DQ21 SB_DM0 D4
M_A_DQ19 J8 M_B_DQ22 J2 E1 M_B_DM1
M_A_DQ20 SA_DQ19 M_B_DQ23 SB_DQ22 SB_DM1 M_B_DM2
G7 SA_DQ20 J1 SB_DQ23 SB_DM2 H3
M_A_DQ21 G10 M_A_DM[7..0] 20 M_B_DQ24 J5 K1 M_B_DM3
M_A_DQ22 SA_DQ21 M_A_DM0 M_B_DQ25 SB_DQ24 SB_DM3 M_B_DM4
J7 SA_DQ22 SA_DM0 B9 K2 SB_DQ25 SB_DM4 AH1
M_A_DQ23 J10 D7 M_A_DM1 M_B_DQ26 L3 AL2 M_B_DM5
M_A_DQ24 SA_DQ23 SA_DM1 M_A_DM2 M_B_DQ27 SB_DQ26 SB_DM5 M_B_DM6
L7 SA_DQ24 SA_DM2 H7 M1 SB_DQ27 SB_DM6 AR4
M_A_DQ25 M6 M7 M_A_DM3 M_B_DQ28 K5 AT8 M_B_DM7
M_A_DQ26 SA_DQ25 SA_DM3 M_A_DM4 M_B_DQ29 SB_DQ28 SB_DM7
M8 SA_DQ26 SA_DM4 AG6 K4 SB_DQ29
M_A_DQ27 L9 AM7 M_A_DM5 M_B_DQ30 M4
M_A_DQ28 SA_DQ27 SA_DM5 M_A_DM6 M_B_DQ31 SB_DQ30
L6 SA_DQ28 SA_DM6 AN10 N5 SB_DQ31
M_A_DQ29 K8 AN13 M_A_DM7 M_B_DQ32 AF3
C M_A_DQ30 SA_DQ29 SA_DM7 M_B_DQ33 SB_DQ32 C
N8 SA_DQ30 AG1 SB_DQ33 M_B_DQS#[7..0] 21
M_A_DQ31 P9 M_B_DQ34 AJ3 D5 M_B_DQS#0
M_A_DQ32 SA_DQ31 M_B_DQ35 SB_DQ34 SB_DQS0# M_B_DQS#1
AH5 SA_DQ32 AK1 SB_DQ35 SB_DQS1# F4
M_A_DQ33 AF5 M_A_DQS#[7..0] 20 M_B_DQ36 AG4 J4 M_B_DQS#2
M_A_DQ34 SA_DQ33 M_A_DQS#0 M_B_DQ37 SB_DQ36 SB_DQS2# M_B_DQS#3
AK6 SA_DQ34 SA_DQS0# C9 AG3 SB_DQ37 SB_DQS3# L4
M_A_DQ35 AK7 F8 M_A_DQS#1 M_B_DQ38 AJ4 AH2 M_B_DQS#4
M_A_DQ36 SA_DQ35 SA_DQS1# M_A_DQS#2 M_B_DQ39 SB_DQ38 SB_DQS4# M_B_DQS#5
AF6 SA_DQ36 SA_DQS2# J9 AH4 SB_DQ39 SB_DQS5# AL4
M_A_DQ37 AG5 N9 M_A_DQS#3 M_B_DQ40 AK3 AR5 M_B_DQS#6
M_A_DQ38 SA_DQ37 SA_DQS3# M_A_DQS#4 M_B_DQ41 SB_DQ40 SB_DQS6# M_B_DQS#7
AJ7 AH7 AK4 AR8
DDR SYSTEM MEMORY A

M_A_DQ39 SA_DQ38 SA_DQS4# M_A_DQS#5 M_B_DQ42 SB_DQ41 SB_DQS7#


AJ6 AK9 AM6

DDR SYSTEM MEMORY - B


M_A_DQ40 SA_DQ39 SA_DQS5# M_A_DQS#6 M_B_DQ43 SB_DQ42
AJ10 SA_DQ40 SA_DQS6# AP11 AN2 SB_DQ43
M_A_DQ41 AJ9 AT13 M_A_DQS#7 M_B_DQ44 AK5
M_A_DQ42 SA_DQ41 SA_DQS7# M_B_DQ45 SB_DQ44
AL10 SA_DQ42 AK2 SB_DQ45
M_A_DQ43 AK12 M_B_DQ46 AM4
M_A_DQ44 SA_DQ43 M_B_DQ47 SB_DQ46
AK8 SA_DQ44 AM3 SB_DQ47 M_B_DQS[7..0] 21
M_A_DQ45 AL7 M_A_DQS[7..0] 20 M_B_DQ48 AP3 C5 M_B_DQS0
M_A_DQ46 SA_DQ45 M_A_DQS0 M_B_DQ49 SB_DQ48 SB_DQS0 M_B_DQS1
AK11 SA_DQ46 SA_DQS0 C8 AN5 SB_DQ49 SB_DQS1 E3
M_A_DQ47 AL8 F9 M_A_DQS1 M_B_DQ50 AT4 H4 M_B_DQS2
M_A_DQ48 SA_DQ47 SA_DQS1 M_A_DQS2 M_B_DQ51 SB_DQ50 SB_DQS2 M_B_DQS3
AN8 SA_DQ48 SA_DQS2 H9 AN6 SB_DQ51 SB_DQS3 M5
M_A_DQ49 AM10 M9 M_A_DQS3 M_B_DQ52 AN4 AG2 M_B_DQS4
M_A_DQ50 SA_DQ49 SA_DQS3 M_A_DQS4 M_B_DQ53 SB_DQ52 SB_DQS4 M_B_DQS5
AR11 SA_DQ50 SA_DQS4 AH8 AN3 SB_DQ53 SB_DQS5 AL5
M_A_DQ51 AL11 AK10 M_A_DQS5 M_B_DQ54 AT5 AP5 M_B_DQS6
M_A_DQ52 SA_DQ51 SA_DQS5 M_A_DQS6 M_B_DQ55 SB_DQ54 SB_DQS6 M_B_DQS7
AM9 SA_DQ52 SA_DQS6 AN11 AT6 SB_DQ55 SB_DQS7 AR7
M_A_DQ53 AN9 AR13 M_A_DQS7 M_B_DQ56 AN7
M_A_DQ54 SA_DQ53 SA_DQS7 M_B_DQ57 SB_DQ56
AT11 SA_DQ54 AP6 SB_DQ57
M_A_DQ55 AP12 M_B_DQ58 AP8
M_A_DQ56 SA_DQ55 M_B_DQ59 SB_DQ58
AM12 SA_DQ56 AT9 SB_DQ59
M_A_DQ57 AN12 M_A_A[15..0] 20 M_B_DQ60 AT7
M_A_DQ58 SA_DQ57 M_A_A0 M_B_DQ61 SB_DQ60
AM13 SA_DQ58 SA_MA0 Y3 AP9 SB_DQ61
B M_A_DQ59 M_A_A1 M_B_DQ62 B
AT14 SA_DQ59 SA_MA1 W1 AR10 SB_DQ62 M_B_A[15..0] 21
M_A_DQ60 AT12 AA8 M_A_A2 M_B_DQ63 AT10 U5 M_B_A0
M_A_DQ61 SA_DQ60 SA_MA2 M_A_A3 SB_DQ63 SB_MA0 M_B_A1
AL13 SA_DQ61 SA_MA3 AA3 SB_MA1 V2
M_A_DQ62 AR14 V1 M_A_A4 T5 M_B_A2
M_A_DQ63 SA_DQ62 SA_MA4 M_A_A5 SB_MA2 M_B_A3
AP14 SA_DQ63 SA_MA5 AA9 SB_MA3 V3
V8 M_A_A6 R1 M_B_A4
SA_MA6 M_A_A7 SB_MA4 M_B_A5
SA_MA7 T1 21 M_B_BS0 AB1 SB_BS0 SB_MA5 T8
Y9 M_A_A8 21 M_B_BS1 W5 R2 M_B_A6
SA_MA8 M_A_A9 SB_BS1 SB_MA6 M_B_A7
20 M_A_BS0 AC3 SA_BS0 SA_MA9 U6 21 M_B_BS2 R7 SB_BS2 SB_MA7 R6
20 M_A_BS1 AB2 AD4 M_A_A10 R4 M_B_A8
SA_BS1 SA_MA10 M_A_A11 SB_MA8 M_B_A9
20 M_A_BS2 U7 SA_BS2 SA_MA11 T2 SB_MA9 R5
U3 M_A_A12 21 M_B_CAS# AC5 AB5 M_B_A10
SA_MA12 M_A_A13 SB_CAS# SB_MA10 M_B_A11
SA_MA13 AG8 21 M_B_RAS# Y7 SB_RAS# SB_MA11 P3
T3 M_A_A14 21 M_B_W E# AC6 R3 M_B_A12
SA_MA14 M_A_A15 SB_WE# SB_MA12 M_B_A13
20 M_A_CAS# AE1 SA_CAS# SA_MA15 V9 SB_MA13 AF7
20 M_A_RAS# AB3 P5 M_B_A14
SA_RAS# SB_MA14 M_B_A15
20 M_A_W E# AE9 SA_WE# SB_MA15 N1

AUBURNF,CLARKUNF
62.10040.611
AUBURNF,CLARKUNF <Variant Name>
A 2ND = 62.10053.561 A
62.10040.611
3rd = 62.10055.341 2ND = 62.10053.561
4th = 62.10055.321 Wistron Corporation
3rd = 62.10055.341 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
4th = 62.10055.321
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (3/7)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 6 of 72
5 4 3 2 1
5 4 3 2 1

CPU1F 6 OF 9

AUBURNDALE
VCC_CORE
1D05V_VTT
PROCESSOR CORE POWER 1130 -SC
AG35 VCC VTT0 AH14
AG34 AH12 C275 C565 C541 C291 C543 C292 C267
VCC VTT0

1
AG33 AH11 DY
VCC_CORE 48A VCC VTT0

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AG32 VCC VTT0 AH10
D
1130 -SC 0111 -1 AG31 J14 D

2
VCC VTT0
AG30 VCC VTT0 J13
AG29 VCC VTT0 H14
AG28 VCC VTT0 H12
C522 C222 C212 C231 C524 C217 AG27 G14
VCC VTT0
1

1
AG26 VCC VTT0 G13
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
DY DY AF35 VCC VTT0 G12
AF34 G11
2

2
VCC VTT0
AF33 VCC VTT0 F14
AF32 VCC VTT0 F13
AF31 VCC VTT0 F12
AF30 VCC VTT0 F11
AF29 VCC VTT0 E14 The decoupling capacitors, filter
AF28 E12
AF27
VCC VTT0
D14 recommendations and sense resistors on the
VCC VTT0
AF26 VCC VTT0 D13 CPU/PCH Rails are specific to the CRB

1.1V RAIL POWER


AD35 VCC VTT0 D12
C268 C218 C523 DY C189 C519 C207 AD34 D11 Implementation. Customers need to follow the
VCC VTT0
1

1
AD33 VCC VTT0 C14 recommendations in the Calpella Platform
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
DY AD32 VCC VTT0 C13
AD31 C12 Design Guide.
2

VCC VTT0
AD30 VCC VTT0 C11
AD29 VCC VTT0 B14
AD28 VCC VTT0 B12
AD27 VCC VTT0 A14
AD26 VCC VTT0 A13
AC35 VCC VTT0 A12
AC34 VCC VTT0 A11
AC33 VCC
C520 C260 C239 C230 C199 C214 1D05V_VTT
AC32 VCC 1130 -SC
1

AC31 VCC
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C AC30 VCC VTT0 AF10 C


DY DY AC29 AE10
2

VCC VTT0 C303 C288


AC28 VCC VTT0 AC10

1
CPU CORE SUPPLY
AC27 VCC VTT0 AB10

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AC26 VCC VTT0 Y10 DY
AA35 W10
1130 -SC

2
VCC VTT0
AA34 VCC VTT0 U10
AA33 VCC VTT0 T10
AA32 J12 1D05V_VTT
VCC VTT0
AA31 VCC VTT0 J11
AA30 J16 +VTT_43 R677 1 2 0R0402-PAD
VCC VTT0 +VTT_44 R678 1
AA29 VCC VTT0 J15 2 0R0402-PAD
C200 C521 C211 C194 C252 C276 AA28 VCC
1

AA27 VCC
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

AA26 VCC
DY DY DY Y35
Please note that the VTT Rail
2

VCC
Y34 VCC
Y33
Y32
VCC Values are Auburndale
VCC
Y31 VCC VTT=1.05V; Clarksfield
Y30
Y29
VCC
VCC
VTT=1.1V
Y28 VCC
Y27 VCC
Y26 VCC
V35 VCC PSI# AN33 PSI# 47
V34 VCC
V33 VCC H_VID[6..0] 47
V32 AK35 H_VID0
VCC VID0 H_VID1
V31 VCC VID1 AK33
V30 POWER AK34 H_VID2
VCC VID2 H_VID3
B V29 VCC VID3 AL35 B
V28 VCC CPU VIDS VID4 AL33 H_VID4
V27 AM33 H_VID5
VCC VID5 H_VID6
V26 VCC VID6 AM35
U35 VCC PROC_DPRSLPVR AM34 PM_DPRSLPVR 47
U34 VCC
U33 VCC
U32 VCC
U31 G15 H_VTTVID1 1
VCC VTT_SELECT TP53 TPAD14-GP
U30 VCC
U29 VCC Clarksfield H_VTTVID1 = Low, VTT = 1.1V
U28
U27
VCC Arrandale H_VTTVID1 = High, VTT = 1.05V
VCC VCC_CORE
U26 VCC
R35 VCC
R34 VCC

1
R33 VCC
R32 AN35 IMVP_IMON 47 R129
VCC ISENSE 100R2F-L1-GP-U
R31 VCC
R30 VCC
R29

2
VCC
SENSE LINES

R28 VCC VCC_SENSE AJ34 VCC_SENSE 47


R27 VCC VSS_SENSE AJ35 VSS_SENSE 47
R26 VCC

1
P35 VCC
P34 B15 VTT_SENSE 51 R128
VCC VTT_SENSE TP_VSS_SENSE_VTT 1 100R2F-L1-GP-U
P33 VCC VSS_SENSE_VTT A15
P32 TP51 TPAD14-GP
VCC
P31

2
VCC
P30 VCC
P29 VCC
A P28 VCC <Variant Name> A
P27 VCC
P26 VCC
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (4/7)
AUBURNF,CLARKUNF Size Document Number Rev
62.10040.611 Custom
HM42-CP SC
2ND = 62.10053.561 3rd = 62.10055.341 4th = 62.10055.321 Date: Friday, January 22, 2010 Sheet 7 of 72

5 4 3 2 1
5 4 3 2 1

VCC_GFXCORE
CPU1G 7 OF 9
15A AT21 VAXG1

AUBURNDALE
D AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE 54 D

SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE 54
AT16 VAXG4
C528 C536 C540 C526 AR21 VAXG5

1
AR19 VAXG6

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AR18 VAXG7
UMA_Muxless AR16 AM22 GFX_VID0

2
VAXG8 GFX_VID0 GFX_VID1
UMA_Muxless AP21 VAXG9 GFX_VID1 AP22
1D5V_S3

GRAPHICS VIDs
UMA_Muxless AP19 AN22 GFX_VID2
VAXG10 GFX_VID2 GFX_VID3
UMA_Muxless AP18 VAXG11 GFX_VID3 AP23 GFX_VID[6..0] 54
AP16 AM23 GFX_VID4
VAXG12 GFX_VID4 GFX_VID5
AN21 VAXG13 GFX_VID5 AP24

2
GRAPHICS
AN19 AN24 GFX_VID6
VAXG14 GFX_VID6 R542 R541 R540 R292
AN18 VAXG15

0R3J-0-U-GP

0R3J-0-U-GP

0R3J-0-U-GP

0R3J-0-U-GP
AN16 VAXG16
AM21 VAXG17 GFX_VR_EN AR25 GFX_VR_EN 54
AM19 AT25 GFX_DPRSLPVR 54

1
VAXG18 GFX_DPRSLPVR
AM18 VAXG19 GFX_IMON AM24 GFX_IMON 54
AM16 VAXG20
AL21 VAXG21 1 R205 2
VCC_GFXCORE AL19 1KR2J-1-GP NON-S3 NON-S3 NON-S3 NON-S3
VAXG22
AL18 VAXG23 DIS
AL16 VAXG24
AK21 VAXG25 VDDQ AJ1 1D5V_S0_DDR
AK19 AF1 C299 C307 C301 C305
VAXG26 VDDQ
2

1
AK18 AE7 C300 C297 C302 C306

- 1.5V RAILS
VAXG27 VDDQ

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
R215 R483 R216 R472 AK16 AE4 R543
VAXG28 VDDQ

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
DY DY 220R2F-GP
0R3J-0-U-GP 0R3J-0-U-GP 0R3J-0-U-GP 0R3J-0-U-GP AJ21 AC1 S3

2
VAXG29 VDDQ
AJ19 AB7
C DIS DIS DIS DIS AJ18
VAXG30 VDDQ
AB4 C
1

2
VAXG31 VDDQ
AJ16 VAXG32 VDDQ Y1
AH21 VAXG33 VDDQ W7
AH19 W4 PM_SLP_S3_CTL_D
VAXG34 VDDQ
AH18 VAXG35 VDDQ U1
AH16 VAXG36 VDDQ T7
T4
VDDQ
VDDQ 3A for Auburndale

POWER
VDDQ P1
VDDQ N7
Please note that the VTT Rail
1D05V_VTT
VDDQ N4
VDDQ 6A for Clarksfield Q44

DDR3
VDDQ L1
Values are Auburndale J24 H1 13,20 PM_SLP_S3_CTL G

. .
VTT1 VDDQ

FDI
J23 VTT1
VTT=1.05V; Clarksfield C548 DY H25 D

.
.
.
VTT1
1

C294
VTT=1.1V
SC10U6D3V3MX-GP

S S3
SC1U6D3V2KX-GP

P10
2

VTT1 1D05V_VTT
VTT1 N10 2N7002E-1-GP
VTT1 L10
K10 84.2N702.D31
VTT1 C569 2ND = 84.2N702.E31

1
C296

SC10U6D3V3MX-GP
DY

SC1U6D3V2KX-GP
1D05V_VTT 1016 -SB
18A

2
1.1V
SA 0626 1130 -SC VTT1 J22
K26 VTT1 VTT1 J20
J27 VTT1 VTT1 J18
1D05V_VTT

PEG & DMI


C549 C529 C537 J26 H21
VTT1 VTT1
1

TC18 DY J25 H20


B VTT1 VTT1 B
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C289 H27 H19


VTT1 VTT1
ST220U2D5VBM-2GP

DY G28 C293
2

VTT1

1
G27 C295 DY
VTT1
SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
G26 VTT1

SC1U6D3V2KX-GP
F26

2
VTT1
E26 VTT1 VTT1 L26

1.8V
E25 VTT1 VTT1 L27
VTT1 M26
1130 -SC 1D8V_S0

+V1.8S_VCCSFR
0.6A R147 10R0603-PAD
2
C228 C251

1
C250 C236 C227

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP
AUBURNF,CLARKUNF DY

2
62.10040.611
2ND = 62.10053.561
3rd = 62.10055.341
4th = 62.10055.321

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (5/7)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 8 of 72
5 4 3 2 1
5 4 3 2 1

CPU1H 8 OF 9
CPU1I 9 OF 9
AT20 VSS VSS AE34
AT17 VSS VSS AE33

AUBURNDALE
AR31 VSS VSS AE32

AUBURNDALE
AR28 VSS VSS AE31 K27 VSS
AR26 VSS VSS AE30 K9 VSS
AR24 VSS VSS AE29 K6 VSS
AR23 VSS VSS AE28 K3 VSS
D AR20 VSS VSS AE27 J32 VSS D
AR17 VSS VSS AE26 J30 VSS
AR15 VSS VSS AE6 J21 VSS
AR12 VSS VSS AD10 J19 VSS
AR9 VSS VSS AC8 H35 VSS
AR6 VSS VSS AC4 H32 VSS
AR3 VSS VSS AC2 H28 VSS
AP20 VSS VSS AB35 H26 VSS
AP17 VSS VSS AB34 H24 VSS
AP13 VSS VSS AB33 H22 VSS
AP10 VSS VSS AB32 H18 VSS
AP7 VSS VSS AB31 H15 VSS
AP4 VSS VSS AB30 H13 VSS
AP2 VSS VSS AB29 H11 VSS
AN34 VSS VSS AB28 H8 VSS
AN31 VSS VSS AB27 H5 VSS
AN23 VSS VSS AB26 H2 VSS
AN20 VSS VSS AB6 G34 VSS
AN17 VSS VSS AA10 G31 VSS
AM29 VSS VSS Y8 G20 VSS
AM27 VSS VSS Y4 G9 VSS
AM25 VSS VSS Y2 G6 VSS
AM20 VSS VSS W35 G3 VSS
AM17 VSS VSS W34 F30 VSS
AM14 VSS VSS W33 F27 VSS
AM11 VSS VSS W32 F25 VSS
AM8 VSS VSS W31 F22 VSS
AM5 VSS VSS W30 F19 VSS
AM2 VSS VSS W29 F16 VSS
C AL34 W28 E35 C
AL31
AL23
VSS
VSS
VSS
VSS VSS
VSS
VSS
W27
W26
E32
E29
VSS
VSS
VSS VSS
AL20 VSS VSS W6 E24 VSS
AL17 VSS VSS V10 E21 VSS
AL12 VSS VSS U8 E18 VSS
AL9 VSS VSS U4 E13 VSS
AL6 VSS VSS U2 E11 VSS
AL3 VSS VSS T35 E8 VSS
AK29 VSS VSS T34 E5 VSS
AK27 VSS VSS T33 E2 VSS VSS_NCTF#AR34 AR34
AK25 VSS VSS T32 D33 VSS VSS_NCTF#B34 B34
AK20 T31 D30 B2

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
VSS VSS VSS VSS_NCTF#B2

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AK17 VSS VSS T30 D26 VSS
AJ31 VSS VSS T29 D9 VSS
AJ23 T28 D6 B1 TP_MCP_VSS_NCTF6 1 TP93 AFTE14P-GP
VSS VSS VSS VSS_NCTF#B1 TP_MCP_VSS_NCTF1 TP84 AFTE14P-GP
AJ20 VSS VSS T27 D3 VSS VSS_NCTF#A35 A35 1
AJ17 T26 C34 AT1 TP_MCP_VSS_NCTF2 1 TP92 AFTE14P-GP
VSS VSS VSS VSS_NCTF#AT1 TP_MCP_VSS_NCTF7 TP83 AFTE14P-GP
AJ14 VSS VSS T6 C32 VSS VSS_NCTF#AT35 AT35 1
AJ11 VSS VSS R10 C29 VSS RSVD_NCTF#AT33 AT33
AJ8 VSS VSS P8 C28 VSS RSVD_NCTF#AT34 AT34
AJ5 VSS VSS P4 C24 VSS RSVD_NCTF#AP35 AP35
AJ2 VSS VSS P2 C22 VSS RSVD_NCTF#AR35 AR35
AH35 VSS VSS N35 C20 VSS RSVD_NCTF#AT3 AT3
AH34 VSS VSS N34 C19 VSS RSVD_NCTF#AR1 AR1
AH33 VSS VSS N33 C16 VSS RSVD_NCTF#AP1 AP1
AH32 VSS VSS N32 B31 VSS RSVD_NCTF#AT2 AT2
AH31 VSS VSS N31 B25 VSS RSVD_NCTF#C1 C1

NCTF TEST PIN:


AH30 VSS VSS N30 B21 VSS RSVD_NCTF#A3 A3
B B
AH29 VSS VSS N29 B18 VSS RSVD_NCTF#C35 C35
AH28 VSS VSS N28 B17 VSS RSVD_NCTF#B35 B35
AH27 VSS VSS N27 B13 VSS RSVD_NCTF#A34 A34
AH26 VSS VSS N26 B11 VSS RSVD_NCTF#A33 A33
AH20 VSS VSS N6 B8 VSS
AH17 VSS VSS M10 B6 VSS
AH13 VSS VSS L35 B4 VSS
AH9 VSS VSS L32 A29 VSS
AH6 VSS VSS L29 A27 VSS
AH3 VSS VSS L8 A23 VSS
AG10 VSS VSS L5 A9 VSS
AF8 VSS VSS L2
AF4 VSS VSS K34
AF2 VSS VSS K33
AE35 VSS VSS K30

AUBURNF,CLARKUNF
62.10040.611 AUBURNF,CLARKUNF
2ND = 62.10053.561 62.10040.611
2ND = 62.10053.561
3rd = 62.10055.341
4th = 62.10055.321 3rd = 62.10055.341
4th = 62.10055.321

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (6/7)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 9 of 72
5 4 3 2 1
5 4 3 2 1

CPU1E 5 OF 9
Processor Strapping
D D
AJ13 CFG0 PCI-Express Configuration Select
RSVD#AJ13

AUBURNDALE
RSVD#AJ12 AJ12

1
AP25 R160 1:Single PEG(Default)
SO-DIMM VREFDQ (M3) Circuit AL25
RSVD#AP25
RSVD#AL25 RSVD#AH25 AH25 DY 3KR2F-GP CFG0 0:Bifurcation enabled
AL24 AK26
for Clarksfield Processor AL22
RSVD#AL24 RSVD#AK26

2
RSVD#AL22
AJ33 RSVD#AJ33 RSVD#AL26 AL26
AG9 RSVD#AG9 RSVD_NCTF#AR2 AR2
DY M27 RSVD#M27
SA 0623
RN18 L28 AJ26
H_RSVD9_R RSVD#L28 RSVD#AJ26
20 M_VREF_DQ_DIMM0 1 4 J17 SA_DIMM_VREF# RSVD#AJ27 AJ27
21 M_VREF_DQ_DIMM1 2 3 H_RSVD10_R H17 CFG3 CFG3 - PCI-Express Static Lane Reversal
SB_DIMM_VREF#
G25 RSVD#G25

1
SRN0J-10-GP-U G17 RSVD#G17 R135
E31 RSVD#E31 1 :Normal Operation(Default)
E30 3KR2F-GP CFG3
RSVD#E30 0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

2
RSVD#AL28 AL28
CFG0 AM30 AL29
CFG1 CFG0 RSVD#AL29 CFG4
1 AM28 CFG1 RSVD#AP30 AP30 CFG4 - Display Port Presence
TPAD14-GP TP33 1 CFG2 AP31 AP32
CFG2 RSVD#AP32

1
TPAD14-GP TP22 CFG3 AL32 AL27
C CFG4 CFG3 RSVD#AL27 R148 C
AL30 CFG4 RSVD#AT31 AT31 1:Disabled; No Physical Display Port
1 CFG5 AM31 AT32 DY 3KR2F-GP CFG4
TPAD14-GP TP24 1 CFG6 AN29
CFG5 RSVD#AT32
AP33
attached to Embedded Display Port
CFG6 RSVD#AP33
TPAD14-GP TP29 CFG7 AM32 AR33 (Default)

2
CFG8 CFG7 RSVD#AR33
1 AK32 CFG8 0:Enabled; An external Display Port
TPAD14-GP TP20 1 CFG9 AK31

RESERVED
TPAD14-GP TP25 CFG10 CFG9 device is connected to the Embedded
1 AK28 CFG10
TPAD14-GP TP32 1 CFG11 AJ28 Display Port
TPAD14-GP TP34 CFG12 CFG11
1 AN30 CFG12 RSVD#AR32 AR32
TPAD14-GP TP30 1 CFG13 AN32
TPAD14-GP TP23 CFG14 CFG13
1 AJ32 CFG14
TPAD14-GP TP21 1 CFG15 AJ29 E15
TPAD14-GP TP31 CFG16 CFG15 RSVD_TP#E15
1 AJ30 CFG16 RSVD_TP#F15 F15
TPAD14-GP TP27 1 CFG17 AK30 A2 CFG7 CFG7(Reserved) - Temporarily used for early
TPAD14-GP TP28 CFG17 KEY
H16 D15
RSVD_TP#H16 RSVD#D15 Clarksfield samples.

1
RSVD#C15 C15
AJ15 RSVD64_R R681 10R0402-PAD
2 R141
RSVD#AJ15 RSVD65_R R682 10R0402-PAD 3KR2F-GP
RSVD#AH15 AH15 2 DY CFG7 Clarksfield (only for early samples pre-ES1) -
B19
Connect to GND with 3.01K Ohm/5% resistor.

2
RSVD#B19
A19 RSVD#A19
Note: Only temporary for early CFD sample
R679 10R0402-PAD H_RSVD17_R
2
R680 10R0402-PAD
2 H_RSVD18_R
A20
B20
RSVD#A20 1130 -SC (rPGA/BGA) [For details please refer to the
RSVD#B20
RSVD_TP#AA5 AA5 WW33 MoW and sighting report].
U9 RSVD#U9 RSVD_TP#AA4 AA4 For a common M/B design (for AUB and CFD),
T9 RSVD#T9 RSVD_TP#R8 R8
AD3 the pull-down resistor shouble be used. Does
RSVD_TP#AD3
B 1130 -SC AC9
AB9
RSVD#AC9 RSVD_TP#AD2 AD2
AA2
not impact AUB functionality. B
RSVD#AB9 RSVD_TP#AA2
RSVD_TP#AA1 AA1
RSVD_TP#R9 R9
RSVD_TP#AG7 AG7
RSVD_TP#AE3 AE3

RSVD_TP#V4 V4
RSVD_TP#V5 V5
RSVD_TP#N2 N2
J29 RSVD#J29 RSVD_TP#AD5 AD5 VSS (AP34) can be left NC is
J28 AD7
RSVD#J28 RSVD_TP#AD7
W3 CRB implementation; EDS/DG
RSVD_TP#W3
RSVD_TP#W2 W2 recommendation to GND.
RSVD_TP#N3 N3
RSVD_TP#AE5 AE5
RSVD_TP#AD9 AD9
R125
AP34 RSVD_VSS 1 2
VSS

0R0402-PAD

AUBURNF,CLARKUNF
62.10040.611 0113 -1
2ND = 62.10053.561
A 3rd = 62.10055.341 <Variant Name> A
4th = 62.10055.321

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (7/7)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 10 of 72
5 4 3 2 1
5 4 3 2 1

RTC_AUX_S5
ICH_RTCX1 RTC_AUX_S5
integrated VccSus1_05,VccSus1_5,VccCL1_5
1 2 ICH_RTCX2 INTVRMEN High=Enable Low=Disable
R482 RN55 1 2 SM_INTRUDER#
10MR2J-L-GP 2 3 R470 INTVRMEN- Integrated SUS integrated VccLan1_05VccCL1_05
1 4 1MR2J-1-GP
1.1V VRM Enable LAN100_SLP High=Enable Low=Disable

1
C527 1 2 ICH_INTVRMEN High - Enable internal VRs
SRN20KJ-GP-U R475

SC1U6D3V2KX-GP
X6 330KR2F-L-GP

2
D 4 1 PCH1A 1 OF 10 D

ICH_RTCX1 B13 D33


RTCX1 FWH0/LAD0 LPC_LAD0 40,41
1

1
SA 0629 RF ICH_RTCX2 D13 RTCX2 FWH1/LAD1 B33 LPC_LAD1 40,41
C547 3 2 C544 C32
SC6P50V2CN-1GP FWH2/LAD2 LPC_LAD2 40,41
A32
SC6P50V2CN-1GP

LPC_LAD3 40,41
2

2
ICH_RTCRST# FWH3/LAD3
C14 RTCRST#
ACZ_RST# 1 2 SRTCRST# new signal Pin C34
FWH4/LFRAME# LPC_LFRAME# 40,41

2
DY ECT5 SC33P50V2JN-3GP SRTCRST# D17 SRTCRST#

1
X-32D768KHZ-34GPU ACZ_SYNC 1 2 C530 G59 A34

RTC

LPC
LDRQ0#
DY ECT7 SC33P50V2JN-3GP GAP-OPEN SM_INTRUDER# A16 INTRUDER# LDRQ1#/GPIO23 F34 PCH_GPIO23 1

SC1U6D3V2KX-GP
82.30001.661 ACZ_BIT_CLK 1 2 TP35 TPAD14-GP

2
2nd = 82.30001.B21 DY ECT6 SC33P50V2JN-3GP ICH_INTVRMEN A14 AB9 INT_SERIRQ INT_SERIRQ 16,40

1
ACZ_SDATAOUT INTVRMEN SERIRQ
CL = 7pF 1
DY ECT8
2
SC33P50V2JN-3GP
Freq tolertance :+/- 20 ppm ACZ_BIT_CLK A30 HDA_BCLK
1202 -SC ACZ_SYNC D29
SATA0RXN AK7
AK6
SATA_RXN0
SATA_RXP0
26
26 HDD
HDA_SYNC SATA0RXP
SATA0TXN AK11 SATA_TXN0 26
32 ACZ_RST#_AUDIO R455 2 1 10R2J-2-GP ACZ_RST# 32 ACZ_SPKR P1 AK9 SATA_TXP0 26
R461 10R2J-2-GP ACZ_SYNC SPKR SATA0TXP
32 ACZ_SYNC_AUDIO 2 1
32 ACZ_BITCLK_AUDIO R458 2 1 10R2J-2-GP ACZ_BIT_CLK ACZ_RST# C30
R463 33R2J-2-GP ACZ_SDATAOUT HDA_RST#
32 ACZ_SDATAOUT_AUDIO 2 1 SATA1RXN AH6
SATA1RXP AH5
1117 -SC 32 ACZ_SDATAIN0 G30 HDA_SDIN0 SATA1TXN AH9
SIV fail when stuff 10-ohm, 1 ACZ_SDATAIN1 F30
SATA1TXP AH8
HDA_SDIN1
C
fine tune 33-ohm for solving TPAD14-GP TP40
1 HDA_SDIN2 E32
SATA2RXN AF11
AF9 C

IHDA
TP38 HDA_SDIN2 SATA2RXP
33-ohm is required for intel recommend, TPAD14-GP SATA2TXN AF7
HM4-CP SA F32 HDA_SDIN3 SATA2TXP AF6
real value base on fine tune result AH3
ACZ_SDATAOUT SATA3RXN
1130 -SC B29 HDA_SDO SATA3RXP AH1
AF3
SATA3TXN
SATA3TXP AF1
NO REBOOT STRAP 40 ME_UNLOCK# 1 R182 2 HDA_DOCK_EN# H32

SATA
0R0402-PAD HDA_DOCK_EN#/GPIO33
SATA4RXN AD9 SATA_RXN4 27
J30 AD8
3D3V_S0 1
R187
2
8K2R2J-3-GP
HDA_DOCK_RST#/GPIO13 SATA4RXP
SATA4TXN AD6
SATA_RXP4
SATA_TXN4
27
27 ODD
SATA4TXP AD5 SATA_TXP4 27
ACZ_SPKR DY PCH_JTAG_TCK
1
R516
DY 1KR2J-1-GP
2 M3 JTAG_TCK SATA5RXN AD3
SATA5RXP AD1
PCH_JTAG_TMS K3 AB3
JTAG_TMS SATA5TXN
SATA5TXP AB1
PCH_JTAG_TDI K1 JTAG_TDI 1D05V_S0
No Reboot Strap R23

JTAG
Low = Default PCH_JTAG_TDO
HDA_SPKR High = No Reboot
0113 -1 J2 JTAG_TDO SATAICOMPO AF16

SPI_CS0#, SPI_MISO, SPI_MOSI, SPI_CLK: PCH_JTAG_RST# J4 TRST# SATAICOMPI AF15 SATAICOMP 1 2


No series resistor required if routing length is 1.5"-6.5" R219
37D4R2F-GP
RN81
41 PCH_SPI_CS#0 PCH_SPI_CS#0 1 8 SPI_CLK_R BA2 SPI_CLK
SA 0709 2 7
41 PCH_SPI_MOSI PCH_SPI_MOSI 3 6 SPI_CS#0_R AV3
B PCH_SPI_CLK SPI_CS0# B
41 PCH_SPI_CLK 4 5
For after PCH stepping B3,have to DY, AY3 SPI_CS1# SATALED# T3 SATA_LED# SATA_LED# 16,44
SRN15J-1-GP

1113 -SC 3D3V_S5


SPI_MOSI_R AY1 SPI_MOSI SATA0GP/GPIO21 Y9 SATA_DET#0_R

SPI
41 SPI_MOSO_R SPI_MOSO_R AV1 V1 SATA_DET#1_R
SPI_MISO SATA1GP/GPIO19
PCH_JTAG_TMS
DY
1 R512 2
200R2J-L1-GP IBEXPEAK-M-GP-NF

PCH_JTAG_TDO
DY
1 R509 2 PCH Strapping PCH 1 stuff 71.0IBEX.G0U
200R2J-L1-GP 3D3V_AUX_S5

PCH_JTAG_TDI
DY
R513 RTC_AUX_S5 RTC_BAT
1 2 SPI_MOSI Enable iTPM: Connect to Vcc3_3 with D10
200R2J-L1-GP 2 RTC1 RN28 3D3V_S0
8.2-k weak pull-up resistor.
PCH_JTAG_RST# 1 DY 2 Disable iTPM: Left floating, no 1 2 RTC_PW R_L 3 MLX-CON2-13-GP SATA_DET#0_R 5 4
R235 10KR2J-3-GP R298 0R3J-0-U-GP 4 6 3
pull-down required
1

1 RTC_PW R 1 2 2 SATA_DET#1_R 7 2
C330 R297 16 PCH_GPIO48 PCH_GPIO48 8 1
3D3V_S0 SC1U10V2ZY-GP 1KR2J-1-GP 1
2

DY BAS40CW -GP 3
PCH_JTAG_TMS 1 R511 2 1 DY 2 SPI_MOSI_R 83.00040.E81 SRN10KJ-7GP
100R2J-2-GP R250 8K2R2J-3-GP 2nd = 83.00040.M81
DY 3rd = 83.00040.R81 20.F1035.002
PCH_JTAG_TDO 1 R510 2 2nd = 20.F0772.002
100R2J-2-GP 3rd = 21.D0300.102
A DY 83.00040.Q81 is ROHS parts UMA A
PCH_JTAG_TDI R514
1 2
100R2J-2-GP 83.00040.R81 is Halogens free Part 1130 -SC 4th = 20.F1729.002
arrange qual in Eng SKU 0113 -1
PCH_JTAG_RST# 1 DY 2 Wistron Corporation
R240 51R2F-2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PCH_JTAG_TCK 1 2
R515 51R2F-2-GP Title

PCH (1/9)
Size Document Number Rev
A3
When unused all JTAG pins may be NC
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 11 of 72
5 4 3 2 1
5 4 3 2 1

3D3V_S5

8
7
6
5
PCH1B 2 OF 10
1105 -SC SRN10KJ-7GP
PCIE_RXN1 BG30 B9 PCH_GPIO11 RN56
30 PCIE_RXN1 PERN1 SMBALERT#/GPIO11 PCH_GPIO11 16
PCIE_RXP1
LAN BJ30

1
2
3
4
30 PCIE_RXP1 SCD1U10V2KX-5GP 2 PERP1
30 PCIE_TXN1 1 C198 TXN1 BF29 PETN1 SMBCLK H14 SMB_CLK 37
30 PCIE_TXP1 SCD1U10V2KX-5GP 2 1 C197 TXP1 BH29 PETP1
SMBDATA C8 SMB_DATA 37
D PCIE_RXN2 AW30 SML0_CLK KBC_SDA1 D
37 PCIE_RXN2 PCIE_RXP2 PERN2
MINICARD1 37 PCIE_RXP2 SCD1U10V2KX-5GP 2 1 C219 TXN2
BA30
BC30
PERP2
J14 PCH_GPIO60 SML0_DATA KBC_SCL1
37 PCIE_TXN2 PETN2 SML0ALERT#/GPIO60 PCH_GPIO60 16
37 PCIE_TXP2 SCD1U10V2KX-5GP 2 1 C223 TXP2 BD30 PETP2 SML0_CLK
SML0CLK C6
37 PCIE_RXN3 AU30 if use ENE KBC stuff 2.2K-ohm

SMBus
PERN3 SML0_DATA
37 PCIE_RXP3 AT30 PERP3 SML0DATA G8 3D3V_S5 3D3V_S0
MINICARD2 37 PCIE_TXN3 SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2
1 C216
1 C221
TXN3
TXP3
AU32
AV32
PETN3 thermal IC will be abnormal
37 PCIE_TXP3 PETP3

8
7
6
5
M14 PCH_GPIO74 PCH_GPIO74 13
SML1ALERT#/GPIO74 RN60
BA32 PERN4
BB32 E10 KBC_SCL1 SRN2K2J-2-GP
PERP4 SML1CLK/GPIO58 KBC_SCL1 40
BD32 PETN4
BE32 G12 KBC_SDA1 3D3V_S0
PETP4 SML1DATA/GPIO75 KBC_SDA1 40

PCI-E*

1
2
3
4
BF33 SMB_CLK
PERN5 CL_CLK SMB_DATA
BH33 PERP5 CL_CLK1 T13 1

Controller
BG32 TP44 TPAD14-GP
PETN5 CL_DATA 1
BJ32 PETP5 CL_DATA1 T11
TP47 TPAD14-GP 2N7002KDW -GP

Link
BA34 T9 CL_RST# 1
PERN6 CL_RST1# TP49 TPAD14-GP SMB_DATA
AW34 PERP6 3,20,21 PCH_SMBDATA 1 6
BC34 PETN6
BD34 PETP6 2 5
H1 PEG_CLKREQ# 1 DY 2 PEX_CLKREQ 62
PEG_A_CLKRQ#/GPIO47 R261 0R2J-2-GP SMB_CLK
AT34 PERN7 3 4 PCH_SMBCLK 3,20,21
AU34
AU36
PERP7
AD43 CLK_PCH_PEGA_N R689 10R0402-PAD
2
1130 -SC CLK_PCIE_PEG# 62 Q39
PETN7 CLKOUT_PEG_A_N CLK_PCH_PEGA_P R690 10R0402-PAD
AV36 PETP7 CLKOUT_PEG_A_P AD45 2 CLK_PCIE_PEG 62
C 84.2N702.A3F C
BG34 AN4 CLK_EXP_N R691 10R0402-PAD
2 PEG_CLK#_R 5 2nd = 84.DM601.03F
PERN8 CLKOUT_DMI_N

PEG
BJ34 AN2 CLK_EXP_P R692 10R0402-PAD
2 PEG_CLK_R 5
PERP8 CLKOUT_DMI_P
BG36 PETN8
BJ36 PETP8
AT1 CLKOUT_DP_N 4 1 DPLL_REF_SSCLK# 5
CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P
CLKOUT_DP_P/CLKOUT_BCLK1_P AT3 3 2 RN57 DPLL_REF_SSCLK 5
AK48 SRN0J-10-GP-U
CLKOUT_PCIE0N
AK47 CLKOUT_PCIE0P DY R262

From CLK BUFFER


AW24 CLKIN_DMI# CLKIN_DMI# 3
PCIE_CLK_RQ0# CLKIN_DMI_N CLKIN_DMI PEG_CLKREQ#
13 PCIE_CLK_RQ0# P9 PCIECLKRQ0#/GPIO73 CLKIN_DMI_P BA24 CLKIN_DMI 3 1 2

R683 10R0402-PAD CLK_PCH_SRC1_N CLK_CPU_BCLK# 10KR2J-3-GP


37 CLK_PCIE_MINI1# 2 AM43 CLKOUT_PCIE1N CLKIN_BCLK_N AP3 CLK_CPU_BCLK# 3
37 CLK_PCIE_MINI1 R684 10R0402-PAD
2 CLK_PCH_SRC1_P AM45 AP1 CLK_CPU_BCLK CLK_CPU_BCLK 3
CLKOUT_PCIE1P CLKIN_BCLK_P
1 DY 2 PCIE_CLK_RQ1# U4
37 MINI1_CLKREQ# R267 0R2J-2-GP PCIECLKRQ1#/GPIO18 DREFCLK#
CLKIN_DOT_96N F18 DREFCLK# 3
E18 DREFCLK DREFCLK 3
R685 10R0402-PAD CLK_PCH_SRC2_N CLKIN_DOT_96P
37 CLK_PCIE_MINI2# 2 AM47 CLKOUT_PCIE2N
37 CLK_PCIE_MINI2 R686 10R0402-PAD
2 CLK_PCH_SRC2_P AM48 CLKOUT_PCIE2P CLK_PCIE_SATA#
CLKIN_SATA_N/CKSSCD_N AH13 CLK_PCIE_SATA# 3
1 DY 2 PCIE_CLK_RQ2# N4 AH12 CLK_PCIE_SATA CLK_PCIE_SATA 3
37 MIN2_CLKREQ# R518 0R2J-2-GP PCIECLKRQ2#/GPIO20 CLKIN_SATA_P/CKSSCD_P 82.30020.971

30 CLK_PCIE_LAN# R687 10R0402-PAD


2 CLK_PCH_SRC0_N AH42 P41 CLK_ICH14 CLK_ICH14 3
R688 CLKOUT_PCIE3N REFCLK14IN
30 CLK_PCIE_LAN 10R0402-PAD
2 CLK_PCH_SRC0_P AH41 CLKOUT_PCIE3P
1 DY 2 PCIE_CLK_RQ3# A8 J42 CLK_PCI_FB CLK_PCI_FB 15
B 30 LAN_CLKREQ# R529 0R2J-2-GP PCIECLKRQ3#/GPIO25 CLKIN_PCILOOPBACK B

1130 -SC AM51 AH51 XTAL25_IN CL = 12pF


CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT
AM53 CLKOUT_PCIE4P XTAL25_OUT AH53 Freq tolertance :+/- 30 ppm
PCIE_CLK_RQ4# M9 PCIECLKRQ4#/GPIO26 XCLK_RCOMP AF38 XCLK_RCOMP 1 2 1D05V_S0 SB 0812
PCIECLKRQ{0,3,4,5,6,7}# should R172 90D9R2F-1-GP

have a 10K pull-up to +3VALW. AJ50 T45


CLKOUT_PCIE5N CLKOUTFLEX0/GPIO64 XTAL25_IN
AJ52 CLKOUT_PCIE5P 1 DIS 2
R441 0R2J-2-GP
PCIECLKRQ{1,2} should have a PCIE_CLK_RQ5# H6 P43 1117 -SC
Clock Flex

PCIECLKRQ5#/GPIO44 CLKOUTFLEX1/GPIO65
10K pull-up to +1.05VS (But CRB is
pull-up to +3VS). C486
AK53 CLKOUT_PEG_B_N CLKOUTFLEX2/GPIO66 T42 UMA_Muxless
AK51 XTAL25_IN 2 1
CLKOUT_PEG_B_P

2
X5

1
PEG_B_CLKRQ# P13 N50 CLK48 1 2 CLK48_Cardreader 36 R432
PEG_B_CLKRQ#/GPIO56 CLKOUTFLEX3/GPIO67 33R2J-2-GP R437 XTAL-25MHZ-102-GP SC12P50V2JN-3GP
UMA_Muxless 1MR2J-1-GP
82.30020.851 C485

1
IBEXPEAK-M-GP-NF DY C484 2nd = 82.30020.791 UMA_Muxless

2
3D3V_S5 3D3V_S0 3D3V_S0 XTAL25_OUT 1 2 XTAL25_OUT_R 2 1

SC4D7P50V2CN-1GP
UMA_Muxless

2
UMA_Muxless 0R2J-2-GP3rd = 82.30020.A31 SC12P50V2JN-3GP
2

R440
R527 R269 R517
DY 10KR2J-3-GP DY 10KR2J-3-GP DY 10KR2J-3-GP
3D3V_S5
UMA
A A
1

RN27
PCIE_CLK_RQ3# PCIE_CLK_RQ1# PCIE_CLK_RQ2# 1 8 PEG_B_CLKRQ#
2 7 Wistron Corporation
1

3 6 PCIE_CLK_RQ4# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

R268 R519 4 5 PCIE_CLK_RQ5# Taipei Hsien 221, Taiwan, R.O.C.


10KR2J-3-GP 10KR2J-3-GP
R530 SRN10KJ-7GP Title
10KR2J-3-GP
PCH (2/9)
2

SB 0812
1

Size Document Number Rev


A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 12 of 72

5 4 3 2 1
5 4 3 2 1

PCH1C 3 OF 10
FDI_RXN0 BA18 FDI_TXN0 4
4 DMI_RXN0 BC24 DMI0RXN FDI_RXN1 BH17 FDI_TXN1 4
4 DMI_RXN1 BJ22 DMI1RXN FDI_RXN2 BD16 FDI_TXN2 4
4 DMI_RXN2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_TXN3 4
4 DMI_RXN3 BJ20 DMI3RXN FDI_RXN4 BA16 FDI_TXN4 4
FDI_RXN5 BE14 FDI_TXN5 4
4 DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_TXN6 4
4 DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 4
4 DMI_RXP2 BA20 DMI2RXP
4 DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_TXP0 4
D
FDI_RXP1 BF17 FDI_TXP1 4 D
4 DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_TXP2 4
4 DMI_TXN1 BF21 DMI1TXN FDI_RXP3 BG16 FDI_TXP3 4
4 DMI_TXN2 BD20 DMI2TXN FDI_RXP4 AW16 FDI_TXP4 4
4 DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 4
FDI_RXP6 BB14 FDI_TXP6 4
4 DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 4
4 DMI_TXP1 BH21 DMI1TXP
4 DMI_TXP2 BC20 DMI2TXP
4 DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT 4

DMI
FDI
FDI_FSYNC0 BF13 FDI_FSYNC0 4
1D05V_S0 BH25 DMI_ZCOMP
FDI_FSYNC1 BH13 FDI_FSYNC1 4
1 2 DMI_IRCOMP_R BF25 DMI_IRCOMP
1214 -SC R464 49D9R2F-GP
FDI_LSYNC0 BJ12 FDI_LSYNC0 4

Current 0.1uF 0402 10V X7R 3D3V_S0 BG14


FDI_LSYNC1 FDI_LSYNC1 4

previous 0.1uF 0402 16V X7R

1
45 PM_PW ROK R256 1 DY 2CORE_PW RGD_1
0R2J-2-GP 3D3V_S5 R270
U45 10KR2J-3-GP
C578
45,47 CORE_PW RGD R255 10R0402-PAD
2 1 DY
B
5 1 2

2
R534 10R0402-PAD RUNPW ROK_1 2 VCC PM_SYSRST#_R PCIE_W AKE#
39 RUNPW ROK 2 A T6 SYS_RESET# WAKE# J12 PCIE_W AKE# 30,37
Y 4 SCD1U10V2KX-5GP
0113 -1 3 GND
M6 Y1 PM_CLKRUN#
SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 40
C 74LVC1G08GW -1-GP C
73.01G08.L04

System Power Management


2ND = 73.7SZ08.DAH PM_PW ROK_1 B17 PWROK
1 2 R244 10R0402-PAD
2
R254 10KR2J-3-GP ME_PW ROK K5 P8 PM_SUS_STAT# 1
ALL_PW RGD MEPWROK SUS_STAT#/GPIO61 TP48 TPAD14-GP
45,47,50,51,52 ALL_PW RGD 1
R257
DY 2
0R2J-2-GP
LAN_RST#1 PM_SUS_CLK
1
R221
2
10KR2J-3-GP
A10 LAN_RST# SUSCLK/GPIO62 F3 PM_SUS_CLK 39,40 HM42-CP NV Muxless 0918
5 PM_DRAM_PW RGD PM_DRAM_PW RGD D9 E4 PM_SLP_S5# 1
DRAMPWROK SLP_S5#/GPIO63 TP55 TPAD14-GP
1130 -SC
1130 -SC PM_RSMRST# C16 H7 PM_SLP_S4#_R 1 R243 2 0R0402-PAD PM_SLP_S4# 40,50,52
RSMRST# SLP_S4#

40 SUS_PW R_DN_ACK 1 R531 2 0R0402-PAD SUS_PW R_DN_ACK_R M1 SUS_PWR_DN_ACK/GPIO30 SLP_S3# P12 PM_SLP_S3#_R 1 R275 2 0R0402-PAD PM_SLP_S3# 40,45,51,52

40,59 PM_PW RBTN# 1 R253 2 0R0402-PAD PM_PW RBTN#_R P5 PWRBTN# SLP_M# K8 PM_SLP_M#_R 1 R245 2 0R0402-PAD PM_SLP_M# 40

40 AC_PRESENT 1 R252 2 0R0402-PAD AC_PRESENT_R P7 ACPRESENT/GPIO31 TP23 N2 PM_SLP_DSW # 1


1008 -SA TP89 TPAD14-GP

PCH_GPIO72 A6 BJ10 H_PM_SYNC


3D3V_AUX_S5 BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5

B PM_RI# PM_SLP_LAN# B
F14 RI# SLP_LAN#/GPIO29 F6 1
TP54 TPAD14-GP
1

3D3V_S5
1

R450 R449 IBEXPEAK-M-GP-NF


10KR2J-3-GP
100KR2J-1-GP
Q32

1
2

4 3 PM_RSMRST#
2

3D3V_S5 R273
S3
51123_PGOOD_2
5 2 51123_PGOOD 49 1016 -SB 10KR2J-3-GP
RN62

2
6 1 12 PCH_GPIO74 PCH_GPIO74 1 8 Q15
PM_PW RBTN#_R 2 7 PM_SLP_S3_CTL 8,20
16 PCH_GPIO12 PCH_GPIO12 3 6 PM_SLP_S3# G

. .
2N7002KDW -GP SUS_PW R_DN_ACK_R 4 5
84.2N702.A3F 3D3V_S5 S3 D

.
.
.
SRN10KJ-7GP
2ND = 84.DM601.03F S
RN31 3D3V_S5
3D3V_S5 AC_PRESENT_R 1 8
PCIE_CLK_RQ0# 2N7002E-1-GP
12 PCIE_CLK_RQ0# 2 7
PM_RI# 3 6 84.2N702.D31
4 5 PCH_GPIO72 1 2 2ND = 84.2N702.E31
1

R465 R526 8K2R2J-3-GP


2 1 R459 SRN10KJ-7GP
DY 10KR2J-3-GP PCIE_W AKE# 2 1
1KR2F-3-GP R259 10KR2J-3-GP
SB 0814
2

A UMA A
D19
1 PM_RSMRST# 3D3V_S0 HM42-CP NV Muxless 0917
DY
40 RSMRST#_KBC 3 change pull up 1K to 10K for Intel suggestion Wistron Corporation
1

R460 PM_CLKRUN# 1 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2 R520 Taipei Hsien 221, Taiwan, R.O.C.
100KR2J-1-GP

8K2R2J-3-GP
BAT54PT-GP Title
83.00054.T81
PCH (3/9)
2

2ND = 83.BAT54.D81
3rd = 83.00054.S81 Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 13 of 72
5 4 3 2 1
5 4 3 2 1

PCH1D 4 OF 10
22 PCH_BL_ON T48 L_BKLTEN SDVO_TVCLKINN BJ46
23 PCH_LCDVDD_ON T47 L_VDD_EN SDVO_TVCLKINP BG46
3D3V_S0
D 23 L_BKLTCTL Y48 L_BKLTCTL SDVO_STALLN BJ48 D
RN12 BG48
LCTL_CLK CLK_DDC_EDID SDVO_STALLP
1 4 22 CLK_DDC_EDID AB48 L_DDC_CLK
LCTL_DATA DAT_DDC_EDID
2 3 22 DAT_DDC_EDID Y45 L_DDC_DATA SDVO_INTN BF45
BH45
1014 -SA
SRN10KJ-5-GP LCTL_CLK SDVO_INTP
AB46 L_CTRL_CLK
LCTL_DATA V48 L_CTRL_DATA
UMA_Muxless LIBG AP39 T51
LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 25
TPAD14-GP TP26 1 L_LVBG AP41 T53
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 25
HM42-CP NV_Muxless SA LVDS_VREF AT43 LVD_VREFH
AT42 LVD_VREFL DDPB_AUXN BG44
R181 DDPB_AUXP BJ44
DDPB_HPD AU38 PCH_HDMI_DETECT 25

LVDS
1 2 LIBG 22 PCH_TXACLK- AV53 LVDSA_CLK#
22 PCH_TXACLK+ AV51 LVDSA_CLK DDPB_0N BD42 PCH_HDMI_DATA2-_L 1 2 HDMI_DATA2- 25,65
2K4R2F-GP DDPB_0P BC42 PCH_HDMI_DATA2+_L C7001 SCD1U10V2KX-5GP
2 HDMI_DATA2+ 25,65
22 PCH_TXAOUT0- BB47 LVDSA_DATA#0 DDPB_1N BJ42 PCH_HDMI_DATA1-_L C7031 SCD1U10V2KX-5GP
2 HDMI_DATA1- 25,65
UMA_Muxless 22 PCH_TXAOUT1- BA52 BG42 PCH_HDMI_DATA1+_L C6961 SCD1U10V2KX-5GP
2 HDMI_DATA1+ 25,65

Digital Display Interface


LVDSA_DATA#1 DDPB_1P
22 PCH_TXAOUT2- AY48 LVDSA_DATA#2 DDPB_2N BB40 PCH_HDMI_DATA0-_L C6971 SCD1U10V2KX-5GP
2 HDMI_DATA0- 25,65
AV47 LVDSA_DATA#3 DDPB_2P BA40 PCH_HDMI_DATA0+_L C7011 SCD1U10V2KX-5GP
2 HDMI_DATA0+ 25,65
Muxless->64.23715.6DL,UMA-2.4K DDPB_3N AW38PCH_HDMI_CLK-_L C7021 SCD1U10V2KX-5GP
2 HDMI_CLK- 25,65
22 PCH_TXAOUT0+ BB48 LVDSA_DATA0 DDPB_3P BA38 PCH_HDMI_CLK+_L C6981 SCD1U10V2KX-5GP
2 HDMI_CLK+ 25,65
22 PCH_TXAOUT1+ BA50 C699 SCD1U10V2KX-5GP
R175 LVDSA_DATA1
22 PCH_TXAOUT2+ AY49 LVDSA_DATA2 UMA_Muxless_HDMI
1 2 LVDS_VREF AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
DDPC_CTRLDATA AB49
C 0R2J-2-GP C
AP48 LVDSB_CLK#
UMA_Muxless AP47 LVDSB_CLK DDPC_AUXN BE44
DDPC_AUXP BD44
AY53 LVDSB_DATA#0 DDPC_HPD AV40
AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
AT53 LVDSB_DATA#3 DDPC_0P BD40
RN8 BF41
PCH_BLUE DDPC_1N
8 1 AY51 LVDSB_DATA0 DDPC_1P BH41
7 2 PCH_GREEN AT48 BD38
PCH_RED LVDSB_DATA1 DDPC_2N
6 3 AU50 LVDSB_DATA2 DDPC_2P BC38
5 4 AT51 LVDSB_DATA3 DDPC_3N BB36
DDPC_3P BA36

SRN150F-1-GP
UMA_Muxless 22 PCH_BLUE AA52 CRT_BLUE DDPD_CTRLCLK U50
22 PCH_GREEN AB53 CRT_GREEN DDPD_CTRLDATA U52
22 PCH_RED AD53 CRT_RED

DDPD_AUXN BC46
24 PCH_DDCCLK V51 CRT_DDC_CLK DDPD_AUXP BD46
24 PCH_DDCDATA V53 CRT_DDC_DATA DDPD_HPD AT38
SB 0811
DDPD_0N BJ40
24 PCH_HSYNC Y53 CRT_HSYNC DDPD_0P BG40
24 PCH_VSYNC Y51 CRT_VSYNC DDPD_1N BJ38
DDPD_1P BG38

CRT
DDPD_2N BF37
1 2 CRT_IREF AD48 BH37
B R130 DAC_IREF DDPD_2P B
AB51 CRT_IRTN DDPD_3N BE36
1KR2D-1-GP BD36
DDPD_3P
1K 0.5% ohm IBEXPEAK-M-GP-NF

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (4/9)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 14 of 72
5 4 3 2 1
5 4 3 2 1

PCH strapping
PCH1E 5 OF 10 +V_NVRAM_VCCQ
H40 AD0 NV_CE#0 AY9
RN54
PCI_STOP# 1 10
3D3V_S0 These pins are left as NC, N34
C44
AD1 NV_CE#1 BD1
AP15
AD2 NV_CE#2

1
PCI_IRDY# 2 9 PCI_DEVSEL#
because the function is disable. A38 AD3 NV_CE#3 BD8 NV_CLE DMI termination voltage
INT_PIRQD# 3 8 PCI_FRAME# C36 R229
INT_PIRQG# PCI_TRDY# AD4
4 7 J34 AD5 NV_DQS0 AV9 DY 1KR2J-1-GP
3D3V_S0 5 6 PCI_PLOCK# A40 AD6 NV_DQS1 BG8
These pins are left as NC, floating internal pull-up
D45

2
AD7
SRN8K2J-2-GP-U E36
H48
AD8 NV_DQ0/NV_IO0 AP7
AP6
because the function is disable. NV_CLE
AD9 NV_DQ1/NV_IO1
D E40 AD10 NV_DQ2/NV_IO2 AT6 D
C40 AD11 NV_DQ3/NV_IO3 AT9
HM42 NV Muxless SA 0925 M48
M45
AD12 NV_DQ4/NV_IO4 BB1
AV6
AD13 NV_DQ5/NV_IO5
F53 AD14 NV_DQ6/NV_IO6 BB3
NV_ALE +V_NVRAM_VCCQ
1209 -SC M40 AD15 NV_DQ7/NV_IO7 BA4

NVRAM
M43 AD16 NV_DQ8/NV_IO8 BE4
J36 AD17 NV_DQ9/NV_IO9 BB6 1 Enable Anti-Theft Tech
K48 AD18 NV_DQ10/NV_IO10 BD6

1
3D3V_S0 F40 BB7
AD19 NV_DQ11/NV_IO11
C42 AD20 NV_DQ12/NV_IO12 BC8 floating Disable R231
1 2 PCI_REQ1# K46 BJ8 DY 1KR2J-1-GP
R443
1 8K2R2J-3-GP
2 INT_PIRQB# M51
AD21 NV_DQ13/NV_IO13
BJ6
(internal pull-down)
R434 8K2R2J-3-GP PCI_REQ3# AD22 NV_DQ14/NV_IO14
1 2 J52 BG6

2
R438 8K2R2J-3-GP AD23 NV_DQ15/NV_IO15
K51 AD24
L34 BD3 NV_ALE NV_ALE
AD25 NV_ALE NV_CLE
F42 AD26 NV_CLE AY6
J40 AD27
DMI Termination Voltage
3D3V_S0 G46 AD28 NV_RCOMP NV_CLE Set to Vss when low.
1 2 INT_PIRQH# HM42 NV Muxless SA 0924 F44
M47
AD29 NV_RCOMP AU2 1
R237
2
Set to Vcc when high.
AD30

PCI
R442
1 8K2R2J-3-GP
2 PCI_PERR# H36 AV7 32D4R2F-GP
R126 8K2R2J-3-GP PCI_REQ0# 3D3V_S0 AD31 NV_RB#
1 2 DY
R433
1 8K2R2J-3-GP
2 INT_PIRQF# J50 AY8
R436 8K2R2J-3-GP C/BE0# NV_WR#0_RE#
G42 C/BE1# NV_WR#1_RE# AY5
H47 C/BE2#

1
G34 C/BE3# NV_WE#_CK0 AV11 USB
R153 BF5
3D3V_S0 10KR2J-3-GP INT_PIRQA# NV_WE#_CK1
G38 PIRQA#
C RN13 INT_PIRQB# H51 C
INT_PIRQC# INT_PIRQC# PIRQB#
1 8 B37 H18 USBPN0 29 Pair Device
2
INT_PIRQE# INT_PIRQD# PIRQC# USBP0N
2 7 A44 PIRQD# USBP0P J18 USBPP0 29
3 6 INT_PIRQA# A18 0 USB3
USBP1N USBPN1 29
4 5 PCI_SERR# PCI_REQ0# F51 C18
REQ0# USBP1P USBPP1 29
PCI_REQ1# A46 N20 1 USB2
SRN8K2J-4-GP dGPU_SELECT# REQ1#/GPIO50 USBP2N
1 B45 REQ2#/GPIO52 USBP2P P20
TPAD14-GP TP103 PCI_REQ3# M53 J20 2 NC
REQ3#/GPIO54 USBP3N USBPN3 37
PCI_GNT0# 1 DY 2 L20
USBP3P USBPP3 37
R136 1KR2J-1-GP PCI_GNT0# F48 F20 USBPN4 23 3 MINICARD1(WLAN)
GNT0# USBP4N
PCI_GNT1# 1 DY 2 USE SPI PCI_GNT1# K45 GNT1#/GPIO51 USBP4P G20 USBPP4 23
R152 1KR2J-1-GP 1 dGPU_PW M_SELECT# F36 A20 4 WECAM
TPAD14-GP TP67 PCI_GNT3# GNT2#/GPIO53 USBP5N
H53 GNT3#/GPIO55 USBP5P C20
USBP6N M22 5 NC
INT_PIRQE# B41 N22
INT_PIRQF# PIRQE#/GPIO2 USBP6P
PCH strapping 1016 -SB INT_PIRQG#
K53
A36
PIRQF#/GPIO3 USBP7N B21
D21
6 NC
INT_PIRQH# PIRQG#/GPIO4 USBP7P
A48 PIRQH#/GPIO5 USBP8N H22 USBPN8 37 7 NC
BOOT BIOS Strap USBP8P J22 USBPP8 37 -SA 1001

USB
K6 PCIRST# USBP9N E22 USBPN9 29 8 3G SIM Card
GNT#0 GNT#1 BOOT BIOS Location F22 USBPP9 29
PCI_SERR# USBP9P
0 0 LPC PCI_PERR#
E44
E50
SERR# USBP10N A22
C22
HM42-CP SA 9 USB1(HS)
PERR# USBP10P
USBP11N G24 USBPN11 28 10 NC
1 0 Reserved USBP11P H24 USBPP11 28
PCI_IRDY# A42 L24 USBPN12 37 11 Blue Tooth
IRDY# USBP12N
floating 0 PCI H44 PAR USBP12P M24 USBPP12 37
PCI_DEVSEL# F46 A24 USBPN13 36 12 MINIC2(3G)
DEVSEL# USBP13N
B
floating floating SPI(Default) PCI_FRAME# C46 FRAME# USBP13P C24 USBPP13 36 B
13 Cardreader
PCI_PLOCK# D49 PLOCK# USB_RBIAS_PN
USBRBIAS# B25 1 2
PCI_GNT#1 PCI_STOP# D41 R467 3D3V_S5
PCI_TRDY# STOP# 22D6R2F-L1-GP
C48 TRDY# USBRBIAS D25
1 Default RN16
1 ICH_PME# M7 USB_OC#5 8 1
(internal pull up) TPAD14-GP TP50 PME#
N16 USB_OC#1 7 2
OC0#/GPIO59 USB_OC#0 29
Configures DMI for SB 0810 PCI_PLTRST# D5 PLTRST# OC1#/GPIO40 J16 USB_OC#1 USB_OC#0 6 3
0 ESI compatible OC2#/GPIO41 F16 USB_OC#2 USB_OC#7 5 4
41 PCLK_FW H R439 1 2 22R2J-2-GP CLK_PCI_SIO_R N52 L16 USB_OC#3
CLKOUT_PCI0 OC3#/GPIO42
operation 12 CLK_PCI_FB R121 1 2 22R2J-2-GP CLK_PCI_FB_R P53 CLKOUT_PCI1 OC4#/GPIO43 E14 USB_OC#4 29
SRN10KJ-6-GP
R143 1 2 47R2J-2-GP CLK_PCI_KBC_R P46 G16 USB_OC#5
(Not for Mobile 40 CLK_PCI_KBC
CLK_PCI_3 CLKOUT_PCI2 OC5#/GPIO9 USB_OC#6 3D3V_S5
1 P51 CLKOUT_PCI3 OC6#/GPIO10 F12
platform) TPAD14-GP TP18 1 CLK_PCI_4 P48 T15 USB_OC#7
TPAD14-GP TP19 CLKOUT_PCI4 OC7#/GPIO14 RN24
USB_OC#6 8 1
IBEXPEAK-M-GP-NF USB_OC#3 7 2
USB_OC#2 6 3
USB_OC#4 5 4
3D3V_S5
C304
DY SRN10KJ-6-GP
2 1 PCLK_FW H 1 2 PCI_GNT3# 1 DY 2
DY EC90 SC22P50V2JN-4GP R435 4K7R2J-2-GP
1006 -SA swap net
SCD1U10V2KX-5GP

1
U8
1204 -SC PCH strapping
B <Variant Name>
A
PCI_PLTRST# VCC 5 Near R439 A16 swap override Strap/Top-Block
A
2 A DY PLT_RST#
4 Swap Override jumper
3 GND
Y PLT_RST# 5,30,36,37,40,41,45,59,62
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

74LVC1G08GW -1-GP PCI_GNT#3 Low = A16 swap Taipei Hsien 221, Taiwan, R.O.C.
73.01G08.L04 R276 override/Top-Block
2ND = 73.7SZ08.DAH DY 100KR2J-1-GP Swap Override enabled Title
High = Default PCH (5/9)
2

1 2 Size Document Number Rev


R260 0R2J-2-GP A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 15 of 72

5 4 3 2 1
5 4 3 2 1
GPIO8 has a weak[20K] internal pull up.
No need to have external pull down/up.
GPIO8 pin set to high at reset. PCH1F 6 OF 10

PCH_GPIO0 Y3 AH45
BMBUSY#/GPIO0 CLKOUT_PCIE6N
GPIO15 has a weak[20K] internal pull down. CLKOUT_PCIE6P AH46
EC_SMI# C38
No need to have external pull up/down. TACH1/GPIO1
GPIO 15 pin is set to low at reset. 1 PX_HDMI# D37 TACH2/GPIO6
Low : ME Crypto TLS with no confidentiality TPAD14-GP TP36
CLKOUT_PCIE7N AF48

MISC
High : ME Crypto TLS with confidentiality 40 EC_SCI# EC_SCI# J32 AF47
TACH3/GPIO7 CLKOUT_PCIE7P
40 EC_SW I# EC_SW I# F10 GPIO8
D D
GPIO27 has a weak[20K] internal pull up. 13 PCH_GPIO12 PCH_GPIO12 K9 U2 KA20GATE 40
LAN_PHY_PWR_CTRL/GPIO12 A20GATE
To enable on-die PLL Voltage regurator, PCH_GPIO15
should not place external pull down. HM42-CP_NV _Muxless SA T7 GPIO15

62 DGPU_HOLD_RST# DGPU_HOLD_RST# AA2 AM3 BCLK_CPU_N_R 2 3 BCLK_CPU_N 5


SATA4GP/GPIO16 CLKOUT_BCLK0_N/CLKOUT_PCIE8N SRN0J-10-GP-U
1 4 BCLK_CPU_P 5
DGPU_PW ROK F38 AM1 BCLK_CPU_P_R RN58
55,61,62 DGPU_PW ROK TACH0/GPIO17 CLKOUT_BCLK0_P/CLKOUT_PCIE8P
PCH_GPIO22 Y7 BG10
SCLOCK/GPIO22 PECI H_PECI 5

GPIO
1 PCH_GPIO24 H10 T1 KBRCIN# 40
TPAD14-GP TP46 GPIO24 RCIN#
3D3V_S5 1 PCH_GPIO27 AB12 BE10 1D05V_VTT
GPIO27 PROCPWRGD H_PW RGD 5,59

CPU
TPAD14-GP TP45 1 2
RN30
1 PCH_GPIO28 V13 BD10 R236
PCH_GPIO11 TPAD14-GP TP56 GPIO28 THRMTRIP# 56R2J-4-GP
12 PCH_GPIO11 5 4
EC_SW I# 6 3 STP_PCI# M11
PCH_GPIO60 STP_PCI#/GPIO34 PCH_THERMTRIP_R
12 PCH_GPIO60 7 2 1 DY 2 PM_THRMTRIP-A# 5,45
PCH_GPIO28 8 1 PCH_GPIO35 V6 R230
SATACLKREQ#/GPIO35 54D9R2F-L1-GP
SRN10KJ-7GP 61 DGPU_PW R_EN# DGPU_PW R_EN# AB7 BA22
SATA2GP/GPIO36 TP1
Placed Within 2" from PCH
HM42-CP NV_Muxless SA dGPU_PRSNT# AB13 SATA3GP/GPIO37 TP2 AW22

PCH_GPIO45 1 2 1 dGPU_EDID V3 BB22


R508 8K2R2J-3-GP TPAD14-GP TP105 SLOAD/GPIO38 TP3
PCH_GPIO39
1016 -SB P3 SDATAOUT0/GPIO39 TP4 AY45
1D5V_S3
C SB 0814 PCH_GPIO45 H3 PCIECLKRQ6#/GPIO45 TP5 AY46 C
SB 0819

1
RST_GATE F1 AV43
PCIECLKRQ7#/GPIO46 TP6 R279
PCH_GPIO15 1 2 11 PCH_GPIO48 PCH_GPIO48 AB6 AV45 S3 1KR2F-3-GP
R266 1KR2J-1-GP SDATAOUT1/GPIO48 TP7
PSW _CLR# AA4 AF13

2
SATA5GP/GPIO49 TP8
DDR3_DRAMRST# 20,21
PCH_GPIO57 F8 M18
PSW _CLR# GPIO57 TP9

TP10 N18
2
GAP-OPEN

B4 VSS_NCTF_8
B52 VSS_NCTF_9 TP11 AJ24 0121 -1 NON-S3

1
G111 BH2

NCTF
VSS_NCTF_16

RSVD
BH52 AK41 R278
VSS_NCTF_17 TP12
D2 0R2J-2-GP

D
1

VSS_NCTF_28
TP13 AK42
A4 3D3V_S5 . 2ND = 84.2N702.E31

2
VSS_NCTF#A4

BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
SB 0722 A49 VSS_NCTF#A49 TP14 M32 S3 84.2N702.D31
.

BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
A5 VSS_NCTF#A5 . 2N7002E-1-GP

1
A50 N32 . .

A4,A49,A5,A50,A52,A53,B2,B53,BE1,
3D3V_S0 VSS_NCTF#A50 TP15 R272 Q14
A52 VSS_NCTF#A52
AFTE14P-GP TP80 1 PCH_TP95 A53 M30 10KR2F-2-GP S3
RN29

S
AFTE14P-GP TP88 PCH_TP96 VSS_NCTF#A53 TP16
1 B2 VSS_NCTF#B2
11,44 SATA_LED# SATA_LED# 5 4 B53 N30

2
PCH_GPIO39 VSS_NCTF#B53 TP17
6 3 BE1 VSS_NCTF#BE1
11,40 INT_SERIRQ INT_SERIRQ 7 2 BE53 H12 RST_GATE
PSW _CLR# VSS_NCTF#BE53 TP18
8 1 BF1 VSS_NCTF#BF1
BF53 VSS_NCTF#BF53 TP19 AA23
B SRN10KJ-7GP B
BH1 VSS_NCTF#BH1 S3
BH53 VSS_NCTF#BH53 NC_1 AB45

1
AFTE14P-GP TP87 1 PCH_TP97 BJ1 SM_DRAMRST# 5
VSS_NCTF#BJ1 C298
BJ2 VSS_NCTF#BJ2 NC_2 AB38

1
BJ4 SCD047U25V2KX-GP

2
VSS_NCTF#BJ4
NCTF TEST PIN:

RP1 BJ49 AB42 R277


3D3V_S0 VSS_NCTF#BJ49 NC_3
STP_PCI# 1 10 BJ5 S3 100KR2F-L1-GP
PCH_GPIO22 EC_SMI# VSS_NCTF#BJ5
2 9 BJ50 VSS_NCTF#BJ50 NC_4 AB41
PCH_GPIO0 3 8 EC_SCI# BJ52

2
dGPU_EDID PX_HDMI# AFTE14P-GP TP82 PCH_TP98 VSS_NCTF#BJ52
4 7 1 BJ53 VSS_NCTF#BJ53 NC_5 T39
3D3V_S0 5 6 D1 VSS_NCTF#D1
D53 VSS_NCTF#D53
SRN10KJ-L3-GP E1 P6 INIT3_3V# 1
VSS_NCTF#E1 INIT3_3V# TP52 TPAD14-GP
E53 VSS_NCTF#E53
TP24 C10
PCH_GPIO35 1 2
10KR2J-3-GP R265 IBEXPEAK-M-GP-NF
H: No SG function
L: SG Support SB 0812
HM42-CP_NV _Muxless SA 3D3V_S0
3D3V_S5
2

3D3V_S0 3D3V_S0 UMA_Muxless


2

R224
DIS_UMA 10KR2J-3-GP R239
2

10KR2J-3-GP
A R263 R532 A
UMA
1

DY 10KR2J-3-GP DY 10KR2J-3-GP dGPU_PRSNT#


1

PCH_GPIO57
2

Wistron Corporation
1

R225
DGPU_PW R_EN# DGPU_HOLD_RST# 10KR2J-3-GP R238 UMA_DISCRETE# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Muxless 10KR2J-3-GP Optimus: HIGH Taipei Hsien 221, Taiwan, R.O.C.
2

UMA: HIGH
1

R264 R533 DIS Title


1

DIS ONLY: LOW


10KR2J-3-GP 10KR2J-3-GP
PCH (6/9)
Size Document Number Rev
1

A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 16 of 72
5 4 3 2 1
5 4 3 2 1

1014 -SA

1130 -SC 3D3V_S0_DAC 1 R671 2 3D3V_S0


0R2J-2-GP
1D05V_S0
PCH1G POWER 7 OF 10 0R0603-PAD DIS
1.432A AB24
AB26
VCCCORE VCCADAC AE50 +VCCA_DAC_1_2 1
R115
2 69mA 3D3V_S0_DAC
VCCCORE

1
C270 C261 AB28 AE52 C175 C181 5V_S0 Imax = 300 mA
VCCCORE VCCADAC C174

SC10U6D3V3MX-GP

SCD1U10V2KX-5GP

SC10U6D3V3MX-GP
AD26 R112 DY U33 3D3V_S0_DAC
VCCCORE

SC1U6D3V2KX-GP

SCD01U50V2KX-1GP
CRT
D AD28 AF53 DY 0R2J-2-GP UMA_Muxless D

2
VCCCORE VSSA_DAC
AF26 VCCCORE 1 VIN VOUT 5 UMA_Muxless

VCC CORE
AF28 AF51 2

2
VCCCORE VSSA_DAC GND
AF30 VCCCORE 3 EN NC#4 4

1
AF31 C468
VCCCORE

SC22U6D3V5MX-2GP
AH26 C469
VCCCORE 3D3V_S0

SC1U16V3ZY-GP

SC1U16V3ZY-GP
AH28 G9091-330T11U-GP

2
VCCCORE

1
AH30 +3VS_VCCA_LVD 74.09091.J3F
AH31
VCCCORE
VCCCORE VCCALVDS AH38 1 2 300mA C467 2ND = 74.09198.G7F DY
AJ30 UMA_Muxless

2
VCCCORE R186
AJ31 VCCCORE VSSA_LVDS AH39
0R3J-0-U-GP 1D8V_S0
UMA_Muxless
1D05V_S0
VCCTX_LVDS AP43 +1.8VS_VCCTX_LVDS 1 2 59mA

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
AP45 C215
VCCTX_LVDS

1
C192 C196 R198
AT46 1130 -SC

LVDS
VCCTX_LVDS

SC10U6D3V3MX-GP
AK24 VCCIO VCCTX_LVDS AT45 DY 0R3J-0-U-GP SB 0811
1D05V_S0
UMA_Muxless

2
42mA 1
L15
DY 2 +1.05VS_VCCAPLL_EXP BJ24 VCCAPLLEXP
AB34 UMA_Muxless
VCC3_3 UMA_Muxless DIS

1
IND-1UH-2-GP C518

SC10U6D3V3MX-GP
DY AN20 AB35 +3VS_VCCA_LVD 1 R185 2
VCCIO VCC3_3 3D3V_S0
AN22
357mA

HVCMOS
2
VCCIO 0R3J-0-U-GP
AN23 VCCIO VCC3_3 AD35
AN24 VCCIO

1
AN26 C220 +1.8VS_VCCTX_LVDS 1 R192 2
1D05V_S0 VCCIO

SCD1U10V2KX-5GP
1130 -SC AN28 VCCIO
SB 0811
BJ26 0R3J-0-U-GP
3.062A

2
C VCCIO C
BJ28 VCCIO DIS
AT26 VCCIO
1

1
C256 C226 C243 C241 C224 C273 AT28 VCCIO
1

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

TC17 DY AU26 VCCIO


SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
AU28 1D5V_S0_1D8V_S0
2

2
VCCIO
ST220U2D5VBM-2GP

DY AV26
196mA
2

VCCIO
AV28 VCCIO VCCVRM AT24
AW26 VCCIO
AW28 VCCIO 1D05V_VTT

DMI
BA26 VCCIO VCCDMI AT16
BA28 +1.1VS_VCC_DMI 0R0603-PAD
BB26
BB28
VCCIO
VCCIO VCCDMI AU16 1
R220
2 61mA 1D8V_S0 3D3V_S0

VCCIO

1
3D3V_S0 BC26 C282 1D05V_S0
VCCIO

1
PCI E*
BC28 VCCIO 1 DY 2 DY
BD26 SC1U6D3V2KX-GP R222 0R3J-0-U-GP R246

2
VCCIO 0R3J-0-U-GP
BD28 VCCIO 1130 -SC 0R0603-PAD
1

BE26 AM16 +V_NVRAM_VCCQ R247


C225 VCCIO VCCPNAND
BE28 AK16
156mA

2
VCCIO VCCPNAND
SCD1U10V2KX-5GP

BG26 AK20
2

VCCIO VCCPNAND
BG28 VCCIO VCCPNAND AK19

1
BH27 AK15 C286 VCCPNAND which power the DC NAND interface must be powered even if dual channel
VCCIO VCCPNAND SCD1U10V2KX-5GP
VCCPNAND AK13 NAND interface is not connected since it also supplies power to other functions inside
1D05V_S0 AN30 AM12

2
VCCIO VCCPNAND PCH.

NAND / SPI
AN31 VCCIO VCCPNAND AM13
1
L16
DY 2 C538 VCCPNAND AM15

357mA
1

IND-1UH-2-GP AN35
SC10U6D3V3MX-GP VCC3_3
B
DY B
2

VCCAFDI_VRM AT22 VCCVRM[1]


1D05V_S0 +1.05VS_VCCAPLL_FDI BJ18 AM8
VCCFDIPLL VCCME3_3 3D3V_S0
VCCME3_3 AM9
FDI

AM23 AP11 0R0603-PAD


VCCIO VCCME3_3
VCCME3_3 AP9 85mA VCCME3_3 1
R248
2
1

1
C185 C253 C237 C238 C240 C287
SC10U6D3V3MX-GP

DY SCD1U10V2KX-5GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY IBEXPEAK-M-GP-NF
1130 -SC
2

2
1130 -SC
0113 -1
1D5V_S0_1D8V_S0

VCCAFDI_VRM 1 R214 2
0R0603-PAD

1D5V_S0_1D8V_S0
1D8V_S0
A <Variant Name> A

1 R202 2
0R0603-PAD
1D5V_S0 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 2 Taipei Hsien 221, Taiwan, R.O.C.
DY
R212 Title
0R3J-0-U-GP
PCH (7/9)
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 17 of 72
5 4 3 2 1
5 4 3 2 1

1D05V_S0 +1.05VS_VCCA_CLK
L7

SC1U10V2KX-1GP
52mA 1 DY 2 PCH1J POWER 10 OF 10 1D05V_S0

1
IND-10UH-30-GP C176 C177 AP51 V24
VCCACLK VCCIO

SC10U6D3V3MX-GP
DY DY VCCIO V26

1
AP53 Y24 C247

2
VCCACLK VCCIO
VCCIO Y26
SC1U6D3V2KX-GP 3D3V_S5

2
1D05V_S0 AF23 V28
VCCLAN VCCSUS3_3
VCCSUS3_3 U28
R213 1 2 0R2J-2-GP +1.05VS_VCCLAN AF24 U26
VCCLAN VCCSUS3_3
D
VCCSUS3_3 U24 D

2
DY VCCSUS3_3 P28

1
R217 C262 DCPSUSBYP Y20 P26 C232 C259
0R0402-PAD DCPSUSBYP VCCSUS3_3 C233
VccLAN may be DY VCCSUS3_3 N28

1
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
N26 SC1U6D3V2KX-GP
grounded if Intel LAN is

2
C272 VCCSUS3_3
AD38 M28

1
disabled VCCME VCCSUS3_3
M26

2
VCCSUS3_3

SCD1U10V2KX-5GP
AD39 L28

USB
VCCME VCCSUS3_3
1130 -SC AD41
VCCSUS3_3 L26
J28 3D3V_S5
1D05V_S0 VCCME VCCSUS3_3
VCCSUS3_3 J26
AF43 H28
1.849A VCCME VCCSUS3_3
VCCSUS3_3 H26

1
C248 C235 AF41 G28
VCCME VCCSUS3_3

1
C266 G26 C245
VCCSUS3_3
AF42 F28 SCD1U10V2KX-5GP

2
VCCME VCCSUS3_3

SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP F26

2
VCCSUS3_3 3D3V_S5
V39 VCCME VCCSUS3_3 E28
E26

Clock and Miscellaneous


VCCSUS3_3
V41 VCCME VCCSUS3_3 C28
VCCSUS3_3 C26

2
V42 B27 3D3V_S0
VCCME VCCSUS3_3 D7
HM42-CP SA Inductance:10uH Y39
VCCSUS3_3 A28
A26 CH751H-40PT-GP
VCCME VCCSUS3_3

1
C258 DY
1D05V_S0 current :125mA SC1U10V2KX-1GP Y41 U23 1D05V_S0
L8

1
VCCME VCCSUS3_3

2
83.R0304.A8F

2
1 2 +1.05VS_VCCA_A_DPL Y42 VCCME VCCIO V23 2ND = 83.R2004.B8F5V_S5 D6
IND-10UH-215-GP C187 3rd = 83.R3004.A8F CH751H-40PT-GP
1mA
1

C C182 F24 +5VALW _PCH_VCC5REFSUS 1 2 C


SC10U6D3V3MX-GP V5REF_SUS R204 10R2J-2-GP
DY 83.R0304.A8F

1
1
SC1U6D3V2KX-GP +VCCRTCEXT C255 2ND = 83.R2004.B8F
V9 1124 -SC
2

DCPRTC SC1U10V2KX-1GP 5V_S0


68.1001D.10E 1
1D5V_S0_1D8V_S0
3rd = 83.R3004.A8F
2ND = 68.10010.10T
1mA

2
C285 K49 +5VS_PCH_VCC5REF 1 2
L9 V5REF
SCD1U10V2KX-5GP AU24 R116 10R2J-2-GP
2

VCCVRM

PCI/GPIO/LPC

1
+1.05VS_VCCA_B_DPL
1 2
IND-10UH-215-GP C188 J38
Intel check list update from 0.1uF to 1uF C180
VCC3_3
1

68.1001D.10E C183 BB51 SCD1U10V2KX-5GP


68mA +1.05VS_VCCA_A_DPL

2
VCCADPLLA 3D3V_S0
2ND = 68.10010.10T DY BB53 VCCADPLLA VCC3_3 L38
SC1U6D3V2KX-GP
2

M36

SC10U6D3V3MX-GP
69mA +1.05VS_VCCA_B_DPL BD51
BD53
VCCADPLLB
VCC3_3
N36
VCCADPLLB VCC3_3

1
AH23 P36 C274
VCCIO VCC3_3 3D3V_S0

SCD1U10V2KX-5GP
AJ35

2
1D05V_S0 VCCIO SCD1U10V2KX-5GP
AH35 VCCIO VCC3_3 U35
C279 1 2
AF34 VCCIO
VCC3_3 AD13
AH34 VCCIO
1

C257 C244 C271 1D05V_S0


+1.05VS_VCCAPLL L19
SC1U6D3V2KX-GP AF32
SC1U6D3V2KX-GP SC1U6D3V2KX-GP VCCIO
AK3 1 DY 2 32mA
2

VCCSATAPLL
V12 DCPSST VCCSATAPLL AK1

1
C566 C568 IND-10UH-30-GP
+VCCSST SC1U10V2KX-1GP DY DY SC1U10V2KX-1GP
B 1D05V_S0 B

2
1

+1.1VALW _INT_VCCSUS Y22


C281 DCPSUS
VCCIO AH22
1

SCD1U10V2KX-5GP
2

1
C269 1D5V_S0_1D8V_S0 C249
SCD1U10V2KX-5GP P18 AT20
2

VCCSUS3_3 VCCVRM SC1U6D3V2KX-GP

2
3D3V_S5 U19
SATA

VCCSUS3_3
PCI/GPIO/LPC

AH19
163mA U20 VCCSUS3_3
VCCIO
AD20
VCCIO
1

U22 VCCSUS3_3
C242 AF22
SCD1U10V2KX-5GP 3D3V_S0 VCCIO
2

VCCIO AD19
V15 VCC3_3 VCCIO AF20
AF19 +3VS_+1.5VS_HDA_IO 0R0603-PAD
VCCIO
1

V16 VCC3_3 VCCIO AH20 1 2 3D3V_S5


C278 R203
SCD1U10V2KX-5GP Y16 AB19
2

VCC3_3 VCCIO
1D05V_VTT 0111 -1 VCCIO AB20

0R0603-PAD VCCIO AB22


AD22
1130 -SC 1D05V_S0 1130 -SC
1 2 1mA +1.1VS_PCH_CPU_IO AT18 V_CPU_IO
VCCIO
SCD1U10V2KX-5GP

R218 AA34 PCH_VCC_1_1_20 R177 10R0603-PAD


2
CPU

VCCME
1

C280 C277 Y34 PCH_VCC_1_1_21 R179 10R0603-PAD


2
C265 VCCME PCH_VCC_1_1_22 R178
DY AU18 V_CPU_IO VCCME Y35 10R0603-PAD
2
SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP AA35 PCH_VCC_1_1_23 R191 10R0603-PAD
2
2

VCCME +3VS_+1.5VS_HDA_IO
A 1130 -SC UMA A

6mA
RTC

A12 VCCRTC VCCSUSHDA L30


RTC_AUX_S5
HDA

Wistron Corporation
1

0R0603-PAD C234
1
R223
2 2mA +1.1VS_PCH_VCCRTC IBEXPEAK-M-GP-NF
SC1U6D3V2KX-GP
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2
1

C284 C283 Title


SCD1U10V2KX-5GP SCD1U10V2KX-5GP
PCH ( 8/9 )
2

Size Document Number Rev


A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 18 of 72
5 4 3 2 1
5 4 3 2 1

PCH1I 9 OF 10
AY7 VSS VSS H49
B11 VSS VSS H5
B15 VSS VSS J24
B19 VSS VSS K11
B23 VSS VSS K43
B31 VSS VSS K47
B35 VSS VSS K7
B39 VSS VSS L14
B43 VSS VSS L18
B47 VSS VSS L2
D B7 VSS VSS L22 D
PCH1H 8 OF 10 BG12 L32
VSS VSS
AB16 VSS BB12 VSS VSS L36
BB16 VSS VSS L40
AA19 VSS VSS AK30 BB20 VSS VSS L52
AA20 VSS VSS AK31 BB24 VSS VSS M12
AA22 VSS VSS AK32 BB30 VSS VSS M16
AM19 VSS VSS AK34 BB34 VSS VSS M20
AA24 VSS VSS AK35 BB38 VSS VSS N38
AA26 VSS VSS AK38 BB42 VSS VSS M34
AA28 VSS VSS AK43 BB49 VSS VSS M38
AA30 VSS VSS AK46 BB5 VSS VSS M42
AA31 VSS VSS AK49 BC10 VSS VSS M46
AA32 VSS VSS AK5 BC14 VSS VSS M49
AB11 VSS VSS AK8 BC18 VSS VSS M5
AB15 VSS VSS AL2 BC2 VSS VSS M8
AB23 VSS VSS AL52 BC22 VSS VSS N24
AB30 VSS VSS AM11 BC32 VSS VSS P11
AB31 VSS VSS BB44 BC36 VSS VSS AD15
AB32 VSS VSS AD24 BC40 VSS VSS P22
AB39 VSS VSS AM20 BC44 VSS VSS P30
AB43 VSS VSS AM22 BC52 VSS VSS P32
AB47 VSS VSS AM24 BH9 VSS VSS P34
AB5 VSS VSS AM26 BD48 VSS VSS P42
AB8 VSS VSS AM28 BD49 VSS VSS P45
AC2 VSS VSS BA42 BD5 VSS VSS P47
AC52 VSS VSS AM30 BE12 VSS VSS R2
AD11 VSS VSS AM31 BE16 VSS VSS R52
AD12 VSS VSS AM32 BE20 VSS VSS T12
C AD16 AM34 BE24 T41 C
VSS VSS VSS VSS
AD23 VSS VSS AM35 BE30 VSS VSS T46
AD30 VSS VSS AM38 BE34 VSS VSS T49
AD31 VSS VSS AM39 BE38 VSS VSS T5
AD32 VSS VSS AM42 BE42 VSS VSS T8
AD34 VSS VSS AU20 BE46 VSS VSS U30
AU22 VSS VSS AM46 BE48 VSS VSS U31
AD42 VSS VSS AV22 BE50 VSS VSS U32
AD46 VSS VSS AM49 BE6 VSS VSS U34
AD49 VSS VSS AM7 BE8 VSS VSS P38
AD7 VSS VSS AA50 BF3 VSS VSS V11
AE2 VSS VSS BB10 BF49 VSS VSS P16
AE4 VSS VSS AN32 BF51 VSS VSS V19
AF12 VSS VSS AN50 BG18 VSS VSS V20
Y13 VSS VSS AN52 BG24 VSS VSS V22
AH49 VSS VSS AP12 BG4 VSS VSS V30
AU4 VSS VSS AP42 BG50 VSS VSS V31
AF35 VSS VSS AP46 BH11 VSS VSS V32
AP13 VSS VSS AP49 BH15 VSS VSS V34
AN34 VSS VSS AP5 BH19 VSS VSS V35
AF45 VSS VSS AP8 BH23 VSS VSS V38
AF46 VSS VSS AR2 BH31 VSS VSS V43
AF49 VSS VSS AR52 BH35 VSS VSS V45
AF5 VSS VSS AT11 BH39 VSS VSS V46
AF8 VSS VSS BA12 BH43 VSS VSS V47
AG2 VSS VSS AH48 BH47 VSS VSS V49
AG52 VSS VSS AT32 BH7 VSS VSS V5
AH11 VSS VSS AT36 C12 VSS VSS V7
AH15 VSS VSS AT41 C50 VSS VSS V8
B B
AH16 VSS VSS AT47 D51 VSS VSS W2
AH24 VSS VSS AT7 E12 VSS VSS W52
AH32 VSS VSS AV12 E16 VSS VSS Y11
AV18 VSS VSS AV16 E20 VSS VSS Y12
AH43 VSS VSS AV20 E24 VSS VSS Y15
AH47 VSS VSS AV24 E30 VSS VSS Y19
AH7 VSS VSS AV30 E34 VSS VSS Y23
AJ19 VSS VSS AV34 E38 VSS VSS Y28
AJ2 VSS VSS AV38 E42 VSS VSS Y30
AJ20 VSS VSS AV42 E46 VSS VSS Y31
AJ22 VSS VSS AV46 E48 VSS VSS Y32
AJ23 VSS VSS AV49 E6 VSS VSS Y38
AJ26 VSS VSS AV5 E8 VSS VSS Y43
AJ28 VSS VSS AV8 F49 VSS VSS Y46
AJ32 VSS VSS AW14 F5 VSS VSS P49
AJ34 VSS VSS AW18 G10 VSS VSS Y5
AT5 VSS VSS AW2 G14 VSS VSS Y6
AJ4 VSS VSS BF9 G18 VSS VSS Y8
AK12 VSS VSS AW32 G2 VSS VSS P24
AM41 VSS VSS AW36 G22 VSS VSS T43
AN19 VSS VSS AW40 G32 VSS VSS AD51
AK26 VSS VSS AW52 G36 VSS VSS AT8
AK22 VSS VSS AY11 G40 VSS VSS AD47
AK23 VSS VSS AY43 G44 VSS VSS Y47
AK28 VSS VSS AY47 G52 VSS VSS AT12
AF39 VSS VSS AM6
IBEXPEAK-M-GP-NF H16 AT13
VSS VSS
H20 VSS VSS AM5
A H30 VSS VSS AK45 <Variant Name> A
H34 VSS VSS AK39
H38 VSS VSS AV14
H42 VSS Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

IBEXPEAK-M-GP-NF Title

PCH ( 9/9 )
Size Document Number Rev
A3
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 19 of 72
5 4 3 2 1
5 4 3 2 1

3D3V_S0

6 M_A_A[15..0] DM1

1
M_A_A0 98 NP1 R564
M_A_A1 A0 NP1
0D75_S0 M_A_A2
97
A1 NP2
NP2 DY 10KR2J-3-GP
96
M_A_A3 A2
95 110 M_A_RAS# 6 Note:

2
M_A_A4 A3 RAS#
92 113 M_A_WE# 6
M_A_A5 A4 WE# If SA0 DIM0 = 0, SA1_DIM0 = 0
91 115 M_A_CAS# 6

1
M_A_A6 A5 CAS# SA0_DIM0
90 SO-DIMMA SPD Address is 0xA0
R545 M_A_A7 A6
86 114 M_CS#0 6
A7 CS0#
S3 22R2F-1-GP M_A_A8 89
A8 CS1#
121 M_CS#1 6
SA1_DIM0 SO-DIMMA TS Address is 0x30
M_A_A9 85
M_A_A10 A9
1016 -SA Q45 107 73 M_CKE0 6

1
1
A10/AP CKE0
M_A_A11 84
A11 CKE1
74 M_CKE1 6 If SA0 DIM0 = 1, SA1_DIM0 = 0
D G M_A_A12 83 R560 R565 D

. .
8,13 PM_SLP_S3_CTL PM_SLP_S3_CTL_D1 M_A_A13 119
A12
101 10KR2J-3-GP 10KR2J-3-GP SO-DIMMA SPD Address is 0xA2
A13 CK0 M_CLK_DDR0 6
D M_A_A14 80 103 SO-DIMMA TS Address is 0x32

.
.
.
A14 CK0# M_CLK_DDR#0 6
M_A_A15 78

2
2
A15
S S3 6 M_A_BS2
79
A16/BA2 CK1
102 M_CLK_DDR1 6
104 M_CLK_DDR#1 6
CK1#
109 M_A_DM[7..0] 6
2N7002E-1-GP 6 M_A_BS0 BA0 M_A_DM0
108 11
84.2N702.D31 6 M_A_BS1 BA1 DM0 M_A_DM1
6 M_A_DQ[63..0] 28
M_A_DQ0 DM1 M_A_DM2
2ND = 84.2N702.E31
M_A_DQ1
5
7
DQ0 DM2
46
63 M_A_DM3 1209 -SC
M_A_DQ2 DQ1 DM3 M_A_DM4
15 136
M_A_DQ3 DQ2 DM4 M_A_DM5
17 153
M_A_DQ4 DQ3 DM5 M_A_DM6
4 170
M_A_DQ5 DQ4 DM6 M_A_DM7
M_A_DQ6
6
16
DQ5 DM7
187 1209 -SC
M_A_DQ7 DQ6 SODIMM0_1_SMB_DATA_R
18 200 1 R558 2 0R0402-PAD PCH_SMBDATA 3,12,21
M_A_DQ8 DQ7 SDA SODIMM0_1_SMB_CLK_R
21 202 1 R557 2 0R0402-PAD PCH_SMBCLK 3,12,21
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9 TS#_DIMM0 3D3V_S0
33 198 1 R559 2 PM_EXTTS#0_R 5
M_A_DQ11 DQ10 EVENT# 0R0402-PAD
35
M_A_DQ12 DQ11
22 199
M_A_DQ13 DQ12 VDDSPD
24
DQ13

2
M_A_DQ14 34 197 SA0_DIM0 C604
M_A_DQ15 DQ14 SA0 SA1_DIM0 C601
36 201
DQ15 SA1

SCD1U10V2KX-5GP
M_A_DQ16 39 SC2D2U10V3KX-1GP

1
M_A_DQ17 DQ16
41 77
M_A_DQ18 DQ17 NC#77
51 122
M_A_DQ19 DQ18 NC#122 1D5V_S3
53 125
M_A_DQ20 DQ19 NC#125/TEST
40
M_A_DQ21 DQ20
42 75
M_A_DQ22 DQ21 VDD
50 76
M_A_DQ23 DQ22 VDD
52 81
M_A_DQ24 DQ23 VDD
57 82
M_A_DQ25 DQ24 VDD
59 87
M_A_DQ26 DQ25 VDD
67 88
M_A_DQ27 DQ26 VDD
M_A_DQ28
69
DQ27 VDD
93 SODIMM A DECOUPLING
56 94
M_A_DQ29 DQ28 VDD 1D5V_S3
58 99
M_A_DQ30 DQ29 VDD
68 100
M_A_DQ31 DQ30 VDD
70 105
M_A_DQ32 DQ31 VDD
C 129 106 C
M_A_DQ33 DQ32 VDD
131 111
M_A_DQ34 DQ33 VDD
141 112
M_A_DQ35 DQ34 VDD
143 117

1
M_A_DQ36 DQ35 VDD C317 C352 C319 C320 C318
130 118
DQ36 VDD

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
M_A_DQ37 132 123 DY
M_A_DQ38 DQ37 VDD
140 124

2
M_A_DQ39 DQ38 VDD
142
DDR_VREF_S3 M_A_DQ40 DQ39
147 2
0R0603-PAD M_A_DQ41 DQ40 VSS
149 3
M_VREF_CA_DIMM0 M_A_DQ42 DQ41 VSS
1 2 157 8
R296 M_A_DQ43 DQ42 VSS
159 9
DQ43 VSS
1

M_A_DQ44 146 13
C324DY C325 M_A_DQ45 DQ44 VSS
148 14
DQ45 VSS

REVERSE TYPE
SCD1U10V2KX-5GP M_A_DQ46
SC2D2U10V3KX-1GP 158 19 1130 -SC
2

M_A_DQ47 DQ46 VSS


160 20
M_A_DQ48 DQ47 VSS
163 25
M_A_DQ49 DQ48 VSS C315 C314 C346 C343 C316 C347
165 26 Layout Note:

1
DQ49 VSS

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
M_A_DQ50 175 31 DY
M_A_DQ51 DQ50 VSS Place these Caps near
177 32
M_A_DQ52 DQ51 VSS
1130 -SC 164 37 SO-DIMMA. DY

2
M_A_DQ53 DQ52 VSS
166 38
DDR_VREF_S3 M_A_DQ54 DQ53 VSS
174 43
0R0603-PAD M_A_DQ55 DQ54 VSS
176 44
M_VREF_DQ_DIMM0 M_A_DQ56 DQ55 VSS
1 2 181 48
R299 M_A_DQ57 DQ56 VSS
183 49
1

M_A_DQ58 DQ57 VSS


191 54
C327DY C328 M_A_DQ59 DQ58 VSS
193 55
SCD1U10V2KX-5GP M_A_DQ60 DQ59 VSS
SC2D2U10V3KX-1GP 180 60
2

M_A_DQ61 DQ60 VSS


182 61
M_A_DQ62 DQ61 VSS
192 65
M_A_DQ63 DQ62 VSS
194 66
DQ63 VSS
6 M_A_DQS#[7..0] 71
M_A_DQS#0 VSS
10 72
M_A_DQS#1 DQS0# VSS
27 127
M_A_DQS#2 DQS1# VSS
45 128
M_A_DQS#3 DQS2# VSS
62 133
M_A_DQS#4 DQS3# VSS
135 134
M_A_DQS#5 DQS4# VSS
152 138
M_A_DQS#6 DQS5# VSS
169 139
0D75_S0 M_A_DQS#7 DQS6# VSS
B HM42-CP NV Muxless SA 0918 186
DQS7# VSS
144
145 B
6 M_A_DQS[7..0] VSS
M_A_DQS0 12 150
M_A_DQS1 DQS0 VSS
29 151
M_A_DQS2 DQS1 VSS
47 155
M_A_DQS3 DQS2 VSS
64 156
M_A_DQS4 DQS3 VSS
137 161
M_A_DQS5 DQS4 VSS
154 162
M_A_DQS6 DQS5 VSS
171 167
M_A_DQS7 DQS6 VSS
Place these caps 188
DQS7 VSS
168
172
close to VTT1 and VSS
116 173
6 M_ODT0 ODT0 VSS
VTT2. 120 178
6 M_ODT1 ODT1 VSS
179
M_VREF_CA_DIMM0 VSS
126 184
M_VREF_DQ_DIMM0 VREF_CA VSS
1 185
10 M_VREF_DQ_DIMM0 VREF_DQ VSS
189
VSS
1

C322 C329 30 190


16,21 DDR3_DRAMRST# RESET# VSS
195
VSS
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

196
2

VSS
203 205
VTT1 VSS
204 206
VTT2 VSS

DDR3-240P-28-GP
H =8mm 62.10017.R91
2ND = 62.10017.S01
3rd = 62.10017.V61 1126 -SC

A A

Diserete N11M

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number


DDRIII Socket DM1 Rev
A2
HM42-CP SC
Date: Friday, January 22, 2010 Sheet 20 of 72
5 4 3 2 1
5 4 3 2 1

6 M_B_A[15..0] DM2

M_B_A0 98 NP1
M_B_A1 A0 NP1 3D3V_S0
97 NP2
M_B_A2 A1 NP2
96
M_B_A3 A2
95 110 M_B_RAS# 6
M_B_A4 A3 RAS#
92 113 M_B_WE# 6

1
M_B_A5 A4 WE#
91 115 M_B_CAS# 6
M_B_A6 A5 CAS# R304
90
M_B_A7 A6 10KR2J-3-GP
86 114 M_CS#2 6
M_B_A8 A7 CS0#
89 121 M_CS#3 6
M_B_A9 A8 CS1#
85

2
M_B_A10 A9
107 73 M_CKE2 6
M_B_A11 A10/AP CKE0
84 74 M_CKE3 6
M_B_A12 A11 CKE1 SA1_DIM1
83
M_B_A13 A12
119 101 M_CLK_DDR2 6
M_B_A14 A13 CK0 SA0_DIM1
80 103 M_CLK_DDR#2 6
M_B_A15 A14 CK0#
78
A15
D 79 102 M_CLK_DDR3 6 D
A16/BA2 CK1

1
6 M_B_BS2
104 M_CLK_DDR#3 6
CK1# R302 R303
109 M_B_DM[7..0] 6
6 M_B_BS0 BA0 M_B_DM0 10KR2J-3-GP
6 M_B_BS1
108
BA1 DM0
11
M_B_DM1
DY 10KR2J-3-GP
6 M_B_DQ[63..0] 28
M_B_DQ0 DM1 M_B_DM2
5 46

2
M_B_DQ1 DQ0 DM2 M_B_DM3
7 63
M_B_DQ2 DQ1 DM3 M_B_DM4
15 136
M_B_DQ3 DQ2 DM4 M_B_DM5
17 153
M_B_DQ4 DQ3 DM5 M_B_DM6
4 170
M_B_DQ5 DQ4 DM6 M_B_DM7
6 187
M_B_DQ6 DQ5 DM7
M_B_DQ7
16
18
DQ6
200 SODIMM1_1_SMB_DATA_R 1208 -SC 1 R570 2 0R0402-PAD
DQ7 SDA PCH_SMBDATA 3,12,20
M_B_DQ8 21 202 SODIMM1_1_SMB_CLK_R 1 R568 2 0R0402-PAD
DQ8 SCL PCH_SMBCLK 3,12,20
M_B_DQ9 23
M_B_DQ10 DQ9 TS#_DIMM1 3D3V_S0
33 198 1 R572 2 PM_EXTTS#1_R 5
M_B_DQ11 DQ10 EVENT# 0R0402-PAD
35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD
24

2
M_B_DQ14 DQ13 SA0_DIM1 C340
M_B_DQ15
34
DQ14 SA0
197
SA1_DIM1