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19-2419; Rev 4; 7/05

7.6A, 12ns, SOT23/TDFN, MOSFET Driver

General Description Features

MAX5048
The MAX5048A/MAX5048B are high-speed MOSFET ♦ Independent Source-and-Sink Outputs for
drivers capable of sinking/sourcing 7.6A/1.3A peak cur- Controllable Rise and Fall Times
rents. These devices take logic input signals and drive
a large external MOSFET. The MAX5048A/MAX5048B ♦ +4V to +12.6V Single Power Supply
have inverting and noninverting inputs that give the ♦ 7.6A/1.3A Peak Sink/Source Drive Current
user greater flexibility in controlling the MOSFET. They
♦ 0.23Ω Open-Drain n-Channel Sink Output
feature two separate outputs working in complementary
mode, offering flexibility in controlling both turn-on and ♦ 2Ω Open-Drain p-Channel Source Output
turn-off switching speeds. ♦ 12ns (typ) Propagation Delay
The MAX5048A/MAX5048B have internal logic circuitry,
♦ Matching Delay Time Between Inverting and
which prevents shoot-through during output state
changes. The logic inputs are protected against volt- Noninverting Inputs
age spikes up to +14V, regardless of V+ voltage. ♦ VCC/2 CMOS (MAX5048A)/TTL (MAX5048B) Logic
Propagation delay time is minimized and matched Inputs
between the inverting and noninverting inputs. The
MAX5048A/MAX5048B have very fast switching times ♦ 1.6V Input Hysteresis
combined with very short propagation delays (12ns ♦ Up to +14V Logic Inputs (Regardless of V+
typ), making them ideal for high-frequency circuits. Voltage)
The MAX5048A/MAX5048B operate from a +4V to +12.6V ♦ Low Input Capacitance: 2.5pF (typ)
single power supply and typically consume 0.95mA of
supply current. The MAX5048A has CMOS input logic ♦ -40°C to +125°C Operating Temperature Range
levels, while the MAX5048B has standard TTL input logic ♦ 6-Pin SOT23 and TDFN Packages
levels. These devices are available in space-saving
6-pin SOT23 and TDFN packages. Ordering Information
Applications PART TEMP RANGE
PIN- LOGIC TOP
PACKAGE INPUT MARK
Power MOSFET Switching
Switch-Mode Power Supplies VCC/2
MAX5048AAUT-T -40°C to +125°C 6 SOT23-6 ABEC
CMOS
DC-DC Converters
MAX5048BAUT-T -40°C to +125°C 6 SOT23-6 TTL ABED
Motor Control VCC/2
MAX5048AATT-T -40°C to +125°C 6 TDFN-6 AKV
Power-Supply Modules CMOS
MAX5048BATT-T -40°C to +125°C 6 TDFN-6 TTL AKW

Typical Operating Circuit Pin Configurations

TOP VIEW
V+
V+ P_OUT
V+ 1 6 IN+

MAX5048A
MAX5048B MAX5048A
P_OUT 2 MAX5048B 5 IN-
IN+ N_OUT N

IN- N_OUT 3 4 GND


GND
SOT23

Pin Configurations continued at end of data sheet.

________________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
7.6A, 12ns, SOT23/TDFN, MOSFET Driver

ABSOLUTE MAXIMUM RATINGS


MAX5048

Voltages Referenced to GND Junction to Case Thermal Resistance, θJC (SOT23)....75°C/W


V+ ...........................................................................-0.3V to +13V 6-Pin TDFN (derate 18.2mW/°C above +70°C) .........1454mW
IN+, IN-...................................................................-0.3V to +14V Junction to Case Thermal Resistance, θJC (TDFN) ....8.5°C/W
N_OUT, P_OUT ............................................-0.3V to (V+ + 0.3V) Operating Temperature Range .........................-40°C to +125°C
N_OUT Continuous Output Current (Note 1) ....................390mA Storage Temperature Range .............................-65°C to +150°C
P_OUT Continuous Output Current (Note 1).....................100mA Junction Temperature ......................................................+150°C
Continuous Power Dissipation* (TA = +70°C) Lead Temperature (soldering, 10s) .................................+300°C
6-Pin SOT23 (derate 9.1mW/°C above +70°C)............727mW
Note 1: Continuous output current is limited by the power dissipation of the package.
*As per JEDEC51 standard.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS
(V+ = +12V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS


POWER SUPPLY
V+ Operating Range V+ 4.0 12.6 V
V+ Undervoltage Lockout UVLO V+ rising 3.25 3.6 4.00 V
V+ Undervoltage Lockout
400 mV
Hysteresis
V+ Undervoltage Lockout to
V+ rising 300 ns
Output Delay Time
V+ Supply Current I+ IN+ = IN- = V+ 0.95 1.5 mA
n-CHANNEL OUTPUT
V+ = +10V, TA = +25°C 0.23 0.26
Driver Output Resistance— IN-OUT = -100mA TA = +125°C 0.38 0.43
Pulling Down (MAX5048AAUT/ RON-N Ω
MAX5048BAUT) V+ = +4.5V, TA = +25°C 0.24 0.28
IN-OUT = -100mA TA = +125°C 0.40 0.47
V+ = +10V, TA = +25°C 0.31 0.34
Driver Output Resistance— IN-OUT = -100mA TA = +125°C 0.46 0.51
Pulling Down (MAX5048AATT/ RON-N Ω
MAX5048BATT) V+ = +4.5V, TA = +25°C 0.32 0.36
IN-OUT = -100mA TA = +125°C 0.48 0.55
Power-Off Pulldown Resistance V+ = 0 or floating, IN-OUT = -10mA, TA = +25°C 3.3 10 Ω
Power-Off Pulldown Clamp V+ = 0 or floating, IN-OUT = -10mA,
0.85 1.0 V
Voltage TA = +25°C
Output Leakage Current ILK-N N_OUT = V+ 6.85 20 µA
Peak Output Current (Sinking) IPK-N CL = 10,000pF 7.6 A
p-CHANNEL OUTPUT
V+ = +10V, TA = +25°C 2.00 3.00
Driver Output Resistance— IP-OUT = 50mA TA = +125°C 2.85 4.30
Pulling Up (MAX5048AAUT/ RON-P Ω
V+ = +4.5V, TA = +25°C 2.20 3.30
MAX5048BAUT)
IP-OUT = 50mA TA = +125°C 3.10 4.70

2 _______________________________________________________________________________________
7.6A, 12ns, SOT23/TDFN, MOSFET Driver

ELECTRICAL CHARACTERISTICS (continued)

MAX5048
(V+ = +12V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
V+ = +10V, TA = +25°C 2.08 3.08
Driver Output Resistance— IP-OUT = 50mA TA = +125°C 2.93 4.38
Pulling Up (MAX5048AATT/ RON-P Ω
MAX5048BATT) V+ = +4.5V, TA = +25°C 2.28 3.38
IP-OUT = 50mA TA = +125°C 3.18 4.78
Output Leakage Current ILK-P P_OUT = 0 0.001 10 µA
Peak Output Current (Sourcing) IPK-P CL = 10,000pF 1.3 A
LOGIC INPUT
MAX5048A 0.67 x V+
Logic 1 Input Voltage VIH V
MAX5048B 2.4
MAX5048A 0.33 x V+
Logic 0 Input Voltage VIL V
MAX5048B 0.8
MAX5048A 1.6
Logic-Input Hysteresis VHYS V
MAX5048B 0.68
Logic-Input Current VIN_ = V+ or 0 0.001 10 µA
Input Capacitance CIN 2.5 pF
SWITCHING CHARACTERISTICS FOR V+ = +10V
CL = 1000pF 8
Rise Time tR CL = 5000pF 45 ns
CL = 10,000pF 82
CL = 1000pF 3.2
Fall Time tF CL = 5000pF 7.5 ns
CL = 10,000pF 12.5
Turn-On Propagation Delay Time tD-ON Figure 1, CL = 1000pF (Note 3) 7 12 25 ns
Turn-Off Propagation Delay Time tD-OFF Figure 1, CL = 1000pF (Note 3) 7 12 25 ns
Break-Before-Make Time 2.5 ns
SWITCHING CHARACTERISTICS FOR V+ = +4.5V
CL = 1000pF 12
Rise Time tR CL = 5000pF 41 ns
CL = 10,000pF 74
CL = 1000pF 3.0
Fall Time tF CL = 5000pF 7.0 ns
CL = 10,000pF 11.3
Turn-On Propagation Delay Time tD-ON Figure 1, CL = 1000pF (Note 3) 8 14 27 ns
Turn-Off Propagation Delay Time tD-OFF Figure 1, CL = 1000pF (Note 3) 8 14 27 ns
Break-Before-Make Time 4.2 ns
Note 2: All DC specifications are 100% tested at TA = +25°C. Specifications over -40°C to +125°C are guaranteed by design.
Note 3: Guaranteed by design, not production tested.

_______________________________________________________________________________________ 3
7.6A, 12ns, SOT23/TDFN, MOSFET Driver
MAX5048

Typical Operating Characteristics


(CL = 1000pF, TA = +25°C, unless otherwise noted.)

PROPAGATION DELAY TIME, LOW-TO-HIGH


RISE TIME vs. SUPPLY VOLTAGE FALL TIME vs. SUPPLY VOLTAGE vs. SUPPLY VOLTAGE
20 6.0 20
MAX5048 toc01

MAX5048 toc02

MAX5048 toc03
TA = +125°C TA = +85°C TA = +125°C
5.5
17 TA = +125°C 18 TA = +85°C

PROPAGATION DELAY (ns)


5.0
TA = +85°C TA = +25°C TA = -40°C
TA = 0°C
FALL TIME (ns)
RISE TIME (ns)

14 4.5 16 TA = 0°C
TA = +25°C
TA = -40°C 4.0
TA = +25°C TA = 0°C TA = -40°C
11 14
3.5

3.0
8 12
2.5

5 2.0 10
4 6 8 10 12 4 6 8 10 12 4 6 8 10 12
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)

PROPAGATION DELAY TIME, HIGH-TO-LOW


vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. LOAD CAPACITANCE
20 12 4.0
MAX5048 toc04

MAX5048 toc05

MAX5048 toc06
DUTY CYCLE = 50% V+ = +10V
V+ = +10V, CL = 0 3.5 f = 100kHz
TA = +125°C 10 DUTY CYCLE = 50%
18
PROPAGATION DELAY (ns)

3.0
SUPPLY CURRENT (mA)

SUPPLY CURRENT (mA)

TA = +85°C 8
16 1MHz 2.5
TA = +25°C TA = 0°C TA = -40°C
6 2.0
14 500kHz
1.5
4
100kHz 75kHz 40kHz 1.0
12
2
0.5

10 0 0
4 6 8 10 12 4 6 8 10 12 0 400 800 1200 1600 2000
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) LOAD CAPACITANCE (pF)

MAX5048A
INPUT THRESHOLD VOLTAGE MAX5048A
SUPPLY CURRENT vs. TEMPERATURE vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. INPUT VOLTAGE
1.8 8 1.8
MAX5048 toc09
MAX5048 toc07

MAX5048 toc08

V+ = +10V
f = 100kHz, CL = 0 1.7
7
1.7 INPUT INPUT
INPUT THRESHOLD VOLTAGE (V)

DUTY CYCLE = 50% 1.6


6 HIGH-TO-LOW LOW-TO-HIGH
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)

RISING 1.5
1.6
5 1.4
1.5 4 1.3
1.2
3
1.4 1.1
FALLING
2
1.0
1.3
1 0.9
1.2 0 0.8
-50 -25 0 25 50 75 100 125 4 6 8 10 12 0 2 4 6 8 10 12
TEMPERATURE (°C) SUPPLY VOLTAGE (V) INPUT VOLTAGE (V)

4 _______________________________________________________________________________________
7.6A, 12ns, SOT23/TDFN, MOSFET Driver

Typical Operating Characteristics (continued)

MAX5048
(CL = 1000pF, TA = +25°C, unless otherwise noted.)

INPUT VOLTAGE vs. OUTPUT VOLTAGE INPUT VOLTAGE vs. OUTPUT VOLTAGE INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +4V, CL = 5000pF) (V+ = +4V, CL = 10,000pF) (V+ = +4V, CL = 5000pF)
MAX5048 toc10 MAX5048 toc11 MAX5048 toc12

IN+ IN+
2V/div 2V/div

IN+
2V/div
OUTPUT OUTPUT
2V/div 2V/div

OUTPUT
2V/div

20ns/div 20ns/div 20ns/div

INPUT VOLTAGE vs. OUTPUT VOLTAGE INPUT VOLTAGE vs. OUTPUT VOLTAGE INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +4V, CL = 10,000pF) (V+ = +12V, CL = 5000pF) (V+ = +12V, CL = 10,000pF)
MAX5048 toc13 MAX5048 toc14 MAX5048 toc15

IN+ IN+
5V/div 5V/div

IN+
2V/div

OUTPUT OUTPUT OUTPUT


2V/div 5V/div 5V/div

20ns/div 20ns/div 20ns/div

INPUT VOLTAGE vs. OUTPUT VOLTAGE INPUT VOLTAGE vs. OUTPUT VOLTAGE
(V+ = +12V, CL = 5000pF) (V+ = +12V, CL = 10,000pF)
MAX5048 toc16 MAX5048 toc17

IN+ IN+
5V/div 5V/div

OUTPUT OUTPUT
5V/div 5V/div

20ns/div 20ns/div

_______________________________________________________________________________________ 5
7.6A, 12ns, SOT23/TDFN, MOSFET Driver

Pin Description Undervoltage Lockout (UVLO)


MAX5048

When V+ is below the UVLO threshold, the N-channel


PIN NAME FUNCTION is ON and the P-channel is OFF, independent of the
Power Supply. Bypass to GND with a state of the inputs. The UVLO is typically 3.6V with
1 V+
0.1µF ceramic capacitor. 400mV typical hysteresis to avoid chattering.

2 P_OUT
p-Channel Open-Drain Output. Sources Driver Outputs
current for MOSFET turn-on. The MAX5048A/MAX5048B provide two separate out-
n-Channel Open-Drain Output. Sinks puts. One is an open-drain P-channel, the other an
3 N_OUT open-drain N-channel. They have distinct current sourc-
current for MOSFET turn-off.
ing/sinking capabilities to independently control the rise
4 GND Ground and fall times of the MOSFET gate. Add a resistor in
Inverting Logic Input Terminal. Connect series with P_OUT/N_OUT to slow the corresponding
5 IN-
to GND when not used. rise/fall time of the MOSFET gate.

6 IN+
Noninverting Logic Input Terminal. Applications Information
Connect to V+ when not used.
Supply Bypassing, Device Grounding,
Exposed paddle. Connect to GND.
and Placement
— EP Solder EP to the GND plane for
Ample supply bypassing and device grounding are
improved thermal performance.
extremely important because when large external
capacitive loads are driven, the peak current at the V+
Detailed Description pin can approach 1.3A, while at the GND pin the peak
Logic Inputs current can approach 7.6A. V CC drops and ground
The MAX5048A/MAX5048Bs’ logic inputs are protected shifts are forms of negative feedback for inverters and, if
against voltage spikes up to +14V, regardless of the V+ excessive, can cause multiple switching when the IN-
voltage. The low 2.5pF input capacitance of the inputs input is used and the input slew rate is low. The device
reduces loading and increases switching speed. These driving the input should be referenced to the
devices have two inputs that give the user greater flexi- MAX5048A/MAX5048B GND pin especially when the IN-
bility in controlling the MOSFET. Table 1 shows all pos- input is used. Ground shifts due to insufficient device
sible input combinations. grounding may disturb other circuits sharing the same
AC ground return path. Any series inductance in the V+,
The difference between the MAX5048A and the P_OUT, N_OUT and/or GND paths can cause oscilla-
MAX5048B is the input threshold voltage. The tions due to the very high di/dt that results when the
MAX5048A has VCC/2 CMOS logic-level thresholds, MAX5048A/MAX5048B are switched with any capacitive
while the MAX5048B has TTL logic-level thresholds (see load. A 0.1µF or larger value ceramic capacitor is rec-
the Electrical Characteristics). For V+ above 5.5V, VIH ommended bypassing V+ to GND and placed as close
(typ) = 0.5x(V+) + 0.8V and VIL (typ) = 0.5x(V+) - 0.8V. to the pins as possible. When driving very large loads
As V+ is reduced from 5.5V to 4V, VIH and VIL gradually (e.g., 10nF) at minimum rise time, 10µF or more of paral-
approach VIH (typ) = 0.5x(V+) + 0.65V and VIL (typ) = lel storage capacitance is recommended. A ground
0.5x(V+) - 0.65V. Connect IN+ to V+ or IN- to GND plane is highly recommended to minimize ground return
when not used. Alternatively, the unused input can be resistance and series inductance. Care should be taken
used as an ON/OFF pin (see Table 1). to place the MAX5048A/MAX5048B as close as possi-
ble to the external MOSFET being driven to further mini-
Table 1. Truth Table mize board inductance and AC path resistance.
IN+ IN- p-CHANNEL n-CHANNEL Power Dissipation
L L OFF ON Power dissipation of the MAX5048A/MAX5048B con-
L H OFF ON sists of three components, caused by the quiescent
current, capacitive charge and discharge of internal
H L ON OFF
nodes, and the output current (either capacitive or
H H OFF ON resistive load). The sum of these components must be
L = Logic low kept below the maximum power-dissipation limit.
H = Logic high

6 _______________________________________________________________________________________
7.6A, 12ns, SOT23/TDFN, MOSFET Driver

MAX5048
IN+
VIH

VIL

P_OUT AND
N_OUT
TIED 90%
TOGETHER

10%

tD–OFF tF tD–ON tR
TIMING DIAGRAM

V+ V+

MAX5048A
MAX5048B

IN+ P_OUT
INPUT
N_OUT OUTPUT
IN-
GND CL

TEST CIRCUIT

Figure 1. Timing Diagram and Test Circuit

The quiescent current is 0.95mA typical. The current following PC board layout guidelines are recommended
required to charge and discharge the internal nodes is when designing with the MAX5048A/MAX5048B:
frequency dependent (see the Typical Operating • Place one or more 0.1µF decoupling ceramic capaci-
Characteristics). The MAX5048A/MAX5048B power dis- tor(s) from V+ to GND as close to the device as possi-
sipation when driving a ground referenced resistive ble. At least one storage capacitor of 10µF (min)
load is: should be located on the PC board with a low resis-
P = D x RON(MAX) x ILOAD2 tance path to the V+ pin of the MAX5048A/MAX5048B.
where D is the fraction of the period the MAX5048A/ • There are two AC current loops formed between the
MAX5048Bs’ output pulls high, RON (MAX) is the maxi- device and the gate of the MOSFET being driven.
mum on-resistance of the device with the output high The MOSFET looks like a large capacitance from
(P-channel), and ILOAD is the output load current of the gate to source when the gate is being pulled low.
MAX5048A/MAX5048B. The active current loop is from N_OUT of the
For capacitive loads, the power dissipation is: MAX5048A/MAX5048B to the MOSFET gate to the
MOSFET source and to GND of the MAX5048A/
P = CLOAD x (V+)2 x FREQ MAX5048B. When the gate of the MOSFET is being
where CLOAD is the capacitive load, V+ is the supply pulled high, the active current loop is from P_OUT of
voltage, and FREQ is the switching frequency. the MAX5048A/MAX5048B to the MOSFET gate to
the MOSFET source to the GND terminal of the
Layout Information decoupling capacitor to the V+ terminal of the
The MOSFET drivers MAX5048A/MAX5048B source- decoupling capacitor and to the V+ terminal of the
and-sink large currents to create very fast rise and fall MAX5048A/MAX5048B. While the charging current
edges at the gate of the switching MOSFET. The high loop is important, the discharging current loop is crit-
di/dt can cause unacceptable ringing if the trace ical. It is important to minimize the physical distance
lengths and impedances are not well controlled. The and the impedance in these AC current paths.

_______________________________________________________________________________________ 7
7.6A, 12ns, SOT23/TDFN, MOSFET Driver
MAX5048

• In a multilayer PC board, the component surface Chip Information


layer surrounding the MAX5048A/MAX5048B should
TRANSISTOR COUNT: 676
consist of a GND plane containing the discharging
and charging current loops. PROCESS: BiCMOS

VS

V+
MAX5048A
MAX5048B V+
(4V TO 12.6V)
P V+ P_OUT
BREAK-
IN- BEFORE- P_OUT
MAKE MAX5048A
N_OUT
CONTROL MAX5048B
N IN+ N_OUT
IN+

IN-
GND GND

Figure 2. MAX5048A/MAX5048B Functional Diagram Figure 3. Noninverting Application

4V TO 12V
VS
V+
IN+ P_OUT P

MAX5048A/
MAX5048B
N_OUT
V+
(4V TO 12.6V) IN-
V+ P_OUT VOUT
FROM PWM GND
CONTROLLER
MAX5048A (BUCK) VOUT

FROM PWM
MAX5048B
IN+ N_OUT V+
CONTROLLER IN+ P_OUT
(BOOST)

IN- MAX5048A
GND MAX5048B
N_OUT N

IN-
GND

Figure 4. Boost Converter Figure 5. MAX5048A/MAX5048B in High-Power Synchronous


Buck Converter

8 _______________________________________________________________________________________
7.6A, 12ns, SOT23/TDFN, MOSFET Driver

Pin Configurations (continued)

MAX5048
TOP VIEW

V+ 1 6 IN+

P_OUT 2 MAX5048A 5 IN-


MAX5048B
N_OUT 3 4 GND
EXPOSED PAD

TDFN
3mm x 3mm

Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)

6LSOT.EPS

PACKAGE OUTLINE, SOT 6L BODY


1
21-0058 G 1

_______________________________________________________________________________________ 9
7.6A, 12ns, SOT23/TDFN, MOSFET Driver
MAX5048

Package Information (continued)


(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)

6, 8, &10L, DFN THIN.EPS


D2
D
A2 PIN 1 ID

0.35x0.35
b

PIN 1 [(N/2)-1] x e
E REF.
INDEX E2
AREA DETAIL A
e

A1 k

CL CL

A
L L

e e

PACKAGE OUTLINE, 6,8,10 & 14L,


TDFN, EXPOSED PAD, 3x3x0.80 mm

-DRAWING NOT TO SCALE-


1
21-0137 G 2

10 ______________________________________________________________________________________
7.6A, 12ns, SOT23/TDFN, MOSFET Driver

Package Information (continued)

MAX5048
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)

COMMON DIMENSIONS
SYMBOL MIN. MAX.
A 0.70 0.80
D 2.90 3.10
E 2.90 3.10
A1 0.00 0.05
L 0.20 0.40
k 0.25 MIN.
A2 0.20 REF.

PACKAGE VARIATIONS
DOWNBONDS
PKG. CODE N D2 E2 e JEDEC SPEC b [(N/2)-1] x e ALLOWED
T633-1 6 1.50±0.10 2.30±0.10 0.95 BSC MO229 / WEEA 0.40±0.05 1.90 REF NO
T633-2 6 1.50±0.10 2.30±0.10 0.95 BSC MO229 / WEEA 0.40±0.05 1.90 REF NO
T833-1 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF NO
T833-2 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF NO
T833-3 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF YES
T1033-1 10 1.50±0.10 2.30±0.10 0.50 BSC MO229 / WEED-3 0.25±0.05 2.00 REF NO
T1433-1 14 1.70±0.10 2.30±0.10 0.40 BSC ---- 0.20±0.05 2.40 REF YES
T1433-2 14 1.70±0.10 2.30±0.10 0.40 BSC ---- 0.20±0.05 2.40 REF NO

PACKAGE OUTLINE, 6,8,10 & 14L,


TDFN, EXPOSED PAD, 3x3x0.80 mm

-DRAWING NOT TO SCALE- 2


21-0137 G 2

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11

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