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Edited by Bill Travis


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Slow diodes or handy timing devices?


Louis Vlemincq, Belgacom, Evere, Belgium
ost designers consider slowness ased. When the control signal reverses its

M in diodes to be an imperfection or
a limitation. Why not take a more
positive view of the situation? After all, a
polarity, a negative bias appears immedi-
ately on Q1, but D2 cannot instantly cease
conducting and short-circuits the base
R1 C1

zener or an avalanche diode is no more drive to Q2 during all of its reverse recov-
than a diode with a limited breakdown ery time. The advantage of generating a D1 LF
voltage, and you can view a varactor as a dead time in this way lies in the fact that
diode with a large and nonlinear parasitic you need include only a small safety mar-
capacitance. Similarly, could you view the gin: The phenomena governing the re-
slowness of a diode as a property or even covery time of a diode are similar to those
a feature? For example, consider a PIN resulting in storage times in power de-
diode. Few people are aware that the key vices. In particular, they both display
a strong positive-temperature co-
efficient, for which this In this circuit, a slow diode pro-
Figure 2
Q1 scheme compensates. The tects the switching transistor from
D1 ability to operate at duty cycles destructive voltage transients.
close to 100% allows a better us-
age of the power components, gy from C1 to the transformer and ulti-
PWM DRIVE translating into savings and high- mately to the load. The overall efficiency
er performance: A universal-input is therefore better, and R1 can have high-
supply, for instance, can operate at er resistance and can be smaller. Added to
Q2
lower supply voltages. the lower cost of a standard diode versus
D2 Figure 2 shows another exam- a fast one, the method provides non-neg-
Figure 1
ple. This standard clamping cir- ligible benefits.
You can use slow diodes to generate dead time in a cuit protects the switching tran- It is preferable to select a diode with a
half-bridge configuration. sistor of a flyback converter recovery time as long as possible. Popu-
against the voltage spike generat- lar types, such as the 1N400X series, have
property of a PIN diode is indeed its ed by the imperfect coupling between the recovery times of approximately 2.5 sec,
slowness; without it, it would generate primary and the secondary windings but some models reach more than 5 sec.
large amounts of distortion and require of the transformer. In an equivalent Ideally, C1 and LF should resonate at a pe-
a larger control current to function prop- schematic, this scenario translates into a riod equal to twice the diode’s recovery
erly. You can put this ability of slow leakage inductance, LF, in series with the
diodes to store large amounts of electri- primary winding. The circuit works in
Slow diodes or handy
cal charge to good use in a variety of oth- the following way: Each time the transis-
timing devices? ..............................................83
er circuits. Figure 1 shows how to gener- tor turns off, the current in the leakage
ate dead time using such diodes. A PWM inductance continues to flow, but D1 in- Diode compensates distortion
sandcastle (stepped) waveform feeds a tercepts it and “redirects” it to C1. C1 has in amplifier stage ..........................................84
half-bridge. a large enough capacitance that cycle-to- Transistors offer overload delay ................86
In a classical implementation, you must cycle variations do not influence it. The
Inertial-navigation system
insert dead time in the control circuitry to average voltage on C1 results from a bal-
uses silicon sensors........................................88
avoid the simultaneous conduction of the ance between the charging input from the
two transistors when the duty cycle ap- leakage inductance and the current that LED driver provides oscillator
proaches 100%. This dead time is a stan- bleeds from R1. Usually, D1 is a fast diode, for microcontroller ........................................90
dard feature of PWM-control ICs. If you but, if you substitute it with a slow one, Use op-amp injection
use slow diodes for D1 and D2, you need interesting things happen: Instead of for Bode analysis............................................90
no dead time. If, for example, Q1 receives switching off when the voltage on C1 Publish your Design Idea in EDN. See the
a positive base, or gate, drive and is there- reaches its peak, D1 continues to conduct, What’s Up section at www.edn.com.
fore conducting, D2 becomes forward-bi- thus transferring back charge and ener-
www.edn.com September 16, 2004 | edn 83
design
ideas
time. When the component values are itive cycle of the resonance to the aver- Normally, these small snags should
nearly optimum, R1 can have a large val- age clamping voltage and because slow pose no problem; you can substitute the
ue, its only role being to provide a “seed” diodes often exhibit a slightly poorer for- new components in a design without any
current to prime the circuit. You pay a ward-recovery characteristic than do other change. The circuits in figures 1
small penalty for these advantages: The their fast counterparts. This characteris- and 2 are only two examples, but you can
peak clamping voltage increases by sev- tic results in a step of several volts at the apply the same useful principles to a va-
eral volts, because you must add the pos- beginning of the conduction. riety of other circuits.왏

Diode compensates distortion in amplifier stage


S Chekcheyev, Pridnestrovye State University, Moldova
he voltage amplifier in Figure 1

T exhibits smaller nonlinear distortion


than does the conventional amplifier
in Figure 2. Diode D1 compensates for
the distortion inherent in the npn tran-
sistor. The voltage gain of a common-
emitter amplifier depends on the
transconductance of the transistor. The
transconductance of the bipolar transis-
tor is as follows:
Nonlinearity of the The diode in the circuit of
Figure 3 Figure 4
transconductance of Q1 Figure 1 produces varying,
results in this distorted waveform. beneficial, negative feedback.
where e is the charge of an electron, k is
Boltzmann’s constant (approximately tive half-cycle (Figure 3). 20
1.381023J/K), TC is temperature in The dynamic resistance of diode D1 in CONVENTIONAL
AMPLIFIER
degrees Celsius, I is the emitter current, Figure 1 is inversely proportional to the 15 LINEARIZED
AMPLIFIER
and ne/[k(273TC)]. So, the trans- instantaneous current. That dynamic re-
THD
conductance is proportional to the emit- sistance forms part of the negative-feed- (%) 10
back circuit of the amplifier. The average
current of diode D1 is equal to the aver- 5
12V
R3 age emitter current of transistor Q1.
R1 2k OUTPUT However, the instantaneous current of D1 0
C1 100k
becomes smaller, and the instantaneous 0 1 2 3 4 5
INPUT 10 F Q1 VOUT P-P
dynamic resistance of D1 becomes
BC847C
larger when the instantaneous emit- Figure 5 The linearized amplifier pro-
R2 R4 C2 ter current of Q1 becomes larger, and vice duces less than one-third the harmonic distor-
36k 510 1000 F
versa. Therefore, the negative feedback tion of the conventional amplifier.
D1 becomes stronger during the negative
D1N4148
half-cycle of the output signal. As a result, comes more symmetric (Figure 4). The
R5 C3 the output signal of the amplifier be- circuits in figures 1 and 2 have the same
510 1000 F
average collector current and the same
Figure 1 12V load resistance. Figures 3 and 4 show the
R1 R3 results of their PSpice simulation. The
The addition of a simple diode in the emitter cir- 100k 2k OUTPUT amplitude of the output signal is 5V p-p
C1
cuit yields the symmetric waveform of Figure 4. 10 F in both cases with a 1-kHz sinusoidal sig-
INPUT Q1
BC847C nal applied to the input. You can see that
ter current. Consequently, the instanta- R2
the linearized amplifier yields a more
neous voltage-gain coefficient of the con- 36k R4 C2 symmetrical output signal. Figure 5 gives
1.5k 1000 F
ventional common-emitter amplifier is the quantitative results of the simula-
proportional to the instantaneous tions. The improvement in harmonic dis-
emitter current. As a result, the neg- Figure 2 tortion accrues because of the suppres-
ative half-cycle of the output signal gets This amplifier circuit produces the distorted sion of the even harmonics in the output
more amplification than does the posi- waveform of Figure 3. of the linearized amplifier.왏
84 edn | September 16, 2004 www.edn.com
design
ideas
Transistors offer overload delay
Christophe Basso, On Semiconductor, Toulouse, France
lthough an SMPS VOUT trigger the protection. This

A (switch-mode power
supply) can protect itself
against permanent short cir-
circuit does not delay the
rise of the feedback voltage
but momentarily increases
cuits, it sometimes has prob- IOUT the output-power level by a
lems when dealing with tran- given percentage. When
sient overloads. Transient I
I
3

2
IOUT is within regulation,
overloads are not short cir- I1
Pin 2 is below 3V and D1 is
cuits but can push the power MAXIMUM not biased. As a result, Q2 is
FEEDBACK
supply above its nominal FB EXCURSION blocked and Q1 pulls R3’s
load value. This scenario oc- lower terminal to ground.
REGULATION
curs with typical loads such IS LOST The current-sense pin
as printer heads and small REGULATION OVERLOAD 1 OVERLOAD 2 SHORT CIRCUIT therefore sees a current im-
motors. When facing such a START-UP age, which the voltage-di-
load profile, the power vider ratio of R2 and R3 af-
Figure 1
supply can easily trigger Overloads and short circuits can be similar in this typical fects.
its protection circuit, espe- power profile for a printer. In this example, VPIN4
cially if the open-loop gain is VSENSER3/(R3R2)0.82
high. You will see any decrease in the out- its internal pullup voltage and triggers a VSENSE, where VSENSE is the voltage across
put voltage on the primary side as a loss protective burst mode. Note that this RSENSE. If the NCP1200 imposes a maxi-
of feedback current, because the con- protection acts independently of any mum-current setpoint of 1V, the IC au-
troller cannot keep the voltage constant. badly coupled auxiliary level, because the thorizes 1.2V over RSENSE as long as Q1 is
Figure 1 shows a typical power profile high-voltage source (Pin 8) directly pow- biased (instead of 1V in a regular config-
for a printer. You can clearly see the pow- ers the controller. In the presence of uration). As soon as Pin 2 jumps to a
er variations and the corresponding overloads 1 and 2, Pin 2 would jump to higher value, such as 4V, indicating a loss
feedback-voltage swings that occur. The the maximum of its capability and would of regulation or a severe overload, D1
start-up sequence is a short circuit be-
cause, with VOUT far from its target, the HIGH VOLTAGE
feedback current is not yet established.
The nominal output current, I1, corre-
sponds to the regulation zone, in which
the load is constant. When a first overload 1 8
occurs (I2 in Figure 1), the feedback pin
pushes the primary-current setpoint (in 2 7
a current-mode controller), but the NCP1200
waveform’s excursion starts to diminish, 3 6
because it is approaching its maximum Q3
Q4
level. In I3, the power supply has difficul- 4 5
ty remaining in regulation and, in short-
circuit condition, VOUT collapses to
ground. If the primary PWM controller R4 R2
R3 1k
has a simple short-circuit-protection Q5 D1
10k 4.7k +
scheme, the protection mechanism can 3.3V CVCC
RSENSE
trigger in the overload zones 1 and 2, R5 Q1
whereas it should trigger only in the fi- 22k
Q2
nal one. Figure 2 portrays an approach + C
based on the NCP1200 from On Semi- R6 3
1k 10 F
conductor (www.onsemi.com).
This circuit permanently monitors the
feedback line (Pin 2) to detect
Figure 2
whether a short circuit is present on A transistor network increases the peak current for a moment until the power sup-
the secondary side. If so, Pin 2 jumps to ply gives up by reducing the peak setpoint.
86 edn | September 16, 2004 www.edn.com
design
ideas
starts to conduct via Q4.This transistor opens. The divider goes away, the power sult, by dimensioning the R5 and C3 ele-
buffers the feedback-pin impedance: C3 supply no longer ensures a large peak ments, you can insert a delay to enable
starts to charge up via R5, and, when it current, and VOUT goes down, thereby the supply to cope with transient loads.왏
reaches approximately 0.7V at 25C, Q1 properly triggering the protection. As re-

Inertial-navigation system uses silicon sensors


Tom Niemi, Rockwell Collins, Cedar Rapids, IA
strap-down inertial-navigation

P40
P41
P42
P43
P44
P45
VPP
XT1
XT2
VDD2
VSS0
X1
X2
RESET
P46
P47
P00
P01
P02
P03
A system uses silicon sensors to meas-
ure displacement without entailing
the bulk and expense of moving parts or
1

2
5V

GROUND
1
2
3
4
5
6
7
V

V
V
V
DD1
BIAS
V LCD0
LCD1
LCD2
SS1
COM0
P50
P51
P52
P53
P20
P21
P22
GPS receivers. For example, a three-axis CXL04M3 X AXIS 8 COM1 P23
THREE-AXIS 3 AN10 9 COM2 P24
PD78F9418A
accelerometer and three angular-rate ACCELEROMETER 11
COM3
S0
P25
P26

sensors can determine the position and Y AXIS 12 S1 P27


48
4 AN11 13 S2 AVSS
47
14 S3 AN10
velocity of a vehicle such as a robot or ra- 15
16
S4
S5
AN11
AN12
46
45
dio-controlled aircraft. This hardware Z AXIS 17 S6 AN13 44
5 AN12 18 S7 AN14 43
configuration requires that you read and 19
20
S8
S9
AN15
AN16
42

AVREF
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
5V DD
integrate the sensor outputs and then

V
combine and process them to obtain sta- (a)

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38

40
R5
bilized location values. Figure 1 shows 2.7k (c)
one such complete system. An inexpen-
sive 8-bit microcontroller can handle the
R6
sensor reading and integration tasks, and 1 8 2.7k
perform simple lowpass filtering of the VINⳮ V+
2 7
accelerometer’s output to remove con- VIN+ INA118 VOUT R7
version noise. The microcontroller can 3 6 AN13 1 8 2.7k
Vⳮ V
even run a basic position and velocity al- 4 5
REF VINⳮ
2 7
V+
gorithm; alternatively, you can pass the VIN+ INA118 VOUT
3 6 AN14
preprocessed data to a DSP system. The VREF
1 8
Vⳮ
NEC (www.necelam.com) PD78- 4 5 VINⳮ
2 7
V+
F9418A microcontroller has seven ADC VIN+ INA118 VOUT
X AXIS VOUT 3 6 AN15
inputs, so it can handle the six inputs 5V
1 2 VREF
Vⳮ
from the sensors. VREF V
4 5
CG-16D GND
Because a Crossbow (www.cross 3 4
Y AXIS
5V VOUT
bow.com) CXL04M3 accelerometer de- ANGULAR RATE 1 2
2 SENSOR
livers 0.5V/g (9.8m/sec ), it can directly VREF CG-16D VGND
feed three of the microcontroller’s ADC 3 4
Z AXIS VOUT
5V
inputs. Each NEC/Tokin CG-16D angu- ANGULAR RATE 1 2
(b) SENSOR
lar-rate sensor generates only 1.1 VREF CG-16D VGND
3 4
mV//sec, so it requires the aid of an in-
strumentation amplifier. The Burr- An accelerometer (a), three silicon sensors (b), and ANGULAR RATE
Figure 1 SENSOR
Brown (www.ti.com) INA118 fills a microcontroller (c) fit together to form a complete
the bill. The microcontroller has enough inertial-navigation system.
I/O lines to drive three Varitronix
(www.varitronix.com) VIM-503 41/2- culates the average value of the ac- the time squared, halve that quantity, and
digit LCDs that display the x, y, and z lo- celerometer’s outputs over 1000 samples then add the result and the bias value to
cation relative to the starting point. One and uses this information to calculate the previous x position. You find veloci-
of the fundamental tasks in this applica- bias-error adjustments for each axis. You ty by multiplying the bias-corrected x-
tion is to initialize the sensors and A/D apply each bias value by adding it to the axis reading by the time and then adding
converters to minimize bias error. Listing readings for that axis. Using the x axis as it to the previous x velocity. You can
1 at the Web version of this Design Idea an example, you determine the vehicle’s download the microcontroller code from
at www.edn.com shows the code to cali- movement from its starting point by in- the Web version of this Design Idea at
brate the accelerometer. The routine cal- tegrating: Multiply the x-axis reading by www.edn.com.왏
88 edn | September 16, 2004 www.edn.com
design
ideas
LED driver provides oscillator for microcontroller
Wallace Ly, National Semiconductor, Santa Clara, CA
he major building blocks for a LM2791/2 to provide a clock source. You inverter (Figure 1). The net signal is a

T white-LED driver are an oscillator, a


charge pump, and a regulated cur-
rent source. National Semiconductor
can realize a simple yet useful circuit by
accounting for the fact that a pseudo
square wave is present across the flying
clean, 2-MHz clock source. The oscillo-
scope graph depicts the pseudo square
wave and the resultant square wave at the
(www.national.com) produces a device capacitor’s (C1) pins. You can take this output of the inverters (Figure 2). You
that contains all these building blocks in pseudo square wave from these pins and can use this signal as a simple clock
the highly integrated LM2791/2 IC. You clean it up. source for a baseband controller or mi-
usually use white-LED drivers in tandem To accomplish this task, you inject the crocontroller to perform simple tasks
with cellular baseband controllers or mi- signal, via a 330 resistor, R1, into a sim- such as keypad decoding or battery-iden-
crocontrollers. You can easily adapt the ple inverter gate, such as a DM7404 hex tification detection.왏

1G SAMPLE/SEC

VIN
POUT

CIN 1 F CHOLD
FLYING
CAPACITOR
2V P–P

X(2)
R1 C1 CURRENT
CHARGE
330 SOURCES LED1
PUMP
IS LED2
SD
R3 MICRO-
BRIGHT CONTROLLER
INPUT
5.36V P–P

Figure 1
PB1
CK0 PORT11
1V BW M 500 nSEC 2.12 V
COP8SBR PB2
CK1 PORT12

DM7404 INVERTERS
Figure 2 A logic inverter cleans up the pseudo square wave
(top) from the flying capacitor; the result (bottom) is a stable clock
A white-LED driver doubles as a clocking source for a microcontroller. source for the microcontroller.

Use op-amp injection for Bode analysis


Martin Galinski, Micrel Semiconductor, San Jose, CA
ode analysis is an excellent way to mon method of injection is the use of

B measure small-signal stability and


loop response in power-supply de-
signs. Bode analysis monitors gain and
POWER-SUPPLY
OUTPUT NETWORK-
ANALYZER
"A" INPUT

NETWORK-
transformer. Figure 1 demonstrates how
a transformer injects a signal into the
feedback network. A 50 resistor affords
phase of a control loop. It performs this 50
impedance matching to the network-an-
ANALYZER
monitoring by breaking the feedback SOURCE alyzer source. This method allows the dc
loop and injecting a signal into the feed- loop to maintain regulation and allows
back node and then comparing the in- FEEDBACK NETWORK- the network analyzer to insert an ac sig-
jected signal with the output signal of the ANALYZER nal on the dc voltage. The network ana-
"R" INPUT
control loop. The method requires a lyzer then sweeps the source while mon-
Figure 1
network analyzer to sweep the fre- itoring A (voltage channel) and R
quency and compare the injected signal Bode analysis using transformer injection yields (reference channel) for an A/R-ratio
with the output signal. The most com- gain and phase information in a control loop. measurement. Although this method is
90 edn | September 16, 2004 www.edn.com
design
ideas
NETWORK-ANALYZER
the most common for meas- NETWORK-ANALYZER "A" INPUT by a factor of two by R3
"R" INPUT
uring the gain and phase of a and R4 and goes to the
power supply, it has signifi- 8V feedback output. (The
R1
cant limitations. First, to 1k POWER- 50 resistor balances the
measure low-frequency gain MIC922BC5 + SUPPLY network analyzer’s source
and phase, the transformer FEEDBACK OUTPUT impedance.) This action
needs high inductance. Fre- _ essentially breaks the loop
R2
quencies lower than 100 Hz, R3 1k and injects the ac signal
therefore, require a large and 1k 8V on top of the dc output
expensive transformer. R4 voltage and sends it to the
Figure 2
Also, the transformer 1k feedback terminal. By
must be able to inject high Op-amp injection is a NETWORK-ANALYZER monitoring the feedback
50 SOURCE
frequencies. Transformers good alternative to trans- terminal (R) and output
with these wide frequency former-based injection terminal (A), the analyzer
ranges generally are custom- and has no minimum-fre- measures gain and phase.
made and usually cost sever- quency limitation. This method has no min-
al hundred dollars. By using imum frequency. Make
an op amp, you can avoid the cost and output to the noninverting input by half. sure that the bandwidth of the op amp
frequency limitations of an injection The network analyzer is generally a 50 is much greater than the expected band-
transformer. Figure 2 demonstrates the source. R1 and R2 also divide the ac signal width of the power supply’s control loop.
use of an op amp in a summing- ampli- from the network analyzer by half. These An op amp with at least 100-MHz band-
fier configuration for signal injection. R1 two signals “sum” together at half their width is more than adequate for most
and R2 reduce the dc voltage from the original input. The output then gains up linear and switching power supplies.왏

92 edn | September 16, 2004 www.edn.com

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