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REVISION HISTORY

V1.0 INITIAL RELEASE

V1.1 Change U1100 from STM32L476MEY6TR 512K Flash


part to STM32L476MG 1M Flash part.

MOTO MODS DEVELOPMENT KIT SCHEMATIC


(PARTIAL)
Development MDK
Connectors Internals

USB2.0 Phone
Connector

USB2.0 High
USB myDP myDP
3:1 Speed
Micro-B Switch Group
A

USB2.0

USB
Type C
#2
USB3.1

I2S
MPHY
USB3.1
I2S
MPHY 4:6
High
Switch
CDSI0 Speed
Group
B
CDSI1
MHB
I2S

SPI
EEPROM

UART

SPI
2:1
switch
I2C (Primary)

I2C (Secondary) Low


Speed
UART
MuC and

P-card GPIO x16


Cmd/
Conn Ctrl

Debug UART

SWD
USB
FTDI
Type C
FT4232 Debug UART
#1 To MHB
SWD
To MHB

System
B2B power B2B Phone
pFETs pFETs Battery

A Power
Path
A 2:1 Controller
B2B B switch
pFETs

USB-C #1
VBUS
2:1
switch
2:1 USB-C #2
VBUS
switch
Li-Ion
Battery
Charger

5V
8 7 6 5 4 3 2 1

MDK MAIN PVT


D
D
P-CARD CDSI0_CLK_P
MHB PHONE_CONNECTOR
DSI1_CP 1
CDSI0_CLK_N MOD_MPHY_RX_DP
DSI1_CN 0
MHB_MPHY_TX_DP MOD_MPHY_APRX_DP
CDSI0_D0_P MOD_MPHY_RX_DM
DSI1_DP0 3
MHB_MPHY_TX_DM MOD_MPHY_APRX_DM
CDSI0_D0_N MOD_MPHY_TX_DP
DSI1_DN0 2
MHB_MPHY_RX_DP MOD_MPHY_APTX_DP
CDSI0_D1_P MOD_MPHY_TX_DM
DSI1_DP1 5
MHB_MPHY_RX_DM MOD_MPHY_APTX_DM
CDSI0_D1_N
DSI1_DN1 4
CDSI0_D2_P MHB_I2S_BCLK MOD_I2S_BCLK
DSI1_DP2 7
MHB_I2S_BCLK MHB_I2S_BCLK MOD_I2S_BCLK
CDSI0_D2_N MHB_I2S_LRCLK MOD_I2S_LRCLK
DSI1_DN2 6
MHB_I2S_LRCLK MHB_I2S_LRCLK MOD_I2S_LRCLK
CDSI0_D3_P MHB_I2S_SDO MOD_I2S_SDO
DSI1_DP3 9
MHB_I2S_SDO MHB_I2S_SDO MOD_I2S_SDO
DSI1_DN3
CAM1_CP
CDSI0_D3_N
CDSI1_CLK_P
8
1
MHB_CDSI0<9..0>
MHB_CDSI1<9..0>
MHB_CDSI0<9..0>
MHB_CDSI1<9..0>
MHB_I2S_SDI
MHB_I2S_SDI
MHB_I2S_SDI MOD_I2S_SDI
MOD_I2S_SDI
USB
CDSI1_CLK_N MOD_USB_DP
CAM1_CN 0
MOD_USB_DP MOD_USB_DP
CDSI1_D0_P MOD_USB_DM PCARD_USB_DP
CAM1_DP0
ROOT MOD_USB_DM MOD_USB_DM PCARD_USB_DP
3
CDSI1_D0_N MOD_AUXP PCARD_USB_DM
CAM1_DN0 2
MOD_AUXP USBB_ID PCARD_USB_DM
CDSI1_D1_P
CAM1_DP1 5
CDSI1_D1_N MHB_PWR_EN MOD_CC MOD_USB_SS_TX_DP
CAM1_DN1 4
MHB_PWR_EN MUC_PG14 MOD_CC MOD_CC MOD_USB_SS_TX_DP USBC_TX1_DP
CDSI1_D2_P MHB_RST_N MOD_SPI_MOSI MOD_USB_SS_TX_DM
CAM1_DP2 7
MHB_RST_N MUC_PH1 MOD_SPI_MOSI MOD_SPI_MOSI MOD_USB_SS_TX_DM USBC_TX1_DM
CDSI1_D2_N MHB_WAKE_IN MOD_SPI_MISO MOD_USB_SS_RX_DP
CAM1_DN2 6
MHB_WAKE_IN MUC_PB5 MOD_SPI_MISO MOD_SPI_MISO MOD_USB_SS_RX_DP USBC_RX1_DP
CDSI1_D3_P MHB_WAKE_OUT MOD_SPI_CLK MOD_USB_SS_RX_DM
CAM1_DP3 9
MHB_WAKE_OUT MUC_PB8 MOD_SPI_CLK MOD_SPI_CLK MOD_USB_SS_RX_DM USBC_RX1_DM
CDSI1_D3_N MHB_SPIBOOT_N MOD_SPI_CS_N
CAM1_DN3 8
MHB_SPIBOOT_N MUC_PA8 MOD_SPI_CS_N MOD_SPI_CS_N
C MHB_SFLASH_CLK C
MHB_SFLASH_CLK MHB_SPI_CLK USBC_HST_PWR_EN
MHB_GPIO8 MHB_SFLASH_CS_N MUC_PA11 USBC_HOST_PWR_EN
CDSI_GPIO0 MHB_GPIO8 MHB_SFLASH_CS_N MHB_SPI_CS_N FUSB302_INT_N
MHB_CLK_19P2_MHZ MHB_SFLASH_DI MUC_PG13 FUSB302_INT_N
REFCLK_19P2 CLK_19P2_MHZ MHB_SFLASH_DI MHB_SPI_DI MUC_MSTR_I2C_SCL
MHB_SFLASH_DO FUSB302_I2C_SCL
MHB_SFLASH_DO MHB_SPI_DO MUC_MSTR_I2C_SDA
HSIC_STROBE FUSB302_I2C_SDA
HSIC_STB HSIC_STB
HSIC_DATA MHB_UART_RX_MUC_TX
HSIC_DAT HSIC_DATA MHB_UART_RX MUC_UART1_TX_PB6
MHB_UART_TX_MUC_RX
MHB_UART_TX MUC_UART1_RX_PB7
MHB_UART_RTS_MUC_CTS
MHB_UART_RTS MUC_UART1_CTS_PG11
MHB_UART_CTS_MUC_RTS
MHB_UART_CTS MUC_UART1_RTS_PB3

MUC_SPI_MOSI
SPI_MOSI MUC_SPI_MOSI_PA7
MUC_SPI_MISO
SPI_MISO MUC_SPI_MISO_PA6
MUC_SPI_CLK
SPI_CLK MUC_SPI_CLK_PA5
MUC_SPI_CS0_N
SPI_CS0_N MUC_SPI_CS0_N_PA4
MUC_SPI_CS1_N
SPI_CS1_N MUC_SPI_CS1_N_PA15
MUC_UART_TX_DEV_RX
UART_TX MUC_UART2_TX_PA2
MUC_UART_RX_DEV_TX
UART_RX MUC_UART2_RX_PA3
MUC_UART_RTS_DEV_CTS
UART_RTS MUC_UART2_RTS_PA1
MUC_UART_CTS_DEV_RTS
UART_CTS MUC_UART2_CTS_PA0
MUC_MSTR_I2C_SCL
B PRI_I2C_SCL MUC_I2C3_SCL_PC0 B
MUC_MSTR_I2C_SDA
PRI_I2C_SDA MUC_I2C3_SDA_PC1
MUC_I2C2_SCL
SEC_I2C_SCL MUC_I2C2_SCL_PB10
MUC_I2C2_SDA
SEC_I2C_SDA MUC_I2C2_SDA_PB11
MOD_I2S_BCLK
I2S_BCLK
MOD_I2S_LRCLK
I2S_LRCLK
MOD_I2S_SDO
I2S_SDO
MOD_I2S_SDI
I2S_SDI
MUC_PB2
GENCLK MUC_PB2
MUC_PA10
GPIO0 MUC_PA10 (WAKEABLE)
MUC_PC8
GPIO1 MUC_PC8
MUC_PC7
GPIO2 MUC_PC7 (WAKEABLE)
MUC_PD6
GPIO3 MUC_PD6 (WAKEABLE)
MUC_PA9
GPIO4 MUC_PA9
MUC_PC9
GPIO5 MUC_PC9
MUC_PH0
GPIO6 SYS_RST_N_PH0
MUC_PC3
GPIO7 MUC_PC3 (WAKEABLE)
MUC_PC12
GPIO8 MUC_PC12
MUC_PG9
GPIO9 MUC_PG9
MUC_PG10
GPIO10 MUC_PG10 (WAKEABLE)
MUC_PG12
A GPIO11 MUC_PG12 A
MUC_PC14_ALT
GPIO12 MUC_PC14_ALT APPROVALS
MUC_PC15_ALT
GPIO13 MUC_PC15_ALT
GPIO14
MUC_PD7_ALT
MUC_PD7_ALT MOBILE DEVICES
MUC_PE7_ALT
GPIO15 MUC_PE7_ALT
ENGINEER: MMI BLOCK TITLE:
PCARD_DET_N
PCARD_DET_N MUC_PD9

top
MDK_LED_DRV
MDK_LED_DRV MUC_PE8
LAST MODIFIED BY: MMI
PCARD_USB_DP
USB_DP
USB_DN
PCARD_USB_DM Tue Aug 23 15:13:46 2016
PROJECT NAME REV
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CAD FILE NAME:
PAGE 1 OF 17

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8 7 6 5 4 3 2 1

PHONE_CONN: MAIN
D
D

MOD_MPHY_APTX_DP_C
MOD_MPHY_APTX_DM_C
MOD_MPHY_APRX_DP_C
MOD_MPHY_APRX_DM_C

MOD_AUXP IO
MOD_USB_DP IO
MOD_USB_DM IO

MOD_SPI_CS_N OUT
MOD_SPI_CLK OUT
MOD_SPI_MOSI OUT
MOD_SPI_MISO IN

MOD_CC IO
C C
MOD_BPLUS
MOD_VBUS

THIS PAGE INTENTIONALLY LEFT (ALMOST) BLANK.

I/O IS SHOWN TO INCREASE SCHEMATIC READABILITY.

B B

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI phone_connector


Tue Aug 23 12:45:01 2016
PROJECT NAME REV
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CAD FILE NAME:
PAGE 2 OF 17

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

PHONE_CONN: IFACE CONFIG


"HIGH SPEED GROUP B" OPTION 1
D
COMPLETE THESE CONNECTIONS FOR MODS THAT D
USE THE MHB/MPHY FOR DISPLAY AND/OR CAMERA SUPPORT
MOD_MPHY_APRX_DP_C IN MOD_MPHY_APRX_DP
MOD_MPHY_APRX_DM_C IN MOD_MPHY_APRX_DM

MOD_MPHY_APTX_DP_C OUT MOD_MPHY_APTX_DP


MOD_MPHY_APTX_DM_C OUT MOD_MPHY_APTX_DM

MHB_I2S_BCLK IN OUT MOD_I2S_BCLK


MHB_I2S_LRCLK IN OUT MOD_I2S_LRCLK

MHB_I2S_SDO IN OUT MOD_I2S_SDO


MHB_I2S_SDI OUT IN MOD_I2S_SDI

"HIGH SPEED GROUP B" OPTION 2


C C
COMPLETE THESE CONNECTIONS FOR MODS THAT USE USB3.1

MOD_MPHY_APRX_DP_C IN MOD_USB_SS_RX_DP
MOD_MPHY_APRX_DM_C IN MOD_USB_SS_RX_DM

MOD_MPHY_APTX_DP_C OUT MOD_USB_SS_TX_DP


MOD_MPHY_APTX_DM_C OUT MOD_USB_SS_TX_DM

B
"HIGH SPEED GROUP B" OPTION 3 B

COMPLETE THESE CONNECTIONS FOR MODS THAT USE RAW I2S AUDIO

MOD_MPHY_APRX_DP_C OUT MOD_I2S_SDO


MOD_MPHY_APRX_DM_C IN MOD_I2S_SDI

MOD_MPHY_APTX_DP_C OUT MOD_I2S_BCLK


MOD_MPHY_APTX_DM_C OUT MOD_I2S_LRCLK

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI phone_connector


Tue Aug 23 15:17:36 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 3 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTES (IFACE CONFIG):


1) CHOOSE *ONLY ONE* OF THE OPTIONS ON THIS PAGE FOR YOUR MOD DESIGN
2) FOR MODS THAT DO NOT REQUIRE ANY OF THE GROUP B INTERFACES, ALL CONNECTIONS CAN REMAIN OPEN.
8 7 6 5 4 3 2 1

PHONE_CONN: IFACE CONFIG (MDK ONLY)


"HIGH SPEED GROUP B" SWITCH "GROUP B" SWITCH CONTROL USER DIP SWITCHES
D VREG_3P3 VREG_3P3
D
VREG_3P3 HIGH SPEED "GROUP B" SIGNAL C1054 .1UF
S1050

ROUTING IS SET BY 1 IN1 OUT1 8

6
S1050_S1
IN2 OUT2
DIP SWITCHES A1 AND A2
2 7
S1050_S2
C1050 IN3 OUT3

VCC
U1051 3 6
USB_MHL_SEL0 \G
1 UF C1051 4 IN4 OUT4 5
USB_MHL_SEL1 \G
1 A
C1052 S1050_S1
1000PF
.1UF
A1 ON = MIPI UNIPRO Y 4
HD3SS_EN 1825140-2 VREG_3P3
A2 ON = RAW I2S B
2
C1053 S1050_S2
5 S1051
NC1 NC
.01UF
A1 + A2 ON = USB 3.1

GND
1 IN1 OUT1 8
CLK_19P2_PCARD_EN \G
2 IN2 OUT2 7
ALT_MODE \G

VCC 22
NC7SV32L6X

3
3 IN3 OUT3 6
VSYS_SRC_SEL \G
4 IN4 OUT4 5
3 USBC_PWR_SEL \G
POL HD3SS_POL
AMSEL
8
HD3SS_AMSEL VREG_3P3 VREG_3P3
17 1825140-2
U1050 EN HD3SS_EN
HD3SS460I
25
SSTXN OUT MOD_USB_SS_TX_DM R1052
1 26 100K
MOD_MPHY_APRX_DP_C CRX1P SSTXP OUT MOD_USB_SS_TX_DP R1053 R1054
2 10K 10K
MOD_MPHY_APRX_DM_C CRX1N
27
SSRXN IN MOD_USB_SS_RX_DM
4 28
C MOD_MPHY_APTX_DP_C CTX1P SSRXP IN MOD_USB_SS_RX_DP HD3SS_POL HD3SS_AMSEL C
5

3
MOD_MPHY_APTX_DM_C CTX1N
15
LNAN IN MOD_I2S_SDI
6 16
MHB_I2S_BCLK IN CTX2P LNAP OUT MOD_I2S_SDO
7
MHB_I2S_LRCLK IN CTX2N 1 1
18 S1050_S1 S1050_S2
LNBN OUT MOD_I2S_LRCLK
9 19
MHB_I2S_SDO IN CRX2P LNBP OUT MOD_I2S_BCLK
10 R1050 R1051
MHB_I2S_SDI OUT CRX2N 100K 100K
20 Q1050 Q1051
LNCN OUT MOD_MPHY_APTX_DM

2
11 21
NC CSBU1 LNCP OUT MOD_MPHY_APTX_DP
12
NC CSBU2
23
LNDN IN MOD_MPHY_APRX_DM
24
LNDP IN MOD_MPHY_APRX_DP
13
CTGND

SBU1 NC
14
SBU2 NC
G1

EN POL AMSEL
B B
L X X ALL PORTS HIGH-Z
(DEFAULT) (DEFAULT) (DEFAULT)

H L L MHB GPIOS TO I2S (DON'T CARE)

H L H
MHB GPIOS TO I2S (CTX2<->LNB, CRX2<->LNA)

H H L INTERFACE PINS TO I2S (CTX1<->LNB, CRX1<->LNA)


MHB GPIOS TO USB SS (DON'T CARE)

H H H INTERFACE PINS TO I2S (CTX1<->LNB, CRX1<->LNA)


MHB GPIOS TO MHB MPHY (DON'T CARE)

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI phone_connector


Tue Aug 23 15:18:00 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 4 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) DELETE THIS PAGE ENTIRELY WHEN DESIGNING YOUR OWN MOD
8 7 6 5 4 3 2 1

ROOT: IFACE SUPPORT


D
D

MOD_CC IO

MOD_BPLUS_EN_N

MOD_VSYS_EN_N

MOD_BPLUS_DISCHG

MUC_RESET_N

C C

THIS PAGE INTENTIONALLY LEFT (ALMOST) BLANK.

I/O IS SHOWN TO INCREASE SCHEMATIC READABILITY.

B B

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI root


Tue Aug 23 12:12:36 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 5 OF 17

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ROOT: MUC ALWAYS ON 1.8V U1150


FAN53611AUC18X

A2 VIN SW B1
B_PLUS
B2 EN
IOUT = 1A
C1150 C1151 C1152 A1 MODE
D 10UF 10UF 2.2UF
L1150
C1 FB

GND
6.3V
6.3V 6.3V
0.47 UH D
C1100

C2
MUC_1P8
MOD_1P8
NFM15PC435R0G3D MOD_1P8
4.3 UF
C1104 C1101 C1102 C1103 MOD_1P8 C1153 C1154
.1UF .1UF .1UF .1UF 4.7 UF 100PF

R1106 R1107
2.2K 2.2K

VREF_POS G8

VDDA H9
A9
E4

VDDIO2 B6

VDDUSB A1

VBAT B9
J8
J1
VDD1
VDD2
VDD3
VDD4
IN
OUT
MUC_UART2_CTS_PA0
MUC_UART2_RTS_PA1
H8
G4
PA0
PA1
PC0
PC1
F9
F8
MUC_I2C3_SCL_PC0
MUC_I2C3_SDA_PC1
OUT
IO
32KHZ CLOCK SOURCE
OUT
MUC_UART2_TX_PA2 G6
PA2 PC2
F7 RESERVED THIS OSCILLATOR IS ONLY REQUIRED
IN
MUC_UART2_RX_PA3 H7
PA3 PC3
G7 MUC_PC3
IO FOR MODS THAT NEED AN ACCURATE
MHB_SPI_CS_N OUT
MUC_SPI1_CS0_N G5
PA4 U1100 PC4
J7 CHG_INT_N CLOCK SOURCE (TIMESTAMPING, ETC)
MUC_SPI1_CLK H6 STM32L476MG J6 MOD_BPLUS_SENSE R1110
MHB_SPI_CLK OUT PA5 PC5 MOD_BPLUS MUC_1P8
MUC_SPI1_MISO H5 F3 MUC_SPI_SEL 7.5K
MHB_SPI_DO IN PA6 PC6
MUC_SPI1_MOSI H4 F1 MUC_PC7

VCC 4
MHB_SPI_DI OUT PA7 PC7 OUT R1111
MUC_PA8 E2 F2 MUC_PC8 10K
OUT PA8 PC8 OUT
MUC_PA9 E3 E1 MUC_PC9 C1107 C1106
C IO PA9 PC9 OUT .1UF 10PF C
MUC_PA10 D2 D3 MUC_UART3_TX TP_MUC_UARTTX 1 VIO Y1100 OUT 3
IO PA10 PC10 CLK_32KHZ
MUC_PA11_RAW D1 C3 MUC_UART3_RX TP_MUC_UARTRX

3
PA11 PC11
RESERVED C1 B3 MUC_PC12

2 GND
D
PA12 PC12 OUT
MUC_SWDIO \G C2 B8 RESERVED
BATT_PLUS PA13 (DEFAULT PU) PC13
MUC_SWCLK \G B2 C9 MUC_PC14_RAW G 1
PA14 PC14_OSC32_IN BATT_FORCE_EN
MUC_SPI_CS1_N_PA15 A2 C8 MUC_PC15_RAW 32.768 KHZ
OUT PA15 (DEFAULT PU) PC15_OSC32_OUT

RESERVED J5 A3 KEY_POWER_PMIC

S
R1102
MOD_1P8 CC_ALERT J4
PB0 PD2
E5 CHG_EN Q1100

2
PB1 PD4
301K MUC_PB2 J3 D4 CHG_VINA_EN
OUT PB2 PD5

JTAG / CONSOLE
MUC_UART1_RTS_PB3 A6 D5 MUC_PD6
1% OUT PB3 PD6 OUT
MUC_BATT_SEN C6 D6 MUC_PD7_RAW
PB4 (DEFAULT PU) PD7
OUT
MUC_PB5 C7
PB5 PD8
F5 CHG_VINB_EN VENDOR-SPECIFIC ACCESS FOR
R1103
249K OUT
MUC_UART1_TX_PB6 B7
PB6 PD9
F4 MUC_PD9
IN SWD AND SERIAL CONSOLE
MUC_UART1_RX_PB7 A7
R1109 R1108 IN PB7
2.2K 2.2K MUC_PB8 E7 E6 MUC_PE7_RAW
1% IN PB8 PE7
RESERVED E8 F6 MUC_PE8
PB9 PE8 OUT
MUC_I2C2_SCL_PB10 H3 PACK_IGNORE PACK_IGNORE
OUT PB10
MUC_I2C2_SDA_PB11 G3 A4 MUC_PG9
IO PB11 PG9 OUT 1
PACK_IGNORE PACK_IGNORE
2
NC
MUC_SPI2_CS_N H1 B4 MUC_PG10 JTAG2 JTAG2 TP_SWCLK
MOD_SPI_CS_N IN PB12 PG10 OUT TP_SWDIO NC
3
PACK_IGNOREPACK_I
4
_
MUC_SPI2_CLK H2 C4 MUC_UART1_CTS_PG11 JTAG2 JTAG2 MUC_SWCLK \G
MOD_SPI_CLK IN PB13 PG11 IN 5
PACK_IGNOREPACK_IGNORE
6
NC
MUC_SPI2_MISO G2 C5 MUC_PG12 MUC_SWDIO \G JTAG2 JTAG2
PACK_IGNOREPACK_IGNORE
MOD_SPI_MISO OUT PB14 PG12 OUT PACK_IGNORE NC
7 8
NC
B MOD_SPI_MOSI IN
MUC_SPI2_MOSI G1
PB15 PG13
B5 MUC_PG13
OUT
R1100JTAG
9
JTAG2 JTAG2
PACK_IGNOREPACK__I
PACK
10
B
A5 MUC_PG14 MUC_RESET_N 0 JTAG2 JTAG2 MUC_1P8
PACK_IGNOREPACK_IGNORE
PG14 OUT 11 12
NC
MUC_DBG_TX \G JTAG2 JTAG2
PACK_IGNOREPACK__I
PACK PACK_IGNORE
13 14
D9 SYS_RST_N_PH0 MUC_DBG_RX \G JTAG2 JTAG2
PACK_IGNOREPACK__I
PACK
NC R1101JTAG
PH0_OSC_IN OUT NC
15
JTAG2 JTAG2
16
D8 MUC_PH1 MUC_RESET_N
PH1_OSC_OUT OUT G1 G2 0
JTAG2 JTAG2
VSSA_VREF_NEG
C1100JTAG
E9 MUC_RESET_N .01UF
RST_N C1101JTAG
.01UF
PACK_IGNORE
D7 BOOT0
BOOT0 PACK_IGNORE
VSS1
VSS2
VSS3
VSS4

TP_SYS_RST_N
A8
J9
J2
B1

G9

MUC_UART3_TX MUC_DBG_TX \G
C1105
MUC_UART3_RX MUC_DBG_RX \G
R1100 R1104
0 100K
.01UF

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI root


Tue Aug 23 15:02:01 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 6 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) COMPLETE THE CONNECTIONS BETWEEN MUC_SPI1_x AND MHB_SPI_x FOR USE BY MHB AND/OR EXTERNAL PERIPERHALS
8 7 6 5 4 3 2 1

ROOT: MUC (MDK ONLY)


D

MUC DOWNSTREAM SPI SWITCH GPIO ALT MODE SWITCHES D

MUC SPI1 IS SWITCHED BETWEEN THESE SWITCHES ARE NOT A PLATFORM


MHB SPI FLASH (FOR F/W UPGRADE) REQUIREMENT BUT WERE REQUIRED ON THE MDK
AND ALL OTHER PERIPHERALS FOR TO CONSERVE MUC GPIOS
GENERIC DEVELOPMENT
THIS IS NOT A PLATFORM REQUIREMENT
BUT WAS REQUIRED ON THE MDK B_PLUS
TO CONSERVE MUC GPIOS
C1109 .1UF
FOR MOD DESIGNS THAT USE THE MHB,
IT IS RECOMMENDED TO USE MUC SPI1
EXCLUSIVELY FOR MHB ACCESS

VCC 14
15 1B1 4B0 13
CLK_32KHZ IO MUC_PD7_ALT

16 1A 12
MUC_PC14_RAW 4A MUC_PD7_RAW

1 11
MUC_PC14_ALT IO 1B0 4B1 LED_DRV_1
C MOD_1P8 2 1S 2S 10 C
ALT_MODE \G ALT_MODE \G
C1108 .1UF 3 2B1 3B0 9
NC IO MUC_PE7_ALT
U1102
4 2A 8
VCC 14

FSA2466UMX MUC_PC15_RAW MUC_PE7_RAW


3A
15 1B1 4B0 13 5 7
MHB_SPI_CS_N OUT IN MUC_SPI_MISO_PA6 MUC_PC15_ALT IO 2B0 3B1 LED_DRV_2

16 1A 12 U1103

GND
MUC_SPI1_CS0_N 4A MUC_SPI1_MISO
FSA2466UMX
1 11

6
MUC_SPI_CS0_N_PA4 OUT 1B0 4B1 IN MHB_SPI_DO

2 1S 2S 10
MUC_SPI_SEL MUC_SPI_SEL

3 2B1 3B0 9
MHB_SPI_CLK OUT OUT MUC_SPI_MOSI_PA7

4 2A 8
MUC_SPI1_CLK 3A MUC_SPI1_MOSI
MOD_1P8
5 7
MUC_SPI_CLK_PA5 OUT 2B0 3B1 OUT MHB_SPI_DI
GND

R1112
100K
C1110 .1UF
B R1113 B
6

470K

2
1 S B1 6

VCC
ALT_MODE \G OUT MUC_PA11

3 A B0 4

GND
MUC_PA11_RAW RESERVED

U1104

5
FSA5157L6X

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI root


Tue Aug 23 15:19:30 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 7 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) DELETE THIS PAGE ENTIRELY WHEN DESIGNING YOUR OWN MOD
8 7 6 5 4 3 2 1

ROOT: BATTERY
D
B+ SELECTION AND ISOLATION MOD_BPLUS VSYS BPLUS_RAW
D

D2050 D2051

Q2103 Q2102 Q2113 Q2112


B_PLUS
VSYS_MDK MOD_BPLUS
7 7 7 7
6 6 6 6
5 8 8 5 5 8 8 5
2 4 4 2 2 4 4 2
1 1 1 1
C2100 R2120 C2110
22UF 8 MILLIOHM 8 MILLIOHM 8 MILLIOHM 8 MILLIOHM 220 22UF

3
3

3
R2102 R2112

3
470K 470K R2121
470K

R2101 R2111
MDK_VSYS_EN_N MOD_BPLUS_EN_N Q2120
0 0 1
C MOD_BPLUS_DISCHG C

D2111
D2101

2
BATTERY CONNECTOR GAS GAUGE
TP_BAT_POS
BATT_PLUS

VBATT B1
CELL_POS B2 C2 R2010 10K
BATT_PLUS CC_ALERT ALRT THRM 1%

VR2000 C1 U2010
C2001 C2003 MUC_I2C3_SDA_PC1 SDA
100PF .1UF A1 BATT_THERM_CONN
AIN
1 A2
B P2000 MUC_I2C3_SCL_PC0 SCL B
25V 16V B3
2 CELL_NEG REG
P2000
G1 E2000 A3 C3 C2010 C2011 C2012 RT2010
P2000 CELL_NEG_SAFE CC_CSX_DM CSN CSP
CC_CSX_DP 10000 OHM
G2 .1UF .1UF .01UF
P2000

VR2001 R2000
0.01 OHM CC_CSX_DP
TP_BAT_NEG
1%
E2001
CC_CSX_DM

MOD_1P8
USER BUTTON
R2021
470K
TP_KEY_PWR 1
R2020
A 1
2.2K A
KEY_POWER KEY_POWER_PMIC APPROVALS
2
3

MOBILE DEVICES
SW_POWER
Q2020
ENGINEER: MMI
1

1 BLOCK TITLE:

root
D2020

LAST MODIFIED BY: MMI


Tue Aug 23 12:12:37 2016
2
2

PROJECT NAME REV


B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 8 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (BATTERY CONFIG): DEVELOPER NOTE (MDK CONVERSION):


1) MODS THAT DO NOT HAVE A BATTERY CAN REMOVE ALL COMPONENTS ON THIS PAGE AND CONNECT MOD_BPLUS DIRECTLY TO B_PLUS 1) REPLACE "VSYS_MDK" WITH "VSYS"
2) REPLACE "MDK_VSYS_EN_N" WITH "MOD_VSYS_EN_N"
8 7 6 5 4 3 2 1

ROOT: CHARGING
DUAL-INPUT SWITCH EXTERNAL CHARGER STATE OF CHARGE LEDS
D
MOD_VBUS REAR-FIRING RED/GREEN LED D
CHG_VBUS_IN

A1 B5 MOD_1P8
C2500
A2
VINA1 OUT1
B6 R2503
C2505 BATT_PLUS
4.7 UF
B_PLUS
VINA2 OUT2 10K 1UF 16 V-DC
A3 U2550 B7 25V
VINA3 OUT3
C2550 A4 GOUT4 C4

REGN
NC
1UF A5 C5 C2507 10UF BTST C2504 .047UF
VINA5 OUT5 BQ_PGND R2502
A6 C6 10K
25V VINA6 OUT6 10V 10V
D2550

2
A7 C7

BAT1 13
BAT2 14

NC 24

REGN 22

BTST 21
VBUS 1
VINA7 OUT7

B1 B4 R2505 10 23 PMID
NC

RED

GRN
GND1 VINA_S 300 ILIM PMID
B2 1%
GND2 L2500
B3 D2 100K R2508 2 19 SW
C2
GND3 VINA_EN_OTG_EN CHG_VINA_EN REGN PSEL SW1
20 2.2 UH VSYS_MDK
GND4 SW2 2.4 A
C3 D1 REGN 10K R2500 8 U2500
GND5 CRTL NC MOD_1P8 OTG

1
BQ25896RTWR 7
INT CHG_INT_N
D4 C1 5
EXT_CHG_VBUS VINB1 MODE NC R2504 MUC_I2C3_SCL_PC0 SCL
D5 100K 6 4
VINB2 MUC_I2C3_SDA_PC1 SDA STAT NC R2551 R2552
D6 D3 220 220
VINB3 VINB_EN_FLAG CHG_VINB_EN
D7 BQ25896_CE_N 9 3
VINB4 CE_N PG_N NC

3
15 LED_DRV_1
C
VSYS_MDK 16
SYS1
C
SYS2 LED_DRV_2
1
C2502
CHG_EN 12 10 UF
VINA_EN VINB_EN TP_QON_N QON_N 25 V-DC
C2551 C2552
R2509 11 100PF 100PF

CTGND
PGND1
PGND2
100K REGN TS
L L OPEN Q2500

2
C2506 C2501
R2506

17
18

G1
10K 10UF 10UF
10V 10V
L H VINB CONDUCTING BQ_PGND
(DEFAULT) (DEFAULT)
E2500
H L VINA CONDUCTING R2507
10K

H H VINB AND VINA CONDUCTING

B B

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI root


Tue Aug 23 15:12:36 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 9 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (CHARGER CONFIG): DEVELOPER NOTE (MDK CONVERSION):


1) MODS THAT DO NOT HAVE A BATTERY CAN REMOVE ALL COMPONENTS ON THIS PAGE 1) REPLACE "VSYS_MDK" WITH "VSYS"
2) MODS THAT DO NOT HAVE AN EXTERNAL CHARGING PORT CAN REMOVE U2550 AND CONNECT MOD_VBUS DIRECTLY TO CHG_VBUS_IN
3) MODS THAT DO HAVE AN EXTERNAL CHARGING PORT, CONNECT EXT_CHG_VBUS TO THE CHARGING PORT POWER INPUT (E.G. USBC_VBUS)
8 7 6 5 4 3 2 1

ROOT: BATTERY / CHARGING (MDK ONLY)


D
MDK ONLY -- VSYS POWER PATH SELECTION SELECT BETWEEN : D

MOD_BPLUS VSYS_MDK VSYS_PCARD 1)) ONBOARD BATT / CHG SYSTEM (DEFAULT)


2)) P-CARD BATT / CHG SYSTEM
C2201P
D2050P D2051P D2052P
1 UF
RB521ZS RB521ZS RB521ZS

BPLUS_ALL_SOURCES C2200P .1UF VSYS_PCARD Q2103P Q2102P


B_PLUS

.1UF C2103P 7
R2103P

2
7
100K
6

2
1 S B1 6 6

VCC
1 S B1 6
VSYS_SRC_SEL \G VSYS_MDK 5 8 8 5

VCC
VSYS_SRC_SEL \G MDK_VSYS_EN_N U2200P 2 4 4 2
FSA5157L6X 1
U2103P 1
FSA5157L6X C2100P
3 A B0 4 22UF

GND
8 MILLIOHM 8 MILLIOHM
3 A B0 4 VSYS VSYS_PCARD

GND

3
MOD_VSYS_EN_N PCARD_VSYS_EN_N

3
5
5 R2102P
470K

R2101P
C PCARD_VSYS_EN_N C
0

D2101P

MDK ONLY -- USBC VBUS PATH SELECTION

SELECT BETWEEN :
1)) "GROUP B" USB-C CONNECTOR (DEFAULT)
2)) DEBUG USB-C CONNECTOR
B B

VBUS_USB_DBG

A1 B5
VINA1 OUT1 EXT_CHG_VBUS
A2 B6
VINA2 OUT2
A3 U2575 B7
VINA3 OUT3 VBUS_USB_DBG
C2575 A4 GOUT4 C4
1UF A5 C5
VINA5 OUT5
25V A6 C6
VINA6 OUT6
A7 C7
VINA7 OUT7
R2575
10K
B1 B4
GND1 VINA_S NC
B2
GND2
B3 D2
GND3 VINA_EN_OTG_EN
C2
USBC_VBUS GND4
C3 D1
GND5 CRTL NC
3

D4 C1
VINB1 MODE NC
D5
A VINB2 A
D6 D3
C2576 VINB3 VINB_EN_FLAG 1 APPROVALS
1UF D7
VINB4
MOBILE DEVICES
25V

ENGINEER: MMI
2

Q2575
BLOCK TITLE:

USBC_PWR_SEL \G LAST MODIFIED BY: MMI root


Tue Aug 23 15:03:39 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 10 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) DELETE THIS PAGE ENTIRELY WHEN DESIGNING YOUR OWN MOD
8 7 6 5 4 3 2 1

ROOT: MDK DEBUG ACCESS VBUS_USB_DBG USB_DBG_3V3


U1905
MOD_1P8
BU35TH5WNVX-TR
D C1923 U1906
MOD_1P8 USB_DBG_3V3 USB_DBG_3V3 CE VIH 1.2V - 5.0V 4 1
NC7SZ126 CE VIL 0 - 0.3V VIN VOUT
.1UF D
C1917 C1918 3

CTGND
6
CE C1915

VCC

GND
C1908 .1UF

C1909 .1UF

C1910 .1UF
.1UF .1UF 4.7UF

C4
C1
OE 1
C1914

G1
500MA LDO

VCCA
VCCB
A3 D4 E1900
MUC_SWCLK \G A1 OE MUC_DBG_EN DEBUG_VPLL 4.7UF
4 Y A 2 MUC_TDI_1P8 A4 A2
MUC_SWDIO \G A2 B1
MOD_1P8 MUC_TDO_1P8 B3
A3 U1903 B2
A1

GND
5 TP_MUC_TMS B4 B2
NC NC A4 TXB0108YZPR B3 E1901
C1924 ADBUS4_1P8 C3 B1 DEBUG_VPHY
U1907 A5 B4 DEBUG_VCORE

3
.1UF TP_ADBUS5 E4 C2
A6 B5

C1911 .1UF

C1912 .1UF

C1913 .1UF
NC7SZ126 D3 E1
ADBUS6_1P8 A7 B6 C1907 C1906 C1905 C1904
E3 D2

6
A8 B7 .1UF 4.7UF .1UF 4.7UF
TP_ADBUS7

VCC

GND
TP_MUC_TDI E2
B8
1 OE TP_MUC_TDO

D1
R1907
A Y 100K
2 4

56
42
31
20

64
37
12
MHB_VDDIO USB_DBG_3V3
GND
5

9
4
NC NC

VCCIO4
VCCIO3
VCCIO2
VCCIO1

VCORE3
VCORE2
VCORE1

VPLL
VPHY
DBG_A_TCK 16 ADBUS0 VREGIN 50
C1919 C1920
3

DBG_A_TDI 17 ADBUS1
.1UF .1UF DBG_A_TDO 18 ADBUS2 VREGOUT 49
C1903

C4
C1
DBG_A_TMS 19 ADBUS3 R1905 A5 A2
.1UF
5.1K CC1 TX1_P NC
DBG_ADBUS4 B5 A3

VCCA
VCCB
A3 D4 21 ADBUS4
MHB_DBG_TCK \G NC
C MUC_RESET_N
MHB_DBG_TDI \G
MHB_DBG_TDO \G
A4
B3
A1
A2
A3
OE
B1
A2
A1
MHB_DBG_EN
DBG_ADBUS5
DBG_ADBUS6
22
23
ADBUS5
ADBUS6
U1900 C1902
.1UF
R1902
10K
R1906
5.1K

NC
A8
CC2 TX1_N

B2
NC
C

B4
U1901 B2 B2 DBG_ADBUS7 24
FT4232HQ-REEL B8
RFU1 J1900 TX2_P
B3
D 3

MHB_DBG_TMS \G A4 TXB0108YZPR B3 ADBUS7 NC RFU2 TX2_N NC


C3 B1
MHB_DBG_TRST_N \G A5 B4
TP_DBG_B_PKEY E4 C2 DBG_B_TCK 26 BDBUS0 A6 B11
A6 B5 D_P1 RX1_P NC
G 1 ADBUS6_1P8 TP_DBG_B_RESOUT D3 E1 DBG_B_TDI 27 BDBUS1 DM 7 DEBUG_DM B6 B10
A7 B6 D_P2 RX1_N NC
TP_DBG_B_RTCK E3 D2 DBG_B_TDO 28 BDBUS2 DP 8 DEBUG_DP
A8 B7 VREGIN 150MA A7 A11

GND
E2 DBG_B_TMS 29 BDBUS3
R1914 B8 VPHY 60MA D_N1 RX2_P NC
2 S

100K DBG_B_TRST_N 30 BDBUS4 REF 6 B7 A10


VCORE 70MA D_N2 RX2_N NC

D1
Q1902 DBG_B_PWR_KEY_N 32 BDBUS5
DBG_B_RESOUT_N 33 BDBUS6 RESET 14 A4
VBUS1 VBUS_USB_DBG
DBG_B_RTCK 34 BDBUS7 VR1900 VR1901 A9
VBUS2
MOD_1P8 USB_DBG_3V3 VBUS3
B4

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
USART_C_TXD 38 CDBUS0 R1903 B9
12000 OHM VBUS4
C1921 C1922 USART_C_RXD 39 CDBUS1

A1
A12
B1
B12
G1
G2
G3
G4
.1UF .1UF NC
40 CDBUS2 1% VR1902 C1925 R1908
C1916 .1UF

C1
B2
41 CDBUS3 47K
0 R1909 NC 100PF

VCCA
VCCB
C2 OE B1 A2 43 CDBUS4 16V
MUC_DBG_TX \G MUC_DBG_EN NC 5%
D2 A1 B2 A1 44 CDBUS5
0 R1910 MUC_DBG_RX \G NC
MUC_UART_TX_DBG D1 A2 U1902 45 CDBUS6
MUC_UART1_TX_PB6 NC
MHB_VDDIO USB_DBG_3V3
GND
46 CDBUS7
NC
EECS 63
NC
B C1928 C1929 B
B1

TXB0102YZPR USART_D_TXD 48 DDBUS0 EECLK 62


NC
.1UF .1UF USART_D_RXD 52 DDBUS1 EEDATA 61
NC DEBUG_OSCI

C1
B2
53 DDBUS2
NC

VCCA
VCCB
C2 OE B1 A2 54 DDBUS3
MHB_DBG_EN NC

1
D2 A1 B2 A1 55 DDBUS4 OSCI 2 C1900
NC

IN
MHB_DBG_RX \G 10PF
D1 A2 U1908 57 DDBUS5
MHB_DBG_TX \G NC 2
GND1

GND
58 DDBUS6
NC Y1900
59 DDBUS7
NC 4
GND2
B1
TXB0102YZPR OSCO 3

OUT
60 PWREN C1901

CTGND
NC 12 MHZ

AGND
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
36 13 10PF
NC SUSPEND TEST

3
DEBUG_OSCO

G1
51
47
35
25
15
11
5
1

10
JTAG / SERIAL DEBUG ENABLE
DEBUG WILL BE ENABLED
200USEC AFTER 1.8V & 3.3V USB_DBG_3V3 USB_DBG_3V3
ARE BOTH PRESENT

USB_DBG_3V3 R1913
470K
USB_DBG_3V3 R1917
470K

MUC_DBG_EN MHB_DBG_EN
A A
D 3

D 3

R1912 R1916 APPROVALS


100K C1926 100K C1927
1000PF 1000PF
MOBILE DEVICES
1 G 1 G
ENGINEER: MMI BLOCK TITLE:
2 S

2 S

Q1901 Q1904
LAST MODIFIED BY: MMI root
D 3

D 3

Tue Aug 23 12:12:38 2016


1 G 1 G
MOD_1P8 MHB_VDDIO PROJECT NAME REV
B 84016537001_05.cpm 01
2 S

2 S

R1911 R1915
470K 470K
Q1900 Q1903

CAD FILE NAME:


PAGE 11 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) DELETE THIS PAGE ENTIRELY WHEN DESIGNING YOUR OWN MOD
8 7 6 5 4 3 2 1

ROOT: MECHANICAL
D
HOUSING SCREW BOSSES D

1 PIN1 PIN3
3 1 PIN1 PIN3
3 1 PIN1 PIN3
3 1 PIN1 PIN3
3 1 PIN1 PIN3
3
2 PIN2
2 PIN2
2 PIN2
2 PIN2
2 PIN2
M1071 M1073 M1075 M1077 M1079

1 PIN1 PIN3
3 1 PIN1 PIN3
3 1 PIN1 PIN3
3 1 PIN1 PIN3
3 1 PIN1 PIN3
3
2 PIN2
2 PIN2
2 PIN2
2 PIN2
2 PIN2
M1072 M1074 M1076 M1078 M1080

SHIELDS
SH1500 SH1900 SH500 SH501

SHIELD_MAIN_26016516001 SHIELD_DEBUG_26016517001 SHIELD_WC_26016453001 SHIELD_WC_26016453001

C C

BATTERY TRAY
SH100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

B B

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI root


Tue Aug 23 12:12:39 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 12 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) REPLACE MECHANICAL PARTS ON THIS PAGE WITH MECHANICAL PARTS SPECIFIC TO YOUR MOD
8 7 6 5 4 3 2 1

MHB JTAG / CONSOLE


NC
1

3
PACK_IGNORE
J1500D
PACK_IGNORE

J1500D
PACK_IGNORE
PACK_IGNORE

2
J1500D PACK_IGNORE
4
J1500D PACK_IGNORE
J1500D
PACK_IGNORE
MHB_DBG_TDO \G

MHB_DBG_TCK \G
5 6
MHB_DBG_TMS \G J1500D PACK_IGNORE MHB_DBG_TDI \G
7
J1500D
PACK_IGNORE
8
NC J1500D PACK_IGNORENC
D J1500D
PACK_IGNORE
VREG_MHB_1P2 MHB_DBG_TRST_N \G PACK_IGNORE 9
J1500D PACK10
_IGNORE
MHB_VDDIO D
J1500D
PACK_IGNORE
VREG_MHB_1P15 VREG_MHB_1P8 MHB_DBG_TX \G R1500D
PACK_IGNORE
0
11 12
J1500D PACK_IGNORENC
13
J1500D
PACK_IGNORE
14
MHB_DBG_RX \G R1501D J1500D PACK_IGNORENC
0
15
J1500D
PACK_IGNORE
16
FL1500 FL1501 FL1503 FL1502 U1620 NC J1500D PACK_IGNORENC
FPF1504BUCX
G1
J1500D G2
A1 A2 J1500D
1
IN OUT
3 1
IN OUT
3 1
IN OUT
3 1
IN OUT
3
VOUT VIN MOD_1P8 VENDOR-SPECIFIC ACCESS FOR
B2
ON MHB_PWROFF_N JTAG AND SERIAL CONSOLE
C1620

GND
GND

GND

GND

GND
1 UF MHB_VDDIO
C1621
4.7 UF

B1
6.3 V-DC MHB_UART_TX MHB_DBG_TX \G

2
C1508 1 UF
U1502 MHB_VDD_CDSI1
FPF1504BUCX MHB_VDDIO MHB_VDD_CORE_PLL MHB_VDD_UNIPRO C1507 .1UF
R1508
100K

SPI FLASH FOR CODE STORAGE

6
A2 A1 MHB_VDD_CDSI0

VCC
U1504
MOD_1P8 B2
VIN VOUT
1 OE NC7SZ126
VREG_MHB_1P15 ON CLK_19P2_PCARD_EN \G
GND

C1500 C1501 R1505 C1503

G5
G9

VDD_CORE2 G7

VDD_HSIC G2
D9

VDD_CDSI0_1 C3

VDD_CDSI1_1 C4
VDD_CDSI1_2 C6

VDD_CDSI0_PLL D3
VDD_CDSI1_PLL C5
E9

VDD_CDSI0_2 E3

VDD_CORE1 E5

VDD_PLL2 K5

K7
K9

VPGM A2
A Y

VDD_PLL1 L5

J6
J8
1 UF .1UF 10K 2 4
R1509 OUT CLK_19P2_MHZ MHB_VDDIO
B1

100K

VDD_IO1
VDD_IO2
VDD_IO3
VDD_IO4

VDD_UNIPRO1
VDD_UNIPRO2
VDD_UNIPRO3
VDD_UNIPRO4
.1UF
MHB_VDDIO 5
TP_SPI_IO0_MHB TP_SPI_CLK_MHB

GND
NC NC

VCC 8
C1502 0.01 UF MHB_SFLASH_DI IN IN MHB_SFLASH_CLK
C C

3
R1503 5 6

4
MHB_GPIO13_SPI_IO0 DI_IO0 CLK MHB_SPI_CLK
100K 2 1
MHB_GPIO14_SPI_IO1 DO_IO1 CS MHB_GPIO15_SPI_CS_N

VCC
MHB_CDSI0<9..0> OUT 3
1 MHB_CDSI0_CLK_P D1 K4
IN
WP_IO2
IN
CDSI0_CP SYS_RESET_N MHB_RST_N MHB_SFLASH_DO OUT 7 MHB_SFLASH_CS_N
0 MHB_CDSI0_CLK_N D2
CDSI0_CN SYS_CLK
L4 MHB_SYS_CLK 3 OUT Y1500 E/D 1
MHB_PWROFF_N
HOLD_IO3

CTGND
U1500 F9 19.2 MHZ TP_SPI_IO1_MHB TP_SPI_CS_MHB
GPIO23 IN MHB_WAKE_IN

GND
3 MHB_CDSI0_D0_P F1 F8 U1501

GND
CDSI0_D0P PWROFF_N
2 MHB_CDSI0_D0_N F2
CDSI0_D0N W25Q40BWUXIE

G1
T6WV7XBG-0001(W1EO) L10

2
DBG_TCK MHB_DBG_TCK \G
5 MHB_CDSI0_D1_P E1
CDSI0_D1P DBG_TDO
K11
MHB_DBG_TDO \G
4 MHB_CDSI0_D1_N E2
CDSI0_D1N DBG_TDI
H11
MHB_DBG_TDI \G
J11
DBG_TMS MHB_DBG_TMS \G
7 MHB_CDSI0_D2_P C1
CDSI0_D2P DBG_TRST_N
K10
MHB_DBG_TRST_N \G
6
1.2V SUPPLY
MHB_CDSI0_D2_N C2 R1504
CDSI0_D2N 100K
G1
HSIC_DATA IO HSIC_DATA
9 MHB_CDSI0_D3_P B1 H1
CDSI0_D3P HSIC_STROBE OUT HSIC_STB C1502D FAN53611AUC12X
8 MHB_CDSI0_D3_N B2
CDSI0_D3N .01UF L1610
K1 A2 VIN SW B1
MHB_CDSI1<9..0> IN SPIM_CLK MHB_SPI_CLK B_PLUS VREG_MHB_1P2
1 MHB_CDSI1_CLK_P A5
CDSI1_CP SPIM_SDO
L1
MHB_GPIO13_SPI_IO0 MHB_PWROFF_N
B2 EN U1610 0.47 UH
0 MHB_CDSI1_CLK_N B5
CDSI1_CN SPIM_SDI
L2
MHB_GPIO14_SPI_IO1
A1 MODE IOUT = 1A
K2 C1
C1611
FB 4.7 UF

GND
SPIM_CS0_N MHB_GPIO15_SPI_CS_N C1610
3 MHB_CDSI1_D0_P A3
CDSI1_D0P 2.2UF
2 MHB_CDSI1_D0_N B3 D111

C2
B CDSI1_D0N WDT_RESET_N TP_WDT_RST_MHB B
5 MHB_CDSI1_D1_P A4
CDSI1_D1P PWM0
A9 1 TP101
4 MHB_CDSI1_D1_N B4 J4
CDSI1_D1N PWM1 OUT MHB_UART_RTS
TP108
7 MHB_CDSI1_D2_P A6 G11
CDSI1_D2P I2S_BCLK OUT MHB_I2S_BCLK
6 MHB_CDSI1_D2_N B6 F11
CDSI1_D2N I2S_LRCLK OUT MHB_I2S_LRCLK MHB_VDDIO

1.15V SUPPLY
F101 TP102
I2S_MCLK
9 MHB_CDSI1_D3_P A7 E11
CDSI1_D3P I2S_SDO OUT MHB_I2S_SDO R1501 R1502
8 MHB_CDSI1_D3_N B7
CDSI1_D3N I2S_SDI
E10
IN MHB_I2S_SDI 2.2K 2.2K
FAN53611AUC115X
L1600
L8 J2 MHB_I2C_SCL A2 VIN U1600 SW B1
MHB_MPHY_RX_DP IN UNIPRO_RXD0P I2C_SCL B_PLUS VREG_MHB_1P15
K8 J1 MHB_I2C_SDA B2 EN 0.47 UH
MHB_MPHY_RX_DM IN UNIPRO_RXD0N I2C_SDA MHB_PWR_EN IN IOUT = 1A
TP107 R1507 0 A1 MODE
L6 H3 MHB_DBG_RX \G C1
C1601
FB 4.7 UF

GND
UNIPRO_RXD1P GPIO0 IO MHB_UART_CTS R1600 C1600
K6 J3 1MEG 2.2UF
UNIPRO_RXD1N GPIO1 OUT MHB_UART_TX R1506 0
K3 MHB_UART_RX_RAW

C2
GPIO2 IN MHB_UART_RX
J9 D101 TP103 TP109
MHB_MPHY_TX_DP OUT UNIPRO_TXD0P GPIO3
H9 C111 TP104 TP111
MHB_MPHY_TX_DM OUT UNIPRO_TXD0N GPIO4
C10
GPIO5 OUT MHB_WAKE_OUT
J7 B111 TP105
L1505 L1506 NC UNIPRO_TXD1P GPIO6
0.0006 UH 0.0006 UH H7 A101 TP106
NC UNIPRO_TXD1N GPIO7
B10
GPIO8 IO MHB_GPIO8
L3
NC TEST
A C1505 C1506 J5 A
3.3PF IN
3.3PF MHB_SPIBOOT_N SPIM_BOOT_N APPROVALS
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25

MOBILE DEVICES
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

R1500
100K
ENGINEER: MMI
A1
A11
A8
B8
B9
C7
C9
E6
E7
F3
F5
F6
F7
G10
G3
G6
G8
H10
H2
H6
H8
J10
L11
L7
L9

BLOCK TITLE:

LAST MODIFIED BY: MMI


mhb
Tue Aug 23 12:12:33 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 13 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (IFACE CONFIG): DEVELOPER NOTE (MDK CONVERSION):


1) MODS THAT DO NOT NEED THE MHB CAN REMOVE ALL COMPONENTS ON THIS PAGE 1) DELETE U1504, R1508, C1507, C1508
8 7 6 5 4 3 2 1

MDK: P-CARD CONNECTOR PRI_I2C_SDA 2


P100

1
IO VREG_3P3_PCARD
PRI_I2C_SCL 4 3
IO IN HSIC_STB
D GENCLK 6 5
IO IO HSIC_DAT
UART_TX 8 7 D154 D155 D
IO
UART_RX 10 9
IO VREG_5P0_PCARD
UART_CTS 12 11
IO VBUS_PCARD
UART_RTS 14 13
IO VREG_1P8_PCARD
GPIO0 16 15
IO
GPIO1 18 17
IO VSYS_PCARD
SPI_MOSI 20 19
IO BPLUS_PCARD
SPI_MISO 22 21
IO
GPIO3 24 23
IO IO GPIO2
SPI_CLK 26 25
IO I2S_BCLK_PCARD
SPI_CS0_N 28 27
IO I2S_LRCLK_PCARD
SPI_CS1_N 30 29
IO I2S_SDO_PCARD
GPIO4 32 31
IO I2S_SDI_PCARD
34 33
IN GPIO5
REFCLK_19P2 36 35
IN IO CDSI_GPIO0
C 38 37 C
40 39
DSI1_DN2 IO OUT DSI1_DN0
42 41
DSI1_DP2 IO OUT DSI1_DP0
D144 D145 44 43 D132 D133

46 45
DSI1_DN3 IO OUT DSI1_DN1
48 47
DSI1_DP3 IO OUT DSI1_DP1
D146 D147 50 49 D134 D135

52 51
SEC_I2C_SDA IO OUT DSI1_CN
54 53
SEC_I2C_SCL IO OUT DSI1_CP
56 55 D136 D137

58 57
CAM1_DN2 IO IN CAM1_DN0
60 59
CAM1_DP2 IO IN CAM1_DP0
D148 D149 62 61 D138 D139

64 63
CAM1_DN3 IO IN CAM1_DN1
66 65
CAM1_DP3 IO IN CAM1_DP1
B D150 D151 68 67 D140 D141 B
70 69
GPIO6 IO IN CAM1_CN
72 71
GPIO7 IO IN CAM1_CP
74 73 D142 D143
GPIO8 IO
76 75
GPIO9 IO IO USB_DP
78 77
GPIO10 IO IO USB_DN
80 79
GPIO11 IO

D153 D100 D101 D102 D103 D104 D105 D106 D107 D108 D109 D110 D111 D124 D126 D127 D128 D129 D130 D131

D152 D112 D113 D114 D115 D116 D117 D118 D119 D120 D121 D122
A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY:


pcard
Tue Aug 23 12:12:34 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 14 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) REPLACE THIS PAGE WITH PARTS SPECIFIC TO YOUR MOD
8 7 6 5 4 3 2 1

MDK: P-CARD SUPPORT


D
D
PERSONALITY CARD DETECT SWITCHES 3.3V SUPPLY USER DEFINABLE LED
500MA TOP-FIRING WHITE LED
MOD_1P8 MOD_1P8
L1060 VREG_3P3
1.5 UH
SW100 SW101
R100
470K
R103
2.2K
B_PLUS A1 U1060 C1 VREG_3P3
E1060 L1 L2
TPS63051YFFR D2560
A2 D1
PCARD_DET_N OUT R101 VIN VOUT
PCARD_DET 1 A B 3 1 A B 3

2.2K 2 A1 B1 4 2 A1 B1 4 A3 D2
C1060 EN FB C1061 C1062 C1064
10UF 10UF 10UF 100PF
D 3
R1061 1MEG
B2 C3
ILIM0 PG
R2560
G 1 D125 R104 D123 C2 B3 100
1MEG PFM/PWM ILIM1

B1 D3
GND SS
R102 MDK_LED_DRV IN
2 S

100K
C Q100 C
C1063
1000PF
C2560
100PF

PERSONALITY CARD POWER SUPPLIES 5V SUPPLY I2S / GPIO SWITCH


A1
VIN1
U106
FPF2595UCX
VOUT1
A3
BPLUS_PCARD
1.5A MOD_1P8
A2 VIN B_PLUS
U100 VOUT A1 VREG_3P3_PCARD
B1
VIN2 VOUT2
B3
VREG_3P3 B2 ON C1 C3 B_PLUS C150 .1UF
GND

PCARD_DET TPS22914BYFPR VIN3 VOUT3


E5003
D3 D1 R150
PCARD_DET ON OC_FLAGB_N NC

VCC 14
C100 100K
B1

4.7 UF
D2 L5006
I_SET 1 UH 15 1B1 4B0 13
C106 IO IO

GND1
GND2
GND3
PACK_IGNORE 4.7UF C5002 C5004 C5005 3.6 A
I2S_BCLK GPIO15
.1UF 10UF 100PF
16 1A 12
I2S_BCLK_PCARD I2S_SDO_PCARD

A2
B2
C2
4A
B R106 6.3V 6.3V 25V B

A3
562
GPIO12 1 11
IO 1B0 4B1 IO I2S_SDO
A2 VIN U101 VOUT A1

VIN
MOD_1P8 B2 ON
VREG_1P8_PCARD 1.8A OCP B3 EN SW1 B1 2 1S 2S 10
B1 GND

PCARD_DET TPS22914BYFPR MOD_1P8 U5000 ALT_MODE \G ALT_MODE \G


SW2 B2
TPS61253YFF 3 2B1 3B0 9
C101 U105 R5001 C3 BP
I2S_LRCLK IO IO GPIO14
4.7 UF FPF2595UCX 100K VOUT1 A1
MOD_VBUS
A1
VIN1 VOUT1
A3
VBUS_PCARD VOUT2 A2 VREG_5P0 4 2A 8
B1 B3 I2S_LRCLK_PCARD 3A I2S_SDI_PCARD
VIN2 VOUT2

C1 GND1
C2 GND2
C1 C3 C5007 C5008
VIN3 VOUT3 5 7
22UF 100PF GPIO13 IO IO I2S_SDI
2B0 3B1
D3 D1
PCARD_DET ON OC_FLAGB_N NC U150

GND
10V 25V
A2 VIN FSA2466UMX
U102 VOUT A1 VREG_5P0_PCARD
D2
I_SET
VREG_5P0

6
C105
GND1
GND2
GND3

B2 ON 4.7UF
B1 GND

PCARD_DET TPS22914BYFPR
A2
B2
C2

C102 R105
4.7UF 562

1.8A OCP

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI pcard


Tue Aug 23 15:13:28 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 15 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) REPLACE THIS PAGE WITH PARTS SPECIFIC TO YOUR MOD
8 7 6 5 4 3 2 1

USB: MDK CONNECTORS


D
USB MICRO-B U1075B D
FPF2595UCX
USBB_VBUS
USB_MHL_SEL1 \G

J500B
5 J500B
1 A3
VOUT1 VIN1
A1
B3 B1 VREG_5P0 R501B
D501B VOUT2 VIN2 1MEG

1
G1 D500B C3 C1

1
J500B C501B R500B C502B C503B VOUT3 VIN3
100PF .1UF
47K 4.7 UF
G2

2
D1 D3

2
J500B NC OC_FLAGB_N ON

D 3
J500B
G3 I_SET
D2

C2 GND3
B2 GND2
A2 GND1
G4 4
J500B J500B IO USBB_ID R1076B 1 G
1.87K USB_MHL_SEL0 \G
J500B
G5 J500B
3 USBB_DP_CONN
USBB_DP
1%

2 S
J500B
G6 2 USBB_DM_CONN Q500B
J500B USBB_DM
600MA OCP

C C

USB TYPE C
VREG_5P0
MOD_1P8
B_PLUS
C504 C505
U503 .1UF .1UF
B1

A3

FUSB302UCX
R503
VCONN

VDD

100K

B2 A2
FUSB302_INT_N OUT INT_N VBUS USBC_VBUS
C3 A1
FUSB302_I2C_SDA IO SDA CC2
B3 C1 USBC_CC1 A5 A2 SSTX1_DP .1UF C533
FUSB302_I2C_SCL IN SCL CC1 CC1 TX1_P IN USBC_TX1_DP
B5 A3
GND

USBC_CC2 SSTX1_DM .1UF C532


CC2 TX1_N IN USBC_TX1_DM
A8 J500 B2
C2

NC RFU1 TX2_P NC
B8 B3
NC RFU2 TX2_N NC
B
USB TYPE C B
A6 B11 U500
D_P1 RX1_P OUT USBC_RX1_DP
B6 B10 FPF2595UCX
USBC_DP D_P2 RX1_N OUT USBC_RX1_DM
A7 A11
USBC_DM D_N1 RX2_P NC
B7 A10
D_N2 RX2_N NC A3 A1
VOUT1 VIN1 VREG_5P0
B3 B1
A4 VOUT2 VIN2
VBUS1 USBC_VBUS C3 C1
A9 VOUT3 VIN3
VBUS2
B4
VBUS3 D1 D3
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

B9 NC OC_FLAGB_N ON IN USBC_HOST_PWR_EN
VBUS4
D501 D2
A1
A12
B1
B12
G1
G2
G3
G4

D500 I_SET

C2 GND3
B2 GND2
A2 GND1
C501 R500 C502 C503 R505
100PF .1UF
47K 4.7 UF 100K
R504
1.87K

1%

600MA OCP

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI usb


Tue Aug 23 12:12:40 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 17 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) REPLACE THIS PAGE WITH PARTS SPECIFIC TO YOUR MOD
8 7 6 5 4 3 2 1

USB: 3:1 SWITCH (MDK ONLY)


D "HIGH SPEED GROUP A" SWITCH D

VREG_3P3

C1070 C1071
U1070 1 UF .1UF
TS3USB3031RMGR
R1070 R1071

12
100K 100K

VCC
3 11
PCARD_USB_DP IO USB1_P D_P IO MOD_USB_DP
4 10
PCARD_USB_DM IO USB1_N D_N IO MOD_USB_DM
5 1
USBC_DP USB2_P SEL0 USB_MHL_SEL0 \G
6 2
USBC_DM USB2_N SEL1 USB_MHL_SEL1 \G
7
USBB_DP MHL_P
8

GND
USBB_DM MHL_N

9
C C
HIGH SPEED "GROUP A" SIGNAL
ROUTING IS SET BY
DIP SWITCHES A3 AND A4

A3 ON = USB MICRO B
A4 ON = USB TYPE C
A3 + A4 ON = P-CARD

SEL1 SEL0
L L D+/D- CONNECTED TO BREAKOUT

B B
L H D+/D- CONNECTED TO USB TYPE C

H L D+/D- CONNECTED TO USB MICRO B

H H D+/D- HIGH-Z
(DEFAULT) (DEFAULT)

A A
APPROVALS
MOBILE DEVICES

ENGINEER: MMI BLOCK TITLE:

LAST MODIFIED BY: MMI usb


Tue Aug 23 12:12:40 2016
PROJECT NAME REV
B 84016537001_05.cpm 01
CAD FILE NAME:
PAGE 16 OF 17

8 7 6 5 4 3 2 1

DEVELOPER NOTE (MDK CONVERSION):


1) DELETE THIS PAGE ENTIRELY WHEN DESIGNING YOUR OWN MOD