0 views

Uploaded by Ahmed MaGdy

active mixer paper

save

- 662.full
- A CMOS Programmable Analog Memory-Cell Array
- Slap3
- Image Rejection Mixer
- ASIC Drivers
- 31-FUJI-2SK2082-01
- Hip 6602
- IGBT
- Qualcomm vs Parkervision IPR2015-01833-FinalWrittenDecision
- 200v Mosfet
- Two Tone Intermodulation
- Data Sheet
- Bird 7-9120 Multicoupler
- Ambipolar Charge Transport in Organic Field-effect Transistors
- Refresher Electronics Evaluation
- Fet
- Transistor - 10n100 E
- datasheet(1)
- HILL TRAIN POWER GENERATION AND AUTOMATIC RAILWAY GATE CONTROLLING
- J42
- Speed Control of DC Motors With the L292 Switchmode Driver-CD00003926
- VLSI
- IRF640A Datasheet.eeworld.com.Cn
- opa659
- BJT_Part(1)
- CCET - VLSI Desgn
- In a 111
- 5N06HD
- K13A50D Transistor
- Interview Mcqs
- Swing Simulation Using STB Analysis.pdf
- 10.1109@RFIC.2004.1320517
- Swing Simulation Using STB Analysis
- 10.1109@ICECCT.2017.8118047
- 10.1109@CICC.2005.1568663
- Sivision Proposal
- Lect1 Intro
- What the Nyquist Criterion Means to Your.pdf
- 2017 3 CST S2 Shipping
- CST Assignment
- Two Stage Op Amp and Stability
- CUVirtualNetLab_2016
- texas instruments adc.pdf
- LNA Workshop Instruction

You are on page 1of 10

Content is final as presented, with the exception of pagination.

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1

**Using the Gate–Bulk Interaction and a Fundamental
**

Current Injection to Attenuate IM3 and IM2

Currents in RF Transconductors

Meysam Asghari and Mohammad Yavari, Member, IEEE

Abstract— Two new linearization techniques to attenuate limiting the second-order input intercept point (IIP2) and third-

the second-order intermodulation (IM2) and third-order order input intercept point (IIP3) of the mixer, respectively.

intermodulation (IM3) currents in transconductance stage of The output nonlinear current of the transconductance stage

CMOS active mixers are proposed. In the first technique,

the third-order Volterra kernel of the transconductance stage is the most important source of these intermodulations in

output current is cancelled using the interaction between the the low-noise amplifiers (LNAs) and active mixers. In a

gate and bulk terminals of the input transistors. For this end, perfectly balanced mixer, even-order nonlinearities generated

a IM2 voltage, with an adjustable magnitude and phase, is by the nonlinearity of the transconductance stage transistors

produced and applied to the bulk of these transistors. This would not appear at the output. However, in practice, due to

produces an interaction term in the IM3 current of the stage

and attenuates the total IM3 current. In the second technique, a the mismatch between the local oscillator (LO) signals, load

fundamental component is added to the current of the tail source resistances, and switching transistors, even-order nonlinearities

in the transconductance stage. This component produces an IM2 appear at the signal [5]. Several linearization techniques to

term in the drain current of the input transistors, caused by g’m cancel the IM3 and IM2 currents of the transconductance stage

of the input transistors, with an equal magnitude and opposite are introduced in [2] and [5]–[24].

phase related to the intrinsic IM2 current of the stage, and

cancels the total IM2 current. Spectre-RF simulation results show The derivative superposition scheme is one of the

that the proposed techniques simultaneously improve the third- most utilized techniques to cancel the IM3 current of the

order input intercept point and second-order input intercept transconductance stage in the recent years [2], [6]–[9]. In this

point by ∼14.1 and 16.4 dB, respectively, compared with the technique, an extra transistor is employed in parallel with

conventional active mixer, while 1.66-mA extra current is drawn the main transistor and it is biased in a different region.

from a single 1.2 V power supply. ) of this

The second-order derivative transconductance (gm

Index Terms— CMOS active mixers, gate–bulk interaction, transistor has an opposite sign of the main transistor, and

Gilbert-cell, second-order input intercept point (IIP2), third- hence, can cancel the gm of the main transistor.

order input intercept point (IIP3), linearity, second-order inter-

modulation (IM2), third-order intermodulation (IM3). The IM2 injection method is another approach to cancel

the IM3 current [10], [11]. The postdistortion technique

I. I NTRODUCTION in [12] uses a diode-connected transistor at the output of the

transconductance stage to cancel the IM3 current. This

R ECENTLY, with the rapid development of modern

wireless communication systems, the demand for high-

data-rate systems, such as the orthogonal frequency division

transistor injects an IM3 current with an equal magnitude but

an opposite phase related to the intrinsic IM3 current of the

transconductance stage to produce a zero total IM3 current.

multiplexing, has increased. In these kinds of systems, the

In [13], the third-order kernel of the transconductance stage

linearity is a critical requirement [1]. On the other hand,

output current is cancelled using the interaction between two

with CMOS technology scaling, the supply voltage of the

nonlinear systems. The IM3 current of transconductor along

circuits has decreased, resulting in the degraded linearity [2].

with the switching stage is attenuated by producing a negative

In a receiver chain, the linearity of the down-conversion

impedance in [14]. This technique improves both the flicker

mixer often dominates the total linearity. The double-balanced

noise figure and conversion gain of the mixer as well.

Gilbert-cell mixer, owing to its high port-to-port isolation and

In [2] and [6], due to the interaction between the input

high integration level, is widely used as the down-converter

signal and the IM2 signal at the output of the transconductance

block in the radio receivers [3], [4]. The second-order inter-

stage, the IM3 cancellation is limited. This problem is

modulation (IM2) and third-order intermodulation (IM3) cur-

alleviated in [7] and [8] using an LC filter at the output of the

rents are the most important parts of the nonlinear current

transconductance stage. This filter attenuates the IM2 signal,

Manuscript received May 11, 2014; revised October 23, 2014 and and hence, the contribution of the interaction term is reduced.

January 6, 2015; accepted January 13, 2015. However, in these papers, the gm of the main transistors

The authors are with the Integrated Circuits Design Laboratory,

Department of Electrical Engineering, Amirkabir University of Technology, cancels in a narrow bias point range of the extra transistor [9].

Tehran 16846-13114, Iran (e-mail: meysamasghari@aut.ac.ir; myavari@ In [10] and [11], the injected IM2 signal to the transconduc-

aut.ac.ir). tance stage increases the IM2 current of the stage, resulting

Color versions of one or more of the figures in this paper are available

online at http://ieeexplore.ieee.org. in a degraded IIP2. In addition, the diode-connected transistor

Digital Object Identifier 10.1109/TVLSI.2015.2394244 in [12] decreases the gain of the stage. Moreover, all of the

1063-8210 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.

See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

the IM2 current of the transconductance stage is significantly A. the IM2 current cancellation of the transconductor. an MOS transistor. This respectively. [12]. and R L with C L grounded. the following relation The very same current is subtracted from the output current of can be utilized [25]: this stage resulting in the IM2 current cancellation of the stage. By assuming that the switching stage is ideal. 1. the second and the IM2 and IM3 currents of the transconductance stage are third terms are the sources of the IM2 and IM3 currents. by neglecting from the nonlinearity influence In addition. to consider the body effect (vb ). the In an nMOS transistor with the bulk terminal connected calibration techniques are often power hungry and complex. and g are the cross-modulation tance. respectively. with the exception of pagination. This nonlinear could adjust the magnitude and the phase of the second-order current originates from the nonlinear I –V characteristic of the component of the bulk voltage signal. can be expressed by the Taylor series expansion a feedforward method is employed to attenuate the as follows: IM2 current. case. an IM2 current with equal 2 3 magnitude and opposite phase with respect to the main i d (vg . and [22]. In [5]. The amplifier’s IIP3 is improved by injecting both the IM2 signal and the second-order harmonics of input tones in [16].) and higher of the transistor conductance (gds . IEEE 802. the total IM3 current of utilized MOS transistors. M3 –M6 . The very same current is where gm. two new techniques the transistor can be cancelled. 2 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS introduced techniques in [2]. it can be leaked to the previous block like LNA. and load stages. Simulation results are provided the first. if the second-order nonlinearity component exists fully differential transconductance stage is shown in Fig. Now. gb . if we dominant source of the distortion in the mixer. In this section. gbg in Section IV. In (2). In (1). (1) cannot with an equal magnitude and opposite phase is generated by completely express the drain current of the transistor. and [13] increase the noise figure. another IM3 term will appear at the drain current in form the transconductance. However. 1. bb coefficients of the transistor. around the device mismatch and are power hungry [18]. The proposed + gbg vgs vbs + gbb vgs v2gs + · · · (2) IM3 and IM2 cancellation techniques are explained . In [10] and [24]. since the injected signal is added at the input of the amplifier. vs ) = gm vgs + gm vgs + gm vgs + · · · (1) IM2 term is generated by employing two auxiliary transistors . an IM2 current if a signal is applied to the bulk of the transistor. presented. the conclusions are drawn in Section V. . may affect its performance. In this injecting a fundamental current to the transconductance stage. + gmb vbs + gmb vbs + · · · gb vgs vbs 2 This paper is organized as follows. in the bulk signal (vb ) while the source of the transistor is In this circuit. respectively. P ROPOSED IM3 AND IM2 C ANCELLATION ∂ 2id ∂ 3i d ∂ 3i d gb = gbg = 2 gbb = . gmb mb the proposed techniques. In (1). 2 i d (vg . gm m subtracted from the output current of this stage. vg and vs are the variations of the In this paper. However. the interaction between the gate and the bulk terminals. In the first technique. the drain current of the transistor is defined using the interaction between the bulk and gate terminals of as a function of the gate and source voltages (vg and vs ). M1 –M2 with Mb . in Section II. and hence. a full Volterra 2 3 series analysis is employed. Finally. Proposed IM3 Cancellation Technique attenuated by employing the feedback technique. . This article has been accepted for inclusion in a future issue of this journal. Section III presents the linearized mixer using where gmb . In addition. g . Fig. vb . .and second-order derivatives of the bulk transconduc- .11 as well as [5] and [22] are sensitive to the the small-signal drain current of the transistor. to the ground. In the second technique. gds ds for high channel bandwidth applications such as UMTS and order nonlinear coefficients of the transistor transconductance. [6]–[9]. term originates from gb by creating an interaction between the nonlinear current of the transconductance stage is the most the gate and the bulk terminals of the transistor. Content is final as presented. two new linearization techniques to attenuate gate and source voltages. . bias point. Several calibration techniques are presented to cancel the IM2 current in [17]–[20]. [21].and with drains connected together. the introduced technique in [21] is not appropriate . the IM3 current is cancelled respectively. and g denote the bulk transconductance. . addition to the intrinsic IM3 component arising from gm . respectively. switching. The adaptive biasing technique based on the envelope signal power detection in [15] is another method that not only enhances the linearity but also reduces the dc power in RF transconductors. Conventional double-balanced Gilbert-cell mixer. and g are the transconductance. which can be obtained as follows: II. vs ) = gm vgs + gm 3 vgs + gm vgs + · · · gmb vbs To investigate the cancellation mechanisms. In this method. (3) T ECHNIQUES ∂vgs ∂vbs ∂vgs ∂vbs ∂vgs ∂vbs2 A conventional double-balanced Gilbert-cell mixer with a In (2). are introduced to cancel the IM3 and IM2 currents of The proposed IM3-cancellation technique is based on the mixer. resulting in second-order derivatives of the transistor transconductance. in these techniques. first.

In this circuit. (8) summed up in the output current (i out ). ω2 ) ◦ Vin2 + · · · (6) bulk of these transistors. resistor (Rbulk ) defines the bias voltage of the bulk terminals Equation (7) states that H3DIFF can be cancelled. ∓ω2 ) + B2 (±ω1 . with the exception of pagination. 3 is proposed. if the and third-order Volterra kernels of the transconductance stage sign of B2 is selected as negative then the IM2 current of output current. provided to the zero potential and the IM2 voltage is applied to the bulk that the following condition is satisfied: of M1 and M2 transistors by the capacitor C (an ac coupling capacitor). ∓ω2 )] and the common-mode components (even-order terms) are × (1 − 2(gm1 + gmb1 )N(±ω1 ∓ ω2 )). For this purpose. ±ω1 . ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS 3 Fig. only the second-order Volterra kernel of this voltage is action term of the fully differential structure that originates considered and higher order kernels are neglected. By applying from the second-order nonlinearity at the source of the input the Kirchhoff’s law at the drain of M1a and M2a . 2 is introduced as the IM3 cancellation technique. second-. ∓ω2 ) = − . B2 is the second-order Volterra the transistor can be cancelled. H2DIFF . ±ω1 ) 2 The output current of the transconductance stage in Fig. In this equation. ω2 ) ◦ Vin2 changing the magnitude and phase of B2 . 2 shows the realization of the proposed technique magnitude and phase of B2 . 2B2 (±ω1 . ∓ω1 )) 9 shown in Fig. the proposed kernel of VIM2 . H2CM . (10) gmb1 H3DIFF (±ω1 . resulting in an enhancement in in the fully differential transconductor. can be considered as the differential and common-mode parts. Finally. respectively (the detailed gm1 calculations are presented in Appendix A) B2 (±ω1 . 3. When this method is used as phase of B2 are adjustable. This article has been accepted for inclusion in a future issue of this journal. ∓ω2 ) + B2 (±ω1 . the first term is the intrinsic third-order nonlinearity the RC network (R D1 and C D ) ‘and being amplified by M3a . It will be proved that both the magnitude and technique is a multipurpose one. 2. Since the drain of these two transistors are connected together. The common-mode second-order kernels are calculated + H3 (ω1 . we have transistors. ω3 ) ◦ Vin3 + · · · DIFF (4) in (8). ω3 ) ◦ Vin3 + · · · (5) second term originates from the injected IM2 voltage to the VIM2 = B2 (ω1 . an IM2 voltage with an adjustable magnitude and phase is produced and applied to the bulk of the transistor. Fig. it can also where H1DIFF . vd (t) dvd (t) As it is seen. Although the circuit shown in Fig. IM2 voltage generator. the the value of AIIP3 . gb1 − 3 gmb1 (2gm1 b1 1 2 1 These two type of definitions of the output current in the (9) transconductance stage along with VIM2 can be expressed by the Volterra series expansion as follows: As it is clear. Realization of the proposed IM3 cancellation technique in the fully differential transconductor. the third term is the produced interaction term by the applied IM2 voltage to the bulk of M1 and M2 . the transistors × [(3/2)gb1 − gmb1 (2gm1 + gb1 ) (7) M1a and M2a are similar and they are used to convert the × (2N(±ω1 ∓ ω2 ) + N(±2ω1 ))] input signal voltage to a nonlinear current. (11) R D1 dt . In this circuit. This current then appears at the output as a voltage (VIM2 ) while flowing from In (7). ω2 ) ◦ Vin2 the second-order nonlinearity of the input transistors and the + H3CM(ω1 . Fig. the circuit + (2B2 (±ω1 . ω2 . × (2N(±ω1 ∓ ω2 ) + N(±2ω1 )) the magnitude and phase of B2 (the applied IM2 voltage to the 4 bulk of M1 and M2 ) should be adjustable. of input transistors and the second term is the intrinsic inter- Here. in order to cancel the output = 2gm1 − gm1 (2gm1 + gb1 ) 3 IM3 current (H3DIFF ) of the fully differential transconductor. are H3CM be used as the IM2 cancellation technique as well. the first term in the bracket is ICM = Id1 + Id2 = H1CM(ω) ◦ Vin + H2CM (ω1 . ∓ω2 ) components (odd-order terms) of their currents are removed = [gm1 + gmb1 B2 (±ω1 . the (8). Suppose the differential and common-mode parts of first-. 2 g (2g +gb1)(2N(±ω1 ∓ ω2 )+ N(±2ω1 ))−gm1 = 3 m1 2 m1 +g )(2N(±ω ∓ ω )+ N(±2ω )) . Consequently. respectively. the second-order kernel of ICM will be The differential third-order and common-mode second-order cancelled if the following condition holds: kernels are given by (7) and (8). the condition in (9) can be satisfied by IDIFF = Id1 − Id2 = H1DIFF (ω) ◦ Vin + H2DIFF (ω1 . this kernel can be attenuated by changing the i d1a (t) + i d2a (t) + + CD = 0. Content is final as presented. the differential H2CM (±ω1 . ∓ω2 ) 4 As mentioned above. ω2 . For this. the IM2 cancellation. H3DIFF and H1CM . regarding the positive sign of gm1 and gmb1 .

4. the total common-mode second-order kernel of the switching pairs. the second-order nonlinearities appear as the common-mode at the output signal resulting in a Fig. R L . Second. zero A2 and an infinite AIIP2 . the canceling condition in (17) can gm of these transistors and cancels the second-order kernel of be satisfied by changing the values of R A and C A and the transconductance stage output current.L (±ω1 . ∓ω2 ) = −2gm1 D2 (±ω1 . an effective way to improve the IIP2 of the mixer the fully differential transconductance stage and the second is to cancel the common-mode second-order kernel of the term arises from the proposed technique. In a perfectly balanced differential topology. The circuit implementation of this technique = (1 + 2gm1 RSS )2 + ω1 ω2 (RSS C p1 )2 is shown in Fig. current will be cancelled if the following condition holds: ductance stage. its magnitude in a down-conversion mixer can other. ∓ω2 ) = −2gm1 (D1 (±ω1 ) + D1 (∓ω2 )) (15) differential IM2 signal appears at the output in two ways. It can be shown transconductance stage output current (H2CM). the magnitude and phase of B2 can be changed according to the values of R D1 . ω2 ) where A1 and A2 are the first. R D2 . However. the differential common-mode second-order kernels are given by (the detailed IM2 signal appears at the output of the circuit. As a result. 4. will cancel each factors of IIP2. the total differential 2 H1DIFF second-order kernel of the output current (H2DIFF ) will not AIIP2 = π 2 2 σ R 2 CM 2 be cancelled. respectively. In this equa- of the mismatch in the load resistors. ∓ω2 ) the transconductance stage and in the switching pairs produces + 2gm1 (1 + D1 (±ω1 )D1 (∓ω2 )). Content is final as presented. In a double-balanced Gilbert-cell mixer. 4. As is seen tion. and σ R are the low-frequency leakage of the sequently. The differential and choosing a proper aspect ratio for M4a and M6a –M8a . the differential second-order of the the common-mode IM2 current (H2CM) is converted to the left-hand side is not equal to zero. B. the mismatch between the corresponding transistors in CM H2. IM2 cancellation circuit. This article has been accepted for inclusion in a future issue of this journal. (18) term with the same magnitude but an opposite phase at the 1 + (ω R A C A )2 drain currents of M1 –M2 and M3 –M4 . ∓ω2 ) = . and this calculations are presented in Appendix B) limits the IIP2. an IM2 current is produced and subtracted from the output of the stage resulting in the total IM2 output F1 (±ω1 )F1 (∓ω2 ) current to be zero. that the total common-mode second-order kernel of the output Here. respectively. (16) a differential IM2 current (H2DIFF ) and this current is trans- ferred to the output without any frequency translation. and the standard deviation output current is twice the kernel obtained in (16). resulting in the total differential second-order kernel of be calculated as the output current (H2DIFF ) to be zero (Appendix B). This term is caused by According to (18). the DIFF H2. Proposed IM2 Cancellation Technique In general. in practice.and second-order kernels of the output signal. a first-order term has been created at RSS the source voltage of M1 –M2 and M3 –M4 by injecting a where F1 will be obtained as follows: fundamental current which is generated by the circuit shown gm4a (gm6a + gm8a )R A with blue color in Fig. the IIP2 will be decreased L2 H2DIFF + H2CM + RL H2 considerably according to the (14). 4.L (±ω1 . if the right-side pair is not added. 4 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS By substituting (1) and (6) into the frequency domain representation of (11). (12) 1 + j (±ω1 ∓ ω2 )R D1C D As it is seen. First. the load resistor. (14) The common-mode second-order kernel of the right-hand side is the same as the one in the left-hand side. However. By considering these two limiting the left-hand side in Fig. the first term is the intrinsic second-order nonlinearity of from (14). the one in differential current due to the mismatch between the switching the right-hand side will be in an opposite phase to that in pairs and load resistors [26]. and hence. and C D . and consequently. the magnitude of IIP2 in a circuit can be calculated as follows: A1 (ω) AIIP2 = (13) A2 (ω1 . and con- where L. As seen from (15). with the exception of pagination. Although there are not any odd-order terms at the source voltage of the input transistors in a fully 1 + j (±ω1 ∓ ω2 )RSS C p1 (1 + 2gm1 RSS ) × 2 (17) differential structure. B2 is given by 2gm1a R D1 × gm3a R D2 B2 (±ω1 . due to a mismatch between the corresponding devices. This term produces a second-order F1 (ω) = × (1 − j ω R A C A ). by injecting a first-order component to the transcon.

∓ω2 )(gm1 + gmb1 ) (20) It has been designed with input signal frequency and output DIFF H3 (±ω1 . As a result. with the exception of pagination.8-μm × 328. ∓ω2 )+ D2 (±ω1 . ∓ω2 ) signal bandwidth equal to 2.L and i ss.and third-order kernels and the of the original and compensating IMD products.R ) appear as the common magnitude of the IIP2 according to (14). Since the output noise of IM2 voltage generator (shown Fig. As it is seen. ∓ω2 ) + B2 (±ω1 . Fig. The cancellation mixer. (23) can be satisfied by changing the magnitude and phase of the injected IM2 voltage (by changing the values of R D1 and C D as well as the gain of M3a ). IIP2 for different values of R A and aspect ratios of M4a (and M5a ). So. P ROPOSED H IGH IIP2 AND IIP3 ACTIVE M IXER the total capacitance seen from this port is also increased. An LO with 5-dBm power = 4gm1 + gb1 (2B2 (±ω1 . (22) can be met by changing the values of R A and C A and choosing a proper aspect ratio for M4a and M6a –M8a (M5a and M7a –M9a ) transistors according to (18). ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS 5 As it is clear. (21) layout of the proposed mixer is shown in Fig. 3) and the IM2 cancellation circuit (M4a . 4 with a single 1. In these simulations. It is worth mentioning 4 that these bias voltages are generated using a proper biasing + (2D1 (±ω1 )D1 (∓ω2 ) + D1 (±ω1 )D1 (±ω1 )) 3 circuit. ∓ω2 ) IV. the first-order kernel is the same as area in the red box is the layout of the conventional the conventional fully differential structure.4 GHz and 10 MHz. respectively. 6. On the other hand. 1. in Fig. M7a –M9a along with R A and C A ) as well as the injected (M5a and M7a –M9a ).7-dBm IIP3 which is improved F1 (±ω1 )F1 (∓ω2 ) ∼14. gmb1 (3gm1 + 2gbg1 + gbb1)−gb1(gmb1 + gm1 + gb1 ) the random mismatch is given by the Gaussian distribution (23) with a standard deviation of (W/W ) = 0. IIP3 has been simulated versus the frequency spac- −g gb1 gm1 ing and the results are shown in Fig. In addition. 8. these techniques are not appropriate for ultrawideband applications. 9. ∓ω2 ) variations have been done. the proposed techniques do for different values of R A and aspect ratios of M4a (and M5a ). the proposed intermodulation distortion (IMD) IM2 and IM3 cancellation techniques in Section II is shown cancellation techniques are based on a perfect phase opposition in Fig. H1DIFF (ω) = 4gm1 (19) H2CM (±ω1 . Content is final as presented. ±ω1 )) 3 drives the switching transistors. The differential first. M6a –M8a and M5a . The following results are related to the postlayout conditions of the common-mode second-order and differential simulations. 6 and it has been simulated using a 90-nm RFCMOS + 4gmb1 B2 (±ω1 . The × (3gm1 + 2gbg1 + gbb1). ∓ω2 ) + 4gm1 process along with the conventional mixer shown in Fig. It can be observed that H2CM and H3DIFF will be the mixers are shown in Fig. resulting in an enhancement in the fundamental currents (i ss. . ±ω1 . The simulated IIP3 of unknowns. not have any effect on the noise figure and conversion gain. III. these techniques are frequency stage are. 7 which occupies 378. given by (the detailed calculations are dependent and they will be satisfied for a narrow bandwidth presented in Appendix C) of input frequency. In order to 1 investigate the performance of the proposed IM3 cancellation = N(±ω1 )N(∓ω2 ) technique. due to the first-order component existence in the source voltage of the right. 5 shows the IIP2 mode at the output of the mixer. common-mode second-order kernel of the transconductance by considering (22) and (23).1 dB compared with the conventional mixer.373/(W × L × M). 6. This figure indicates that cancelled if the following conditions are satisfied: the proposed mixer has 15. In this figure. an intentional (g + g gm1 b1 mb1 ) − gm1 (gbb1 + 2ggb1 + 2gm1 ) 1% mismatch was considered in resistors and for transistors. In this circuit. which is not shown in Fig. − 4D2 (±ω1 . IIP3 of mb1 gm1 × +2g the proposed mixer varies for different frequency spacing gmb1 (3gm1 bg1 + gbb1 )−gb1 (gmb1 + gm1 + gb1 ) (22) indicating that the IM3 cancellation depends on the frequency.2 power supply. The utilized bias voltages in 4 typical process corner case and room temperature and device − (2gm1 +gb1) (2D2 (±ω1 . The high IIP2 and IIP3 mixer using the introduced In addition. the other cross-modulation coefficients (gbb and gbg ) appear in the third-order kernel. This article has been accepted for inclusion in a future issue of this journal. S IMULATION R ESULTS = 4D1 (±ω1 )D1 (∓ω2 )(gm1 + gmb1 + gb ) The complete schematic of the proposed mixer is shown in Fig. respectively. 6 for conciseness. = .8-μm die area. the located As seen from (19). the IIP3 and IIP2 simulations versus the process B2 (±ω1 .and left-hand side transistor pairs. ±ω1 )) 3 parameters are also shown in Fig. Due to the increased number of transistors at the RF port. 5. third-order kernels of the transconductance output current The IIP3 simulations have been performed by applying a are dependent together and make two equations with two two-tone test with 10-MHz spacing.

the conventional mixer is 1. Simulated IIP3 of the proposed mixer versus the frequency spacing. According to Fig. and M are the width. This article has been accepted for inclusion in a future issue of this journal. IIP3 Monte Carlo simulation results of the proposed and conventional mixers. Then. the minimum IIP3 of the proposed where W . Fig. Fig. and number mixer is higher than 13 dBm while the minimum IIP3 of the of fingers in MOS transistors. 11 shows Monte Carlo simulations with 1000 iterations have been 16. 8. In addition. performed by applying a two-tone test. respectively. 10. Content is final as presented. Fig. Fig. 9. with the exception of pagination. L.4 dB improvement in IIP2 of the proposed mixer compared . The IIP3 and IIP2 Monte Carlo simulation results are shown in Figs. respectively. length.54 dBm. 10. Complete schematic of the proposed mixer. Simulated IIP3 of the proposed and conventional mixers. Fig. 7. 10 and 11. Layout of the proposed mixer. 6 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS Fig. 6.

are employed that occupy a large silicon die area. The simulated conversion-gain and is based on the cancellation of the second-order kernel of noise figure of the proposed mixer in the output bandwidth is the transconductance stage output current. ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS 7 TABLE II P ERFORMANCE C OMPARISON Fig. In [29] + gb1(Vin − Vs )(Vb − Vs ) + gbg1(Vin − Vs )2 (Vb − Vs ) and [32]. with the exception of pagination. 2 are identical and CG(dB) IIP3(dBm)−10 considering (2). shown in Fig. In order to improve the linearity. The second technique with the conventional one. Content is final as presented. A PPENDIX A [21]. and [28] are mixer. [21]. 11. in [21].8 and 15 dB. (a) Simulated conversion gain. and [32] are larger than that of the proposed mixer. [14]. and all of these works. the proposed mixer achieves an outstanding FoM that indicates the effectiveness of the proposed IM3 cancellation technique. This article has been accepted for inclusion in a future issue of this journal. + gbb1(Vin − Vs )(Vb − Vs )2 + · · · (A. using the interaction between the gate and bulk terminals of the MOS transistor. while the IIP2 is not considered in the FoM relation in (24). [13]. respectively. a new term is produced at the drain IM3 current. the conversion-gain and noise an IM2 current with an equal magnitude and opposite figure are equal to 9. the mixer is merged with an LNA. achieved a higher IIP2. respectively. a linearized mixer along with its Volterra series analysis has been presented. As it is seen. 12. four and one inductors. except [32]. TABLE I C ORNER C ASES S IMULATION R ESULTS OF THE P ROPOSED M IXER V. Compared with the other works. the Figure of Merit (FoM) of [13]. which have phase is generated by injecting a first-order current to not been changed in comparison with the conventional mixer. C ONCLUSION In this paper. (24) expressed as 10 10 × P(mW) × VDD (V ) Id1 = gm1 (Vin − Vs ) + gm1 (Vin − Vs )2 + gm1 (Vin − Vs )3 As it is seen. In the first technique. [19]. 12. IIP2 Monte Carlo simulation results of the proposed and conventional mixers. The very same current is sub- The simulation results in different process corner cases and tracted from the output current of this stage resulting in temperature variations are summarized in Table I. have a low IIP2 in comparison with the proposed mixer. + gmb1 (Vb − Vs ) + gmb1 (Vb − Vs )2 + gmb1 (Vb − Vs )3 However. the drain current of these transistors can be 10 20 × 10 20 FoM = 10 log NF(dB) . the IM2 cancellation technique results in a high IIP2 for the mixer Fig. In this technique. [19]. the proposed mixer with the conventional one and several previously reported linearization works [10]. [29]. the transconductance stage. the cancellation of IM2 current of the transconductance Table II summarizes the simulation results and compares stage. (b) Noise figure of the proposed while only the reported works in [10]. two new linearization techniques are introduced.1) . In addition. [27]–[35] using the following figure-of-merit [27]: Assuming M1 and M2 in Fig.

∓ω2 )) D2 (±ω1 . ω3 ) ◦ Vin3 + · · · (B.L = −Iss. In (B.R ) and the first. the total second- (KCL) at the source of these transistors. and hence.3) Vs = K 1 (ω) ◦ Vin + K 2 (ω1 . By substituting (A. ∓ω2 ) = 0 (A. with the exception of pagination.1) and (A.R ) can be expressed by the Volterra series as follows: + gmb1 (Vb − Vs ) + gmb1 (Vb − Vs ) + gmb1 (Vb − Vs )3 2 + gb2 (−Vin −Vs )(Vb −Vs )+gbg2(−Vin −Vs )2 (Vb − Vs ) VS. This article has been accepted for inclusion in a future issue of this journal. respectively. ω2 ) ◦ Vin2 + gbb2 (−Vin − Vs )(Vb − Vs )2 + · · · (A. output second-order nonlinearity of M6a –M8a and M9a –M10a One the other hand. at the source of the input transistors and the output impedance RSS dt of the tail current source.2). F3 are the first-. ω2 .L = D1 (ω) ◦ Vin + D2 (ω1 . second-. ω2 . ∓ω2 ) 3 as using (A. ∓ω2 ) N(ω) = RSS . ω2 . second-. By applying the KCL at the source of M1 and M2 −i d1(t) − i d2 (t) + C P + = 0. the kernels of the transconductance +D1 (∓ω2 )D2 (±ω1 . ω3 ) ◦ Vin3 + · · · (A. ω2 .3) (B. ω2 ) ◦ Vin2 The source voltage of the input transistors (M1 and M2 ) is related to the input voltage signal and it can be defined based −D3 (ω1 . ω3 ) ◦ Vin3 + · · · (B.3) into the frequency (A.1) and (A. ∓ω2 ) = 2N(±ω1 . the second-order kernel of these currents can be dvs (t) vs (t) neglected. 8 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS Id2 = gm1 (−Vin −Vs )+gm1 (−Vin − Vs )2 + gm1 (−Vin − Vs )3 (i ss.4) into the frequency domain representation of (A. respectively. we have order component of the i ss.R (t) + i ss. C P and RSS denote the total parasitic capacitance −i d1.3) order kernels of VS. by substituting (A. and third- + K 3 (ω1 .2) +D3 (ω1 . ω3 ) ◦ Vin3 + · · · (B.4) dt RSS we have v S.L (t) − i d1.6) where N(ω) is as follows: D3 (±ω1 .L (t) dv S.5) K 2 (±ω1 . ∓ω2 ) 1 + 2RSS (gm1 + gmb1 ) + j ω RSS C P 4 Now.4). second-.4). by applying the Kirchhoff’s current law are in the opposite phase related together. ω2 ) ◦ Vin2 where D1 . ±ω1 . ±ω1 .3) into (A. Content is final as presented.L are obtained as K 1 (ω) = K 3 (±ω1 .L (and VS.7) = −N(±2ω1 ∓ ω2 ) F3 (±ω1 .1) and (B.2) on the following Volterra series: Iss.L (t) In (A. and third- order kernels of VS.L (t) + + C p1 = 0.7). the first-. ±ω1 . (A.L and i ss.3). D2 . K 2 . the kernels of Vs are given by domain representation of (B.R = −D1 (ω) ◦ Vin + D2 (ω1 .4) and using Using (1) and substituting (B.R ).L (and i ss.L and i ss.R currents is very small.R = F1 (ω) ◦ Vin + F3 (ω1 .1) VS. ∓ω2 ) (A. (A.6) and (A.2) as well − gm1 2D1 (±ω1 )D2 (±ω1 . and K 3 are the first-.5) D1 (ω) = −F1 (ω) × N(ω) (B. and third-order kernels of i ss.and third-order where K 1 .∓ω2 )(2gm1 +gmb1 B2 (±ω1 . respectively. ±ω1 ) output current in (4) and (5) are obtained as follows: + 2gm1 2D1 (±ω1 ) + D1 (∓ω2 ) .6) = 2gm1 (1 + D1 (±ω1 )D1 (∓ω2 ))N(±ω1 ∓ ω2 ) (B. since the kernels of Vs related to the input voltage signal. D3 and F1 .

L CM (±ω1 .L DIFF (±ω1 .8) = 2gm1 H2.10) H1CM(ω) = H3 (±ω1 . 4 (M1 and M2 ) as well as the injected currents (B. CM DIFF 4 (A. ∓ω2 ) DIFF ×(1 − 2(gm1 + gmb1 )N(±ω1 ∓ ω2 )) (A.L (±ω1 . ±ω1 . ±ω1 . ∓ω2 ) (B.12) . ∓ω2 ) = H2 (±ω1 .7) 4 = 2gm1 − gm1 (2gm1 + gb1 ) 3 Using (B. ∓ω2 ) = −2gm1 (D1 (±ω1 ) + D1 (∓ω2 )) (B. ∓ω1 )) 9 calculated as × [(3/2)gb1 − gmb1 (2gm1 + gb1 ) DIFF H1. (B.9) = 2gm1 + 2gm1 (D12 (±ω1 ) + 2D1 (±ω1 )D1 (∓ω2 )) (B. and the frequency domain representation ×(2N(±ω1 ∓ ω2 ) + N(±2ω1 )) of (1). ±ω1 )) (B.L (ω) A PPENDIX B = −2gm1 D1 (ω)H2.7). 4 and third-order kernels of the left-side output current can be + (2B2 (±ω1 . ∓ω2 ) + 2gm1 (1+ D1 (±ω1 )D1 (∓ω2 )) pairs in Fig. ∓ω2 ) The source voltage of the right. ∓ω2 ) + B2 (±ω1 . ±ω1 . ∓ω2 ) + D2 (±ω1 . ∓ω2 ) +D12 (±ω1 )D1 (∓ω2 ) . second-.5)–(B.9) = [gm1 + gmb1 B2 (±ω1 .8) H2CM (±ω1 .L (ω) × (2N(±ω1 ∓ ω2 ) + N(±2ω1 ))] (A. ∓ω2 ) = 0.11) 3 CM H1. the differential and common-mode first-. H1DIFF (ω) = 2gm1 H3DIFF (±ω1 . ∓ω2 )] H3.and left-side transistor = −2gm1 D2 (±ω1 .10) − gm1 (2D2 (±ω1 .

ultra- wideband LNA design technique. ±ω1 )) Syst. Lett. pp. Jun.-L. “High linearity 23–33 GHz SOI CMOS downconversion double balanced mixer. “A 1. 616–618. “A 750 mV fully integrated 4 direct conversion receiver front-end for GSM in 90-nm CMOS. II. pp. Tech. 9. and E. Circuits Syst. Jul.” IEEE J. R EFERENCES [23] M. 10. Manstretta. “A low-voltage folded-switching mixer [4] P. Z. no. Manstretta. 2006. no. 2. 1151–1155. ∓ω2 ) new calibration technique for zero-IF receivers. USA: Kluwer. (A. 2404–2412. Integr. with the exception of pagination. Theory Techn.4). “A precise four-quadrant multiplier with subnanosecond Circuits. S. 2011. no. 47. using (6) and substituting IEEE J. ulation mechanisms in CMOS downconverters. W. vol. A. Annema. pp. 2011. vol. Solid-State Circuits. Miar-Naimi. ±ω1 . Dec.3) [19] M. J. Solid-State Circuits. W. linearized. X. 60. (B. pp. Moazzam. vol.5-dB conversion gain. Mar.. M. of a microwave CMOS Gilbert cell mixer. Oct. Reg. 320–330. “Low voltage performance in 0. 2003. Eur.5-V current mirror double-balanced mixer Int. Microw. B. = −2gm1 D3 ± ω1 . S. Shoaei.L (±ω1 . K. 17. 2007. Using (C. Solid-State Circuits. no. Solid-State Circuits. Svelto. no. Brandolini. Lett. A. Circuits Syst.6-V +4 dBm IIP3 LC folded cascode CMOS + gm1 [2D1 (±ω1 )D2 (±ω1 . 1259–1264. “Using interaction between two nonlinear D1 (ω) = −F1 (ω)N(ω) (C. 122–126. 2008. G. vol.8-dB [25] P. Oct. and J. S. Mar. [28] M. Microw. 59. no. pp. no. Leeuwenburgh. G. B. 42. no. and stage are. Sulivan.L are obtained as no. vol. Papers. Wu. “All-digital adaptive 3 module for automatic background IIP2 calibration in CMOS 4 downconverters with fast convergence. [13] M. Ku. B. Kim. 7.. Sep. Zhang. D2 (±ω1 . 175–178. Exp. Fan. 1997. I. H. Lett.4-dBm IIP3 1. Circuits Syst. Y. 44. ∓ω2 ) (C.” IEEE Trans. Microw. it can be lope signal injection for improvement of RF amplifier intermodulation shown that the differential first. Zhou. Asghari and M. vol. Kim. “High linearity down-conversion CMOS mixers. 55. A. vol.7). 0. Shi et al. Exp. pp. 552–559. given by F. 40. 6. ∓ω2 ) = 2N(±ω1 ∓ ω2 ) [14] W. P. H. May 2008. (B. Nov. 23. 6. 394–406. “Second-order intermod- pp.” IEEE Trans. Briefs.” IEEE Trans. Gudem. Vidojkovic. Jul. 2390–2402. 2012. Luong. ∓ω2 ) LNA with gm linearization. “A high IIP2 mixer enhanced by a H3DIFF (±ω1 . Oct. “Second-order intermodulation cancelation and conversion-gain enhancement techniques for CMOS active mixers. vol. 2013. Solid-State [3] B. Xavier. 2008. 2008. 427–431.2). [27] V. 32.. ∓ω2 ) + D2 (±ω1 . “A 0. M. Jun.. P. Chen. A PPENDIX C [11] S.45 dBm IIP3 1. 8. van Roermund. Mar. Circuit Theory Appl.” IEEE J.75 mW +12. representation of (B. Yun. IEEE Int. Svelto. + gm1 + gmb1 B2 (±ω1 . 3. 43. ±ω1 )) [20] P. and L. “+134 dBm IIP3. Nov. . J.” Electron. and A. Circuits Syst. Feb. pp. Jin and T. Shoaei. ±ω1 )] [8] H. 2006.3) into the frequency domain Nov.” Electron.. Aitchison. and K.4–1 GHz common-drain −2gm1 2D1 (±ω1 ) + D1 (∓ω2 ) + D12 (±ω1 )D1 (∓ω2 ) stage with its high frequency analysis. Sinencio. Jun. pp. 6.and second-order kernels of [12] H. 21. pp. Guan. “A new IIP2 enhancement technique IIP2 CMOS direct downconversion mixer for fully integrated UMTS for CMOS down-converter mixers. 12. no. vol. 2. Content is final as presented. 3. Leung. and Dec. H.1). no.” IEEE 1 + (ω R A C A )2 Trans. no. ∓ω2 ) Circuits Conf. M. J. Cheng. pp. Solid-State Circuits. 2010.” in IEEE Int.. the first. 1998. (C. 11. R. Feb. Briefs. ∓ω2 )(gm1 + gmb1 ) (C. no. 50. (B. Solid-State Circuits. 54. Svelto.” Electron.18-μm CMOS.” [1] L. II. response.” IEEE Trans. Circuits Syst. × D1 (±ω1 )D1 (∓ω2 )(gm1 + gmb1 + gb ) “A flicker noise/IM3 cancellation technique for active mixer using negative impedance.” In the circuit shown in Fig. pp. 219–223.” IEEE Microw. Circuit Conf. 38. Syst. Apr. 4. H1DIFF (ω) vol. pp. Solid-State Circuits. and F. C. Ali. ±ω1 . 60. Briefs. vol. Circuits [24] D. C. no. ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS 9 CM H3. Rossi. 49. M.. Shoaei. E. + 4gm1 − 4D2 (±ω1 . [15] V. vol. 4 [7] Y. 204–208. Wireless Compon. J. 2092–2103. gm4a (gm6a + gm8a )R A [10] M. Sep. desensitization.” in Proc. 6. 1310–1317. D. Asghari and M. II. pp. “A low-power.” IEEE J. 3. J. Han and T. 3 [22] M. Kim et al. no. vol. Larson. M.. pp. Yavari. receivers. Shoaei. pp. and F. Chang. Distortion Analysis of Analog Integrated NF CMOS LNA employing multiple gated transistors with capacitance Circuits. [17] M. “A linearization technique for RF receiver front-end using second-order-intermodulation injection. 41. Exp. 1830–1839. no. 2013. no. Kim.. Sanzogni. Vahidfar and O.and third-order kernels and the distortion. Vahidfar and O. Papers. ∓ω2 ) + B2 (±ω1 . 2005. pp. pp. Nauta.2) pp. H. 1062–1066. no. W. Budimir. Sosio. Lett. Solid-State Circuits. Wambacq and W. (A. and (B. Norwell. ±ω1 . Briefs. F. 4 = 4gm1 + gb1 (2B2 (±ω1 .” IEEE J.. Brandolini. common-mode second-order kernel of the transconductance [16] C. [2] T. 365–373.” IEEE J. 76–77. [18] M. and B. 48.13) [9] T. 11. Exp. Symp. no. vol. 58. 916–919. 3 vol. 7. R. +D1 (∓ω2 )D2 (±ω1 . 2013. “A +78 dBm [5] M. Jiang. 2013. Brandolini. 2012. 2007. Jan.” IEEE Trans. 48. Mollaalipour and H. “Active 2nd-order intermodulation = 4gm1 H2CM (±ω1 . Solid-State Circuits. B. vol. Aug.” IEEE Trans. Gilbert. vol. “A CMOS high IIP2 mixer for multi- × (3gm1 + 2gbg1 + gbb1 ). 2009.14) active CMOS mixer: Design and Volterra series analysis. Circuits Syst. pp. Yavari. Sansen. and W. and F. 2001. II. Exp. Yu. pp. M. May 2008. van der Tang. 1283–1284. Solid-State = 4gmb1 B2 (±ω1 . 40. “A 6. IEEE Int. Theory Techn.” IEEE J. Vahidfar and O. 60. 3. J. Wu. Mbabele.. vol. 2014. respectively. no. Vahidfar and O. ∓ω2 ) [6] C. Symp.5-mW +9. 2005. 2529–2537. pp. Dig. X.” IEEE + (2D1 (±ω1 )D1 (∓ω2 ) + D1 (±ω1 )D1 (±ω1 )) J. 656–659. pp. 4. Y. 10.” IEEE J.. no. Wienk. vol. Briefs.1) and (C. “A 5. O. with 10-dBm IIP3 and 9.2). Circuits − (2gm1 + gb1 )(2D2 (±ω1 .4) standard receivers. M. [26] D. 1968. M.76 dB NF 0. H. ∓ω2 ) calibration for direct-conversion receivers.” in Proc. 1064–1065. VS. 2014. pp. 1888–1894.” IEEE Trans. “An IIP2 calibration technique for + 4D1 (±ω1 )D1 (∓ω2 )(gm1 + gmb1 + gb ) CMOS multi-standard mixers. Lu. A. Lou and H. Mar.1).” IEEE J. Jin and T.1) systems to improve IIP3 in active mixers. vol. B. vol. II. “An improved high linearity F1 (ω) = × (1 − j ω R A C A ). Deng. ∓ω2 vol. 1148–1154. “Improvement of third-order intermodulation product of RF and microwave amplifiers by injection. 3 [21] M. pp. pp. MA. D.9 GHz CMOS LNA employing multiple gated transistors with bulk- where F1 will be obtained as follows: bias control.” in Proc. Aug. “Analysis of enve- where N is calculated in (A. This article has been accepted for inclusion in a future issue of this journal. 3. no.

pp.-H. 19. He spent several research periods with the Institute IEEE Int.” in B. 705–709. Dr. He has been an Associate Editor of the improved noise figure. in 2007. Dec.. and P. O. degree from Shahid Rajaee Teacher Training University. 1884–1887. 2009. Koolivand. no. Amirkabir University of Tech- pp. He received the A. all in electrical engineering. vol.-H. and data converters. Yavari was a recipient of the Best Student Research Award from [35] C. Tehran. 12. B. Tehran. 626–631. Q. M.” IEEE Microw. Iran. Very Large Scale Integr. Kim.-S.. in 2008. the B. Laskar. pp. [30] M.Sc. H. Barati and M.. Iran.. degree from the Amirkabir University of Technology. and 2006. Spain. Theory Techn. Microw.-Y. Wireless Compon.. 4. pp. 2011. 56. 2. He has been an Assistant Professor tions. 618–629. vol. and C. where he founded the Integrated Circuits Design [33] J. in 2011.Sc.” IEEE Trans. IEEE ICECS. was involved in the design of high-resolution A/D [32] H. Lu. Lett. vol. Theory Techn. as a Principal Design Engineer. data converters. nology. using a new technique to remove common mode currents. mixed-signal circuits and systems. Circuits Syst. 4372–4380. degrees in electrical engi- Proc. This article has been accepted for inclusion in a future issue of this journal. with the Department of Electrical Engineering. and conference proceedings in Microw.” IEEE Trans. 19. “Design and analysis of low Laboratory. Yazdi. 2006. International Journal of Circuit Theory and Applications since 2014. degree from the Technical and Engineering College of Shiraz.-H. C. Safarian. “A new RF CMOS Gilbert mixer with improved noise mixed-signal integrated circuits and signal processing. Park. low-voltage and low-power IC design for biomedical applications. His current research interests include analog and [34] J. pp. 13. Apr. and figure and linearity. Jou. May 2011. “Experimental and D/A converters for professional digital audio 5-GHz RF frontends for ultra-low-voltage and ultra-low-power opera. and J.” IEEE Trans.. Chiang. Heydari.Sc. analog integrated circuits. vol. Iran. Hsieh.-H. and A. His current research interests include CMOS radio frequency integrated circuit (RFIC) design for wire- less communications. Meysam Asghari was born in Iran in 1989. Dec. 54. 2009. 5. Tehran. Symp. Hung. vol. He has authored or co-authored over 100 peer-reviewed flicker-noise CMOS mixers for direct-conversion receivers. since 2006.” IEEE Trans. Shiraz. [31] A. in 2013. Yavari.-S. 2008. Mar. “A highly linear mixer with inherent balun in 1999. Yavari. 2001.-H. no. “Low Mohammad Yavari (S’01–M’08) received the voltage low power techniques in design of zero IF CMOS receivers. 10 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS [29] Y. no. Very Large Scale to 2007. and Ph. with the exception of pagination. Feb. 13–16. May 2005. A. pp.. P. Fotowat-Ahmady. (VLSI) Syst.Sc. P. papers in international and national journals. 3. where he Integr. neering from the University of Tehran. 92–94. Seville.” in Proc. .Sc. CMOS RFIC design for wireless communications. (VLSI) Syst. pp. no. “A low voltage mixer with the University of Tehran in 2004. no. Tehran.. Shoaei.. Chen. F. Lee. M.D. applications. “Design and analysis of an He was with Niktek from 2004 to 2005 and 2006 ultrawide-band distributed CMOS mixer. Content is final as presented. and the M. and L. respectively. Yoon et al. Chen. of Microelectronics of Seville.

- 662.fullUploaded byhyyh13
- A CMOS Programmable Analog Memory-Cell ArrayUploaded byvaishnaw25
- Slap3Uploaded byNarayan Apte
- Image Rejection MixerUploaded byBharat Chandra Sahu
- ASIC DriversUploaded bygvishal.murthy
- 31-FUJI-2SK2082-01Uploaded bybal3x
- Hip 6602Uploaded byanonbeat
- IGBTUploaded bysantonis
- Qualcomm vs Parkervision IPR2015-01833-FinalWrittenDecisionUploaded byTradeHawk
- 200v MosfetUploaded byshivaramakrishna
- Two Tone IntermodulationUploaded bysantanu_sinha87
- Data SheetUploaded byIvan Emilio Merino Davila
- Bird 7-9120 MulticouplerUploaded bykevinmorgan55
- Ambipolar Charge Transport in Organic Field-effect TransistorsUploaded byajayiitm05
- Refresher Electronics EvaluationUploaded byvon kervy onrade
- FetUploaded bynidhi
- Transistor - 10n100 EUploaded byivanaldo tavares
- datasheet(1)Uploaded bydragon-red0816
- HILL TRAIN POWER GENERATION AND AUTOMATIC RAILWAY GATE CONTROLLINGUploaded bydevashish0dewan
- J42Uploaded bysammekevremde
- Speed Control of DC Motors With the L292 Switchmode Driver-CD00003926Uploaded byDan Esenther
- VLSIUploaded byDeepak Patel
- IRF640A Datasheet.eeworld.com.CnUploaded byGiovanni Carrillo Villegas
- opa659Uploaded byDany Ivan Martinez
- BJT_Part(1)Uploaded byOmer Ballak
- CCET - VLSI DesgnUploaded byprof_kt
- In a 111Uploaded bybitbasico
- 5N06HDUploaded byahagen00
- K13A50D TransistorUploaded byVictor Hugo Flores Isunza
- Interview McqsUploaded byBint e Farooq

- Swing Simulation Using STB Analysis.pdfUploaded byAhmed MaGdy
- 10.1109@RFIC.2004.1320517Uploaded byAhmed MaGdy
- Swing Simulation Using STB AnalysisUploaded byAhmed MaGdy
- 10.1109@ICECCT.2017.8118047Uploaded byAhmed MaGdy
- 10.1109@CICC.2005.1568663Uploaded byAhmed MaGdy
- Sivision ProposalUploaded byAhmed MaGdy
- Lect1 IntroUploaded byAhmed MaGdy
- What the Nyquist Criterion Means to Your.pdfUploaded byAhmed MaGdy
- 2017 3 CST S2 ShippingUploaded byAhmed MaGdy
- CST AssignmentUploaded byAhmed MaGdy
- Two Stage Op Amp and StabilityUploaded byAhmed MaGdy
- CUVirtualNetLab_2016Uploaded byAhmed MaGdy
- texas instruments adc.pdfUploaded byAhmed MaGdy
- LNA Workshop InstructionUploaded byAhmed MaGdy