B.

TECH VIth SEMESTER ANTENNA AND WAVE PROPAGATION (ECT-301) L 3 T 1 P Theory : 75 Sessional : 50 Time :3Hrs

UNIT – I: BASIC PRINCIPLES AND DEFINITIONS: Retarded vector and scalar potentials. Radiation and induction fields. Radiation from elementary dipole (Hertzian dipole, short dipole, Linear current distribution), half wave dipole, Antenna parameters : Radiation resistance, Radiation pattern, Beam width, Gain, Directivity, Effective height, Effective aperture, Polarization, Bandwidth and Antenna Temperature. UNIT – II: RADIATING WIRE STRUCTURES AND ANTENNA ARRAYS: Folded dipole , Monopole, Biconical Antenna, Loop Antenna, Helical Antenna. Principle of pattern multiplication, Broadside arrays, Endfire arrays, Array pattern synthesis, Uniform Array, Binomial Array, Chebyshev Array, Antennas for receiving and transmitting TV Signals e.g. Yagi-Uda and Turnstile Antennas. Printed antennas. UNIT – III: APERTURE TYPE ANTENNAS: Radiation from rectangular aperture, E-plane Horns, H-plane Horns, Pyramidal Horn, Lens Antenna, Reflector Antennas and Slot Antennas. BROADBAND AND FREQUENCY INDEPENDENT ANTENNAS : Broadband Antennas. The frequency independent concept : Rumsey’s principle, Frequency independent planar log spiral antenna, Frequency independent conical spiral antenna and Log periodic antenna. UNIT – IV: PROPAGATION OF RADIO WAVES : Different modes of propagation, Ground waves, Space waves, Surface waves and Tropospheric waves, Ionosphere, Wave propagation in the ionosphere, critical frequency, Maximum Usable Frequency (MUF), Skip distance, Virtual height, Radio noise of terrestrial and extra terrestrial origin. Multipath fading of radio waves. NOTE: 1. 2. 3. The question paper shall have nine questions in all. The candidate shall have to attempt five questions. There will be one compulsory question from all the four units combined. Remaining eight questions shall be organized into four sections, each section having two questions from each of the four units. The candidate shall be required to attempt one question from each section.

REFERENCES: 1. 2. 3. Robert E.Collin, Antenna & Wave Propagation, McGraw Hill John D. Kraus, Antennas, McGraw Hill. E.C.Jordan and K.G.Balmain, Electromagnetic Waves and Radiating Systems, PHI

BCD subtraction. Mano .Vianesic & S. Array Processors.C. Multiplier Control Unit. multistage networks. PHI. Mc-Graw Hill. Random access memories: semiconductor RAMS. Serial – access Memories – Memory organization.G. 4. crossbar networks. Register transfer and micro-operations. UNIT-IV: SYSTEM ORGANIZATION: Input-Output Systems – Programmed IO. Microprogrammed Control: basic concepts. Z. The candidate shall have to attempt five questions. mesh networks. Virtual memory. Computer Architecture and Organization. Addressing modes. decimal arithmetic operations. Pipelining – basic concept. Machine and Assembly Language programming. The question paper shall consist of nine questions in all.M. Main Memory Allocation. Magnetic disk memories. There will be one compulsory question from all the four units combined. . Forms of Parallel processing classification of Parallel structures.Hayes. historical Perspective. Microprogrammed Computers. The candidate shall be required to attempt one question from each section REFERENCES: 1. Magnetic tape memories. NOTE: 1. ring networks. Interconnection networks – single bus. ALU design. J. Multiplication and division. Tree networks. hypercube networks. Structure of general purpose Multiprocessors. UNIT-III: MEMORY ORGANIZATION: Memory device characteristics. Instruction format. Multiplier Control Unit. CPU Control unit. Interleaved memory. IO Processors.TECH Vth SEMESTER COMPUTER ARCHITECTURE AND ORGANIZATION (ECT-303) L 3 T 2 P Theory : 75 Sessional : 50 Time :3Hrs UNIT-I: BASIC STRUCTURE OF COMPUTER HARDWARE AND SOFTWARE : Functional Units. DMA and Interrupts. Decimal arithmetic unit – BCD adder.G.B.Zaky. Mc Graw Hill. Macros and Subroutines. M. Optical memories. Computer Organization . Cache Memory. CPU Control unit. Information representation. Remaining eight questions shall be organized into four sections. each section having two questions from each of the four units. 2.P. UNIT-II: PROCESSOR DESIGN: Fixed – point and floating-point arithmetic addition. 2. Instruction types.Hamacher. 3. Associative Memory. Computer System Architecture. CONTROL DESIGN: Hardwired Control: design methods. subtraction. V.

Response of memory. moments. Modern Probability Theory. Laws of large numbers. Hybrid ARQ schemes.less and linear systems. Digital Communication. Das. Gaussian Poisson. 2. Average length of encoded message. F. 6. Majority logic decodable codes. . Central Limit Theorem. McGraw Hill. Noiseless coding. NOTE: 1. The question paper shall have nine questions in all. 3. Hamming code. R.TECH V SEMESTER INFORMATION THEORY AND CODING (ECT-305) L 3 T 2 P Theory : 75 Sessional : 50 Time : 3 hrs. UNIT – III: LINEAR BLOCK CODES: Introduction to error control coding. Information Theory. Reza. Papoulis. Mutual information. REFERENCES: 1. 5. Remaining eight questions shall be organized into four sections. its properties. MGH. Bhat. Expectation. general description of basic ARQ strategies. Huffman’s minimum redundancy codes. Prentice Hall. UNIT – IV: CONVOLUTIONAL CODES AND ARQ: Transfer function of a convolutional code. Shanon’s theorem on coding for memoryless noisy channels. Types of codes. UNIT – I: PROBABILITY AND RANDOM PROCESSES : Probability. Functions of random variables & random vectors.L. 3. distance properties of binary convolutional codes. Discrete memoryless channels. Maximum Likelihood decoding. R. B. Stationary ergodicity.D. its properties. each section having two questions from each of the four units. Probability distribution and density functions. Fundamental theorem of discrete noiseless coding. Theorem of decodability. UNIT – II: ELEMENTS OF INFORMATION THEORY AND SOURCE CODING: Introduction. Burst error correcting convolutional codes.Introduction to Statistical Signal ProcessingWeb Edition-1999.M. Shu Lin and J. Error detecting and correcting capabilities of a block code. New Age International Ltd. cyclic code. Power Spectral density. There will be one compulsory question from all the four units combined.B. A. Shanon’s binary encoding. Joint Statistics. Davission. Wiley Eastern Ltd. Shanon–Fano encoding. 2. Mullick and Chatterjee.C. random variables. Galois fields. Probability. Conditional Statistics. Random Processes. Types of errors and error control strategies. Costello. Syndrom decoding. BEC. Characteristic Functions. Convergence of a sequence of random variables.H. Random Variables and Stochastic Processes. mean and Auto Correlation. 4. BSC. Error Control Coding. Channel capacity. The candidate shall have to attempt five questions. Markov processes. Viterbi decoding. Entropy. Gray. The candidate shall be required to attempt one question from each section. information as a measure of uncertainty. Linear block codes. B. codes. Separable binary codes. M. independence.

3. level Translators. UNIT-II: OP-AMP WITH NEGATIVES FEEDBACK AND FREQUENCY RESPONSE: Block diagram representation of feedback amplifier. summing. its equivalent circuit and op-amp circuit configurations. 555 timer. UNIT-III: OP-AMP APPLICATION: DC. peaking amplifier. Practical OP-AMP. The question paper shall consist of nine questions in all. current mirrors. NOTE: 1. 2. 2. voltage series feedback. differential input output amplifier.TECH Vth SEMESTER LINEAR IC APPLICATIONS (ECT-307) L 3 T 2 P Theory : 75 Sessional : 50 Time :3Hrs UNIT-I: DIFFERENTIAL AND CASCADE AMPLIFIERS: Balanced. voltage to current converter. Integrated circuits. PLL. oscillators UNIT-IV: SPECIALIZED LINER IC APPLICATIONS: Universal active filter. open loop gain Vs frequency. ICs used in radio receiver. Interpretation of data sheets. Gayakwaed . very high input impedance circuit. K. There will be one compulsory question from all the four units combined. characteristic parameters. . The candidate shall be required to attempt one question from each section REFERENCES: 1. Introduction to ideal OP-AMP. slow rate. The candidate shall have to attempt five questions. voltage shunt feedback differential amplifiers.Botkar . current to voltage converter. High frequency op-amp equivalent circuit.B. 8038 IC. frequency response compensating network. unbalanced output differential amplifiers. R. Remaining eight questions shall be organized into four sections. cascade configuration of amplifiers. FET differential amplifier. switched capacitor filter. each section having two questions from each of the four units. OP-amps and Linear Integrated circuits .R. sealing. circuit stability. active filters. power amplifier. AC amplifiers. operational amplifiers. integration and differential circuit. closed loop frequency response. frequency response of internally compensative op-amp and non compensating op-amp. wave shaping circuit.A. averaging and instrumentation amplifier.

B. S. N-MOS IC fabrication Process Sequence. Assembly & Packaging: Package Types. S. Czochralspi crystal Puller. design considerations. Metallization Problems.TECH Vth SEMESTER MICRO-ELECTRONICS (ECT-309) L 3 T 2 P Theory : 75 Sessional : 50 Time :3Hrs UNIT-I: Crystal Growth: MGS.Bipolar IC fabrication Process Sequence. Silicon shaping. . Oxidation Techniques. Package fabrication technologies. LithoGraphy: Photolithography. X-ray Lithography. VLSI Technology. Di-electric and Poly-Silicon Film Deposition : Deposition Processes for Poly. Physical Vapour Deposition. each section having two questions from each of the four units. UNIT-III: Diffusion : A Qualitative view of atomic diffusion in Solids.Ghandhi. EGS. Oxidation induced Defects. Feature Size control and anisotropic etching. Mc Graw Hill. 3. UNIT-II: Reactive Plasma Etching: Plasma Properties. The candidate shall be required to attempt one question from each section REFERENCES: 1. 2. diffusion apparatus. Future trends. Epitaxy: Vapour Phase Epitaxy. Sputtering. Plasma assisted Depositions. Isolation Techniques. SiO3N4.Si. Plasma etching techniques and equipment. Implantation Equipment Annealing. The question paper shall consist of nine questions in all. Characterization of diffused layers. VLSI Fabrication Principles. Wafer Preparation. Oxide Properties.Sze. 2. E-beam lithography. Molecular Beam Epitaxy. Diffusion of Grp3 and 5 impurities in Silicon Impurity Sources.M. Range Theory. Oxidation: Thermal Oxidation Kinetics. There will be one compulsory question from all the four units combined. constant source and limited source diffusion. NOTE: 1. UNIT-IV: Metallization : Metallization applications.K. Ion Implantation: Introduction. Remaining eight questions shall be organized into four sections. Epitaxial Layer evaluation. Choices. SiO2. diffusion mechanisms. Fick’s one dimensional diffusion equation. The candidate shall have to attempt five questions.

and high power devices with 8086. 8086 minimum mode and maximum mode CPU module. addressing modes. 8086 Pin diagram descriptions. PSW.Hall . description of data registers. UNIT-II: 8086 INSTRUCTION SET : Instruction formats. 3. Interfacing SRAMS. transfer of control instructions. 8086 CPU Read/Write timing diagrams in minimum mode and maximum mode. . Microcomputer video displays.V. McGraw Hill 2nd ed. Interfacing and refreshing DRAMS. Macros. DMA operation. 8086 Interrupt mechanism. Intel’s 8237. Assembler directives. The 8086/8088 family . 3. pointer and index registers. The question paper shall consist of nine questions in all. alphanumeric displays. Microcomputer Systems – The 8086/8088 family. data conversions. Microprocessor BUS types and buffering techniques. string instructions.Gibson . BIU and EU.types. Data tables. UNIT-III: MAIN MEMORY SYSTEM DESIGN : Memory devices. (PHI). UNIT-IV: BASIC I/O INTERFACE : Parallel and Serial I/O Port design and address decoding. . Remaining eight questions shall be organized into four sections. Data transfer instructions. The Intel family tree.B. Microprocessors and Interfacing . operation and interfacing with 8086. Liu. logical instructions. J Uffenbeck . Queue. each section having two questions from each of the four units. There will be one compulsory question from all the four units combined. The candidate shall be required to attempt one question from each section REFERENCES: 1. Writing procedures. NOTE: 1. Applications of Microprocessors. technological trends in microprocessor development. arithmetic instructions.description and interfacing with 8086. ADCs and DACs. modular programming. timing delays. (2nd Ed-PHI). multiplexed displays. CISC Versus RISC. arithmetic processing.TECH Vth SEMESTER MICROPROCESSORS (ECT-311) L 3 T 2 P Theory : 75 Sessional : 50 Time :3Hrs UNIT-I: INTRODUCTION : Evolution of microprocessors. ROMS/PROMS. Interfacing Keyboards. D. process control instructions. The candidate shall have to attempt five questions. Intel’s 8259. 2. loops. Address decoding techniques. WAIT state generation. interrupt types and interrupt vector table. 8086 CPU ARCHITECTURE : 8086 Block diagram. 2. DRAM Controller – TMS4500. address registers. INTERRRUPTS AND DMA : Interrupt driven I/O. Memory mapped I/O Vs Isolated I/O Intel’s 8255 and 8251. Generating 8086 CLK and reset signals using 8284. 8086 PROGRAMMING TECHNIQUES : Writing assembly Language programs for logical processing.

4. . 8. To Study Selectivity Characteristics of super heterodyne receiver. 3. 9. To Study Pulse Width Modulation & Demodulation. 6. 2.TECH Vth SEMESTER COMMUNICATION-II(Pr. Study of Low Pass/High Pass/ Band Pass Filter Using Active & Passive Elements. LIST OF EXPERIMENTS :1. To Study Amplitude Modulation & Demodulation To Study Frequency Modulation & Demodulation To Study Sampling Theorem To Study Diode detector & AGC To Study fidelity Characteristics of super heterodyne receiver.) (ECT – 313) L T P 2 Sessional : 50 Viva : 25 Time : 3 Hrs.B. 5. 10. To Study Pulse Amplitude Modulation & Demodulation. 7. To Study Pulse Position Modulation & Demodulation.

Assembler . ADC and DAC Cards. c) Familiarization with Turbo Assembler and Debugger S/Ws. b) Familiarization with Digital I/O. iv) Reading data stamp of a file using BIOS interrupt. Studying and Using 8086 In-Circuit Emulator. Write a program to : i) Create disk file. A. B. (i) Sine Waveform (ii) Square Waveform (iii) Triangular Waveform using ADC Card. Where N is programmable and X is unsigned number. i) Sine Waveform (ii) Ramp Waveform (iii) Triangular Waveform Using DAC Card. and Debugger. C. iii) Open. LIST OF EXPERIMENTS: I a) Familiarization with 8086 Trainer Kit.a disk file. iii) Instruction formats of Intel’s 8086 Instruction set of Intel’s 8086. write a programmable delay routine to cause a minimum delay = 2MS and a maximum delay = 20 minutes in the increments of 2 MS a) Use DOS interrupt to read keyboard string/character. ii) Open. write to and close. decrease the speed of a stepper motor and reverse its direction of rotation using stepper motor controller card. Write a program to measure frequency/Time period of the following functions. i) Programming Model of Intel’s 8086. ii) Addressing Modes of Intel’s 8086. b) Use BIOS interrupt to send a string/character to printer.B. Write a program to increase. i) Erasing UVPROMs and EEPROMs ii) Reprogramming PROMs using computer compatible EPROM Programmer.) (ECT-315) L T P 3 Exam : 25 Sessional : 50 Time :3Hrs Before starting with the experiments. Write a program to arrange block of data in i) ascending and (ii) descending order. II III IV V VI VII VIII IX X XI . Write a program to find out any power of a number such that Z = XN. Write a program to generate. read from and close a disk file. teacher should make the students conversant with the following essential theoretical concepts.TECH Vth SEMESTER MICROPROCESSORS (Pr.

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