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RF Small Signal Amplifier
RF Small Signal Amplifier
2
Low Frequency Amplifier
Low Frequency Amplifier
• Transistor is an voltage controlled current source
• Device capacitances are negligible
• High Z
in
, r
O
are desirable for high voltage gain
• Amplifier gain drops as frequency increases due to internal and
external capacitances → →→ →Low pass type amplifier
Transistor model
in
Z
+

m in
g v
in
v
L
R
S
R
S
v
L
V
+
−
O
r
)  ( ) (
O L m S
in S
in
L
r R g v
Z Z
Z
V ⋅ − ⋅ ⋅
+
=
i
L
3
Tuned Amplifier
Tuned Amplifier
• Gain over a narrow frequency range centered about some high
frequency
• If feedback by C
gd
is negligible
gs
C
+

m in
g v
in
v
L
R
S
R
S
v
L
V
+
−
O
r
gd
C
L C
( ) (  ) at 1/(2 )
L in m L O
V v g R r f LC π = ⋅ − ⋅ =
in
y
out
y
4
Tuned Amplifier
Tuned Amplifier
• When the internal capacitances cannot be ignored, y
in
and y
out
depend
on the load and the source impedances respectively (Miller Effects)
• Additional capacitive loading at the output by C
eq
=C
gd
[1+g
m
R
s
]
• Resonance frequency shifts downward due to C
eq
→difficult to
control the resonance frequency→need relatively large C
• If y
L
is inductive (below resonance frequency), y
in
shows negative
resistance →may oscillate
• C
gd
loads the output tank, decreases gain, detunes the resonance, and
most importantly causes instability
– Minimizing feedback due to C
gd
→Cascode topology
– Bilateral design using S parameters
(1 ) if j ( )
(1 / ) if j
out gd m S eq gd gs m
in gs gd m L in gd L
y j C g R j C C C g
y j C j C g y j C C y
ω ω ω
ω ω ω ω
≈ + = + <<
≈ + + = <<
5
S Parameters of FET
S Parameters of FET
ECP for RF CMOS with simple substrate model when body is grounded
In general, the substrate model is more complicated
gs
C
j
m i
g e v
ωτ −
i
v
+
−
ds
r
gd
C
i
R
g
R
g
L
s
R
s
L
Intrinsics
d
R
d
L
ds
C
sub
C
sub
R
6
Bias Independent Parameters of FET
Bias Independent Parameters of FET
• Bias independence: assumption for convenience
• Lg, Ls, Ld: parasitic inductances mainly due to electrodes. several
tens of pH, usually ignored for a few GHz application, but important
for mm application
• Rg: due to gate poly resistance, reduce the power gain, increase device
noise
• Rs: due to ohmic resistance, reduce gm, effective g
me
= g
m
/(1+g
m
Rs)
• Rd:due to ohmic resistance, affects the device power gain
7
Bias Dependent Parameters of FET
Bias Dependent Parameters of FET
gs
: effective charging path resistance for C , / 3, channel resistance at DC
For simple channel model(short channel device)
assume uniform sheet charge, and velocity saturated channel
( ),
i c c
d s s gs
R R R
i eWv n v
≈
= −
m
( )
,
/ / 1/ ( : charging time)
3
more accurately, (transit time),g 1/
4
: parasitic, cause nonunilaterality
n s gs
n s d s
gs m s
gs gs gs gs
d
m gs s
n
s
n
gd
gd
d
ds
ds
Q qWLn v
Q n i n
C qWL g qWv
v v v v
i
g C v L
Q
L
L
v
Q
C
v
i
r
v
τ τ
τ
=
∂ ∂ ∂ ∂
= = = =
∂ ∂ ∂ ∂
∂
= = =
∂
⇒ = ∝
∂
=
∂
∂
=
∂
1
cause ouput power loss
, less dependent on Vgs, but sensitive to Vds, cause output power loss and cross talk
sub sub
R C
−
 

\ .
8
f
f
T T
of FET
of FET
• Assume unilateral, ignore Cgd
• Short circuit current gain, h21=ig/id
21
21
21
T
h drops by 6dB/octave
1 , 2
f is a figure of merit for switching speed
T
m gs
d m
g gs gs gs
m
T T T
gs
g v
i g
h
i C v C
g
h f
C
ω ω
ω ω
ω π ω
=
= ≈ =
⇒
= ⇒ = =
gs
C
m
g
i
v
+
−
gd
C
g
i
d
i
9
f
f
max max
of FET
of FET
• Assume unilateral
• Gp : Power gain under matched condition
• To improve fmax, high f
T
, high Rds, low Rg
gs
C
m
g
i
v
+
−
g
i
d
i
g
R
ds
R
g
Z
L
Z
g
v
+
−
d
v
+
−
ds g
T
p
g
ds T
g
ds
gs
m
gs g gs gs m d
g
ds
g d
g
L
g d
g g d d g L p
R R
f
f
G
R
R
f
f
R
R
C
g
C j I v v g I
R
R
I I
Z
Z
I I
I V I V P P G
/ 4
f f at 1
4
1
4
1
) / , 2 / (
/
) Re(
) Re(
/
) Re( / ) Re( /
max
max
2
2
2 2
* *
=
= =
= =
= = ←
= =
= =
ω
10
Accurate
Accurate
f
f
T T
and
and
fmax
fmax
• Nonunilateral
• Includes all parasitic resistances
• For CMOS, junction capacitance should be merged to Cgs, Cgd
• Substrate parasitics are not included
2
max
) 1 (
2
3
1
5
4
) 1 (
) (
1
4
) ( ] / ) ( 1 ][ [ 2
s m
gs
gd
gs
gd
s m
g s m
i m
m ds
T
d s gd m ds d s gd gs
m
T
R g
C
C
C
C
R g
R R g
R g
g R
f
f
R R C g R R R C C
g
f
+


.

\

+ +


.

\

+
+
+
=
+ + + + +
=
π
11
Low Frequency Approximation of S11, S22
Low Frequency Approximation of S11, S22
0
11
0
0
22
0
1/
(  1/ )
in
in
in g in
out
out
out o eq
Z Z
S
Z Z
Z R j C
Z Z
S
Z Z
Z r j C
ω
ω
−
=
+
= +
−
=
+
=
freq (50.00MHz to 10.00GHz)
S
(
1
,
1
)
m5
m6
freq (50.00MHz to 10.00GHz)
S
(
2
,
2
)
m7
m8
Series RC
Parallel RC
L18 CMOS Sparameter
(2.15GHz & 5.25GHz)
for Finger=32 (width=160um)
Lg, Ls, Ld, Rd, Rs, Ri, τ ττ τ are ignored
12
Low Frequency Approximation of S21,S12
Low Frequency Approximation of S21,S12
0
21
0
0
0
12 0
0
2
when are ignored
1
(1 )
when Z 1/
1
m
g
in
in gs gd m
gd
gs
gd
g Z
S R
j C Z
C C C g Z
j C Z
S j C
j C Z
ω
ω
ω
ω
−
=
+
= + +
= <<
+
4 3 2 1 0 1 2 3 4 5 5
freq (50.00MHz to 10.00GHz)
S
(
2
,
1
)
m1
m2
0.15 0.10 0.05 0.00 0.05 0.10 0.15 0.20 0.20
freq (50.00MHz to 10.00GHz)
S
(
1
,
2
)
m3
m4
13
RF Small Signal Amplifier
RF Small Signal Amplifier
• Small signal amplifier
– not voltage amplifier but power amplifier
– conjugate impedance matching
– usually CE(Common Emitter) and CS(Common Source structure)
– characteristics of devices are given by S parameters
• Classification
– narrow band amplifier (about 10% BW of carrier frequency)
• Lossless Lsection matching
– medium band amplifier(2030% BW)
• double resonance matching, multisection matching technique
– broad band amplifier(more than 50% BW)
• feedback, balanced, traveling wave amplifier
14
Small Signal High Frequency Amplifier
Small Signal High Frequency Amplifier
• Z
SO
, Z
LO
: usually 50Ω
• Recall!
o in
o in
in
Z Z
Z Z
+
−
= Γ
Input
Matching
Network
transistor
[S]
Output
Matching
Network
Z ZZ Zso so so so
Z ZZ ZLo Lo Lo Lo
Vso Vso Vso Vso
(VSWR)in
(VSWR)out
a
Γ
b
Γ
( )
L L
Z Γ ( )
out out
Z Γ
( )
S S
Z Γ ( )
in in
Z Γ
15
Small Signal High Frequency Amplifier
Small Signal High Frequency Amplifier
• For Re(Z
i
)>0, always Γ
i
≤1
• VSWR
• All networks are specified by S parameters and reflection coefficient
Γ instead of impedance
– practically Γ , S parameters are based on the same normalizing impedance 50 Ω
– merely an alias of impedance or admittance
– Γ
in
is equivalent to Z
in
, Γ
out
is equivalent to Z
out
• Amplifier Specification
– Linear spec :Gain, Bandwidth, VSWR, Noise Figure
– Nonlinear spec: P1dB, IIP3 etc.
S in
S in
a
a
Γ Γ −
Γ − Γ
=
Γ −
Γ +
=
1 1
1
*
in
(VSWR)
L out
L out
b
b
Γ Γ −
Γ − Γ
=
Γ −
Γ +
=
1 1
1
*
out
(VSWR)
16
Input, Output Reflection Coefficients
Input, Output Reflection Coefficients
• If S
12
≠0, Γ
in
(Γ
out
)is a function of Γ
L
(Γ
S
)
• Instability of Γ
in
, Γ
out
• Usually, high speed active devices have magnitudes of S
11
, S
22
close to 1.
• If Γ
L
( Γ
S
) is also highly reflective and certain phase condition is
satisfied, magnitude of Γ
in
( Γ
out
) may become larger than 1
→amplifier oscillates
L
L
L
L
in
S
S
S
S S
S
Γ −
∆Γ −
=
Γ −
Γ
+ = Γ
22
11
22
21 12
11
1 1
S
S
S
S
out
S
S
S
S S
S
Γ −
∆Γ −
=
Γ −
Γ
+ = Γ
11
22
11
21 12
22
1 1
21 12 22 11
S S S S − = ∆
17
Simplified Amplifier Network
Simplified Amplifier Network
• Transistor S parameters are given
• Γ
S
≤1 for all passive Z
S
, Γ
L
≤1 for all passive Z
L
• Amplifier design is simply to choose source and load impedance Z
S
,
Z
L
to achieve a desired power gain avoiding oscillation
Transistor
[S]
) (
L L
Z Γ
) (
out out
Z Γ ) (
in in
Z Γ ) (
S S
Z Γ
Z ZZ ZS SS S
Vs Vs Vs Vs
Z ZZ ZL LL L
18
Amplifier Gain in Terms of S Parameters
Amplifier Gain in Terms of S Parameters
• Power
– P
avs
: power available from source, function of source impedance
– P
in
: power delivered to transistor
– P
avn
: power available from transistor output
– P
L
:power delivered to load, function of load impedance
• Transducer power gain G
T
=P
L
/P
avs
(function of Γ
S
, Γ
L
)
• Available power gain G
A
=P
avn
/P
avs
(function of Γ
S
)
• Operating power gain G
P
= P
L
/P
in
(function of Γ
L
)
• Measurements
– usual power measurement setup gives G
T
since signal source indicates P
avs
,
power meter reads P
L
– VNA S
21
2
corresponds to G
T
for Γ
S
= Γ
L
=0
S
S
2
S
avs
Z of function ,
) 8Re(Z
V
P =
19
Derivation of Transducer Power Gain
Derivation of Transducer Power Gain
[ ] S
a1
b1
ZS
ZL
a2
b2
) (
S S
Z Γ
( )
in in
Z Γ ( )
L L
Z Γ ( )
out out
Z Γ
20
Transducer Power Gain G
Transducer Power Gain G
T T
2 2 2
21
2
11 22 12 21
2 2
2
21
2 2
22
2 2
2
21
2 2
11
(1   )   (1   )
 (1 )(1 ) 
1   1  
 
 1   1 
1   1  
 
 1   1 
S L
T
S L S L
S L
in S L
S L
S L out
S
G
S S S S
S
S
S
S
− Γ − Γ
=
− Γ − Γ − Γ Γ
− Γ − Γ
=
−Γ Γ − Γ
− Γ − Γ
=
− Γ −Γ Γ
21
Available Power Gain G
Available Power Gain G
A, A,
Operating Power Gain G
Operating Power Gain G
T T
*
*
2
2
21
2 2
11
2
2
21
2 2
22
1   1
  
 1  1  
Function of source impedance
Conjugately matched output
Useful for LNA design
1 1  
  
1    1 
Function of load impe
L
out
S
in
S
A T
S out
A
L
P T
in L
P
G G S
S
G
G G S
S
G
Γ =Γ
Γ =Γ
− Γ
= =
− Γ − Γ
¦
¦
´
¦
¹
− Γ
= =
− Γ − Γ
dance
Conjugately matched input
Useful for low input VSWR design
¦
¦
´
¦
¹
22
Problems
Problems
• An RF amplifier has the following sparameters: S11=0.3 ∠ 70°,
S21=3.5∠85 °, S12=0.2 ∠ 10 °, S22=0.4 ∠ 45 °. The system is
shown below. Assuming reference impedance (used for measuring s
parameters) Zo=50Ohm, find:
• (1) Find Γ
s
, Γ
L
, Γ
in
, Γ
out
• (a) G
T
, G
A
, G
P
.
• (b) P
L
, P
A
, P
inc
Amplifier
22 21
12 11
S S
S S
Z
L
=73Ω
40Ω
23
Stability
Stability
• Unconditional Stability
– for any Γ
S
, Γ
L
≤1 ⇒ Γ
in
, Γ
out
≤1
• Simple measure of stability →Roulette Stability Factor K
• if K<1 and ∆<1, potentially unstable
– for some Γ
S
, Γ
L
≤1 ⇒ Γ
in
, Γ
out
≥1
– stability depends on Z
S
and Z
L
– you should find stable Z
S
and Z
L
• if 1 < K<0 , unstable for almost values of Z
S
and Z
L
2 2 2
11 22
11 22 12 21
12 21
1      
1,   1, where
2  
S S
K S S S S
S S
− − + ∆
= > ∆ < ∆ = −
24
Simultaneous Conjugate Matching
Simultaneous Conjugate Matching
• Only if unconditionally stable, simultaneous conjugate matching
yields maximum gain
– Γ
S
*
=Γ
in
(Γ
L
), Γ
L
*
=Γ
out
(Γ
S
)
– Solution Γ
MS
, Γ
ML
are little bit complicated. CAD will help you.
• Under simultaneous conjugate matching condition
– G
Tmax
= G
Pmax
= G
Amax
2
21
Tmax
12
 
( 1)
 
S
G K K
S
= − −
*
11
1
22
*
22
2
11
1
1
L
s
L
s
L
s
S
S
S
S
− ∆Γ
Γ = Γ =
− Γ
− ∆Γ
Γ = Γ =
− Γ
25
Stability Circles
Stability Circles
• Potentially Unstable(Conditional Stability)
– find stable Z
S
and Z
L
using stability circle
• Input (Source) Stability Circle
– locus of Γ
S
on Smith chart producing Γ
out
=1
– if S
11
<1, Z
S
in the region including origin(Z
S
=Z
0
) is stable source impedance
• Output (Load) Stability Circle
– locus of Γ
L
on Smith chart producing Γ
in
=1
– if S
22
<1, Z
L
in the region including origin(Z
S
=Z
0
) is stable load impedance
• You can easily draw stability circle using CAD
26
Load Stability
Load Stability
Circle(LSC
Circle(LSC
)
)
( )
2 2
22
21 12
2 2
22
*
*
11 22
22
21 12
11
1
1
D S
S S
D S
DS S
S
S S
S
L
L
L
−
=
−
−
− Γ ⇒
=
Γ −
Γ
+
L L L
R C = − Γ ⇒
Load stability circle
Center of circle Radius of circle
Re
Im
R
L
C
L
0
From
(2)
plane
L
Γ
27
Source Stability
Source Stability
Circle(SSC
Circle(SSC
)
)
( )
2 2
11
21 12
2 2
11
*
*
22 11
22
21 12
22
1
1
D S
S S
D S
DS S
S
S S
S
s
s
s
−
=
−
−
− Γ ⇒
=
Γ −
Γ
+
s s s
R C = − Γ ⇒
Source stability circle
Center of circle Radius of circle
Re
Im
R
s
C
s
0
From
(3)
plane
S
Γ
28
Stability Regions
Stability Regions
• The source and load stability circles only indicate the value
of Γ
s
and Γ
L
where Γ
2
 = 1 and Γ
1
 = 1. We need more
information to show the stability regions for Γ
s
andΓ
L
.
• For example for LSC, when Γ
L
=0, Γ
1
 = S
11
.
• Let the LSC does not encircle S
11
=0 point. If S
11
 < 1 then
Γ
L
=0 is a stable point, else if S
11
 > 1 then Γ
L
=0 is an
unstable point.
LSC
S
11
<1
Stable
Region
LSC
S
11
>1
29
Stability Region Cont...
Stability Region Cont...
• Let the LSC encircles S
11
=0 point. Similarly if S
11
 < 1
then Γ
L
=0 is an stable point, else if S
11
 > 1 then Γ
L
=0 is
an unstable point.
• This argument can also be applied for SSC.
LSC
S
11
<1
LSC
S
11
>1
Stable
Region
30
Summary for Stability Region
Summary for Stability Region
• For both Source and Load reflection coefficients (Γ
s
and
Γ
L
) :
LSC or SSC
S
11
 or S
22
 <1
LSC or SSC
S
11
 or S
22
 >1
LSC or SSC
S
11
 or S
22
 <1
LSC or SSC
S
11
 or S
22
 >1
31
Unconditionally Stable Amplifier
Unconditionally Stable Amplifier
• There are times when the amplifier is stable for all passive
source and load impedance.
• In this case the amplifier is said to be unconditionally
stable.
• Assuming S
11
 > 1 and S
22
 < 1, the stability region would
look like this:
LSC
S
11
>1
Γ
L
can
occupy any
point in the
Smith chart
SSC
S
22
<1
Γ
s
can
occupy any
point in the
Smith chart
32
Problem 2
Problem 2
• Use the sparameters of the amplifier in Problem 1, draw the load and
source stability circles and find the stability region.
SSC LSC
33
Summary for Stability Check
Summary for Stability Check
Set frequency range
Get Sparameters within
frequency range
K factor > 1
and ∆ < 1 ?
Amplifier Unconditionally
Stable
Yes
Draw SSC and LSC
No
Find S
11
 and S
22

Circles intersect
Smith Chart ?
Amplifier is conditionally
stable, find stability
regions
Yes
No
Amplifier is
not stable
Start
End
34
Stabilization Methods
Stabilization Methods
• Γ
in
 > 1 and Γ
out
 > 1 can be written in terms of input and
output impedances:
• This implies that Re[Z
in
] < 0 or Re[Z
out
] < 0.
• Thus one way to stabilize an amplifier is to add a series
resistance or shunt conductance to the port. This should made
the real part of the impedance become positive.
1 and 1
in o out o
in out
in o out o
Z Z Z Z
Z Z Z Z
− −
Γ = > Γ = >
+ +
35
Stabilization Methods Cont...
Stabilization Methods Cont...
2  port
Network
Z
1
Source
Network
Load
Network
Z
1
+R
1
’
22 21
12 11
S S
S S
R
1
’ R
2
’
Z
2
Z
1
+R
1
’
2  port
Network
Y
1
Source
Network
Load
Network
Y
1
+G
1
’
22 21
12 11
S S
S S
G
1
’ G
2
’
Y
2
Y
2
+G
2
’
36
Example
Example


S
S


parameters measurement and stability
parameters measurement and stability
analysis
analysis
DC
DC1
DC
S_Param
SP1
Step=1.0 MHz
Stop=1.0 GHz
Start=50.0 MHz
SPARAMETERS
C
Cc2
C=470.0 pF
C
Cc1
C=470.0 pF Term
Term1
Z=50 Ohm
Num=1
Term
Term2
Z=50 Ohm
Num=2
L
Lb2
R=
L=330.0 nH
L
Lb1
R=
L=330.0 nH
L
Lc
R=
L=330.0 nH
R
Rb1
R=10.0 kOhm
R
Rb2
R=4.7 kOhm
C
Ce
C=470.0 pF
R
Re
R=100 Ohm
pb_phl_BFR92A_19921214
Q1
V_DC
SRC1
Vdc=5.0 V
37
Example Cont...
Example Cont...
m1
freq=600.0MHz
K=0.956
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0.0 1.0
0.6
0.4
0.2
0.0
0.2
0.4
0.6
0.8
1.0
0.8
1.2
freq, GHz
K
m1
D
Plotting K and ∆ versus frequency
(from 50MHz to 1.0GHz):
This is the frequency
we are interested in
Amplifier is
conditionally
stable
38
Example
Example


Viewing S
Viewing S
11 11
and S
and S
22 22
at f=600MHz
at f=600MHz
freq
600.0MHz
S(1,1)
0.263 / 114.092
S(2,2)
0.491 / 20.095
39
Example Cont...
Example Cont...
indep(SSC) (0.000 to 51.000)
S
S
C
indep(LSC) (0.000 to 51.000)
L
S
C
Since S
11
 < 1 @ 600MHz Since S
22
 < 1 @ 600MHz
40
Example
Example
• The Sparameters for a BJT at a particular bias point and
f=750MHz are:
• S
11
= 0.76<38
o
• S
21
= 2.35<33
o
• S
12
= 0.04<52
o
• S
22
= 0.66<42
o
• Check the transistor stability, plot the Source and Load
Stability Circles and determine the stability regions.
41
Transistor Power Gain
Transistor Power Gain
• Used as a figure of merit for transistor
• Independent of source and load impedance
• Classification
– K>1, MAG(Maximum Available Gain)
– K<1, MSG(Maximum Stable Gain)
– Unilateral Power Gain U :MAG obtained using neutralization
 
 
MSG
12
21
S
S
=
) 1 (
 
 
MAG
2
12
21
− − = k k
S
S
) / Re( 2  /  2
 1 / 
12 21 12 21
2
12 21
S S S S k
S S
U
−
−
=
K
MAG(6dB/octave)
MSG
3dB/oct
f [log]
[dB]
42
Narrow Band Amplifier Design
Narrow Band Amplifier Design
• Unilateral Design
– assume S
12
=0
– approximate design
– use unilateral transducer power gain G
TU
=G
T

S12=0
– detailed design procedure (Refer to Gonzales)
– not practical, just shows attainable variable range of G
T
• Bilateral Design(if S
12
is not negligible)
– Simultaneous conjugate matching design
• valid for k>1(unconditionally stable), fixed gain G
TMAX
– G
P
or G
A
design
• if unconditionally stable(k>1) and for gain other than G
TMAX
• if potentially unstable(k<1)
43
Operating Power Gain Design
Operating Power Gain Design
• Mismatched output, matched input
• (VSWR)
in
=1, (VSWR)
out
>1,
• Constant G
P
circle on Γ
L
plane
– locus of Γ
L
(Z
L
) that yields constant G
P
at a frequency
– G
P
is only a function of Γ
L
(Z
L
)
• Unconditionally stable case
– G
PMAX
exists at a single point of Γ
L
(Z
L
)
– Design procedure for a gain less than G
PMAX
① Determine G
P
② Draw G
P
circle and select the desired Γ
L
③ Matched source impedance is Γ
S
= Γ
in
*
2
21 12
 /  ( 1)
PMAX
G S S K K = − −
44
Design Procedure Using G
Design Procedure Using G
P P
(potentially unstable)
(potentially unstable)
① Determine G
P
(G
p
<MSG)
② Draw G
P
circle
③ Draw load stability circle(Γ
in
stability)
④ Select Γ
L
on the G
P
circle far from stability circle
⑤ Matched source impedance is Γ
S
= Γ
in
*
⑥ Draw input stability circle(Γ
out
stability)
– Check if Γ
S
placed in the stable region
– If stable, design completed
– If unstable. go to step 4 and select new Γ
L
⑦ If input match is made, G
P
becomes G
T
45
G
G
P P
circle when K<1
circle when K<1
46
Available Power Gain Design
Available Power Gain Design
• Mismatched input, matched output
• (VSWR)
in
>1, (VSWR)out=1
• Constant G
A
circle on Γ
S
plane
• Design procedures are equivalent to that of using G
P
gain except that
Γ
s
replaces Γ
L
• If output match is made, G
A
becomes G
T
47
Noise
Noise
• Random variation of current or voltage
• White and Color noise
• Thermal noise(white)
– PSD(Power Spectral Density)=kT,
– k Boltzman constant ,T Kelvin Temperature
– P
n
at 290°K, PSD =174dBm/Hz
– Spectrum analyzer with 1MHz resolution bandwidth shows noise floor
114dBm/MHz
• Shot noise(white)
– PSD= q electron charge, I dc current
0 ) (
lim
= =
∫
+
∞ →
dt t V V
T t
t
n
T
n
constant = =
∫
+
∞ →
dt t V v
T t
t
n
T
n
2 2
)] ( [
lim
2
, n rms n
v v =
qI i
n
2
2
=
48
Noise
Noise
• Flicker noise
– PSD=Γ/f
α
, Γ: proportional constant, α≅1 Other noise source
• Lorentz noise
– PSD=kτ/(1+(ωτ)
2
)
49
Thermal noise of Resistance
Thermal noise of Resistance
• Available thermal noise power P
n
=kTB
• Equivalent circuit of noisy R
– can deliver the same available noise power to matched load R
– P
n
= v
2
n,rms
/4R=i
2
n,rms
G/4
Noisy R at T
Noiseless R
Vn,rms
G=1/R
in,rms
Equivalent Noise Voltage
Source Model
kTBR v v
n rms n
4
2
,
= =
Equivalent Noise Current
Source Model
kTBG i i
n rms n
4
2
,
= =
yield same available noise power Pn=kTB
50
Equivalent Noise Temperature T
Equivalent Noise Temperature T
e e
• T
e
equivalent noise temperature
• Passive network T
e
– ambient temperature
• Active network T
e
– not physical temperature
– can be much larger than the ambient temperature
Noisy
Networks
Pa[available noise power]
R at Te
Pa=kTe
Equivalent Thermal Noise
Model
51
Noise Factor
Noise Factor
• Noise Factor F
• Reference input noise power N
i
=kT
o
B, T
o
= 290°K
• Noise Figure NF=10logF
• Ex: LNA T
e
=464 °K(not real Temp), F=2.16, NF=4.15dB
+

Rs at Ts
Vs
Noisy
2 Port
GA
s
e
i
added i
T
T
1
N
Input) to Referred Power Noise (Added N Power) Noise (Input N
+ =
+
•Available output noise power
P
no
=kT
S
BG
A
+P
n,added
=kT
S
BG
A
+KT
e
BG
A
=kBG
A
T
S
(1+T
e
/T
S
)
T
e
: equivalent noise temperature of 2 port network
referred to input
power noise output
o
o
i
o
i
i
o
i
i
i
A o
N
SNR
SNR
S
S
N
N
S
S
N
G N
F cf ,
/
) ( = = =
52
NF of Cascaded Network
NF of Cascaded Network
• NF of 1st stage is important
• Gain of 1st stage should be high enough to suppress the
2nd stage noise
• N cascaded network
G1
F1
G2
F2
Ni
No
1
2
1
G
1 F
F F
,
−
+ =
− + − = + = + =
2 2 2 1 1 2 2 2 1 1
2 1
) 1 ( ) 1 (
/
1 G F N G G F N G N G G N N
N
G G N
F
i i o
i
o
G
1
, G
2
available gain of each stage
N
1
, N
2
input referred added noise power of each stage
.... G 1)/G (F 1)/G (F F F
2 1 3 1 2 1
+ − + − + =
53
CLASSICAL TWO
CLASSICAL TWO


PORT NOISE THEORY
PORT NOISE THEORY
Noisy 2 port
S
Y
i
s
i
s
Noiseless 2 port
S
Y
+
e
n
i
n
→ →→ →
( )
( ) ( )
2
2
2
2
2
2
2 2
2 2
2 2 2
2 2
2
, ,
1
, ,
4 4 4
1 1
s n s n
n c u c c n
s
s u c s n
u c s n
s s
n u s
n u s
u c s c s n
u c s n
s s
i i Y e
F i i i i Y e
i
i i Y Y e
i Y Y e
F
i i
e i i
R G G
kT f kT f kT f
G G G B B R
G Y Y R
F
G G
+ +
= = + =
+ + +
+ +
= = +
≡ ≡ ≡
∆ ∆ ∆
+ + + +
+ +
= + = +
54
CLASSICAL TWO
CLASSICAL TWO


PORT NOISE THEORY
PORT NOISE THEORY
( ) ( )
2
2
min
2 2
min
,
1 2 1 2
u
s c opt s c opt
n
u
n opt c n c c
n
n
s opt s opt
s
G
B B B G G G
R
G
F R G G R G G
R
R
F F G G B B
G
= − = = + =
= + + = + + +
= + − + −
55
Noise Figure of 2 Port Network
Noise Figure of 2 Port Network
• Noise factor of 2 port network is dependent on the source admittance
• Noise 4 parameters are dependent on frequency and bias conditions
• Manufacturer provides noise 4 parameters
] ) ( ) [(
2 2
min opt s opt s
s
n
B B G G
G
R
F F − + − + =
F
min
minimum noise factor
Y
s
=G
s
+jB
s
source admittance
Y
opt
=G
opt
+jB
opt
source admittance at F
min
R
n
equivalent input noise resistance of 2 port network
Noise 4 parameters : F
min
, Y
opt
, R
n
in,rms
Ys
Noisy
2 Port
Network
56
Noise Circle
Noise Circle
• R
n
, Γ
opt
, F
min
are device parameters and constants if bias and frequency
are fixed
• Locus of Γ
s
on the Smith chart for a given noise figure F
i
is a circle→
Constant Noise Figure Circle
• CAD will automatically draw these family of circles
o n n
opt s
opt s n
Z R r
r
F F
/
 1  )   1 (
  4
2 2
2
min
=
Γ + Γ −
Γ − Γ
+ =
2 min
 1 
4
opt
n
i
i
r
F F
N Γ +
−
= where ,
i
i i opt
Fi
i
opt
Fi
N
N )N  Γ (
R
N
C
+
+
=
+
Γ
=
1
1
1
2 2
Radius Center
57
LNA Design
LNA Design
• Impossible to achieve maximum gain and minimum noise figure
simultaneously
• Compromise between Gain, NF, and VSWR
• Potentially unstable bilateral design
① Determine G
A
(<MSG)
② Draw source stability circle, G
A
circle, NF circle on Γ
s
plane
③ Select Γ
s.
. close to Γ
opt
and far from source stability circle
④ Γ
L
= Γ
*
out
, automatically VSWR
out
=1
⑤ Output stability check (Γ
in
 <1)
⑥ Input is always mismatched. Therefore always (VSWR)
in
>1
58
Output stability circle
Input stability circle
20dB G
A
circle
2dB noise circle
•S parameters
S
11
=0.641/171 °
S
21
=5.89/9.6 °
S
12
=0.057/163 °
S
22
=0.572/95.7 °
•Stability
k=0.617
MSG=20.1dB
potentially unstable
•Noise Parameters
NF
min
=1.5dB
Γopt=0.58/151 °
Rn=7.5Ω
Low Frequency Amplifier
• • • • Transistor is an voltage controlled current source Device capacitances are negligible High Zin , rO are desirable for high voltage gain Amplifier gain drops as frequency increases due to internal and external capacitances → Low pass type amplifier
RS
Transistor model
+
+
iL
vS
Z in

vin g mvin
rO
VL −
RL
Z in VL = ⋅ vS ⋅ (− g m ) ⋅ ( RL  rO ) Z S + Z in
2
Tuned Amplifier
• Gain over a narrow frequency range centered about some high frequency • If feedback by Cgd is negligible
VL = vin ⋅ (− g m ) ⋅ ( RL  rO ) at f = 1/(2π LC )
RS
yin
+
yout
vS
C gs

vin
Cgd g mvin
+
rO
RL C
L VL
−
3
Tuned Amplifier
• When the internal capacitances cannot be ignored, yin and yout depend on the load and the source impedances respectively (Miller Effects)
yout ≈ jω Cgd (1 + g m RS ) = jω Ceq if jω (Cgd + Cgs ) << g m yin ≈ jω Cgs + jω Cgd (1 + g m / yL ) = jω Cin if jω Cgd << yL
• Additional capacitive loading at the output by Ceq=Cgd[1+gmRs] • Resonance frequency shifts downward due to Ceq→ difficult to control the resonance frequency→ need relatively large C • If yL is inductive (below resonance frequency), yin shows negative resistance →may oscillate • Cgd loads the output tank, decreases gain, detunes the resonance, and most importantly causes instability
– Minimizing feedback due to Cgd → Cascode topology – Bilateral design using S parameters
4
S Parameters of FET
Lg
Rg
Ri + vi −
Cgd
Rd
Ld
C gs
g me − jωτ vi
rds
Cds Csub
Rs
Intrinsics Rsub
Ls
ECP for RF CMOS with simple substrate model when body is grounded In general, the substrate model is more complicated
5
usually ignored for a few GHz application. effective gme = gm/(1+gmRs) • Rd:due to ohmic resistance. Ls. reduce gm. several tens of pH. but important for mm application • Rg: due to gate poly resistance.Bias Independent Parameters of FET • Bias independence: assumption for convenience • Lg. affects the device power gain 6 . Ld: parasitic inductances mainly due to electrodes. increase device noise • Rs: due to ohmic resistance. reduce the power gain.
Rc channel resistance at DC For simple channel model(short channel device) assume uniform sheet charge. cause nonunilaterality ∂vgd −1 ∂i rds = d cause ouput power loss ∂vds Rsub . g m = d = qWvs s ∂vgs ∂vgs ∂vgs ∂vgs ∂id = 1/ τ (τ : charging time) ∂Qn 3L (transit time).Bias Dependent Parameters of FET Ri : effective charging path resistance for Cgs . Qn = qWLns (vgs ) C gs = ∂Qn ∂n ∂i ∂n = qWL s .g m ∝ 1/ L 4 vs g m / Cgs = vs / L = ⇒ more accurately. τ = C gd = ∂Qn : parasitic. Csub less dependent on Vgs. and velocity saturated channel id = −eWvs ns (vgs ). cause output power loss and cross talk 7 . but sensitive to Vds. ≈ Rc / 3.
fT of FET • Assume unilateral. h21=ig/id g m vgs id g h21 = ≈ = m ig ω Cgs vgs ω Cgs ⇒ h 21 drops by 6dB/octave h21 ω =ω = 1 ⇒ ωT = T ig + vi − id C gd C gs gm gm . ignore Cgd • Short circuit current gain. 2π fT = ωT Cgs f T is a figure of merit for switching speed 8 .
high Rds. v gs = I g / jωC gs ) 2 Z g vg Cgs gm Rds Z L vd − 1 gm = 4 C gs Rds 1 fT = Rg 4 f fT 4 Rg / Rds 2 Rds Rg G p = 1 at f = f max f max = • To improve fmax. high fT . low Rg 9 .fmax of FET • Assume unilateral • Gp : Power gain under matched condition * * G p = PL / Pg = Re(Vd I d ) / Re(Vg I g ) ig + − Rg + vi − id + = Id / I g 2 2 R Re( Z L ) ds = Id / I g Re( Z g ) Rg (← I d = g m v gs / 2.
Accurate fT and fmax • • • • Nonunilateral Includes all parasitic resistances For CMOS. junction capacitance should be merged to Cgs. Cgd Substrate parasitics are not included fT = gm 2π [C gs + C gd ][1 + ( Rs + Rd ) / Rds ] + g mC gd ( Rs + Rd ) fT g ( R + Rg ) 4 C gd 1 g m Ri + m s + 4 Rds g m (1 + g m Rs ) 5 C gs 3C gd 1 + 2C gs (1 + g m Rs ) 2 f max = 10 .
Ls. Ld. Ri.25GHz) for Finger=32 (width=160um) Parallel RC m7 m8 freq (50.00MHz to 10. S22 Lg.15GHz & 5.1) Series RC m5 m6 freq (50. Rs.00GHz) 11 . Rd.Low Frequency Approximation of S11.00GHz) S(2. τ are ignored Z in − Z 0 S11 = Z in + Z 0 Z in = Rg + 1/ jω Cin Z out − Z 0 S22 = Z out + Z 0 Z out = (ro 1/ jω Ceq ) S(1.2) L18 CMOS Sparameter (2.00MHz to 10.
00MHz to 10.00 0.2) m4 S(2.00MHz to 10.05 0.20 freq (50.15 0.15 0.S12 −2 g m Z 0 S 21 = when Rg are ignored 1 + jω Cin Z 0 jω Cgd Z 0 1 + jω Cgd Z 0 Cin = Cgs + Cgd (1 + g m Z 0 ) S12 = when Z0 << 1/ jω Cgs m1 m2 m3 S(1.Low Frequency Approximation of S21.10 0.1) 5 4 3 2 1 0 1 2 3 4 5 0.00GHz) 12 .10 0.05 0.00GHz) freq (50.20 0.
RF Small Signal Amplifier • Small signal amplifier – – – – not voltage amplifier but power amplifier conjugate impedance matching usually CE(Common Emitter) and CS(Common Source structure) characteristics of devices are given by S parameters • Classification – narrow band amplifier (about 10% BW of carrier frequency) • Lossless Lsection matching – medium band amplifier(2030% BW) • double resonance matching. balanced. multisection matching technique – broad band amplifier(more than 50% BW) • feedback. traveling wave amplifier 13 .
ZLO: usually 50Ω • Recall! Γin = Z in − Z o Z in + Z o 14 .Small Signal High Frequency Amplifier Zso Vso Input Matching Network Output Matching Network transistor [S] ZLo Γa (VSWR)in Γb ΓS (Z S ) Γ in ( Z in ) Γ out ( Z out ) Γ L ( Z L ) (VSWR)out • ZSO.
S parameters are based on the same normalizing impedance 50 Ω – merely an alias of impedance or admittance – Γin is equivalent to Zin. 15 . Bandwidth. always Γi≤1 • VSWR * 1 + Γa Γin − ΓS (VSWR) in = = 1 − Γa 1 − Γin ΓS (VSWR) out * Γout − ΓL = = 1 − Γb 1 − Γout ΓL 1 + Γb • All networks are specified by S parameters and reflection coefficient Γ instead of impedance – practically Γ . VSWR.Small Signal High Frequency Amplifier • For Re(Zi)>0. Noise Figure – Nonlinear spec: P1dB. Γout is equivalent to Zout • Amplifier Specification – Linear spec :Gain. IIP3 etc.
S22 close to 1. • If ΓL( ΓS) is also highly reflective and certain phase condition is satisfied. high speed active devices have magnitudes of S11. Output Reflection Coefficients S12 S 21ΓL S11 − ∆ΓL Γin = S11 + = 1 − S 22 ΓL 1 − S 22 ΓL Γout S12 S 21ΓS S 22 − ∆ΓS = S 22 + = 1 − S11ΓS 1 − S11ΓS ∆ = S11S 22 − S12 S 21 • If S12 ≠0. Γin(Γout )is a function of ΓL (ΓS) • Instability of Γin. Γout • Usually. magnitude of Γin ( Γout) may become larger than 1 →amplifier oscillates 16 .Input.
ZL to achieve a desired power gain avoiding oscillation 17 .Simplified Amplifier Network ZS Transistor [S] ZL Vs ΓS ( Z S ) Γin ( Z in ) Γout ( Z out ) ΓL ( Z L ) • Transistor S parameters are given • ΓS≤1 for all passive ZS. ΓL≤1 for all passive ZL • Amplifier design is simply to choose source and load impedance ZS.
power meter reads PL – VNA S212 corresponds to GT for ΓS= ΓL=0 18 .Amplifier Gain in Terms of S Parameters • Power – – – – Pavs : power available from source. function of source impedance Pin : power delivered to transistor VS2 Pavs = . function of load impedance • • • • Transducer power gain GT =PL/Pavs (function of ΓS . function of ZS Pavn: power available from transistor output 8Re(ZS ) PL:power delivered to load. ΓL) Available power gain GA=Pavn/Pavs (function of ΓS) Operating power gain GP= PL/Pin (function of ΓL) Measurements – usual power measurement setup gives GT since signal source indicates Pavs.
Derivation of Transducer Power Gain a1 ZS b1 a2 b2 [S ] ΓS ( Z S ) Γin ( Z in ) ZL Γ out ( Z out ) Γ L ( Z L ) 19 .
Transducer Power Gain GT (1−  Γ S  )  S 21  (1−  Γ L  ) GT =  (1 − S11Γ S )(1 − S 22 Γ L ) − S12 S 21Γ S Γ L 2 2 2 2 1−  Γ S 2 1−  Γ L 2 =  S 21 2 1 − Γin Γ S 2 1 − S 22 Γ L 2 1−  Γ S 2 1−  Γ L 2 2 =  S 21  2 1 − S11Γ S  1 − Γ L Γ out 2 20 .
Available Power Gain GA. Operating Power Gain GT 1−  Γ S 2 1 2 GA = GT Γ =Γ* =  S 21  2 L out 1 − S11Γ S  1−  Γ out 2 Function of source impedance GA Conjugately matched output Useful for LNA design 1 1−  Γ L 2 GP = GT Γ =Γ* =  S 21 2 S in 1−  Γin 2 1 − S22 Γ L 2 Function of load impedance GP Conjugately matched input Useful for low input VSWR design 21 .
PA.5∠85 °. ΓL. • (b) PL.3 ∠ 70°.4 ∠ 45 °.2 ∠ 10 °. Pinc 40Ω Amplifier S11 S12 S S 21 22 ZL=73Ω 22 .Problems • An RF amplifier has the following sparameters: S11=0. Γin. GA. GP. find: • (1) Find Γs. S21=3. Γout • (a) GT. The system is shown below. S22=0. S12=0. Assuming reference impedance (used for measuring sparameters) Zo=50Ohm.
ΓL≤1 ⇒ Γin. potentially unstable – for some ΓS. where ∆ = S11S 22 − S12 S 21 • if K<1 and ∆<1. Γout≤1 • Simple measure of stability →Roulette Stability Factor K 1−  S11 2 −  S 22 2 +  ∆ 2 K= > 1. ΓL≤1 ⇒ Γin.Stability • Unconditional Stability – for any ΓS. 2  S12 S 21   ∆ < 1. Γout≥1 – stability depends on ZS and ZL – you should find stable ZS and ZL • if 1 < K<0 . unstable for almost values of ZS and ZL 23 .
CAD will help you. simultaneous conjugate matching yields maximum gain – ΓS* =Γin(ΓL). ΓL* =Γout(ΓS) – Solution ΓMS.Simultaneous Conjugate Matching • Only if unconditionally stable. ΓML are little bit complicated. S11 − ∆Γ L Γ s = Γ1 = 1 − S22 Γ L * S 22 − ∆Γ s ΓL = Γ2 = 1 − S11Γ s * • Under simultaneous conjugate matching condition – GTmax = GPmax = GAmax GTmax =  S 21  ( K − K 2 − 1)  S12  24 .
Stability Circles • Potentially Unstable(Conditional Stability) – find stable ZS and ZL using stability circle • Input (Source) Stability Circle – locus of ΓS on Smith chart producing Γout=1 – if S11<1. ZS in the region including origin(ZS=Z0) is stable source impedance • Output (Load) Stability Circle – locus of ΓL on Smith chart producing Γin=1 – if S22<1. ZL in the region including origin(ZS=Z0) is stable load impedance • You can easily draw stability circle using CAD 25 .
Load Stability Circle(LSC) ΓL plane Im From S12 S 21ΓL =1 S11 + 1 − S 22 ΓL ⇒ ΓL ( − ** S 22 − DS11 2 2 S 22 − D ) = S12 S 21 S 22 − D 2 2 (2) 0 RL CL Re ⇒ ΓL − C L = RL Center of circle Load stability circle Radius of circle 26 .
Source Stability Circle(SSC) Γ S plane Im From S 22 + S12 S 21Γs =1 1 − S 22Γs ⇒ Γs − (S 11 − DS 22 2 2 S11 − D ** ) = S12 S 21 S11 − D 2 2 (3) 0 Rs Cs Re ⇒ Γs − C s = Rs Center of circle Source stability circle Radius of circle 27 .
Stable Region LSC LSC S11<1 28 S11>1 . when ΓL =0. Γ1  = S11. else if S11 > 1 then ΓL=0 is an unstable point. • Let the LSC does not encircle S11=0 point. If S11 < 1 then ΓL =0 is a stable point. We need more information to show the stability regions for Γ s andΓL.Stability Regions • The source and load stability circles only indicate the value of Γs and ΓL where Γ2  = 1 and Γ1  = 1. • For example for LSC.
Stability Region Cont. Similarly if S11 < 1 then ΓL =0 is an stable point. • Let the LSC encircles S11=0 point. else if S11 > 1 then ΓL=0 is an unstable point.. • This argument can also be applied for SSC.. Stable Region LSC LSC S11<1 S11>1 29 .
Summary for Stability Region • For both Source and Load reflection coefficients (Γs and ΓL ) : LSC or SSC LSC or SSC S11 or S22 <1 S11 or S22 >1 LSC or SSC LSC or SSC S11 or S22 <1 S11 or S22 >1 30 .
• Assuming S11 > 1 and S22 < 1. • In this case the amplifier is said to be unconditionally stable.Unconditionally Stable Amplifier • There are times when the amplifier is stable for all passive source and load impedance. the stability region would look like this: ΓL can occupy any point in the Smith chart Γs can occupy any point in the Smith chart SSC LSC S11>1 S22<1 31 .
SSC LSC 32 . draw the load and source stability circles and find the stability region.Problem 2 • Use the sparameters of the amplifier in Problem 1.
Summary for Stability Check Start Set frequency range Get Sparameters within frequency range K factor > 1 and ∆ < 1 ? Yes Amplifier Unconditionally Stable No Draw SSC and LSC Circles intersect Smith Chart ? Yes Find S11 and S22 Amplifier is conditionally stable. find stability regions End 33 No Amplifier is not stable .
Stabilization Methods • Γin  > 1 and Γout  > 1 can be written in terms of input and output impedances: Z in − Z o Γin = > 1 and Z in + Z o Γ out Z out − Z o = >1 Z out + Z o • This implies that Re[Zin] < 0 or Re[Zout] < 0. 34 . This should made the real part of the impedance become positive. • Thus one way to stabilize an amplifier is to add a series resistance or shunt conductance to the port.
.Stabilization Methods Cont.port Network S 11 S 12 S 21 S 22 Z1 Z1+R1’ 2 ..port Network S 11 S 12 S 21 S 22 Z2 R2’ Load Network Z1+R1’ Source Network G1’ G2’ Load Network Y1+G1’ Y1 Y2 Y2+G2’ 35 . R1’ Source Network 2 .
0 pF 36 .0 MHz C Cc2 C=470.0 MHz Stop=1.0 pF Term1 Num=1 Z=50 Ohm L Lb2 L=330.Sparameters measurement and stability analysis R Rb1 R=10.0 nH R= R Rb2 R=4.0 kOhm V_DC SRC1 Vdc=5.0 GHz Step=1.0 pF pb_phl_BFR92A_19921214 Q1 DC DC1 DC Term Term2 Num=2 Z=50 Ohm C Cc1 Term C=470.7 kOhm R Re R=100 Ohm C Ce C=470.0 nH R= S_Param SP1 Start=50.0 V L Lb1 L=330.0 nH R= SPARAMETERS L Lc L=330.Example .
6 0..8 0.5 0.2 1.2 0.0 0.956 m1 Amplifier is conditionally stable D K 0.6 0..8 0.9 1.4 0.7 0.8 0.1 0.0MHz K=0.0 freq.0 0. Plotting K and ∆ versus frequency (from 50MHz to 1.6 0.0 0.2 0.Example Cont.3 0.4 m1 freq=600.4 0.2 0.0GHz): 1. GHz This is the frequency we are interested in 37 .
095 38 .0MHz S(1.491 / 20.263 / 114.1) 0.Example .2) 0.092 S(2.Viewing S11 and S22 at f=600MHz freq 600.
Since S11 < 1 @ 600MHz Since S22 < 1 @ 600MHz LSC SSC indep(LSC) (0.Example Cont..000) 39 .000 to 51.000) indep(SSC) (0..000 to 51.
Example • The Sparameters for a BJT at a particular bias point and f=750MHz are: • S11 = 0.35<33o • S12 = 0.04<52o • S22 = 0.76<38o • S21 = 2.66<42o • Check the transistor stability. 40 . plot the Source and Load Stability Circles and determine the stability regions.
Transistor Power Gain • Used as a figure of merit for transistor • Independent of source and load impedance • Classification – K>1. MAG(Maximum Available Gain) – K<1. MSG(Maximum Stable Gain)  S 21  MAG = ( k − k 2 − 1)  S12   S 21  MSG =  S12  – Unilateral Power Gain U :MAG obtained using neutralization [dB]  S 21 / S12 − 1 2 U= 2k  S 21 / S12  −2 Re( S 21 / S12 ) K MSG 3dB/oct MAG(6dB/octave) f [log] 41 .
Narrow Band Amplifier Design • Unilateral Design – – – – – assume S12=0 approximate design use unilateral transducer power gain GTU=GTS12=0 detailed design procedure (Refer to Gonzales) not practical. fixed gain GTMAX – GP or GA design • if unconditionally stable(k>1) and for gain other than GTMAX • if potentially unstable(k<1) 42 . just shows attainable variable range of GT • Bilateral Design(if S12 is not negligible) – Simultaneous conjugate matching design • valid for k>1(unconditionally stable).
(VSWR)out>1.Operating Power Gain Design • • • Mismatched output. Constant GP circle on ΓL plane – locus of ΓL(ZL) that yields constant GP at a frequency – GP is only a function of ΓL(ZL) – GPMAX exists at a single point of ΓL(ZL) – Design procedure for a gain less than GPMAX ① Determine GP ② Draw GP circle and select the desired ΓL ③ Matched source impedance is ΓS= Γin* GPMAX = S 21 / S12  ( K − K 2 − 1) • Unconditionally stable case 43 . matched input (VSWR)in=1.
GP becomes GT 44 . design completed – If unstable. go to step 4 and select new ΓL ⑦ If input match is made.Design Procedure Using GP (potentially unstable) ① ② ③ ④ ⑤ ⑥ Determine GP(Gp<MSG) Draw GP circle Draw load stability circle(Γin stability) Select ΓL on the GP circle far from stability circle Matched source impedance is ΓS= Γin* Draw input stability circle(Γout stability) – Check if ΓS placed in the stable region – If stable.
GP circle when K<1 45 .
Available Power Gain Design • • • • Mismatched input. GA becomes GT 46 . matched output (VSWR)in>1. (VSWR)out=1 Constant GA circle on Γ S plane Design procedures are equivalent to that of using GP gain except that Γs replaces ΓL • If output match is made.
PSD =174dBm/Hz Spectrum analyzer with 1MHz resolution bandwidth shows noise floor 114dBm/MHz 2 in = 2qI q electron charge. rms = vn • White and Color noise • Thermal noise(white) – – – – PSD(Power Spectral Density)=kT.T Kelvin Temperature Pn at 290°K.Noise • Random variation of current or voltage Vn = lim ∫ T →∞ t +T t Vn (t ) dt = 0 2 vn = lim ∫ T →∞ t +T t [Vn (t )]2 dt = constant 2 vn. I dc current 47 • Shot noise(white) – PSD= . k Boltzman constant .
Noise • Flicker noise – PSD=Γ/fα. Γ: proportional constant. α≅1 Other noise source • Lorentz noise – PSD=kτ/(1+(ωτ)2) 48 .
rmsG/4 Equivalent Noise Voltage Source Model Equivalent Noise Current Source Model Noiseless R Noisy R at T Vn.rms = in = 4kTBG yield same available noise power Pn=kTB 49 .rms in.rms/4R=i2n.Thermal noise of Resistance • Available thermal noise power Pn=kTB • Equivalent circuit of noisy R – can deliver the same available noise power to matched load R – Pn = v2n.rms G=1/R 2 vn. rms = vn = 4kTBR 2 in.
Equivalent Noise Temperature Te Noisy Networks R at Te Pa=kTe Pa[available noise power] Equivalent Thermal Noise Model • Te equivalent noise temperature • Passive network Te – ambient temperature • Active network Te – not physical temperature – can be much larger than the ambient temperature 50 .
NF=4.Noise Factor •Available output noise power Rs at Ts + Vs Noisy 2 Port GA Pno=kTSBGA+Pn.added=kTSBGA+KTeBGA =kBGATS(1+Te/TS) Te: equivalent noise temperature of 2 port network referred to input • Noise Factor F N i (Input Noise Power) + N added (Added Noise Power Referred to Input) T = 1+ e Ni Ts • Reference input noise power Ni=kToB.16.15dB (cf ) F = N o / G A Si N o Si SNRi = = . To= 290°K • Noise Figure NF=10logF • Ex: LNA Te=464 °K(not real Temp). F=2. N o output noise power Ni Si N i S o SNRo 51 .
NF of Cascaded Network Ni G1 F1 G2 F2 No F = 1+ N o / G1G2 . G2 available gain of each stage N1.. N o = N1G1G2 + N 2 G2 = N i ( F1 − 1)G1G2 + N i ( F2 − 1)G2 Ni G1.. N2 input referred added noise power of each stage F2 − 1 F = F1 + G1 • NF of 1st stage is important • Gain of 1st stage should be high enough to suppress the 2nd stage noise • N cascaded network F = F1 + (F2 − 1)/G 1 + (F3 − 1)/G 1G 2 + ..52 .
CLASSICAL TWOPORT NOISE THEORY en +is YS Noisy 2 port → is YS in Noiseless 2 port F= F= is2 + in + Ys en i 2 s 2 s 2 . Gu ≡ . ic = Yc en 2 2 iu2 + Yc + Ys en = 1+ is2 2 i + iu + (Yc + Ys ) en is2 2 en iu2 is2 Rn ≡ . Gs ≡ 4kT ∆f 4kT ∆f 4kT ∆f 2 2 Gu + ( Gc + Gs ) + ( Bc + Bs ) Rn Gu + Yc + Ys Rn F = 1+ = 1+ Gs Gs 2 53 . in = ic + iu .
CLASSICAL TWOPORT NOISE THEORY Gu 2 + Gc = Gopt Bs = − Bc = Bopt . Gs = Rn Fmin = 1 + 2 Rn Gopt Gu 2 + Gc = 1 + 2 Rn + Gc + Gc Rn 2 2 Rn F = Fmin + ( Gs − Gopt ) + ( Bs − Bopt ) Gs 54 .
Yopt.Noise Figure of 2 Port Network Rn [(Gs − Gopt ) 2 + ( Bs − Bopt ) 2 ] Gs Ys Noisy 2 Port Network F = Fmin + in. Rn • Noise factor of 2 port network is dependent on the source admittance • Noise 4 parameters are dependent on frequency and bias conditions • Manufacturer provides noise 4 parameters 55 .rms Fmin minimum noise factor Ys=Gs+jBs source admittance Yopt=Gopt+jBopt source admittance at Fmin Rn equivalent input noise resistance of 2 port network Noise 4 parameters : Fmin.
Γopt.Noise Circle F = Fmin + rn = Rn / Z o 4rn  Γs − Γopt  2 (1−  Γs 2 )  1 + Γopt 2 • Rn. where N i = Fi − Fmin  1 + Γopt 2 4rn • CAD will automatically draw these family of circles 56 . Fmin are device parameters and constants if bias and frequency are fixed • Locus of Γs on the Smith chart for a given noise figure Fi is a circle→ Constant Noise Figure Circle Center C Fi = Γopt 1 + Ni Radius RFi = ( 1Γ opt2 )N i + N i2 1+ Ni .
. NF circle on Γs plane Select Γs. close to Γopt and far from source stability circle ΓL= Γ*out.LNA Design • • • Impossible to achieve maximum gain and minimum noise figure simultaneously Compromise between Gain. Therefore always (VSWR)in>1 57 . NF. automatically VSWRout=1 Output stability check (Γin <1) Input is always mismatched. and VSWR Potentially unstable bilateral design ① ② ③ ④ ⑤ ⑥ Determine GA(<MSG) Draw source stability circle. GA circle.
572/95.5dB Γopt=0.1dB potentially unstable •Noise Parameters NFmin=1.7 ° •Stability k=0.89/9.641/171 ° S21=5.Output stability circle 2dB noise circle •S parameters S11=0.617 MSG=20.057/163 ° S22=0.6 ° S12=0.5Ω 20dB GA circle Input stability circle 58 .58/151 ° Rn=7.
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