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5 4 3 2 1

PAGE TITLE PAGE TITLE


01
02
COVER SHEET
Block Diagram
41
42
AUDIO (MUTE)
AUDIO (JACK+AMP) C02

03 Clocks Diagram 43 LAN (RTL8103EL)
D
04 POWER MAP 44 RJ11 D

05 Power SEQUENCY DIAGRAM 45 USB POWER I/O 2010-05-05


06 Power SEQUENCY TIMING 46 USB X2
07 SMBUS MAP 47 CARD READER Phase: MP


08 RESET SIGNAL MAP 48 Mini_PCIe (WLAN) 1 BOM:
09 CLOCK GEN - CK505 49 Mini_PCIe (WLAN) 2
10 Calpella (DMI,PEG,FDI) 50 SATA HDD/ODD
11 Calpella (CLK,MISC,JTAG) 51 VGA


12 Calpella (DDR3) 52 LVDS
13 Calpella (POWER) 53 HDMI
14 Calpella (GRAPHIC POWER) 54 Discrete GPU option
15 Calpella (GND) 55 CAMERA
16 Calpella (RESERVE) 56 BlueTooth


C
17 PCH (HDA,JTAG,SAT) 57 FAN/THERMAL SENSOR C
18 PCH (PCI-e,SMBUS,CLK) 58 POWER Button Board/LED
19 PCH (DMI,FDI,GPIO) 59 PWR_DCIN/Battery
20 PCH (LVDS,DDI) 60 PWR_CHARGER
21 PCH (PCI,USB,NVRAM) 61 5VA/3.3VA


22 PCH (GPIO,VSS_NCTF,RSVD) 62 CPU_Vcore PCB Fab Note
23 PCH (POWER) 1 63 1.1V VTT
24 PCH (POWER) 2 64 1_05VS PCB1
25 PCH (VSS) 65 1.8VS Printed Circuit


26 DDR3 (SO-DIMM_0) 66 DDR3 1.5V_VTT-DDR 0.75V Board

PCB_CALPELLA_REV:X1
27 DDR3 (SO-DIMM_1) 67 VPCIe Critical
28 M92_S2 (PCI-E) 1/6 68 PWR_others power plane
29 M92_S2 (STRAP) 2/6 69 CPU VREG/Decoupling
30 M92_S2 (IO) 3/6 70 Graphic VDD_CORE


B
31 M92_S2 (DDR3) 4/6 71 BLANK B

32 M92_S2 (DP) 5/6


33 M92_S2 (POWER) 6/6
34 GDDR (DDR3) 1/3


35 GDDR (DDR3) 2/3
36 GDDR (BYPASS) 3/3
37 EC+KB (KB3926)
38 EC FLASH ROM/SPI
39 AUDIO ALC662


40 AUDIO SPK+AMP


A A

深圳仁聚科技有限公司
Title
COVER

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 1 of 67


5 4 3 2 1
1 2 3 4 5 6 7 8

VRAMx4
64Mx16 GPU Intel SO-DIMM 0 CLK Gen
DDR3 nVIDIA PCIe X16 Arrandale 800/1066 MHZ 800/1066 MHZ RealTek
N11M (Calpella) DDR(III) RTM875N-632-GR


64bit
(TPD:35W)
A A

SO-DIMM 1
800/1066 MHZ
(989-pin rPGA socket) 800/1066 MHZ
DDR(III) X,TAL
HDMI 37.5 mm X 37.5 mm 14.318MHZ
HDMI


Conn. Level
Shifter
LVDS LAN
LVDS Transformer
RealTek RJ45
Conn. FDI DMI X4 H1631CG
RTL8103EL (10/100)


CRT Buffer
CRT PCIe
Conn. Level Shifter
ESD
South Bridge
4-IN-1
PCH - Ibex Peak-M USB2.0 ALCOR_AU6437


Int. Speaker x2 AMP CODEC Combo
HDA
B RealTek HM55 Connector B

ALC662-GR

SATA : HDD
Mic In Jack SATA


Headphone Jack BGA-1071
25 mm X 27 mm SATA : ODD
PCIE mini Card PCIE mini Card EXP Card
SIM CARD
3G W_LAN


SPI
PCIe_X1 BIOS ROM 8MB

USB2.0


USB PORT1 USB PORT2 Card Reader Camera
C
4-IN-1 1.3M/2.0M
C

eSATA+USB SATA LPC


PORT

Battery Pack System


FAN

文 PWM
Embedded KBMX Keyboard


Lid Controller
Switch GPIO
PS/2 Touch PAD
Power ENE KB3926
Adapter Button
Charger
19V


SMBus Thermal Sensor
D KBC ROM SPI EMC1421 D

4MB

深圳仁聚科技有限公司
Title
SYSTEM BLOCK DIAGRAM

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 2 of 67


1 2 3 4 5 6 7 8
5 4 3 2 1
CLK_CPU_BCLK CLK_PCH_CPU_BCLK
23 CLK_CPU_BCLK# AP1 AM1 CLK_PCH_CPU_BCLK# A16
(133MHz) 22 AP3 (133MHz) AM3 B16

CLK_DMI_PCH CLK_PCH_EXP
CPU


D 13 CLK_DMI_PCH# BA24 AN2 CLK_PCH_EXP# E16 D
(100MHz) (100MHz)
14 AW24 AN4 D16
ARRANDALE
CLK_DREFCLK CLK_PCH_DP


3 CLK_DREFCLK# E18 AT3 CLK_PCH_DP# A18
(96MHz) 4 F18 (120MHz) AT1 A17

CLK_PCIE_SATA CLK_PCH_PCIE_LAN


(100MHz)
10 CLK_PCIE_SATA# AH12
(100MHz)
AK47 CLK_PCH_PCIE_LAN# 17 LAN
11 AH13 AK48 18
RTL8103EL
PCH CLK_PCH_PCIE_MINI


C 30 CLK_REF_14M_PCH P41 AM48 CLK_PCH_PCIE_MINI# 13 C
(14.318MHz)
(100MHz) AM47 11 WLAN
CK505


AH51

RTM875N-632 25MHz Crystal


AH53
(33MHz)
N52 CLK_PCI_JIG 14
DEBUG CARD


J42

(33MHz)
P46 CLK_PCI_KBC 13 EC
ENE KB3926

件 CardReader
B B
(33MHz) (100MHz) CLK_48M_CARD
P53 48
P48 AD43 AD45 AU6437


CLK_PCI_FB (48MHz)


CLK_PCH_PEG
CLK_PCH_PEG#AK30
AK32

A
(27MHz)
6

27

28

CLK_27M_NSS

14.318MHz Crystal
AC22
GPU
N11M
深圳仁聚科技有限公司
Title

Size
A3

Date:
CLOCK MAP

Document Number
C02

Wednesday, May 05, 2010 Sheet 3 of 67


Rev
A
A
1 2 3 4 5 6 7 8

+V3_3S +V3.3S_CLK_VDD +V1_05S +VTT_CLK_VDDIO


LKB1 LKB2
1 2 1 2

120ohm@100MHz,500mA CK1 CK2 CK3 CK4 CK5 CK6 120ohm@100MHz,500mA CK8 CK9
0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R CK7 0.1uF/10V,X5R 0.1uF/10V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R


A A
+V3_3S

R436 0 5% RK1
PCH_SMB_CLK_3S {18,26,27,44,45}
U123_XTALOUT R437 0 5% 10K 5%
PCH_SMB_DAT_3S {18,26,27,44,45}
RK2 33 5%


CLK_REF_14M_PCH {18} CPU_BSEL2 ns

14.31818M
YK1 H:100 MHz

U123_XTALOUT
U123_XTALIN
1 2 U123_XTALIN L:133 MHz(Default,Internal 120Kohm Pull Down)
CK10 CK11 CLK_PWRGD

33pF/50V,NPO 33pF/50V,NPO SMBUS Address:D2H(TBC)


+V3.3S_CLK_VDD

33
32
31
30
29
28
27
26
25
+V3.3S_CLK_VDD U14

SCLK
SDATA
REF0/FS

CKPWRGD/PD#
THERMALPAD

VDD_REF
XTAL_IN
XTAL_OUT
VSS_REF
B B


1 VDD_DOT VDD_CPU 24
2 VSS_DOT CPU0 23 CLK_CPU_BCLK {18}
{18} CLK_DREFCLK 3 DOT96 CPU0# 22 CLK_CPU_BCLK# {18}
{18} CLK_DREFCLK# 4 DOT96# VSS_CPU 21
5 VDD_27 CPU1 20
RK3 33 5% CLK_27M_NSS 6 19
{32} 27M_nonSSC 27_NSS CPU1#
RK4 33 5% CLK_27M_SS 7 18
{32} 27M_SSC 27_SS VDD_CPU_IO

VDD_SRC_IO
8 VSS_27 VDD_SRC 17

CPU_STP#
VSS_SATA

VSS_SRC

R441 +V3_3S

SATA#

SRC1
SRC#
SATA
0 5%
R798
9LRS3197AKLFT 4.7K 5%

9
10
11
12
13
14
15
16
+VTT_CLK_VDDIO R0402

This pin can generate 48MHZ at


RTM875N-631 for future use CLK_PWRGD

STP_CPU# ,
+V3_3S

3
C 10K 5% R0402 C
RK5 R799 4.7K 5% 1 Q30
{57} CLK_EN# HMBT3904

2

{18} CLK_PCIE_SATA
{18} CLK_PCIE_SATA#

{18} CLK_DMI_PCH
{18} CLK_DMI_PCH#

FSP Table



FS CPU Power On SRC(DMI) SATA DOT96 27MHz REF
D
(PCH-->CPU) (PCH-->CPU) (PCH) (PCH) (GPU) D

0 133MHz Default
100MHz 100MHz 96MHz 27MHz 14.318MHz 深圳仁聚科技有限公司
Title
1 100MHz CLOCK GEN


Size Document Number Rev
B C02 A

Date: Wednesday, May 05, 2010 Sheet 9 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Place the resistor within 500 mils of the processor


PEG_TXN0
PEG_TXN0_C {28}
UX1A CX1 0.1uF/10V,X5R
B26 PEG_COMP RX1 49.9 1% PEG_TXN1


PEG_ICOMPI GPU PEG_TXN1_C {28}
A26 CX2 0.1uF/10V,X5R
A {19} DMI_TXN[3:0] PEG_ICOMPO A
DMI_TXN0 A24 B27 RX2 750 1% 0402 I PEG_TXN2 GPU
DMI_RX#[0] PEG_RCOMPO PEG_TXN2_C {28}
DMI_TXN1 C23 A25 CX3 0.1uF/10V,X5R
DMI_TXN2 DMI_RX#[1] PEG_RBIAS PEG_TXN3
B22 DMI_RX#[2] PEG_RXN[15..0] {28} GPU PEG_TXN3_C {28}
DMI_TXN3 A21 K35 PEG_RXN15 CX4 0.1uF/10V,X5R
DMI_RX#[3] PEG_RX#[0] PEG_RXN14 PEG_TXN4
{19} DMI_TXP[3:0] PEG_RX#[1] J34 GPU PEG_TXN4_C {28}
DMI_TXP0 B24 J33 PEG_RXN13 CX5 0.1uF/10V,X5R
DMI_TXP1 DMI_RX[0] PEG_RX#[2] PEG_RXN12 PEG_TXN5
D23 DMI_RX[1] PEG_RX#[3] G35 GPU PEG_TXN5_C {28}
DMI_TXP2 PEG_RXN11 CX6 0.1uF/10V,X5R


B23 DMI_RX[2] PEG_RX#[4] G32

DMI
DMI_TXP3 A22 F34 PEG_RXN10 PEG_TXN6 GPU
DMI_RX[3] PEG_RX#[5] PEG_TXN6_C {28}
F31 PEG_RXN9 CX7 0.1uF/10V,X5R
{19} DMI_RXN[3:0] PEG_RX#[6]
DMI_RXN0 D24 D35 PEG_RXN8 PEG_TXN7 GPU
DMI_TX#[0] PEG_RX#[7] PEG_TXN7_C {28}
DMI_RXN1 G24 E33 PEG_RXN7 CX8 0.1uF/10V,X5R
DMI_RXN2 DMI_TX#[1] PEG_RX#[8] PEG_RXN6 PEG_TXN8
F23 DMI_TX#[2] PEG_RX#[9] C33 GPU PEG_TXN8_C {28}
DMI_RXN3 H23 D32 PEG_RXN5 CX9 0.1uF/10V,X5R
DMI_TX#[3] PEG_RX#[10] PEG_RXN4 PEG_TXN9
{19} DMI_RXP[3:0] PEG_RX#[11] B32 GPU PEG_TXN9_C {28}
DMI_RXP0 D25 C31 PEG_RXN3 CX10 0.1uF/10V,X5R
DMI_TX[0] PEG_RX#[12]


DMI_RXP1 F24 B28 PEG_RXN2 PEG_TXN10 GPU
DMI_TX[1] PEG_RX#[13] PEG_TXN10_C {28}
DMI_RXP2 E23 B30 PEG_RXN1 CX11 0.1uF/10V,X5R
DMI_RXP3 DMI_TX[2] PEG_RX#[14] PEG_RXN0 PEG_TXN11
G23 DMI_TX[3] PEG_RX#[15] A31 GPU PEG_TXN11_C {28}
CX12 0.1uF/10V,X5R
PEG_RXP[15..0] {28}
J35 PEG_RXP15 PEG_TXN12 GPU
PEG_RX[0] PEG_TXN12_C {28}
H34 PEG_RXP14 CX13 0.1uF/10V,X5R
PEG_RX[1] PEG_RXP13 PEG_TXN13
{19} FDI_TXN[7:0] PEG_RX[2] H33 GPU PEG_TXN13_C {28}
FDI_TXN0 E22 F35 PEG_RXP12 CX14 0.1uF/10V,X5R
B FDI_TX#[0] PEG_RX[3] B
FDI_TXN1 D21 G33 PEG_RXP11 PEG_TXN14 GPU
FDI_TX#[1] PEG_RX[4] PEG_TXN14_C {28}


FDI_TXN2 D19 E34 PEG_RXP10 CX15 0.1uF/10V,X5R
FDI_TXN3 FDI_TX#[2] PEG_RX[5] PEG_RXP9 PEG_TXN15
D18 FDI_TX#[3] PEG_RX[6] F32 GPU PEG_TXN15_C {28}
FDI_TXN4 G21 D34 PEG_RXP8 CX16 0.1uF/10V,X5R
FDI_TXN5 FDI_TX#[4] PEG_RX[7] PEG_RXP7
E19 FDI_TX#[5] PEG_RX[8] F33 GPU
FDI_TXN6 F21 B33 PEG_RXP6

PCI EXPRESS -- GRAPHICS


FDI_TXN7 FDI_TX#[6] PEG_RX[9] PEG_RXP5
G18 FDI_TX#[7] PEG_RX[10] D31
A32 PEG_RXP4
PEG_RX[11]

Intel(R) FDI
C30 PEG_RXP3
{19} FDI_TXP[7:0] PEG_RX[12]
FDI_TXP0 D22 A28 PEG_RXP2 PEG_TXP0


FDI_TX[0] PEG_RX[13] PEG_TXP0_C {28}
FDI_TXP1 C21 B29 PEG_RXP1 CX17 0.1uF/10V,X5R
FDI_TXP2 FDI_TX[1] PEG_RX[14] PEG_RXP0 PEG_TXP1
D20 FDI_TX[2] PEG_RX[15] A30 GPU PEG_TXP1_C {28}
FDI_TXP3 C18 CX18 0.1uF/10V,X5R
FDI_TXP4 FDI_TX[3] PEG_TXN15 PEG_TXP2
G22 FDI_TX[4] PEG_TX#[0] L33 GPU PEG_TXP2_C {28}
FDI_TXP5 E20 M35 PEG_TXN14 CX19 0.1uF/10V,X5R
FDI_TXP6 FDI_TX[5] PEG_TX#[1] PEG_TXN13 PEG_TXP3
F20 FDI_TX[6] PEG_TX#[2] M33 GPU PEG_TXP3_C {28}
FDI_TXP7 G19 M30 PEG_TXN12 CX20 0.1uF/10V,X5R
FDI_TX[7] PEG_TX#[3] PEG_TXN11 PEG_TXP4
PEG_TX#[4] L31 GPU PEG_TXP4_C {28}
F17 K32 PEG_TXN10 CX21 0.1uF/10V,X5R


{19} FDI_FSYNC0 FDI_FSYNC[0] PEG_TX#[5]
E17 M29 PEG_TXN9 PEG_TXP5 GPU
{19} FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6] PEG_TXP5_C {28}
J31 PEG_TXN8 CX22 0.1uF/10V,X5R
PEG_TX#[7] PEG_TXN7 PEG_TXP6
{19} FDI_INT C17 FDI_INT PEG_TX#[8] K29 GPU PEG_TXP6_C {28}
H30 PEG_TXN6 CX23 0.1uF/10V,X5R
PEG_TX#[9] PEG_TXN5 PEG_TXP7
C {19} FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29 GPU PEG_TXP7_C {28} C
D17 F29 PEG_TXN4 CX24 0.1uF/10V,X5R
{19} FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11]
E28 PEG_TXN3 PEG_TXP8 GPU
PEG_TX#[12] PEG_TXP8_C {28}
D29 PEG_TXN2 CX25 0.1uF/10V,X5R
PEG_TX#[13] PEG_TXN1 PEG_TXP9


PEG_TX#[14] D27 GPU PEG_TXP9_C {28}
C26 PEG_TXN0 CX26 0.1uF/10V,X5R
PEG_TX#[15] PEG_TXP10 GPU PEG_TXP10_C {28}
L34 PEG_TXP15 CX27 0.1uF/10V,X5R
PEG_TX[0] PEG_TXP14 PEG_TXP11
Discrete GPU: Install PEG_TX[1] M34 GPU PEG_TXP11_C {28}
M32 PEG_TXP13 CX28 0.1uF/10V,X5R
UMA: Not Install PEG_TX[2]
L30 PEG_TXP12 PEG_TXP12 GPU
PEG_TX[3] PEG_TXP12_C {28}
M31 PEG_TXP11 CX29 0.1uF/10V,X5R
RX3 1K 1% GE1 FDI_FSYNC0 PEG_TX[4] PEG_TXP10 PEG_TXP13
PEG_TX[5] K31 GPU PEG_TXP13_C {28}


RX4 1K 1% GE1 FDI_FSYNC1 M28 PEG_TXP9 CX30 0.1uF/10V,X5R
RX5 1K 1% GE1 FDI_INT PEG_TX[6] PEG_TXP8 PEG_TXP14
PEG_TX[7] H31 GPU PEG_TXP14_C {28}
RX6 1K 1% GE1 FDI_LSYNC0 K28 PEG_TXP7 CX31 0.1uF/10V,X5R
RX7 1K 1% GE1 FDI_LSYNC1 PEG_TX[8] PEG_TXP6 PEG_TXP15
PEG_TX[9] G30 GPU PEG_TXP15_C {28}
G29 PEG_TXP5 CX32 0.1uF/10V,X5R
PEG_TX[10] PEG_TXP4
PEG_TX[11] F28 GPU
E27 PEG_TXP3
PEG_TX[12] PEG_TXP2
PEG_TX[13] D28
C27 PEG_TXP1
PEG_TX[14]


C25 PEG_TXP0
PEG_TX[15]
D D

PZ98927-3641-01F

深圳仁聚科技有限公司
Title
Calpella (DMI,PEG,FDI)


Size Document Number Rev
B C02 A

Date: Wednesday, May 05, 2010 Sheet 10 of 67


1 2 3 4 5 6 7 8
5 4 3 2 1

Layout Note:
Comp0,2 connect with Zo=27.4 ohm, make trace
length shorter then 0.5". Width=20mil(MS)
Comp1,3 connect with Zo=55 ohm, make trace
length shorter then 0.5". Width=5mil(MS)

Place close to chip


UX1B
RX8 20 1% 0402 I COMP3 AT23 COMP3
A16 (133MHz)


BCLK CLK_PCH_CPU_CLK {22}

MISC
RX9 20 1% 0402 I COMP2 AT24 B16
+V1_05S COMP2 BCLK# CLK_PCH_CPU_CLK# {22}
D D

CLOCKS
RX10 49.9 1% COMP1 G16 AR30 Discrete :RX14,RX17 Not Install and RX15,RX16 0 ohm
COMP1 BCLK_ITP
BCLK_ITP# AT30 TP380, TP379 ICT_TP UMA: RX14,RX17 0 ohm and RX15,RX16 Not Install
RX12 49.9 1% COMP0 AT26
RX11 COMP0 CLK_PCH_EXP_R RX13 0 5%
PEG_CLK E16
CLK_PCH_EXP#_R RX14 0 5%
CLK_PCH_EXP {18} (100MHz)
49.9 1% PEG_CLK# D16 CLK_PCH_EXP# {18}
AH24 RX15 0 5%IGP_OP1
SKTOCC# CLK_PCH_DP {18}
A18 CLK_PCH_DP_R RX16 0 5% GE1
DPLL_REF_SSCLK CLK_PCH_DP#_R RX17 0 5% GE1
DPLL_REF_SSCLK# A17 (120MHz)


H_CATERR# AK14 CATERR#

THERMAL
+V1_05S RX18 0 5% IGP_OP1
CLK_PCH_DP# {18}
SM_DRAMRST# F6 DDR3_DRAMRST# {26,27}
RX54 0 5%R0402 CPU_PECI AT15
{22} H_PECI PECI
AL1 SM_RCOMP0 RX20 100 1%
SM_RCOMP[0] SM_RCOMP1 RX21 24.9 1% RX24 RX22
SM_RCOMP[1] AM1
AN1 SM_RCOMP2 RX23 130 1% 10K 5% 10K 5%
VR_PROCHOT# SM_RCOMP[2]
AN26 PROCHOT#
AN15 PM_EXTTS#0
PM_EXT_TS#[0]

DDR3
MISC
AP15 PM_EXTTS#1_R RX53 0 5%


PM_EXT_TS#[1] PM_EXTTS#1 {26,27}
RX39 0 5% H_THRMTRIP#AK15
{22,66} PM_THRMTRIP# THERMTRIP# RX25
12.4K_1%
AT28 0402
PRDY#
Layout Check-thermal, power manager PREQ# AP27 XDP_PREQ# NI
ns
TCK AN28 XDP_TCLK
AP26 RESET_OBS# TMS AP28 XDP_TMS

PWR MANAGEMENT
TRST# AT27 XDP_TRST#


+V1_05S

JTAG & BPM


C C
AL15 AT29 XDP_TDI
{19} H_PM_SYNC PM_SYNC TDI
AR27 XDP_TDO
TDO XDP_TDI_M
Pins Unused by Clarksfield(TBC) TDI_M AR29
RX26 0 5% CPUPWRGD1 AN14 AP29 XDP_TDO_M R52
VCCPWRGOOD_1 TDO_M ns
1K 5%
DBR# AN25 CPU_DBR# RX27 0 5%
DBR_RESET# {19}
RX63 0 5%
EC_PROCHOT2# {37}
RX28 0 5% CPUPWRGD0 AN27 ns
{22} H_CPUPWRGD VCCPWRGOOD_0
VR_PROCHOT# {57}
BPM#[0] AJ22 R0402

3
RX29 0 5% DRAM_PWRGD AK13 AK22 R0402


{19} PM_DRAM_PWRGD SM_DRAMPWROK BPM#[1]
AK24 QX2
BPM#[2] 2N7002PT
BPM#[3] AJ24
VTTPWRGOOD AM15 AJ25 {37} EC_PROCHOT# RX30 1K 5% 1 SOT23 C338
VTTPWRGOOD BPM#[4] 1000pF/50V,X7R
BPM#[5] AH22
AK23 R0402 ns

2
BPM#[6] C0402
AM26 TAPPWRGOOD BPM#[7] AH23

RX31 1.5K 1% RSTIN# AL14


{21,28} PLT_RST# RSTIN#


RX32 PZ98927-3641-01F
698 1% Check with Intel CRB
0402
I
+V1_05S
B Clarksfield: 1.1V(RX30=1.5K 1%; RX31=750 1%) TCK 50 PD B
Arrandale : 1.05V(RX30=1.5K 1% ; RX31=698 1%) TMS 2k~5k PU


+V3_3S XDP_TDO RX33 51 5% ns TRST 2k~5k PU
XDP_TMS RX34 51 5% ns
ux2,ux3 co-layout XDP_TDI RX35 51 5% ns
TDI 50 PU
UX3 XDP_PREQ# RX36 51 5% ns TDO unconnect
5

+V3_3S XDP_TCLK RX37 51 5% ns TDI_M 50 PU


1 VCC XDP_TRST#
VTTPWRGOOD_R
TDO_M unconnect
4
V1_05S_PWROK 2
GND CX33
SN74AHC1G08DBV 0.1uF/10V,X5R RX38
3


+V1_5SM SOT23_5 51 5%

VTTPWRGOOD_R

1
5
RX40 UX2
1.1K 1% 2 4 RX42 2K 1% VTTPWRGOOD XDP_TDO_M
{37,64} V1_05S_PWROK

RX43

3
74LVC1G17GW 931 1% RX44
ns
DRAM_PWRGD


0402 0 5%
I
RX45
2.61K 1% ns
0402 XDP_TDI_M
I

A A

Clarksfield: 1.1V(RX41=2K 1%; RX44=1K 1%)


Clarksfield: 1.1V(RX38=1.1K 1%; RX43=3.01K 1%)


Arrandale : 1.05V(RX41=2K 1% ; R44=931ohm 1%)
Arrandale : 1.05V(RX38=1.1K 1% ; Rx43=2.61K 1%)
深圳仁聚科技有限公司
Title
Calpella (CLK,MISC,JTAG)

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 11 of 67


5 4 3 2 1
5 4 3 2 1

UX1D
UX1C
{27} SDDR_B_DQ[63:0]

W8


SB_CK[0] SDDR_B_CLK_DDR0 {27}
SA_CK[0] AA6 SDDR_A_CLK_DDR0 {26} SB_CK#[0] W9 SDDR_B_CLK_DDR#0 {27}
D AA7 SDDR_B_DQ0 B5 M3 D
SA_CK#[0] SDDR_A_CLK_DDR#0 {26} SDDR_B_DQ1 SB_DQ[0] SB_CKE[0] SDDR_B_CKE0 {27}
{26} SDDR_A_DQ[63:0] SA_CKE[0] P7 SDDR_A_CKE0 {26} A5 SB_DQ[1]
SDDR_A_DQ0 A10 SDDR_B_DQ2 C3
SDDR_A_DQ1 SA_DQ[0] SDDR_B_DQ3 SB_DQ[2]
C10 SA_DQ[1] B3 SB_DQ[3] SB_CK[1] V7 SDDR_B_CLK_DDR1 {27}
SDDR_A_DQ2 C7 SDDR_B_DQ4 E4 V6
SDDR_A_DQ3 SA_DQ[2] SDDR_B_DQ5 SB_DQ[4] SB_CK#[1] SDDR_B_CLK_DDR#1 {27}
A7 SA_DQ[3] SA_CK[1] Y6 SDDR_A_CLK_DDR1 {26} A6 SB_DQ[5] SB_CKE[1] M2 SDDR_B_CKE1 {27}
SDDR_A_DQ4 B10 Y5 SDDR_B_DQ6 A4
SDDR_A_DQ5 SA_DQ[4] SA_CK#[1] SDDR_A_CLK_DDR#1 {26} SDDR_B_DQ7 SB_DQ[6]
D10 SA_DQ[5] SA_CKE[1] P6 SDDR_A_CKE1 {26} C4 SB_DQ[7]
SDDR_A_DQ6 E10 SDDR_B_DQ8 D1


SDDR_A_DQ7 SA_DQ[6] SDDR_B_DQ9 SB_DQ[8]
A8 SA_DQ[7] D2 SB_DQ[9]
SDDR_A_DQ8 D8 SDDR_B_DQ10 F2 AB8
SDDR_A_DQ9 SA_DQ[8] SDDR_B_DQ11 SB_DQ[10] SB_CS#[0] SDDR_B_CS#0 {27}
F10 SA_DQ[9] SA_CS#[0] AE2 SDDR_A_CS#0 {26} F1 SB_DQ[11] SB_CS#[1] AD6 SDDR_B_CS#1 {27}
SDDR_A_DQ10 E6 AE8 SDDR_B_DQ12 C2
SDDR_A_DQ11 SA_DQ[10] SA_CS#[1] SDDR_A_CS#1 {26} SDDR_B_DQ13 SB_DQ[12]
F7 SA_DQ[11] F5 SB_DQ[13]
SDDR_A_DQ12 E9 SDDR_B_DQ14 F3
SDDR_A_DQ13 SA_DQ[12] SDDR_B_DQ15 SB_DQ[14]
B7 SA_DQ[13] G4 SB_DQ[15] SB_ODT[0] AC7 SDDR_B_ODT0 {27}
SDDR_A_DQ14 E7 AD8 SDDR_B_DQ16 H6 AD1
SDDR_A_DQ15 SA_DQ[14] SA_ODT[0] SDDR_A_ODT0 {26} SDDR_B_DQ17 SB_DQ[16] SB_ODT[1] SDDR_B_ODT1 {27}
C6 SA_DQ[15] SA_ODT[1] AF9 SDDR_A_ODT1 {26} G2 SB_DQ[17]
SDDR_A_DQ16 H10 SDDR_B_DQ18 J6


SDDR_A_DQ17 SA_DQ[16] SDDR_B_DQ19 SB_DQ[18]
G8 SA_DQ[17] J3 SB_DQ[19]
SDDR_A_DQ18 K7 SDDR_B_DQ20 G1
SA_DQ[18] SB_DQ[20] SDDR_B_DM[7:0] {27}
SDDR_A_DQ19 J8 SDDR_B_DQ21 G5 D4 SDDR_B_DM0
SDDR_A_DQ20 SA_DQ[19] SDDR_B_DQ22 SB_DQ[21] SB_DM[0] SDDR_B_DM1
G7 SA_DQ[20] J2 SB_DQ[22] SB_DM[1] E1
SDDR_A_DQ21 G10 SDDR_B_DQ23 J1 H3 SDDR_B_DM2
SA_DQ[21] SDDR_A_DM[7:0] {26} SB_DQ[23] SB_DM[2]
SDDR_A_DQ22 J7 B9 SDDR_A_DM0 SDDR_B_DQ24 J5 K1 SDDR_B_DM3
SDDR_A_DQ23 SA_DQ[22] SA_DM[0] SDDR_A_DM1 SDDR_B_DQ25 SB_DQ[24] SB_DM[3] SDDR_B_DM4
J10 SA_DQ[23] SA_DM[1] D7 K2 SB_DQ[25] SB_DM[4] AH1
SDDR_A_DQ24 L7 H7 SDDR_A_DM2 SDDR_B_DQ26 L3 AL2 SDDR_B_DM5
SDDR_A_DQ25 SA_DQ[24] SA_DM[2] SDDR_A_DM3 SDDR_B_DQ27 SB_DQ[26] SB_DM[5] SDDR_B_DM6
C M6 SA_DQ[25] SA_DM[3] M7 M1 SB_DQ[27] SB_DM[6] AR4 C
SDDR_A_DQ26 SDDR_A_DM4 SDDR_B_DQ28 SDDR_B_DM7


M8 SA_DQ[26] SA_DM[4] AG6 K5 SB_DQ[28] SB_DM[7] AT8
SDDR_A_DQ27 L9 AM7 SDDR_A_DM5 SDDR_B_DQ29 K4
SDDR_A_DQ28 SA_DQ[27] SA_DM[5] SDDR_A_DM6 SDDR_B_DQ30 SB_DQ[29]
L6 SA_DQ[28] SA_DM[6] AN10 M4 SB_DQ[30]
SDDR_A_DQ29 K8 AN13 SDDR_A_DM7 SDDR_B_DQ31 N5
SDDR_A_DQ30 SA_DQ[29] SA_DM[7] SDDR_B_DQ32 SB_DQ[31]
N8 SA_DQ[30] 08/12/01 Pins used Auburndale Only AF3 SB_DQ[32]
SDDR_A_DQ31 P9 SDDR_B_DQ33 AG1
SDDR_A_DQ32 AH5
SA_DQ[31] (Design Guide Page 79). SDDR_B_DQ34 AJ3
SB_DQ[33]
D5 SDDR_B_DQS#0 SDDR_B_DQS#[7:0] {27}
SDDR_A_DQ33 SA_DQ[32] SDDR_B_DQ35 SB_DQ[34] SB_DQS#[0] SDDR_B_DQS#1
AF5 SA_DQ[33] SDDR_A_DQS#[7:0] {26} AK1 SB_DQ[35] SB_DQS#[1] F4
SDDR_A_DQ34 AK6 C9 SDDR_A_DQS#0 SDDR_B_DQ36 AG4 J4 SDDR_B_DQS#2
SA_DQ[34] SA_DQS#[0] SB_DQ[36] SB_DQS#[2]
DDR SYSTEM MEMORY A

SDDR_A_DQ35 AK7 F8 SDDR_A_DQS#1 SDDR_B_DQ37 AG3 L4 SDDR_B_DQS#3


SA_DQ[35] SA_DQS#[1] SB_DQ[37] SB_DQS#[3]


SDDR_A_DQ36 AF6 J9 SDDR_A_DQS#2 SDDR_B_DQ38 AJ4 AH2 SDDR_B_DQS#4
SA_DQ[36] SA_DQS#[2] SB_DQ[38] SB_DQS#[4]

DDR SYSTEM MEMORY - B


SDDR_A_DQ37 AG5 N9 SDDR_A_DQS#3 SDDR_B_DQ39 AH4 AL4 SDDR_B_DQS#5
SDDR_A_DQ38 SA_DQ[37] SA_DQS#[3] SB_DQ[39] SB_DQS#[5]
AJ7 SA_DQ[38] SA_DQS#[4] AH7 SDDR_A_DQS#4 SDDR_B_DQ40 AK3 SB_DQ[40] SB_DQS#[6] AR5 SDDR_B_DQS#6
SDDR_A_DQ39 AJ6 AK9 SDDR_A_DQS#5 SDDR_B_DQ41 AK4 AR8 SDDR_B_DQS#7
SDDR_A_DQ40 SA_DQ[39] SA_DQS#[5] SB_DQ[41] SB_DQS#[7]
AJ10 SA_DQ[40] SA_DQS#[6] AP11 SDDR_A_DQS#6 SDDR_B_DQ42 AM6 SB_DQ[42]
SDDR_A_DQ41 AJ9 AT13 SDDR_A_DQS#7 SDDR_B_DQ43 AN2
SDDR_A_DQ42 SA_DQ[41] SA_DQS#[7] SDDR_B_DQ44 SB_DQ[43]
AL10 SA_DQ[42] AK5 SB_DQ[44]
SDDR_A_DQ43 AK12 SDDR_B_DQ45 AK2
SDDR_A_DQ44 SA_DQ[43] SDDR_B_DQ46 SB_DQ[45]
AK8 SA_DQ[44] SDDR_A_DQS[7:0] {26} AM4 SB_DQ[46] SDDR_B_DQS[7:0] {27}
SDDR_A_DQ45 AL7 SDDR_B_DQ47 AM3
SA_DQ[45] SB_DQ[47]


SDDR_A_DQ46 AK11 C8 SDDR_A_DQS0 SDDR_B_DQ48 AP3 C5 SDDR_B_DQS0
SDDR_A_DQ47 SA_DQ[46] SA_DQS[0] SDDR_A_DQS1 SDDR_B_DQ49 SB_DQ[48] SB_DQS[0] SDDR_B_DQS1
AL8 SA_DQ[47] SA_DQS[1] F9 AN5 SB_DQ[49] SB_DQS[1] E3
SDDR_A_DQ48 AN8 H9 SDDR_A_DQS2 SDDR_B_DQ50 AT4 H4 SDDR_B_DQS2
SDDR_A_DQ49 SA_DQ[48] SA_DQS[2] SDDR_A_DQS3 SDDR_B_DQ51 SB_DQ[50] SB_DQS[2] SDDR_B_DQS3
AM10 SA_DQ[49] SA_DQS[3] M9 AN6 SB_DQ[51] SB_DQS[3] M5
SDDR_A_DQ50 AR11 AH8 SDDR_A_DQS4 SDDR_B_DQ52 AN4 AG2 SDDR_B_DQS4
SDDR_A_DQ51 SA_DQ[50] SA_DQS[4] SDDR_A_DQS5 SDDR_B_DQ53 SB_DQ[52] SB_DQS[4] SDDR_B_DQS5
AL11 SA_DQ[51] SA_DQS[5] AK10 AN3 SB_DQ[53] SB_DQS[5] AL5
B SDDR_A_DQ52 AM9 AN11 SDDR_A_DQS6 SDDR_B_DQ54 AT5 AP5 SDDR_B_DQS6 B
SDDR_A_DQ53 SA_DQ[52] SA_DQS[6] SDDR_A_DQS7 SDDR_B_DQ55 SB_DQ[54] SB_DQS[6] SDDR_B_DQS7
AN9 SA_DQ[53] SA_DQS[7] AR13 AT6 SB_DQ[55] SB_DQS[7] AR7
SDDR_A_DQ54 AT11 SDDR_B_DQ56 AN7
SDDR_A_DQ55 SA_DQ[54] SDDR_B_DQ57 SB_DQ[56]
AP12 SA_DQ[55] AP6 SB_DQ[57]


SDDR_A_DQ56 AM12 SDDR_B_DQ58 AP8
SA_DQ[56] SDDR_A_A[15:0] {26} SB_DQ[58]
SDDR_A_DQ57 AN12 SDDR_B_DQ59 AT9
SDDR_A_DQ58 SA_DQ[57] SDDR_A_A0 SDDR_B_DQ60 SB_DQ[59]
AM13 SA_DQ[58] SA_MA[0] Y3 AT7 SB_DQ[60]
SDDR_A_DQ59 AT14 W1 SDDR_A_A1 SDDR_B_DQ61 AP9
SA_DQ[59] SA_MA[1] SB_DQ[61] SDDR_B_A[15:0] {27}
SDDR_A_DQ60 AT12 AA8 SDDR_A_A2 SDDR_B_DQ62 AR10
SDDR_A_DQ61 SA_DQ[60] SA_MA[2] SDDR_A_A3 SDDR_B_DQ63 SB_DQ[62] SDDR_B_A0
AL13 SA_DQ[61] SA_MA[3] AA3 AT10 SB_DQ[63] SB_MA[0] U5
SDDR_A_DQ62 AR14 V1 SDDR_A_A4 V2 SDDR_B_A1
SDDR_A_DQ63 SA_DQ[62] SA_MA[4] SDDR_A_A5 SB_MA[1] SDDR_B_A2
AP14 SA_DQ[63] SA_MA[5] AA9 SB_MA[2] T5
V8 SDDR_A_A6 V3 SDDR_B_A3
SA_MA[6] SDDR_A_A7 SB_MA[3] SDDR_B_A4
T1 R1


SA_MA[7] SDDR_A_A8 SB_MA[4] SDDR_B_A5
SA_MA[8] Y9 {27} SDDR_B_BS0 AB1 SB_BS[0] SB_MA[5] T8
AC3 U6 SDDR_A_A9 W5 R2 SDDR_B_A6
{26} SDDR_A_BS0 SA_BS[0] SA_MA[9] SDDR_A_A10 {27} SDDR_B_BS1 SB_BS[1] SB_MA[6] SDDR_B_A7
{26} SDDR_A_BS1 AB2 SA_BS[1] SA_MA[10] AD4 {27} SDDR_B_BS2 R7 SB_BS[2] SB_MA[7] R6
U7 T2 SDDR_A_A11 R4 SDDR_B_A8
{26} SDDR_A_BS2 SA_BS[2] SA_MA[11] SDDR_A_A12 SB_MA[8] SDDR_B_A9
SA_MA[12] U3 SB_MA[9] R5
AG8 SDDR_A_A13 AC5 AB5 SDDR_B_A10
SA_MA[13] SDDR_A_A14 {27} SDDR_B_CAS# SB_CAS# SB_MA[10] SDDR_B_A11
SA_MA[14] T3 {27} SDDR_B_RAS# Y7 SB_RAS# SB_MA[11] P3
AE1 V9 SDDR_A_A15 AC6 R3 SDDR_B_A12
{26} SDDR_A_CAS# SA_CAS# SA_MA[15] {27} SDDR_B_WE# SB_WE# SB_MA[12] SDDR_B_A13
{26} SDDR_A_RAS# AB3 SA_RAS# SB_MA[13] AF7
AE9 P5 SDDR_B_A14


{26} SDDR_A_WE# SA_WE# SB_MA[14] SDDR_B_A15
SB_MA[15] N1

A A

PZ98927-3641-01F 深圳仁聚科技有限公司


Title
Calpella (DDR3)
PZ98927-3641-01F
Size Document Number Rev
Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 12 of 67


5 4 3 2 1
1 2 3 4 5 6 7 8

UX1F FOR VTT:


7x 0805 22  F under
cavity
+VCC_CORE 8x 0805 10  F edge
caps +V1_05S

AG35 VCC1 VTT0_1 AH14


AG34 VCC2 VTT0_2 AH12
AG33 AH11 CX34 CX35 CX36 CX37 CX38


VCC3 VTT0_3
AG32 VCC4 VTT0_4 AH10
AG31 VCC5 VTT0_5 J14
A AG30 J13 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R A
VCC6 VTT0_6
AG29 VCC7 VTT0_7 H14
AG28 VCC8 VTT0_8 H12
AG27 VCC9 VTT0_9 G14
AG26 VCC10 VTT0_10 G13
AF35 VCC11 VTT0_11 G12
AF34 VCC12 VTT0_12 G11
AF33 VCC13 VTT0_13 F14


AF32 VCC14 VTT0_14 F13
AF31 VCC15 VTT0_15 F12
AF30 VCC16 VTT0_16 F11
AF29 VCC17 VTT0_17 E14
AF28 VCC18 VTT0_18 E12
FOR VCC: AF27 VCC19 VTT0_19 D14
12x 0805 22  F inside cavity, AF26
AD35
VCC20 VTT0_20 D13
D12

1.1V RAIL POWER


7x 0805 10  F under cavity and 9 x 0805 AD34
VCC21
VCC22
VTT0_21
VTT0_22 D11
10  F AD33 VCC23 VTT0_23 C14
AD32 C13


between inductor and socket on top layer AD31
VCC24 VTT0_24
C12
VCC25 VTT0_25
AD30 VCC26 VTT0_26 C11
AD29 VCC27 VTT0_27 B14
AD28 VCC28 VTT0_28 B12
AD27 VCC29 VTT0_29 A14
AD26 VCC30 VTT0_30 A13
AC35 VCC31 VTT0_31 A12
AC34 VCC32 VTT0_32 A11
AC33 +V1_05S
VCC33
AC32 VCC34


AC31 VCC35
B AC30 VCC36 VTT0_33 AF10 B
AC29 VCC37 VTT0_34 AE10
AC28 VCC38 VTT0_35 AC10

CPU CORE SUPPLY


AC27 AB10 CX39 CX40
+VCC_CORE VCC39 VTT0_36 22uF/6.3V 22uF/6.3V
AC26 VCC40 VTT0_37 Y10
AA35 W10 0805 0805
VCC41 VTT0_38 I I
AA34 VCC42 VTT0_39 U10
AA33 T10 +V1_05S
CX41 CX42 CX43 CX44 CX45 VCC43 VTT0_40
AA32 VCC44 VTT0_41 J12
22uF/6.3V 22uF/6.3V 22uF/6.3V 22uF/6.3V 22uF/6.3V AA31 J11


0805 0805 0805 0805 0805 VCC45 VTT0_42
AA30 VCC46 VTT0_43 J16
I I I I I AA29 J15
VCC47 VTT0_44
AA28 VCC48
AA27 VCC49
AA26 VCC50
+VCC_CORE Y35 VCC51
Y34 VCC52
Y33 VCC53
Y32 VCC54
CX46 CX47 CX48 Y31 VCC55


22uF/6.3V 22uF/6.3V 22uF/6.3V Y30
0805 0805 0805 VCC56
Y29 VCC57
I I I Y28 VCC58
Y27 VCC59
Y26 VCC60
V35 VCC61 PSI# AN33 PM_PSI# {57}
V34 VCC62
+VCC_CORE V33
V32
V31
VCC63
VCC64
VCC65
POWER VID[0]
VID[1]
AK35
AK33
H_VID0
H_VID1
{57}
{57}


C V30 VCC66 VID[2] AK34 H_VID2 {57} C
CX49 CX50 CX51 CX52 CX53 V29 AL35 H_VID3 {57}
10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R VCC67 CPU VIDS VID[3]
V28 VCC68 VID[4] AL33 H_VID4 {57}
V27 VCC69 VID[5] AM33 H_VID5 {57}
V26 VCC70 VID[6] AM35 H_VID6 {57}
U35 VCC71 PROC_DPRSLPVR AM34 PM_DPRSLPVR {57}
U34 VCC72
U33 VCC73
+VCC_CORE U32 VCC74 Arrandale drives this pin High
U31 VCC75 VTT_SELECT G15 1 TP1 Test Point_30mil
U30 Clarksfield drives this pin Low.


VCC76
U29 VCC77 ns
CX54 CX55 CX56 CX57 U28
10uF/6.3V,X5R 10uF/6.3V,X5R VCC78 +VCC_CORE
U27 VCC79
33pF/50V,NPO 33pF/50V,NPO U26 VCC80
R35 VCC81 Place close to CPU
R34 VCC82
R33 VCC83
R32 AN35 RX46
VCC84 ISENSE IMVP_IMON {57}
R31 VCC85 100 1%
R30 VCC86


R29 VCC87
R28 AJ34 VCCSENSE {57}
SENSE LINES

VCC88 VCC_SENSE
R27 VCC89 VSS_SENSE AJ35 VSSSENSE {57}
R26 VCC90
P35 VCC91
P34 VCC92 VTT_SENSE B15 1 TP205 Test Point_30mil
P33 A15 RX47
VCC93 VSS_SENSE_VTT
P32 VCC94 100 1%
P31 VCC95
P30 VCC96
D D
P29


VCC97
P28 VCC98
P27 VCC99
P26 VCC100

深圳仁聚科技有限公司
Title
Calpella (POWER)

Size Document Number Rev


PZ98927-3641-01F Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 13 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VGFX_CORE


Max Current for Integrated Graphics RailI CCMAX_VAXG----22A
A A

CX58 CX59 CX60 CX61


RX48 10uF/6.3V,X5R
C0805
10uF/6.3V,X5R
C0805
10uF/6.3V,X5R
C0805 C0805
2x 0805 22  F
10uF/6.3V,X5R
0 5%
ns 2x 0603 10  F


IGP_OP1 IGP_OP1 IGP_OP1 IGP_OP1 edge caps
Discrete GPU: Not Install
Discrete GPU: Install UMA: Install
UX1G
UMA: Not Install Discrete GPU: Install
AT21
AT19
VAXG1
AR22 RX49 0 5% UMA: Not Install
VAXG2 VAXG_SENSE GFX_VCC_SENSE {58,60}
RX50 0 5%

SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22 GFX_VSS_SENSE {58,60}
AT16 IGP_OP1


+VGFX_CORE VAXG4 GFX_IMON
Reserve for EMC AR21 VAXG5 IGP_OP1
AR19 VAXG6
AR18 VAXG7
AR16 VAXG8 GFX_VID[0] AM22 GFX_VID0 {58,60}
IGP_OP1 IGP_OP1 AP21 AP22 RX51
VAXG9 GFX_VID[1] GFX_VID1 {58,60}

GRAPHICS VIDs
C40 C37 C38 AP19 AN22 1K 5%
VAXG10 GFX_VID[2] GFX_VID2 {58,60}
C26 C31 AP18 AP23
1000pF/25V,X7R VAXG11 GFX_VID[3] GFX_VID3 {58,60}
10uF/6.3V,X5R C0805 AP16 AM23 GPU
VAXG12 GFX_VID[4] GFX_VID4 {58,60}
C0805 C0402 1000pF/25V,X7R AN21 AP24
VAXG13 GFX_VID[5] GFX_VID5 {58,60}

GRAPHICS

IGP_OP1 AN19 VAXG14 GFX_VID[6] AN24 GFX_VID6 {58,60}
0.1uF/10V,X5R AN18 VAXG15
B IGP_OP1 AN16 VAXG16 B
10uF/6.3V,X5R AM21 AR25
VAXG17 GFX_VR_EN GFX_VR_EN {58}
IGP_OP1 AM19 VAXG18 GFX_DPRSLPVR AT25 GFX_DPRSLPVR {60}
AM18 VAXG19 GFX_IMON AM24 GFX_IMON {58,60}
AM16 RX52 Discrete GPU: Not Install
+V1_05S VAXG20 4.7K 5%
AL21
AL19
VAXG21 UMA: Install
VAXG22 +V1_5SM
AL18


VAXG23
AL16 VAXG24
C41 C42 C43 AK21 AJ1
CPU_SUPPORT1 VAXG25 VDDQ1
AK19 VAXG26 VDDQ2 AF1
0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R

- 1.5V RAILS
AK18 VAXG27 VDDQ3 AE7
C0402 C0402 C0402 AK16 AE4
VAXG28 VDDQ4 CX67 CX69
AJ21 VAXG29 VDDQ5 AC1
AJ19 VAXG30 VDDQ6 AB7 CX62 CX63 CX64 CX65 CX66 CX68
IGP_OP1
IGP_OP1
IGP_OP1 AJ18 VAXG31 VDDQ7 AB4 0805 0805
AJ16 Y1 I I 33pF/50V,NPO
VAXG32 VDDQ8


CPU_FAN_SUPPORT AH21 VAXG33 VDDQ9 W7

POWER
AH19 W4 1uF/16V,X5R 1uF/16V,X5R 1uF/16V,X5R 1uF/16V,X5R 1uF/16V,X5R 22uF/6.3V
VAXG34 VDDQ10 22uF/6.3V
AH18 VAXG35 VDDQ11 U1
CPU Support AH16 T7
VAXG36 VDDQ12
VDDQ13 T4
Assembly VDDQ14 P1
+V1_05S VDDQ15 N7 FOR DDR3:
N4
VDDQ16 5x 0402 1  F

DDR3
VDDQ17 L1
J24 H1 2x 0805 22


VTT1_45 VDDQ18

FDI
CX70 J23
22uF/6.3V H25
VTT1_46
VTT1_47  F
C 0805 C
I +V1_05S

VTT0_59 P10
VTT0_60 N10
L10 CX71
VTT0_61 10uF_X5R_10V
VTT0_62 K10
0805
NI


+V1_05S ns

+V1_05S

1.1V
VTT1_63 J22
K26 VTT1_48 VTT1_64 J20
J27 J18 CX72
VTT1_49 VTT1_65
PEG & DMI

J26 H21 10uF/6.3V,X5R


VTT1_50 VTT1_66
J25 VTT1_51 VTT1_67 H20
CX73 CX74 H27 H19
10uF/6.3V,X5R 10uF/6.3V,X5R VTT1_52 VTT1_68 +V1_8S
G28 VTT1_53


G27 VTT1_54
G26 VTT1_55
F26
E26
VTT1_56
L26
Max Current for VCCPLL Rail 1.35A
VTT1_57 VCCPLL1
1.8V

E25 VTT1_58 VCCPLL2 L27


M26 CX75 CX76 CX77 CX78 CX79
VCCPLL3 2.2uF/10V,X5R 22uF/6.3V
1uF/16V,X5R 0603 4.7uF/10V,X5R 0805 33pF/50V,NPO
I I


D FOR VCCPLL: D
PZ98927-3641-01F 1x 0805 2.2
 F
2x 0805 1  F
1x 0805 22  F 深圳仁聚科技有限公司
1x 0603 4.7 F Title
Calpella (GRAPHICS POWER)

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 14 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

UX1H UX1I

AT20 VSS1 VSS81 AE34


AT17 VSS2 VSS82 AE33
AR31 VSS3 VSS83 AE32 K27 VSS161
AR28 VSS4 VSS84 AE31 K9 VSS162
AR26 VSS5 VSS85 AE30 K6 VSS163
AR24 AE29 K3


VSS6 VSS86 VSS164
AR23 VSS7 VSS87 AE28 J32 VSS165
A A
AR20 VSS8 VSS88 AE27 J30 VSS166
AR17 VSS9 VSS89 AE26 J21 VSS167
AR15 VSS10 VSS90 AE6 J19 VSS168
AR12 VSS11 VSS91 AD10 H35 VSS169
AR9 VSS12 VSS92 AC8 H32 VSS170
AR6 VSS13 VSS93 AC4 H28 VSS171
AR3 VSS14 VSS94 AC2 H26 VSS172


AP20 VSS15 VSS95 AB35 H24 VSS173
AP17 VSS16 VSS96 AB34 H22 VSS174
AP13 VSS17 VSS97 AB33 H18 VSS175
AP10 VSS18 VSS98 AB32 H15 VSS176
AP7 VSS19 VSS99 AB31 H13 VSS177
AP4 VSS20 VSS100 AB30 H11 VSS178
AP2 VSS21 VSS101 AB29 H8 VSS179
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181


AN23 VSS24 VSS104 AB26 G34 VSS182
AN20 VSS25 VSS105 AB6 G31 VSS183
AN17 VSS26 VSS106 AA10 G20 VSS184
AM29 VSS27 VSS107 Y8 G9 VSS185
AM27 VSS28 VSS108 Y4 G6 VSS186
AM25 VSS29 VSS109 Y2 G3 VSS187
AM20 VSS30 VSS110 W35 F30 VSS188
B AM17 VSS31 VSS111 W34 F27 VSS189 B
AM14 VSS32 VSS112 W33 F25 VSS190


AM11 VSS33 VSS113 W32 F22 VSS191
AM8 VSS34 VSS114 W31 F19 VSS192
AM5 VSS35 VSS115 W30 F16 VSS193
AM2 VSS36 VSS116 W29 E35 VSS194
AL34 W28 E32
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E29
E24
VSS195
VSS196
VSS197
VSS
AL20 VSS40 VSS120 W6 E21 VSS198
AL17 V10 E18


VSS41 VSS121 VSS199
AL12 VSS42 VSS122 U8 E13 VSS200
AL9 VSS43 VSS123 U4 E11 VSS201 TP415, TP416 ICT_TP
AL6 VSS44 VSS124 U2 E8 VSS202
AL3 VSS45 VSS125 T35 E5 VSS203
AK29 T34 E2 AT35 TP_MCP_VSS_NCTF1 1 Test Point_30mil
TP3
VSS46 VSS126 VSS204 VSS_NCTF1 TP_MCP_VSS_NCTF2 Test Point_30mil
TP4
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1 1
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34
AK17 T30 D9 B2


NCTF
VSS50 VSS130 VSS208 VSS_NCTF5 TP_MCP_VSS_NCTF6 Test Point_30mil
TP5
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 1
AJ23 T28 D3 A35 TP_MCP_VSS_NCTF7 1 Test Point_30mil
TP6
VSS52 VSS132 VSS210 VSS_NCTF7
AJ20 VSS53 VSS133 T27 C34 VSS211
AJ17 VSS54 VSS134 T26 C32 VSS212
C AJ14 VSS55 VSS135 T6 C29 VSS213 C
AJ11 VSS56 VSS136 R10 C28 VSS214
AJ8 VSS57 VSS137 P8 C24 VSS215
AJ5 VSS58 VSS138 P4 C22 VSS216
TP418, TP419 ICT_TP


AJ2 VSS59 VSS139 P2 C20 VSS217
AH35 VSS60 VSS140 N35 C19 VSS218
AH34 VSS61 VSS141 N34 C16 VSS219
AH33 VSS62 VSS142 N33 B31 VSS220
AH32 VSS63 VSS143 N32 B25 VSS221
AH31 VSS64 VSS144 N31 B21 VSS222
AH30 VSS65 VSS145 N30 B18 VSS223
AH29 VSS66 VSS146 N29 B17 VSS224
AH28 VSS67 VSS147 N28 B13 VSS225


AH27 VSS68 VSS148 N27 B11 VSS226
AH26 VSS69 VSS149 N26 B8 VSS227
AH20 VSS70 VSS150 N6 B6 VSS228
AH17 VSS71 VSS151 M10 B4 VSS229
AH13 VSS72 VSS152 L35 A29 VSS230
AH9 VSS73 VSS153 L32 A27 VSS231
AH6 VSS74 VSS154 L29 A23 VSS232
AH3 VSS75 VSS155 L8 A9 VSS233
AG10 VSS76 VSS156 L5


AF8 VSS77 VSS157 L2
AF4 VSS78 VSS158 K34
D AF2 K33 D
VSS79 VSS159
AE35 VSS80 VSS160 K30

深圳仁聚科技有限公司
Title
PZ98927-3641-01F PZ98927-3641-01F Calpella (GND)


Size Document Number Rev
B C02 A

Date: Wednesday, May 05, 2010 Sheet 15 of 67


1 2 3 4 5 6 7 8
5 4 3 2 1

UX1E

RSVD32 AJ13 1 TP7 Test Point_30mil


AJ12 1


RSVD33 TP8 Test Point_30mil
AP25 RSVD1
D AL25 RSVD2 RSVD34 AH25 1 TP17 Test Point_30mil D
AL24 RSVD3 RSVD35 AK26 1 TP11 Test Point_30mil
AL22 RSVD4
AJ33 RSVD5 RSVD36 AL26 1 TP13 Test Point_30mil
AG9 RSVD6 RSVD_NCTF_37 AR2
M27 RSVD7
L28 RSVD8 RSVD38 AJ26 1 TP21 Test Point_30mil


J17 RSVD9 RSVD39 AJ27 1 TP22 Test Point_30mil
H17 RSVD10
G25 RSVD11
TP24 1 G17 RSVD12
CFG0 Test Point_30mil 1 E31 AP1
TP15 RSVD13 RSVD_NCTF_40
Test Point_30mil 1 E30 AT2
PCI Express Configuration Select TP25 RSVD14 RSVD_NCTF_41
Test Point_30mil
CFG0 1 : Single PEG AT3
0 : Bifurcation enabled RX55 RSVD_NCTF_42
RSVD_NCTF_43 AR1
3.01K 1%


ns

RSVD45 AL28
CFG0 AM30 AL29
Test Point_30mil CFG[0] RSVD46
TP28 1 AM28 CFG[1] RSVD47 AP30
Test Point_30mil 1 AP31 AP32
TP30 CFG[2] RSVD48
CFG3 AL32 AL27 1 Test Point_30mil
CFG[3] RSVD49 TP32
CFG3 CFG4 AL30 AT31
Test Point_30mil CFG[4] RSVD50
TP33 1 AM31 CFG[5] RSVD51 AT32


Test Point_30mil 1 AN29 AP33 1 Test Point_30mil
CFG3 PCI Express Static Lane Reversal TP34 CFG[6] RSVD52 TP35
CFG7 AM32 AR33
CFG3 1 : Normal Operation RX56 Test Point_30mil CFG[7] RSVD53
C TP36 1 AK32 CFG[8] RSVD_NCTF_54 AT33 C
0 : Lane Numbers Reversed 3.01K 1% Test Point_30mil 1 AK31 AT34
15 ->0 , 14-> 1 , ... TP37 CFG[9] RSVD_NCTF_55
Test Point_30mil 1 AK28 AP35

RESERVED
TP38 CFG[10] RSVD_NCTF_56
Test Point_30mil 1 AJ28 AR35
TP39 CFG[11] RSVD_NCTF_57
Test Point_30mil 1 AN30 AR32
TP40 CFG[12] RSVD58
Test Point_30mil 1 AN32
TP41 CFG[13]
Pin-CGF[12] Test Point_30mil 1 AJ32
TP42 CFG[14]
Test Point_30mil 1 AJ29 E15 1 Test Point_30mil
Unused by Clarksfield


TP43 CFG[15] RSVD_TP_59 TP44
Test Point_30mil 1 AJ30 F15 1 Test Point_30mil
TP45 CFG[16] RSVD_TP_60 TP46
Test Point_30mil 1 AK30 A2
TP47 CFG[17] KEY
CFG4 Test Point_30mil 1 H16 D15 1 Test Point_30mil
TP48 RSVD_TP_86 RSVD62 TP49
RSVD63 C15 1 TP50 Test Point_30mil
AJ15 RX57 0 5% ns
CFG4 Display Port Presence RSVD64 RX58 0 5% ns
RSVD65 AH15
CFG4 1 : Disabled ; No Physical Display Port RX59
attached to Embedded Display Port 3.01K 1% Test Point_30mil 1 B19
0 : Enable ; An external Display Poert device TP51 RSVD15
ns Test Point_30mil 1 A19
is connected to the Embedded Display Port TP52 RSVD16


RX60 0 5% ns A20
RX61 0 5% ns RSVD17
B20 RSVD18
RSVD_TP_66 AA5
Test Point_30mil 1 U9 AA4
TP54 RSVD19 RSVD_TP_67
CFG7 Test Point_30mil 1 T9 R8
TP56 RSVD20 RSVD_TP_68
RSVD_TP_69 AD3
Test Point_30mil
Checklist 1.0 page 52 1 AC9 AD2
TP59 RSVD21 RSVD_TP_70
AB9 RSVD22 RSVD_TP_71 AA2
CFG7 Reserved - Temporarily used for early Clarksfield samples. RX62 AA1


CFG7 Clarksfield (only for early samples pre-ES1) - 3.01K 1% RSVD_TP_72
RSVD_TP_73 R9 1 TP64 Test Point_30mil
Connect to GND with 3.01K Ohm/5% resistor ns AG7 1
RSVD_TP_74 TP65 Test Point_30mil
B Test Point_30mil 1 C1 AE3 1 Test Point_30mil B
TP66 RSVD_NCTF_23 RSVD_TP_75 TP67
A3 RSVD_NCTF_24

RSVD_TP_76 V4
RSVD_TP_77 V5
Only need stuff for early samples pre-ES1) RSVD_TP_78 N2
Test Point_30mil 1 J29 AD5
TP72 RSVD26 RSVD_TP_79
Test Point_30mil


TP74 1 J28 RSVD27 RSVD_TP_80 AD7
RSVD_TP_81 W3
Test Point_30mil 1 A34 W2
TP77 RSVD_NCTF_28 RSVD_TP_82
A33 RSVD_NCTF_29 RSVD_TP_83 N3 1 TP80 Test Point_30mil
RSVD_TP_84 AE5 1 TP81 Test Point_30mil
Test Point_30mil 1 C35 AD9 1 Test Point_30mil
TP82 RSVD_NCTF_30 RSVD_TP_85 TP83
B35 RSVD_NCTF_31

VSS AP34


PZ98927-3641-01F


A A

深圳仁聚科技有限公司
Title
Calpella (RESERVED)

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 16 of 67


5 4 3 2 1
5 4 3 2 1

RTCRST#
YS2
CO-LAOUT
VccRTC 2 1 RTC_32KX1 +V3_3S
18~25mS 3 4 RTC_32KX2

32.768KHz RS1 Install for No-reboot


+V3_3SB RS1 Low=Default
2mA CS1 18pF/50V,NPO RTC_32KX1 1K 5%
High=No-reboot
D 100mA DS1
+VCC_RTC
YS1 D
ns
RS16 1K 5% 1 2 1 HDA_SPKR
BAT54C 3 4 RS2
3 6 mils 10M 5%
CS2 32.768kHz US1A
2 SOT23 1uF/6.3V,X5R
0402 B13 D33 LPC_AD0
RTCX1 FWH0 / LAD0 LPC_AD0 {37,38}
I CS3 ns
RTC_32KX2 D13 RTCX2 FWH1 / LAD1 B33 LPC_AD1
LPC_AD1 {37,38}


C32 LPC_AD2
FWH2 / LAD2 LPC_AD2 {37,38}
18pF/50V,NPO A32 LPC_AD3
RTC3

FWH3 / LAD3 LPC_AD3 {37,38}


RS3 20K 1% RTCRST# C14
CS4 RTCRST# LPC_FRAME#
FWH4 / LFRAME# C34 LPC_FRAME# {37,38}
1uF/6.3V,X5R SRTCRST# D17
0402 SRTCRST#
A34

RTC

LPC
RS5 I INTRUDER# LDRQ0#
A16 INTRUDER# LDRQ1# / GPIO23 F34
2

RS4 1M 1% RS6
1K 5% CRB 20K INTVRMEN A14 AB9 INT_SERIRQ
+VCC_RTC INTVRMEN SERIRQ INT_SERIRQ {37,38}
JPS1
OPEN_JUMP_OPEN2 330K 1%
RTC2

0402


1

HDD
I HDA_BITCLK A30
RS7 20K 5% HDA_BCLK SATA_RXN0
SATA0RXN AK7 SATA_RXN0 {46}
ns HDA_SYNC D29 AK6 SATA_RXP0
HDA_SYNC SATA0RXP SATA_RXP0 {46}
CS5 AK11 SATA_TXN0
SATA0TXN SATA_TXN0 {46}
1

1uF/6.3V,X5R P1 AK9 SATA_TXP0


{39} HDA_SPKR SPKR SATA0TXP SATA_TXP0 {46}
@XBT1 XBT1 0402
+

+
Socket _

Battery Holder_H I HDA_RESET# C30


KTS
CRITICAL HDA_RST# SATA_RXN1
LITHIUM BATT AH6 SATA_RXN1 {46}

ODD
CR2032
I SATA1RXN SATA_RXP1
SATA1RXP AH5 SATA_RXP1 {46}
BATTARY_3V_210mAh HDA_SDIN0 G30 AH9 SATA_TXN1
SATA_TXN1 {46}
2

HDA_SDIN0 SATA1TXN SATA_TXP1


ns AH8 SATA_TXP1 {46}


SATA1TXP
F30 HDA_SDIN1
ns AF11
SATA2RXN
CO-LAYOUT E32 AF9

IHDA
C HDA_SDIN2 SATA2RXP C
SATA2TXN AF7
RTCBAT1 1 F32 AF6
TP90 HDA_SDIN3 SATA2TXP
Test Point_30mil
3

SATA3RXN AH3
1 RTC2 HDA_SDOUT B29 AH1
+
3

1 HDA_SDO SATA3RXP
2 AF3

eSATA
2 SATA3TXN
-
4

SATA3TXP AF1
RTC_BAT1 1 H32

SATA
TP96
4

HDA_DOCK_EN# / GPIO33


RTC BATTERY Test Point_30mil AD9 SATA_RXN4
SATA4RXN SATA_RXN4 {42}
Assembly 1 J30 AD8 SATA_RXP4
TP97 HDA_DOCK_RST# / GPIO13 SATA4RXP SATA_RXP4 {42}
Test Point_30mil AD6 SATA_TXN4
SATA4TXN SATA_TXN4 {42}
AD5 SATA_TXP4
SATA4TXP SATA_TXP4 {42}
<24MHz>
JTAG_TCK M3 AD3
JTAG_TCK SATA5RXN
SATA5RXP AD1
RS8 33 5% HDA_BITCLK JTAG_TMS K3 AB3
{39} AUD_BITCLK JTAG_TMS SATA5TXN
SATA5TXP AB1
JTAG_TDI K1 JTAG_TDI

JTAG
RS9 33 5% HDA_SDOUT JTAG_TDO J2 AF16 +V1_05S +V3_3S


{39} AUD_SDOUT JTAG_TDO SATAICOMPO
JTAG_RST# J4 AF15 RS12 37.4 1%
JTAG_RST# SATAICOMPI
RS10 33 5% HDA_RESET#
{39} AUD_RESET#
RS14
SPI_SCK R423 15 5% SPI_SCK_R BA2 10K 5%
SPI_CLK
RS11 33 5% HDA_SYNC SPI_CS# R420 15 5% SPI_CS#_R AV3
{39} AUD_SYNC SPI_CS0# +V3_3S
Test Point_30mil 1 AY3 T3 SATA_LED# RS15 0 5%
TP102 SPI_CS1# SATALED# HDD_LED# {54}
RS13 33 5% HDA_SDIN0
{39} AUD_SDIN0


INT_SERIRQ RS17 10K 5%
SPI_MOSI R422 15 5% SPI_MOSI_R AY1 Y9 SATA0GP
SPI_MOSI SATA0GP / GPIO21 SATA0GP RS18 10K 5%
B B

SPI
SPI_MISO R421 15 5% SPI_MISO_R AV1 V1 SATA1GP
TBC SPI_MISO SATA1GP / GPIO19 SATA1GP RS19 10K 5%

Ibexpeak-M-HM55
PCH JTAG Disable
+V3_3AL +V3_3S
HM55
+V3_3AL


R818 0 5%R0603 VCC33_SPI
R819 0 5%R0603
ns
SPI ROM
RS20 RS21 RS22 RS23
200 5% 200 5% 200 5% 20K 5%
R419 R558
3.3K 5% 3.3K 5%
U19
8 1 SPI_CS#
HOLD# VCC CE# SPI_MISO
7 2


SPI_SCK 6 HOLD# SO FWH_WP#
SCK WP# 3
RS24 RS25 RS26 RS27 SPI_MOSI 5 4 R418 3.3K 5%
100 5% 100 5% 100 5% 10K 5% SI GND
SST25VF016B-50-4C-S2AF


JTAG_TMS
A A
JTAG_TDI

JTAG_TDO

JTAG_RST#
JTAG_TCK

RS31 深圳仁聚科技有限公司
51 5% Title
PCH (HDA,JTAG,SAT)

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 17 of 67


5 4 3 2 1
1 2 3 4 5 6 7 8

+V3_3S

US1B

BG30 B9 SMBALERT# +V3_3AL +V3_3S


{40} PCIE_RXN1 PERN1 SMBALERT# / GPIO11
LOM {40} PCIE_RXP1 BJ30 PERP1
CS7 0.1uF/10V,X5R PCIE_TXN1_C BF29 H14 PCH_SMB_CLK_3A
{40} PCIE_TXN1 PETN1 SMBCLK
CS8 0.1uF/10V,X5R PCIE_TXP1_C BH29
{40} PCIE_TXP1 PETP1 PCH_SMB_DAT_3A


SMBDATA C8
AW30 RS32 RS33 RS34 RS35
A {44} PCIE_RXN2 PERN2 A

G1
BA30 2.2K 5% 2.2K 5% 2.2K 5% 2.2K 5%
W_LAN {44} PCIE_RXP2
CS14 0.1uF/10V,X5R PCIE_TXN2_C BC30
PERP2
J14 SML0ALERT#
{44} PCIE_TXN2 PETN2 SML0ALERT# / GPIO60
CS9 0.1uF/10V,X5R PCIE_TXP2_C

G
{44} PCIE_TXP2 BD30 PETP2
C6 PCH_SMB0_CLK_3A PCH_SMB_CLK_3A D1 S1
SML0CLK PCH_SMB_CLK_3S {9,26,27,44,45}

G2

S
AU30

SMBus
{45} PCIE_RXN3 PERN3
AT30 G8 PCH_SMB0_DAT_3A QS1A
{45} PCIE_RXP3 PERP3 SML0DATA
CS10 0.1uF/10V,X5R PCIE_TXN3_C L2N7002DW1T1G

G
3G/3.G {45} PCIE_TXN3 AU32 PETN3
CS11 0.1uF/10V,X5R PCIE_TXP3_C AV32 PCH_SMB_DAT_3A D2 S2
{45} PCIE_TXP3 PETP3 PCH_SMB_DAT_3S {9,26,27,44,45}
M14 SML1ALERT#

S
SML1ALERT# / GPIO74


BA32 PERN4
BB32 E10 PCH_SMB1_CLK_3A
PERP4 SML1CLK / GPIO58 QS1B
BD32 PETN4
BE32 G12 PCH_SMB1_DAT_3A L2N7002DW1T1G
PETP4 SML1DATA / GPIO75

PCI-E*
BF33 PERN5
BH33 PERP5 CL_CLK1 T13

Controller
BG32 +V3_3AL
PETN5
BJ32 PETP5 CL_DATA1 T11

Link
BA34 PERN6 CL_RST1# T9 1 TP216 Test Point_30mil


AW34 RS36 RS37
PERP6 2.2K 5% 2.2K 5%
BC34 PETN6
BD34 PETP6
H1 PEG_CLK_REQ#
PEG_A_CLKRQ# / GPIO47
AT34 PERN7
AU34 PCH_SMB0_DAT_3A
PERP7
AU36 PETN7 CLKOUT_PEG_A_N AD43 CLK_PCH_PEG# RS40 0 5%
CLK_PCH_PEG#_R {28}
AV36 PETP7 CLKOUT_PEG_A_P AD45 CLK__PCH_PEG RS41 0 5%
CLK_PCH_PEG_R {28} (100MHz) PCH_SMB0_CLK_3A

B BG34 PERN8 CLKOUT_DMI_N AN4 CLK_PCH_EXP# {11} B

PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_PCH_EXP {11} (100MHz)


BG36 PETN8
BJ36 PETP8
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 CLK_PCH_DP# {11}
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 CLK_PCH_DP {11} (100MHz)
{40} CLK_PCH_PCIE_LAN# AK48 CLKOUT_PCIE0N
(100MHz) {40} CLK_PCH_PCIE_LAN AK47 CLKOUT_PCIE0P

From CLK BUFFER


CLKIN_DMI_N AW24 CLK_DMI_PCH# {9}
+V3_3AL RS42 10K 5% P9 BA24 (100MHz)
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_DMI_PCH {9}
{40} LAN_CLK_REQ#
AM43 AP3 +V3_3AL
{45} CLK_PCH_PCIE_3G# CLKOUT_PCIE1N CLKIN_BCLK_N CLK_CPU_BCLK# {9}


{45} CLK_PCH_PCIE_3G AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_CPU_BCLK {9} (133MHz)
+V3_3S RS43 10K 5% U4 PCIECLKRQ1# / GPIO18
{45} 3G_CLK_REQ# CLKIN_DOT_96N F18 CLK_DREFCLK# {9}
E18 (96MHz) RS46 RS47
CLKIN_DOT_96P CLK_DREFCLK {9}
AM47 2.2K 5% 2.2K 5%
{44} CLK_PCH_PCIE_WLAN# CLKOUT_PCIE2N
(100MHz) {44} CLK_PCH_PCIE_WLAN AM48 CLKOUT_PCIE2P
CLKIN_SATA_N / CKSSCD_N AH13 CLK_PCIE_SATA# {9}
+V3_3S RS48 10K 5% N4 AH12 (100MHz) PCH_SMB1_CLK_3A RS44 0 5%
PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_PCIE_SATA {9} EC_SMB2_CLK_3AL {37}
{44} WLAN_CLK_REQ#


AH42 CLKOUT_PCIE3N REFCLK14IN P41 CLK_REF_14M_PCH {9} (14.318MHz) PCH_SMB1_DAT_3A RS45 0 5%
AH41 CLKOUT_PCIE3P EC_SMB2_DAT_3AL {37}

+V3_3AL RS62 10K 5% A8 J42 (33MHz)


PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCI_FB {21}

C C
AM51 AH51 XTAL25_IN
CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT +V1_05S XTAL25_OUT
AM53 CLKOUT_PCIE4P XTAL25_OUT AH53

+V3_3AL RS50 10K 5% M9 AF38 XCLK_RCOMP 90.9 1% R820


PCIECLKRQ4# / GPIO26 XCLK_RCOMP RS51 1M 5%
YS3


R0402
AJ50 T45 CLK_48M_CARD_R
1 XTAL25_IN 3 4
CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 TP204 Test Point_30mil
AJ52 CLKOUT_PCIE5P
RS53 10K 5% H6 P43 CLKOUTLEX1 1 2 1
Clock Flex

+V3_3AL PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 TP119 Test Point_30mil


CS15 CS16
CLKOUTLEX2 1 RS56 25MHz
AK53 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T42 TP120 Test Point_30mil
AK51 0 5% 27pF/50V,NPO 27pF/50V,NPO
CLKOUT_PEG_B_P
+V3_3AL RS54 10K 5% P13 PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 N50 PCH_GPIO67 1 TP121 Test Point_30mil


ns
Ibexpeak-M-HM55

+V3_3AL

SMBALERT# RS58 10K 5%


SML0ALERT# RS59 10K 5%
SML1ALERT# RS60 10K 5%


+V3_3s
D ns ns D
RS151 10K 5% PCH_GPIO67 +V3_3AL RS61 1K 5% R0402 PEG_CLK_REQ# RS57 0 5%
GPU_CLK_REQ# {28}
RS119 10K 5%

3
Q29
2N7002
{59,65} VGA_CORE_PWROK
R175 0 5% 1 深圳仁聚科技有限公司
Title


PCH (PCI-E,SMBUS,CLK)

2
Size Document Number Rev
Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 18 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

US1C

FDI_RXN0 BA18 FDI_TXN0 {10}


DMI_RXN0 BC24 BH17
{10} DMI_RXN0 DMI0RXN FDI_RXN1 FDI_TXN1 {10}
DMI_RXN1 BJ22 BD16
{10} DMI_RXN1 DMI1RXN FDI_RXN2 FDI_TXN2 {10}
DMI_RXN2 AW20 BJ16 +V3_3S


{10} DMI_RXN2 DMI2RXN FDI_RXN3 FDI_TXN3 {10}
DMI_RXN3 BJ20 BA16
A {10} DMI_RXN3 DMI3RXN FDI_RXN4 FDI_TXN4 {10} A
FDI_RXN5 BE14 FDI_TXN5 {10}
DMI_RXP0 BD24 BA14
{10} DMI_RXP0 DMI0RXP FDI_RXN6 FDI_TXN6 {10}
DMI_RXP1 BG22 BC12
{10} DMI_RXP1 DMI1RXP FDI_RXN7 FDI_TXN7 {10}
DMI_RXP2 BA20 C240
{10} DMI_RXP2 DMI2RXP
DMI_RXP3 BG20 BB18
{10} DMI_RXP3 DMI3RXP FDI_RXP0 FDI_TXP0 {10} 0.1uF/16V,X7R
FDI_RXP1 BF17 FDI_TXP1 {10}
DMI_TXN0 BE22 BC16 U13
{10} DMI_TXN0 DMI0TXN FDI_RXP2 FDI_TXP2 {10}

5
DMI_TXN1


{10} DMI_TXN1 BF21 DMI1TXN FDI_RXP3 BG16 FDI_TXP3 {10}
DMI_TXN2 BD20 AW16 R440 0 5% 1 VCC
{10} DMI_TXN2 DMI2TXN FDI_RXP4 FDI_TXP4 {10} {37,67} SLP_S3#
DMI_TXN3 BE18 BD14 4 PCH_PWROK
{10} DMI_TXN3 DMI3TXN FDI_RXP5 FDI_TXP5 {10}
FDI_RXP6 BB14 FDI_TXP6 {10} {37,57} IMVP_PWRGD 2
DMI_TXP0 GND
{10} DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 {10}
DMI_TXP1 BH21
{10} DMI_TXP1

3
DMI_TXP2 DMI1TXP SN74AHC1G08DBV R438
{10} DMI_TXP2 BC20 DMI2TXP
+V1_05S DMI_TXP3 BD18 BJ14 10K 5%
{10} DMI_TXP3 DMI3TXP FDI_INT FDI_INT {10}

DMI
FDI

FDI_FSYNC0 BF13 FDI_FSYNC0 {10}
RS63 49.9 1% BH25 DMI_ZCOMP R439 0 5% ns
FDI_FSYNC1 BH13 FDI_FSYNC1 {10}
BF25 DMI_IRCOMP
FDI_LSYNC0 BJ12 FDI_LSYNC0 {10}

FDI_LSYNC1 BG14 FDI_LSYNC1 {10}


B B


+V3_3S

T6 J12 PM_CLKRUN# RS64 8.2K 5%


{11} DBR_RESET# SYS_RESET# WAKE# PCIE_WAKE# {40,44,45}
DBR_RESET# RS65 8.2K 5%
PCH_PWROK RS66 0 5% PCH_SYS_PWROK M6 Y1 PM_CLKRUN#


SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# {37}

System Power Management


RS67 0 5% PWROK B17 PWROK
+V3_3AL
RS68 0 5% MEPWROK K5 P8
MEPWROK SUS_STAT# / GPIO61 SUS_STAT# {38}
PCIE_WAKE# RS69 8.2K 5%
PM_RI# RS70 10K 5%
RS72 10K 5% A10 F3 T3 ICTP ns TEST EC_LOW_BAT# RS71 8.2K 5%


LAN_RST# SUSCLK / GPIO62 SUS_PWR_DN_ACK RS73 8.2K 5%
TP557 ICT_TP
EC_ACPRESENT RS74 10K 5%
D9 E4 T2 ICTP ns TEST EC_PWRBTN# RS75 10K 5% ns
{11} PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63
C C
RS131 0 5% C16 H7 SLP_S4#_R RS76 0 5%
{37} RSMRST# RSMRST# SLP_S4# SLP_S4# {37,67}

SUS_PWR_DN_ACK SLP_S3#_R RS77 0 5%


M1 SUS_PWR_ACK / GPIO30 SLP_S3# P12 SLP_S3# {37,67}

P5 K8 PM_SLP_M# 1
{37} EC_PWRBTN# PWRBTN# SLP_M# TP122 Test Point_30mil
RSMRST# RS78 10K 5%
EC_ACPRESENT P7 N2 PM_SLP_DSW# 1
ACPRESENT / GPIO31 TP23 TP123 Test Point_30mil
C1


EC_LOW_BAT# A6 BJ10
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC {11} 47pF/50V,NPO
C0402
PM_RI# F14 F6 PM_SLP_LAN# 1
RI# SLP_LAN# TP124 Test Point_30mil
TP560 ICT_TP
Ibexpeak-M-HM55


D D

深圳仁聚科技有限公司
Title
PCH (DMI,FDI,GPIO)


Size Document Number Rev
B C02 A

Date: Wednesday, May 05, 2010 Sheet 19 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

{48} PCH_LVDS_DDC_CLK
{48} PCH_LVDS_DDC_DATA


US1D
+V3_3S T48 BJ46
A {37,48} PCH_LVDS_BKLTEN L_BKLTEN SDVO_TVCLKINN A
{48} PCH_LVDS_VDDEN T47 L_VDD_EN SDVO_TVCLKINP BG46

{48} PCH_LVDS_BKLTCTL Y48 L_BKLTCTL SDVO_STALLN BJ48


SDVO_STALLP BG48
RS79 2.2K 5% PCH_LVDS_DDC_CLK AB48
RS83 2.2K 5% PCH_LVDS_DDC_DATA L_DDC_CLK
Y45 L_DDC_DATA SDVO_INTN BF45
BH45


RS84 10K 5% ULVDS_CTRL_CLK SDVO_INTP
AB46 L_CTRL_CLK
RS80 10K 5% ULVDS_CTRL_DATA V48 L_CTRL_DATA
RS81 2.37K 1% ULVDS_IBG AP39 T51
ULVDS_VBG LVD_IBG SDVO_CTRLCLK
Test Point_30mil
TP132 1 AP41 LVD_VBG SDVO_CTRLDATA T53

RS85 0 5% ULVDS_VREFH AT43


RS82 0 5% ULVDS_VREFL LVD_VREFH
AT42 LVD_VREFL DDPB_AUXN BG44
DDPB_AUXP BJ44
AU38


DDPB_HPD

LVDS
{48} PCH_LVDS_A_CLKN AV53 LVDSA_CLK#
{48} PCH_LVDS_A_CLKP AV51 LVDSA_CLK DDPB_0N BD42
DDPB_0P BC42
{48} PCH_LVDS_A_DN0 BB47 LVDSA_DATA#0 DDPB_1N BJ42

Digital Display Interface


{48} PCH_LVDS_A_DN1 BA52 LVDSA_DATA#1 DDPB_1P BG42
{48} PCH_LVDS_A_DN2 AY48 LVDSA_DATA#2 DDPB_2N BB40
{48} PCH_LVDS_A_DN3 AV47 LVDSA_DATA#3 DDPB_2P BA40
DDPB_3N AW38
{48} PCH_LVDS_A_DP0 BB48 LVDSA_DATA0 DDPB_3P BA38


{48} PCH_LVDS_A_DP1 BA50 LVDSA_DATA1
{48} PCH_LVDS_A_DP2 AY49 LVDSA_DATA2
{48} PCH_LVDS_A_DP3 AV48 Y49 DDPC_CTRLCLK 1
LVDSA_DATA3 DDPC_CTRLCLK TP145 Test Point_30mil
B AB49 DDPC_CTRLDATA 1 B
DDPC_CTRLDATA TP146 Test Point_30mil

{48} PCH_LVDS_B_CLKN AP48 LVDSB_CLK#


{48} PCH_LVDS_B_CLKP AP47 LVDSB_CLK DDPC_AUXN BE44
DDPC_AUXP BD44
{48} PCH_LVDS_B_DN0 AY53 LVDSB_DATA#0 DDPC_HPD AV40
{48} PCH_LVDS_B_DN1 AT49 LVDSB_DATA#1


{48} PCH_LVDS_B_DN2 AU52 LVDSB_DATA#2 DDPC_0N BE40
{48} PCH_LVDS_B_DN3 AT53 LVDSB_DATA#3 DDPC_0P BD40
DDPC_1N BF41
{48} PCH_LVDS_B_DP0 AY51 LVDSB_DATA0 DDPC_1P BH41
{48} PCH_LVDS_B_DP1 AT48 LVDSB_DATA1 DDPC_2N BD38
{48} PCH_LVDS_B_DP2 AU50 LVDSB_DATA2 DDPC_2P BC38
{48} PCH_LVDS_B_DP3 AT51 LVDSB_DATA3 DDPC_3N BB36
DDPC_3P BA36


{47} PCH_CRT_B AA52 CRT_BLUE DDPD_CTRLCLK U50 PCH_HDMI_DDC_CLK {49}
{47} PCH_CRT_G AB53 CRT_GREEN DDPD_CTRLDATA U52 PCH_HDMI_DDC_DATA {49}
{47} PCH_CRT_R AD53 CRT_RED

DDPD_AUXN BC46
{47} PCH_CRT_DDC_CLK V51 CRT_DDC_CLK DDPD_AUXP BD46
Discrete GPU: Not Install {47} PCH_CRT_DDC_DATA V53 CRT_DDC_DATA DDPD_HPD AT38 PCH_HDMID_HPD {49}
UMA: Install BJ40 UTMDS_TX2N
DDPD_0N UTMDS_TX2P
{47} PCH_CRT_HSYNC Y53 CRT_HSYNC DDPD_0P BG40


{47} PCH_CRT_VSYNC Y51 BJ38 UTMDS_TX1N
RS86 150 1% PCH_CRT_B CRT_VSYNC DDPD_1N UTMDS_TX1P
DDPD_1P BG38

CRT
BF37 UTMDS_TX0N Discrete GPU: Not Install
C
RS87 1K 1% UCRT_IREF DDPD_2N UTMDS_TX0P C
IGP_OP1 AD48 BH37
R0402 AB51
DAC_IREF DDPD_2P
BE36 UTMDS_CLKN UMA: Install
RS88 150 1% PCH_CRT_G CRT_IRTN DDPD_3N UTMDS_CLKP
DDPD_3P BD36

IGP_OP1 UTMDS_CLKP CS17 0.1uF/10V,X5R PCH_HDMID_CLK_P {49}


RS89 150 1% PCH_CRT_R Place resistor close to PCH Ibexpeak-M-HM55 UTMDS_CLKN CS18 IGP_OP1_HDMI
0.1uF/10V,X5R PCH_HDMID_CLK_N {49}


IGP_OP1 UTMDS_TX2P CS19 IGP_OP1_HDMI
0.1uF/10V,X5R PCH_HDMID_DATA2_P {49}
Place resistor close to GMCH UTMDS_TX2N CS20 IGP_OP1_HDMI
0.1uF/10V,X5R PCH_HDMID_DATA2_N {49}
UTMDS_TX1P CS21 IGP_OP1_HDMI
0.1uF/10V,X5R PCH_HDMID_DATA1_P {49}
UTMDS_TX1N CS22 IGP_OP1_HDMI
0.1uF/10V,X5R PCH_HDMID_DATA1_N {49}
UTMDS_TX0P CS23 IGP_OP1_HDMI
0.1uF/10V,X5R


PCH_HDMID_DATA0_P {49}
UTMDS_TX0N CS24 IGP_OP1_HDMI
0.1uF/10V,X5R PCH_HDMID_DATA0_N {49}

IGP_OP1_HDMI


D D

深圳仁聚科技有限公司
Title
PCH (LVDS,DDI)

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 20 of 67


1 2 3 4 5 6 7 8
5 4 3 2 1

US1E
H40 AD0 NV_CE#0 AY9
+V3_3S N34 BD1
RPS1 8.2K 5% AD1 NV_CE#1
C44 AD2 NV_CE#2 AP15
1 2 A38 BD8


AD3 NV_CE#3
3 4 INT_PIRQD# C36 AD4
5 6 PCI_IRDY# J34 AV9
PCI_STOP# AD5 NV_DQS0
D 7 8 A40 AD6 NV_DQS1 BG8 D
D45 AD7
R800 PCI_REQ#2 E36 AP7
8.2 KOHM AD8 NV_DQ0 / NV_IO0
H48 AD9 NV_DQ1 / NV_IO1 AP6
E40 AT6 +V3_3AL
ns C40
AD10 NV_DQ2 / NV_IO2
AT9
+V3_3S M48
AD11
AD12
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4 BB1 US3 and US4 co-layout


+V3_3S M45 AV6
AD13 NV_DQ5 / NV_IO5

5
RPS2 RPS3 F53 BB3 US3
PCI_REQ#3 PCI_DEVSEL# AD14 NV_DQ6 / NV_IO6 PLT_RST# VCC
1 2 1 2 M40 AD15 NV_DQ7 / NV_IO7 BA4 1
INT_PIRQF# PCI_PERR#

NVRAM
3 4 3 4 M43 AD16 NV_DQ8 / NV_IO8 BE4 4 BUF_PLT_RST# {37,38,40,44,45}
5 6 INT_PIRQB# 5 6 PCI_SERR# J36 BB6 2
PCI_REQ#0 PCI_LOCK# AD17 NV_DQ9 / NV_IO9 GND RS97
7 8 7 8 K48 AD18 NV_DQ10 / NV_IO10 BD6
F40 BB7 SN74AHC1G08DBV 100K 5%

3
8.2K 5% 8.2K 5% AD19 NV_DQ11 / NV_IO11 SOT23_5
C42 AD20 NV_DQ12 / NV_IO12 BC8
K46 AD21 NV_DQ13 / NV_IO13 BJ8
M51 BJ6


AD22 NV_DQ14 / NV_IO14
J52 AD23 NV_DQ15 / NV_IO15 BG6
K51 AD24
L34 BD3 +V3_3AL
AD25 NV_ALE
F42 AD26 NV_CLE AY6
+V3_3S +V3_3S J40
RPS4 RPS5 AD27
G46 AD28

1
5
INT_PIRQH# 1 2 1 2 INT_PIRQE# F44 AU2
PCI_TRDY# INT_PIRQA# AD29 NV_RCOMP US4
3 4 3 4 M47 AD30

PCI
PCI_FRAME# 5 6 5 6 INT_PIRQC# H36 AV7 PLT_RST# 2 4 BUF_PLT_RST#
AD31 NV_RB#


PCI_REQ#1 7 8 7 8 INT_PIRQG#
J50 C/BE0# NV_WR#0_RE# AY8
8.2K 5% 8.2K 5% G42 AY5

3
C +V3_3S Test Point_30mil C/BE1# NV_WR#1_RE# 74LVC1G17GW C
TP200 1 H47 C/BE2# ns
Test Point_30mil 1 G34 AV11
TP201 C/BE3# NV_WE#_CK0
10K 5% R795 PCH_GPIO53 BF5
INT_PIRQA# G38 NV_WE#_CK1
INT_PIRQB# H51 PIRQA#
INT_PIRQC# B37 PIRQB# USB_PN0
PIRQC# USBP0N H18 USB_PN0 {42}
INT_PIRQD# A44 J18 USB_PP0


PIRQD# USBP0P USB_PP0 {42}
A18 USB_PN1 USB IO PORTS
USBP1N USB_PN1 {39}
PCI_REQ#0 F51 C18 USB_PP1
REQ0# USBP1P USB_PP1 {39}
PCI_REQ#1 A46 N20 USB_PN2
REQ1# / GPIO50 USBP2N USB_PN2 {42}
PCI_REQ#2 B45 P20 USB_PP2
REQ2# / GPIO52 USBP2P USB_PP2 {42}
PCI_REQ#3 M53 J20 USB_PN3
REQ3# / GPIO54 USBP3N USB_PN3 {44}
L20 USB_PP3 MINI USB FOR CARD
USBP3P USB_PP3 {44}
PCI_GNT#0 F48 F20 USB_PN4
GNT0# USBP4N USB_PN4 {45}
PCI_GNT#1 K45 G20 USB_PP4
GNT1# / GPIO51 USBP4P USB_PP4 {45}
PCH_GPIO53 F36 A20
PCI_GNT#3 GNT2# / GPIO53 USBP5N CAM_USB_PN7


H53 GNT3# / GPIO55 USBP5P C20 CAM_USB_PP7 EXP USB
USBP6N M22
INT_PIRQE# B41 N22 card reader USB
INT_PIRQF# PIRQE# / GPIO2 USBP6P
K53 PIRQF# / GPIO3 USBP7N B21
INT_PIRQG# A36 D21 Carmera USB
INT_PIRQH# PIRQG# / GPIO4 USBP7P
A48 PIRQH# / GPIO5 USBP8N H22 INT_USB_PN8 {42}
USBP8P J22 INT_USB_PP8 {42}

USB
K6 PCIRST# USBP9N E22 INT_USB_PN9 {42} INT_ USB
USBP9P F22 INT_USB_PP9 {42}
PCI_SERR# E44 A22 FP_USB_PN9 {51}


PCI_PERR# SERR# USBP10N
E50 PERR# USBP10P C22 FP_USB_PP9 {51} finger point_ USB
USBP11N G24
USBP11P H24
B PCI_GNT#3 PCI_GNT#1 PCI_GNT#0 PCI_IRDY# USB_PN6 B
A42 IRDY# USBP12N L24 USB_PN6 {43}
1 PCI_PAR H44 M24 USB_PP6
TP206 PAR USBP12P USB_PP6 {43}
Test Point_30mil PCI_DEVSEL# F46 A24
RS90 RS91 RS92 PCI_FRAME# DEVSEL# USBP13N 0416 change for USB eye diagram test
C46 FRAME# USBP13P C24
4.7K 5% 1K 5% 1K 5%
PCI_LOCK# D49 PLOCK# USBRBIAS RS94 20.5 1% R0402
ns ns ns


USBRBIAS# B25
PCI_STOP# D41
PCI_TRDY# STOP#
C48 TRDY# USBRBIAS D25

Test Point_30mil 1 PCI_PME# M7


TP207 PME#
OC0# / GPIO59 N16 USB_OC#0 0 5% R176
USB_OC#0_1 {42}
{11,28} PLT_RST# D5 PLTRST# OC1# / GPIO40 J16 USB_OC#1 0 5% R177
OC2# / GPIO41 F16
RS146 33 5% CLK_PCI_debug_R N52 L16
{37} CLK_PCI_DEBUG CLKOUT_PCI0 OC3# / GPIO42
RS137 33 5% CLK_PCI_TCM_R P53 E14
{38} CLK_PCI_TCM CLKOUT_PCI1 OC4# / GPIO43


RS95 33 5% CLK_PCI_KBC_R P46 G16
{37} CLK_PCI_KBC CLKOUT_PCI2 OC5# / GPIO9 +V3_3AL
TP208 1 P51 CLKOUT_PCI3 OC6# / GPIO10 F12
RS96 22 5% R0402 CLK_PCI_FB_R P48 T15 USB_OC#X R790 10K 5%
{18} CLK_PCI_FB CLKOUT_PCI4 OC7# / GPIO14

Ibexpeak-M-HM55


A A
PLT_RST#

RS93
100K 5%
深圳仁聚科技有限公司
Title
PCH (PCI,USB,NVRAM)

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 21 of 67

5 4 3 2 1
1 2 3 4 5 6 7 8

+V3_3AL
1K 5%
RS98 ns PCH_GPIO15

RS99 10K 5% EXT_SMI#


RS100 10K 5% GPIO12
RS101 10K 5% GPIO24


RS102 10K 5% PCIECLKRQ6#
RS103 10K 5% PCIECLKRQ7# GPIO check with EC( pull low/high/ voltage )
A RS104 10K 5% GPIO57 A
RS105 10K 5% PCH_GPIO28
US1F

GPIO0 Y3 AH45 1 Test Point_30mil


BMBUSY# / GPIO0 CLKOUT_PCIE6N TP209
CLKOUT_PCIE6P AH46 1 TP210 Test Point_30mil


GPIO1 C38 TACH1 / GPIO1
ID_LPC_PCI# D37 TACH2 / GPIO6
CLKOUT_PCIE7N AF48 1 TP211 Test Point_30mil

MISC
DVT Ask EC if we need to change GPIO pin. {37} RUN_SCI# J32 TACH3 / GPIO7 CLKOUT_PCIE7P AF47 1 TP212 Test Point_30mil

+V3_3S
GPIO8 can't be low. {37} EXT_SMI# F10 GPIO8
GPIO12 K9 U2
LAN_PHY_PWR_CTRL / GPIO12 A20GATE H_A20GATE {37}
RS106 10K 5% GPIO0


RS107 10K 5% GPIO1 PCH_GPIO15 T7
RS108 10K 5% ID_LPC_PCI# GPIO15
RS109 10K 5% STP_PCI# GPIO16 AA2 AM3
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_PCH_CPU_CLK# {11} +V1_05S
RS110 10K 5% GPIO17
RS111 10K 5% GPIO22 GPIO17 F38 AM1
TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_PCH_CPU_CLK {11}
RS112 10K 5% GPIO37
RS113 10K 5% GPIO16 GPIO22 Y7 BG10
SCLOCK / GPIO22 PECI H_PECI {11}

GPIO
RS114 10K 5% GPIO36 RS115
GPIO24 H10 T1 56 5%thermal/ procesor hot


MEM_LED / GPIO24 RCIN# KBRST# {37}

B RS116 10K 5% GPIO35 GPIO27 AB12 BE10 B


GPIO27 PROCPWRGD H_CPUPWRGD {11}

CPU
PCH_GPIO28 V13 BD10 PCH_THRMTRIP# RS117 56 5%
GPIO28 THRMTRIP# PM_THRMTRIP# {11,66}
RS118 1K 5% ns GPIO27
STP_PCI# M11 STP_PCI# / GPIO34
GPIO35 V6 SATACLKREQ# / GPIO35


{59} PCH_dGPU_PWR_ON R19 0 5% GPIO36 AB7 BA221
SATA2GP / GPIO36 TP1 TP213 Test Point_30mil
OP1 GPIO37 AB13 AW221
SATA3GP / GPIO37 TP2 TP214 Test Point_30mil
PCH_GPIO38 V3 BB22
SLOAD / GPIO38 TP3
{28} PCH_PEX_RST# R20 0 5% GPIO16 PCH_GPIO39 P3 AY45
SDATAOUT0 / GPIO39 TP4
PCIECLKRQ6# H3 AY46


R21 0 5% GPIO37 PCIECLKRQ6# / GPIO45 TP5
{40} DSMCTRL
PCIECLKRQ7# F1 AV43
+V3_3S PCIECLKRQ7# / GPIO46 TP6
ns PCH_GPIO48 AB6 SDATAOUT1 / GPIO48 TP7 AV45
10K 5% GPIO49 AA4 AF13
RS120 PCH_GPIO38 SATA5GP / GPIO49 TP8
10K 5% GPIO57 F8 M18
RS121 PCH_GPIO39 GPIO57 TP9


10K 5% N18
RS150 PCH_GPIO48 TP10
C C
RS122 GPIO49 A4 AJ24
10K 5% VSS_NCTF_1 TP11
A49

NCTF
VSS_NCTF_2

RSVD
A5 VSS_NCTF_3 TP12 AK41
A50 VSS_NCTF_4
A52 VSS_NCTF_5 TP13 AK42
A53 VSS_NCTF_6
B2 VSS_NCTF_7 TP14 M32


B4 VSS_NCTF_8
B52 VSS_NCTF_9 TP15 N32 1 TP221 Test Point_30mil
B53 VSS_NCTF_10
BE1 VSS_NCTF_11 TP16 M30
BE53 VSS_NCTF_12
BF1 VSS_NCTF_13 TP17 N30
BF53 VSS_NCTF_14
BH1 VSS_NCTF_15 TP18 H12
BH2 VSS_NCTF_16


BH52 VSS_NCTF_17 TP19 AA23
BH53 VSS_NCTF_18
BJ1 VSS_NCTF_19 NC_1 AB45
BJ2 VSS_NCTF_20
BJ4 VSS_NCTF_21 NC_2 AB38
BJ49 VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
BJ50 VSS_NCTF_24
BJ52 VSS_NCTF_25 NC_4 AB411 TP237 Test Point_30mil
BJ53


VSS_NCTF_26
D D1 VSS_NCTF_27 NC_5 T39 1 TP238 Test Point_30mil D
D2 VSS_NCTF_28
D53 VSS_NCTF_29
E1 VSS_NCTF_30 INIT3_3V# P6 1 TP239 Test Point_30mil
E53 VSS_NCTF_31
TP24 C10 深圳仁聚科技有限公司
Title
Ibexpeak-M-HM55 PCH (GPIO,VSS_NCTF,RSVD)

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 22 of 67

1 2 3 4 5 6 7 8
5 4 3 2 1

+V1_05S +VCCACLK
LS1 +V1_05S +VCCADPLLA

0 5%
10uH/100mA CS25 CS26 CS27 US1J POWER +V1_05S RS123 ns
0805 33pF_NPO_50V 4.7uF_X5R_6.3V 1uF/6.3V,X5R
NI ns 0402 0603 0402 AP51 V24 LS2
NI ns NI ns VCCACLK[1] VCCIO[5]
ns VCCIO[6] V26
AP53 Y24 CS28 CS29 CS31
VCCACLK[2] VCCIO[7] 1uF/6.3V,X5R 1uF/6.3V,X5R RS124
Y26 10uH/100mA


VCCIO[8] 0402 33pF/50V,NPO 0402
0805 0 5%
AF23 V28 I I I
VCCLAN[1] VCCSUS3_3[1]
D
VCCSUS3_3[2] U28 D
AF24 U26 ns
VCCLAN[2] VCCSUS3_3[3]
VCCSUS3_3[4] U24

Y20
VCCSUS3_3[5] P28
P26
163mA +VCCADPLLB
DCPSUSBYP VCCSUS3_3[6] +V3_3AL 0 5%
VCCSUS3_3[7] N28
N26 RS125 ns
TP_PCH_VCCDSW VCCSUS3_3[8]
AD38 M28


VCCME[1] VCCSUS3_3[9]
VCCSUS3_3[10] M26 LS3
AD39 L28

USB
VCCME[2] VCCSUS3_3[11] CS33
CS32 L26 CS39 CS35
VCCSUS3_3[12] 33pF/50V,NPO 1uF/6.3V,X5R RS126
0.1uF/10V,X5R AD41 VCCME[3] VCCSUS3_3[13] J28 0.1uF/10V,X5R 10uH/100mA
J26 0805 0402 0 5%
+V1_05S VCCSUS3_3[14] I
AF43 VCCME[4] VCCSUS3_3[15] H28 I
0 5% +VCCME H26
RS127 VCCSUS3_3[16] ns
AF41 VCCME[5] VCCSUS3_3[17] G28
G26 +V3_3AL +V3_3AL
CS36 CS37 CS38 VCCSUS3_3[18]
AF42 F28


1uF/6.3V,X5R VCCME[6] VCCSUS3_3[19]
VCCSUS3_3[20] F26
0402 V39 E28 Power-UP Requirement:
10uF/6.3V,X5R 10uF/6.3V,X5R I VCCME[7] VCCSUS3_3[21] DS2 VCC5REF_SUS must be

Clock and Miscellaneous

1
VCCSUS3_3[22] E26
V41 C28 CS40 LBAT54HT1G powered up before
VCCME[8] VCCSUS3_3[23] VCCSUS3_3 or after
VCCSUS3_3[24] C26 0.1uF/10V,X5R
RS128 VCCSUS3_3 within 0.7 V.
V42 VCCME[9] VCCSUS3_3[25] B27
VCCSUS3_3[26] A28 +V5AL
CS41 Power-Down Requirement:
Y39 VCCME[10] VCCSUS3_3[27] A26 V5REF_SUS must be powered down
1uF/6.3V,X5R +V1_05S CS42 100 5%
after VCCSUS3_3 or before
0402 1uF/6.3V,X5R


Y41 VCCME[11] VCCSUS3_3[28] U23 VCCSUS3_3 within 0.7 V.
I 0402
C Y42 V23 I +V3_3S C
VCCME[12] VCCIO[56]

V5REF_SUS F24

DCRTC DS3

1
V9 DCPRTC
LBAT54HT1G Power-UP Requirement:
+VCCVRM RS129 V5REF must be
CS43 K49 powered up before
V5REF +V5S VCC3_3 or after


0.1uF/10V,X5R AU24

PCI/GPIO/LPC
+VCCADPLLA VCCVRM[3] CS44 100 5% VCC3_3 within 0.7 V.
1uF/6.3V,X5R
BB51
VCC3_3[8] J38 357mA 0402 Power-Down Requirement:
VCCADPLLA[1] +V3_3S I V5REF must be powered down
BB53 VCCADPLLA[2] VCC3_3[9] L38 after VCC3_3 or before
+VCCADPLLB
VCC3_3 within 0.7 V.
VCC3_3[10] M36
BD51 +V3_3S
VCCADPLLB[1] CS46
BD53 VCCADPLLB[2] VCC3_3[11] N36
CS45 1uF/6.3V,X5R


CS47 AH23 P36 0.1uF/10V,X5R 0402
+V1_05S 1uF/6.3V,X5R CS48 VCCIO[21] VCC3_3[12] I
AJ35 VCCIO[22] CS50
0402 1uF/6.3V,X5R AH35 U35 CS49
I 0402 VCCIO[23] VCC3_3[13] 33pF/50V,NPO
0.1uF/10V,X5R
0 5% I AF34
RS130 VCCIO[2]
VCC3_3[14] AD13
CS51 CS52 AH34 +V1_05S
1uF/6.3V,X5R 1uF/6.3V,X5R VCCIO[3]
0402 0402 AF32 LS4
I I VCCIO[4] +VCCSATAPLL
VCCSATAPLL[1] AK3 ns


V12 DCPSST VCCSATAPLL[2] AK1
B CS53 CS54 B
10uH/100mA
4.7uF_X5R_6.3V 1uF/6.3V,X5R +V1_05S
0805
0603 ns 0402 NI
CS55 Y22 ns NI
DCPSUS 57mA
0.1uF/10V,X5R VCCIO[9] AH22

CS56 +VCCVRM CS57


0.1uF/10V,X5R P18 AT20
196mA 1uF/6.3V,X5R
VCCSUS3_3[29] VCCVRM[4] 0402


+V3_3AL U19 I
SATA

VCCSUS3_3[30]
PCI/GPIO/LPC

VCCIO[10] AH19
U20 VCCSUS3_3[31]
VCCIO[11] AD20
U22 VCCSUS3_3[32]
CS58 AF22
+V3_3S VCCIO[12]
0.1uF/10V,X5R
VCCIO[13] AD19
V15 VCC3_3[5] VCCIO[14] AF20
AF19


VCCIO[15]
V16 VCC3_3[6] VCCIO[16] AH20
CS59
0.1uF/10V,X5R Y16 VCC3_3[7] VCCIO[17] AB19
VCCIO[18] AB20
+V1_05S AB22
VCCIO[19] +VCCME +V3_3AL
VCCIO[20] AD22
AT18 V_CPU_IO[1]
CS61 AA34
CPU

4.7uF/6.3V VCCME[13]
CS60 VCCME[14] Y34
0603 CS62 CS63 RS132 R817


A AU18 V_CPU_IO[2] VCCME[15] Y35 A
33pF/50V,NPO I 0.1uF/10V,X5R 0.1uF/10V,X5R AA35 0 5% 180 1%
VCCME[16] R0402 R0402
ns
RTC

A12 VCCRTC VCCSUSHDA L30


HDA

+VCC_RTC Reserve 1.5VAL


Ibexpeak-M-HM55
CS64
1uF/6.3V,X5R R816 深圳仁聚科技有限公司
0402 150 1% Title
CS67 CS68 I R0402 PCH (POWER) 1/2
0.1uF/10V,X5R 0.1uF/10V,X5R ns
Size Document Number Rev
Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 23 of 67


5 4 3 2 1
5 4 3 2 1

+VCCADAC +V3_3S

LBS1

CS69 CS71 180_2A


CS70 0603
0.01uF/16V,X7R 0.1uF/10V,X5R 10uF/6.3V,X5R I


RS133 0 5% ns
D
+V1_05S 1.5A D

US1G POWER
AB24 VCCCORE[1] VCCADAC[1] AE50
AB26 VCCCORE[2]
CS72 CS74 AB28 AE52 +VCCALVDS +V3_3S
CS73 VCCCORE[3] VCCADAC[2]


33pF/50V,NPO 1uF/6.3V,X5R AD26
10uF/6.3V,X5R VCCCORE[4]

CRT
0402 AD28 AF53 RS134 0 5%
I VCCCORE[5] VSSA_DAC[1]
AF26 VCCCORE[6]

VCC CORE
AF28 VCCCORE[7] VSSA_DAC[2] AF51
AF30 VCCCORE[8]
AF31 RS135
VCCCORE[9]
AH26 VCCCORE[10] 0 5%
AH28 VCCCORE[11]
AH30 VCCCORE[12]
AH31 AH38 ns


VCCCORE[13] VCCALVDS +V1_8S
AJ30 VCCCORE[14]
AJ31 VCCCORE[15] VSSA_LVDS AH39
+V1_05S
LS5
AP43 +VCCTX_LVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2] AP45
AT46 90nH/1.5A

LVDS
VCCTX_LVDS[3] CS75 CS76 CS77
AK24 VCCIO[24] VCCTX_LVDS[4] AT45 0805
+V1_05S +VCCAPLLEXP 0.01uF/16V,X7R 0.01uF/16V,X7R 10uF/6.3V,X5R RS136 I


LS6 0 5%
BJ24 VCCAPLLEXP
VCC3_3[2] AB34
C 1uH/220mA CS78 ns C
0805 4.7uF_X5R_6.3V AN20 AB35 +V3_3S
NI ns 0603 VCCIO[25] VCC3_3[3]
AN22

HVCMOS
VCCIO[26]
ns AN23 VCCIO[27] VCC3_3[4] AD35
AN24 VCCIO[28]
AN26 VCCIO[29] CS80
AN28 CS79


+V1_05S VCCIO[30] 33pF/50V,NPO
BJ26 VCCIO[31] 0.1uF/10V,X5R
BJ28 VCCIO[32]
3A AT26
AT28
VCCIO[33]
VCCIO[34]
AU26 VCCIO[35]
CS82 CS83 AU28 +VCCVRM
CS81 VCCIO[36]
1uF/6.3V,X5R 1uF/6.3V,X5R AV26
10uF/6.3V,X5R 0402 0402 VCCIO[37]
AV28 VCCIO[38] VCCVRM[2] AT24
I I AW26 +VCCDMI +V1_05S
VCCIO[39]


AW28 VCCIO[40]

DMI
BA26 AT16 RS138 0 5%
VCCIO[41] VCCDMI[1]
BA28 VCCIO[42]
BB26 AU16 CS84 +VCCVRM
VCCIO[43] VCCDMI[2] CS85 +V1_8S
BB28 1uF/6.3V,X5R
VCCIO[44] 0402 33pF/50V,NPO
BC26 VCCIO[45]

PCI E*
BC28 I RS141 0 5%
VCCIO[46]
BD26 VCCIO[47]
BD28 VCCIO[48]
BE26 AM16 +V3_3S


VCCIO[49] VCCPNAND[1]
BE28 VCCIO[50] VCCPNAND[2] AK16
BG26 AK20 0 OHM R0402
VCCIO[51] VCCPNAND[3] RS142
B
BG28 VCCIO[52] VCCPNAND[4] AK19 ns B
BH27 VCCIO[53] VCCPNAND[5] AK15
AK13 +VCCPNAND +V1_8S
VCCPNAND[6]
AN30 VCCIO[54] VCCPNAND[7] AM12
+VCCVRM +V3_3S
NAND / SPI
AN31 VCCIO[55] VCCPNAND[8] AM13
AM15 RS143 0 5%
VCCPNAND[9]


AN35 VCC3_3[1] CS87
TBC CS86
0.1uF/10V,X5R 33pF/50V,NPO
+V1_05S +VCCFDIPLL AT22 VCCVRM[1] +VCCME3_3 +V3_3AL
LS7 1uH/50mA 0805 NI
BJ18 VCCFDIPLL VCCME3_3[1] AM8
AM9 0 5% +V3_3S
+V1_05S VCCME3_3[2]
FDI

CS88 AM23 AP11 RS144 ns


4.7uF_X5R_6.3V VCCIO[1] VCCME3_3[3] RS145
VCCME3_3[4] AP9
0603 0 5%
ns


ns
Ibexpeak-M-HM55
CS89
0.1uF/10V,X5R


A A

深圳仁聚科技有限公司
Title
PCH (POWER) 2/2

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 24 of 67


5 4 3 2 1
1 2 3 4 5 6 7 8

US1I US1H
AY7 VSS[159] VSS[259] H49 AB16 VSS[0]
B11 VSS[160] VSS[260] H5
B15 VSS[161] VSS[261] J24 AA19 VSS[1] VSS[80] AK30
B19 VSS[162] VSS[262] K11 AA20 VSS[2] VSS[81] AK31
B23 VSS[163] VSS[263] K43 AA22 VSS[3] VSS[82] AK32
B31 VSS[164] VSS[264] K47 AM19 VSS[4] VSS[83] AK34
B35 K7 AA24 AK35


VSS[165] VSS[265] VSS[5] VSS[84]
B39 VSS[166] VSS[266] L14 AA26 VSS[6] VSS[85] AK38
B43 VSS[167] VSS[267] L18 AA28 VSS[7] VSS[86] AK43
A B47 VSS[168] VSS[268] L2 AA30 VSS[8] VSS[87] AK46 A
B7 VSS[169] VSS[269] L22 AA31 VSS[9] VSS[88] AK49
BG12 VSS[170] VSS[270] L32 AA32 VSS[10] VSS[89] AK5
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 VSS[172] VSS[272] L40 AB15 VSS[12] VSS[91] AL2
BB20 VSS[173] VSS[273] L52 AB23 VSS[13] VSS[92] AL52
BB24 VSS[174] VSS[274] M12 AB30 VSS[14] VSS[93] AM11


BB30 VSS[175] VSS[275] M16 AB31 VSS[15] VSS[94] BB44
BB34 VSS[176] VSS[276] M20 AB32 VSS[16] VSS[95] AD24
BB38 VSS[177] VSS[277] N38 AB39 VSS[17] VSS[96] AM20
BB42 VSS[178] VSS[278] M34 AB43 VSS[18] VSS[97] AM22
BB49 VSS[179] VSS[279] M38 AB47 VSS[19] VSS[98] AM24
BB5 VSS[180] VSS[280] M42 AB5 VSS[20] VSS[99] AM26
BC10 VSS[181] VSS[281] M46 AB8 VSS[21] VSS[100] AM28
BC14 VSS[182] VSS[282] M49 AC2 VSS[22] VSS[101] BA42
BC18 VSS[183] VSS[283] M5 AC52 VSS[23] VSS[102] AM30
BC2 M8 AD11 AM31


VSS[184] VSS[284] VSS[24] VSS[103]
BC22 VSS[185] VSS[285] N24 AD12 VSS[25] VSS[104] AM32
BC32 VSS[186] VSS[286] P11 AD16 VSS[26] VSS[105] AM34
BC36 VSS[187] VSS[287] AD15 AD23 VSS[27] VSS[106] AM35
BC40 VSS[188] VSS[288] P22 AD30 VSS[28] VSS[107] AM38
BC44 VSS[189] VSS[289] P30 AD31 VSS[29] VSS[108] AM39
BC52 VSS[190] VSS[290] P32 AD32 VSS[30] VSS[109] AM42
BH9 VSS[191] VSS[291] P34 AD34 VSS[31] VSS[110] AU20
BD48 VSS[192] VSS[292] P42 AU22 VSS[32] VSS[111] AM46
BD49 VSS[193] VSS[293] P45 AD42 VSS[33] VSS[112] AV22


BD5 VSS[194] VSS[294] P47 AD46 VSS[34] VSS[113] AM49
BE12 VSS[195] VSS[295] R2 AD49 VSS[35] VSS[114] AM7
B
BE16 VSS[196] VSS[296] R52 AD7 VSS[36] VSS[115] AA50 B
BE20 VSS[197] VSS[297] T12 AE2 VSS[37] VSS[116] BB10
BE24 VSS[198] VSS[298] T41 AE4 VSS[38] VSS[117] AN32
BE30 VSS[199] VSS[299] T46 AF12 VSS[39] VSS[118] AN50
BE34 VSS[200] VSS[300] T49 Y13 VSS[40] VSS[119] AN52
BE38 VSS[201] VSS[301] T5 AH49 VSS[41] VSS[120] AP12
BE42 VSS[202] VSS[302] T8 AU4 VSS[42] VSS[121] AP42
BE46 U30 AF35 AP46


VSS[203] VSS[303] VSS[43] VSS[122]
BE48 VSS[204] VSS[304] U31 AP13 VSS[44] VSS[123] AP49
BE50 VSS[205] VSS[305] U32 AN34 VSS[45] VSS[124] AP5
BE6 VSS[206] VSS[306] U34 AF45 VSS[46] VSS[125] AP8
BE8 VSS[207] VSS[307] P38 AF46 VSS[47] VSS[126] AR2
BF3 VSS[208] VSS[308] V11 AF49 VSS[48] VSS[127] AR52
BF49 VSS[209] VSS[309] P16 AF5 VSS[49] VSS[128] AT11
BF51 VSS[210] VSS[310] V19 AF8 VSS[50] VSS[129] BA12
BG18 VSS[211] VSS[311] V20 AG2 VSS[51] VSS[130] AH48
BG24 VSS[212] VSS[312] V22 AG52 VSS[52] VSS[131] AT32


BG4 VSS[213] VSS[313] V30 AH11 VSS[53] VSS[132] AT36
BG50 VSS[214] VSS[314] V31 AH15 VSS[54] VSS[133] AT41
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47
BH15 VSS[216] VSS[316] V34 AH24 VSS[56] VSS[135] AT7
BH19 VSS[217] VSS[317] V35 AH32 VSS[57] VSS[136] AV12
BH23 VSS[218] VSS[318] V38 AV18 VSS[58] VSS[137] AV16
BH31 VSS[219] VSS[319] V43 AH43 VSS[59] VSS[138] AV20
BH35 VSS[220] VSS[320] V45 AH47 VSS[60] VSS[139] AV24
BH39 VSS[221] VSS[321] V46 AH7 VSS[61] VSS[140] AV30
BH43 V47 AJ19 AV34


VSS[222] VSS[322] VSS[62] VSS[141]
BH47 VSS[223] VSS[323] V49 AJ2 VSS[63] VSS[142] AV38
BH7 VSS[224] VSS[324] V5 AJ20 VSS[64] VSS[143] AV42
C C12 VSS[225] VSS[325] V7 AJ22 VSS[65] VSS[144] AV46 C
C50 VSS[226] VSS[326] V8 AJ23 VSS[66] VSS[145] AV49
D51 VSS[227] VSS[327] W2 AJ26 VSS[67] VSS[146] AV5
E12 VSS[228] VSS[328] W52 AJ28 VSS[68] VSS[147] AV8
E16 VSS[229] VSS[329] Y11 AJ32 VSS[69] VSS[148] AW14
E20 VSS[230] VSS[330] Y12 AJ34 VSS[70] VSS[149] AW18
E24 VSS[231] VSS[331] Y15 AT5 VSS[71] VSS[150] AW2


E30 VSS[232] VSS[332] Y19 AJ4 VSS[72] VSS[151] BF9
E34 VSS[233] VSS[333] Y23 AK12 VSS[73] VSS[152] AW32
E38 VSS[234] VSS[334] Y28 AM41 VSS[74] VSS[153] AW36
E42 VSS[235] VSS[335] Y30 AN19 VSS[75] VSS[154] AW40
E46 VSS[236] VSS[336] Y31 AK26 VSS[76] VSS[155] AW52
E48 VSS[237] VSS[337] Y32 AK22 VSS[77] VSS[156] AY11
E6 VSS[238] VSS[338] Y38 AK23 VSS[78] VSS[157] AY43
E8 VSS[239] VSS[339] Y43 AK28 VSS[79] VSS[158] AY47
F49 VSS[240] VSS[340] Y46
F5 P49 Ibexpeak-M-HM55
VSS[241] VSS[341]


G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 AT12


VSS[251] VSS[351]
AF39 VSS[252] VSS[352] AM6
D
H16 VSS[253] VSS[353] AT13 D
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
深圳仁聚科技有限公司
Title
PCH (VSS)
Ibexpeak-M-HM55
Size Document Number Rev
Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 25 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+V1_5SM

SLOT1B


75 VDD1 VSS16 44
76 VDD2 VSS17 48
A {12} SDDR_A_A[0..15] SLOT1A SDDR_A_DQ[0..63] {12} 81 VDD3 VSS18 49 A
82 VDD4 VSS19 54
SDDR_A_A0 98 5 SDDR_A_DQ0 87 55
SDDR_A_A1 97 A0 DQ0 SDDR_A_DQ1 VDD5 VSS20
A1 DQ1 7 88 VDD6 VSS21 60
SDDR_A_A2 96 15 SDDR_A_DQ2 93 61
SDDR_A_A3 95 A2 DQ2 SDDR_A_DQ3 VDD7 VSS22
A3 DQ3 17 94 VDD8 VSS23 65
SDDR_A_A4 92 4 SDDR_A_DQ4 99 66
A4 DQ4 VDD9 VSS24


SDDR_A_A5 91 6 SDDR_A_DQ5 100 71
SDDR_A_A6 90 A5 DQ5 SDDR_A_DQ6 VDD10 VSS25
A6 DQ6 16 105 VDD11 VSS26 72
SDDR_A_A7 86 18 SDDR_A_DQ7 106 127
SDDR_A_A8 89 A7 DQ7 SDDR_A_DQ8 +V3_3S VDD12 VSS27
A8 DQ8 21 111 VDD13 VSS28 128
SDDR_A_A9 85 23 SDDR_A_DQ9 112 133
SDDR_A_A10 107 A9 DQ9 SDDR_A_DQ10 VDD14 VSS29
A10/AP DQ10 33 117 VDD15 VSS30 134
SDDR_A_A11 84 35 SDDR_A_DQ11 118 138
SDDR_A_A12 83 A11 DQ11 SDDR_A_DQ12 CM1 VDD16 VSS31
A12/BC# DQ12 22 CM2 123 VDD17 VSS32 139
SDDR_A_A13 119 24 SDDR_A_DQ13 2.2uF/10V,X5R 124 144
SDDR_A_A14 80 A13 DQ13 SDDR_A_DQ14 0603 0.1uF/16V,X7R VDD18 VSS33
34 145


SDDR_A_A15 78 A14 DQ14 SDDR_A_DQ15 I VSS34
SMBus Address: A0H(W)/A1H(R) A15 DQ15 36
SDDR_A_DQ16
199 VDDSPD VSS35 150
DQ16 39 VSS36 151
109 41 SDDR_A_DQ17 77 155
{12} SDDR_A_BS0 BA0 DQ17 NC1 VSS37
108 51 SDDR_A_DQ18 122 156
{12} SDDR_A_BS1 BA1 DQ18 NC2 VSS38
79 53 SDDR_A_DQ19 125 161
{12} SDDR_A_BS2 BA2 DQ19 NCTEST VSS39
114 40 SDDR_A_DQ20 162
{12} SDDR_A_CS#0 S0# DQ20 VSS40
121 42 SDDR_A_DQ21 198 167
{12} SDDR_A_CS#1 S1# DQ21 {11,27} PM_EXTTS#1 EVENT# VSS41
101 50 SDDR_A_DQ22 30 168
{12} SDDR_A_CLK_DDR0 CK0 DQ22 {11,27} DDR3_DRAMRST# RESET# VSS42
103 52 SDDR_A_DQ23 172
{12} SDDR_A_CLK_DDR#0 CK0# DQ23 VSS43


102 57 SDDR_A_DQ24 173
{12} SDDR_A_CLK_DDR1 CK1 DQ24 VSS44
104 59 SDDR_A_DQ25 DIMM_DQ_VREF_A 1 178
{12} SDDR_A_CLK_DDR#1 CK1# DQ25 VREF_DQ VSS45
73 67 SDDR_A_DQ26 DIMM_CA_VREF_A 126 179
{12} SDDR_A_CKE0 CKE0 DQ26 VREF_CA VSS46
B 74 69 SDDR_A_DQ27 184 B
{12} SDDR_A_CKE1 CKE1 DQ27 VSS47
115 56 SDDR_A_DQ28 185
{12} SDDR_A_CAS# CAS# DQ28 VSS48
110 58 SDDR_A_DQ29 2 189
{12} SDDR_A_RAS# RAS# DQ29 VSS1 VSS49
113 68 SDDR_A_DQ30 3 190
{12} SDDR_A_WE# WE# DQ30 VSS2 VSS50
RM1 10K 5% SA0_DIM0 197 70 SDDR_A_DQ31 8 195
RM2 10K 5% SA1_DIM0 201 SA0 DQ31 SDDR_A_DQ32 VSS3 VSS51
SA1 DQ32 129 9 VSS4 VSS52 196
202 131 SDDR_A_DQ33 13


{9,18,27,44,45} PCH_SMB_CLK_3S SCL DQ33 VSS5
200 141 SDDR_A_DQ34 14 207
{9,18,27,44,45} PCH_SMB_DAT_3S SDA DQ34 VSS6 NPTH1 +VTT_DDR
143 SDDR_A_DQ35 19 208
DQ35 SDDR_A_DQ36 VSS7 NPTH2
{12} SDDR_A_ODT0 116 ODT0 DQ36 130 20 VSS8
120 132 SDDR_A_DQ37 25
{12} SDDR_A_ODT1 ODT1 DQ37 VSS9
140 SDDR_A_DQ38 26 203 Place these Caps near So-DIMM0
{12} SDDR_A_DM[0..7] DQ38 VSS10 VTT1
SDDR_A_DM0 11 142 SDDR_A_DQ39 31 204
SDDR_A_DM1 DM0 DQ39 SDDR_A_DQ40 VSS11 VTT2
28 DM1 DQ40 147 32 VSS12
SDDR_A_DM2 46 149 SDDR_A_DQ41 37 205
SDDR_A_DM3 DM2 DQ41 SDDR_A_DQ42 VSS13 G1
63 DM3 DQ42 157 38 VSS14 G2 206
SDDR_A_DM4 SDDR_A_DQ43


136 DM4 DQ43 159 43 VSS15
SDDR_A_DM5 153 146 SDDR_A_DQ44
SDDR_A_DM6 DM5 DQ44 SDDR_A_DQ45 AS0A621-U4SK-7H +VTT_DDR
170 DM6 DQ45 148
SDDR_A_DM7 187 158 SDDR_A_DQ46
{12} SDDR_A_DQS[0..7] DM7 DQ46
160 SDDR_A_DQ47
SDDR_A_DQS0 DQ47 SDDR_A_DQ48
12 DQS0 DQ48 163
SDDR_A_DQS1 29 165 SDDR_A_DQ49
SDDR_A_DQS2 DQS1 DQ49 SDDR_A_DQ50 CM6 CM7 CX80
47 DQS2 DQ50 175
SDDR_A_DQS3 64 177 SDDR_A_DQ51 CM4 CM5 1uF/6.3V,X5R 1uF/6.3V,X5R
SDDR_A_DQS4 DQS3 DQ51 SDDR_A_DQ52 0402 0402
137 164 0.1uF/10V,X5R


SDDR_A_DQS5 DQS4 DQ52 SDDR_A_DQ53 +V1_5SM 33pF/50V,NPO I I 10uF/6.3V,X5R
154 DQS5 DQ53 166
SDDR_A_DQS6 171 174 SDDR_A_DQ54
SDDR_A_DQS7 DQS6 DQ54 SDDR_A_DQ55
{12} SDDR_A_DQS#[0..7] 188 DQS7 DQ55 176
C SDDR_A_DQS#0 SDDR_A_DQ56 C
10 DQS#0 DQ56 181
SDDR_A_DQS#1 27 183 SDDR_A_DQ57
SDDR_A_DQS#2 DQS#1 DQ57 SDDR_A_DQ58 +V1_5SM
45 DQS#2 DQ58 191
SDDR_A_DQS#3 62 193 SDDR_A_DQ59 R1
SDDR_A_DQS#4 DQS#3 DQ59 SDDR_A_DQ60 1K 1%
135 DQS#4 DQ60 180
SDDR_A_DQS#5 152 182 SDDR_A_DQ61
SDDR_A_DQS#6 DQS#5 DQ61 SDDR_A_DQ62 C2 0 5%


169 DQS#6 DQ62 192
SDDR_A_DQS#7 186 194 SDDR_A_DQ63 0.1uF/10V,X5R DIMM_DQ_VREF_A_L R2 DIMM_DQ_VREF_A CX81 CX82 CX83
DQS#7 DQ63 0402
AS0A621-U4SK-7H CM9
R3 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R
1K 1% CM8 2.2uF/10V,X5R
DIMM_0 C0603
0.1uF/10V,X5R

+V1_5SM


+V1_5SM

CM10
CM11 CM12 CM13 CM14
33pF/50V,NPO 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R
For EMI Decouple R4
+V1_5SM 1K 1%


0 5%
C3 DIMM_CA_VREF_A_L R5 DIMM_CA_VREF_A
0.1uF/10V,X5R 0402
D D
CM16
R6
C16 C15 C14 C13 C12 1K 1% CM15 2.2uF/10V,X5R
C0603
0.1uF/10V,X5R 0.1uF/10V,X5R
0.1uF/10V,X5R0.1uF/10V,X5R 0.1uF/10V,X5R
0.1uF/10V,X5R 深圳仁聚科技有限公司
Title
DDR3 SO-DIMM_0

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 26 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

{12} SDDR_B_A[0..15] SLOT3A


SDDR_B_DQ[0..63] {12}
SDDR_B_A0 98 5 SDDR_B_DQ0
SDDR_B_A1 A0 DQ0 SDDR_B_DQ1
97 A1 DQ1 7
SDDR_B_A2 96 15 SDDR_B_DQ2
SDDR_B_A3 A2 DQ2 SDDR_B_DQ3
95 A3 DQ3 17
SDDR_B_A4 92 4 SDDR_B_DQ4 +V1_5SM


SDDR_B_A5 A4 DQ4 SDDR_B_DQ5
91 A5 DQ5 6 SLOT3B
SDDR_B_A6 90 16 SDDR_B_DQ6
SDDR_B_A7 A6 DQ6 SDDR_B_DQ7
A 86 A7 DQ7 18 75 VDD1 VSS16 44 A
SDDR_B_A8 89 21 SDDR_B_DQ8 76 48
SDDR_B_A9 A8 DQ8 SDDR_B_DQ9 VDD2 VSS17
85 A9 DQ9 23 81 VDD3 VSS18 49
SDDR_B_A10 107 33 SDDR_B_DQ10 82 54
SDDR_B_A11 A10/AP DQ10 SDDR_B_DQ11 VDD4 VSS19
84 A11 DQ11 35 87 VDD5 VSS20 55
SDDR_B_A12 83 22 SDDR_B_DQ12 88 60
SDDR_B_A13 A12/BC# DQ12 SDDR_B_DQ13 VDD6 VSS21
119 A13 DQ13 24 93 VDD7 VSS22 61


SDDR_B_A14 80 34 SDDR_B_DQ14 94 65
SDDR_B_A15 A14 DQ14 SDDR_B_DQ15 VDD8 VSS23
78 A15 DQ15 36 99 VDD9 VSS24 66
39 SDDR_B_DQ16 100 71
DQ16 SDDR_B_DQ17 VDD10 VSS25
{12} SDDR_B_BS0 109 BA0 DQ17 41 105 VDD11 VSS26 72
108 51 SDDR_B_DQ18 +V3_3S 106 127
{12} SDDR_B_BS1 BA1 DQ18 VDD12 VSS27
79 53 SDDR_B_DQ19 111 128
{12} SDDR_B_BS2 BA2 DQ19 VDD13 VSS28
114 40 SDDR_B_DQ20 112 133
{12} SDDR_B_CS#0 S0# DQ20 VDD14 VSS29
121 42 SDDR_B_DQ21 117 134
{12} SDDR_B_CS#1 S1# DQ21 VDD15 VSS30
101 50 SDDR_B_DQ22 118 138
{12} SDDR_B_CLK_DDR0 CK0 DQ22 VDD16 VSS31
103 52 SDDR_B_DQ23 CM17 123 139


{12} SDDR_B_CLK_DDR#0 CK0# DQ23 CM18 VDD17 VSS32
102 57 SDDR_B_DQ24 2.2uF/10V,X5R 124 144
{12} SDDR_B_CLK_DDR1 CK1 DQ24 0.1uF/16V,X7R VDD18 VSS33
104 59 SDDR_B_DQ25 0603 145
{12} SDDR_B_CLK_DDR#1 CK1# DQ25 VSS34
73 67 SDDR_B_DQ26 I 199 150
{12} SDDR_B_CKE0 CKE0 DQ26 VDDSPD VSS35
74 69 SDDR_B_DQ27 151
{12} SDDR_B_CKE1 CKE1 DQ27 VSS36
115 56 SDDR_B_DQ28 DIMM2 77 155
{12} SDDR_B_CAS# CAS# DQ28 NC1 VSS37
110 58 SDDR_B_DQ29 DIMM2 122 156
{12} SDDR_B_RAS# RAS# DQ29 NC2 VSS38
113 68 SDDR_B_DQ30 125 161
{12} SDDR_B_WE# WE# DQ30 NCTEST VSS39
RM3 10K 5% SA0_DIM1 197 70 SDDR_B_DQ31 162
RM4 10K 5% SA1_DIM1 201 SA0 DQ31 SDDR_B_DQ32 VSS40
+V3_3S SA1 DQ32 129 {11,26} PM_EXTTS#1 198 EVENT# VSS41 167


DIMM2 202 131 SDDR_B_DQ33 30 168
{9,18,26,44,45} PCH_SMB_CLK_3S SCL DQ33 {11,26} DDR3_DRAMRST# RESET# VSS42
DIMM2{9,18,26,44,45} PCH_SMB_DAT_3S 200 141 SDDR_B_DQ34 172
SDA DQ34 SDDR_B_DQ35 VSS43
DQ35 143 VSS44 173
B 116 130 SDDR_B_DQ36 DIMM_DQ_VREF_B 1 178 B
{12} SDDR_B_ODT0 ODT0 DQ36 VREF_DQ VSS45
120 132 SDDR_B_DQ37 DIMM_CA_VREF_B 126 179
{12} SDDR_B_ODT1 ODT1 DQ37 VREF_CA VSS46
140 SDDR_B_DQ38 184
{12} SDDR_B_DM[0..7] DQ38 VSS47
SDDR_B_DM0 11 142 SDDR_B_DQ39 185
SDDR_B_DM1 DM0 DQ39 SDDR_B_DQ40 VSS48
28 DM1 DQ40 147 2 VSS1 VSS49 189
SDDR_B_DM2 46 149 SDDR_B_DQ41 3 190
SDDR_B_DM3 DM2 DQ41 SDDR_B_DQ42 VSS2 VSS50
63 157 8 195


SDDR_B_DM4 DM3 DQ42 SDDR_B_DQ43 VSS3 VSS51
136 DM4 DQ43 159 9 VSS4 VSS52 196
SDDR_B_DM5 153 146 SDDR_B_DQ44 13
SDDR_B_DM6 DM5 DQ44 SDDR_B_DQ45 VSS5
170 DM6 DQ45 148 14 VSS6 NPTH1 207
SDDR_B_DM7 187 158 SDDR_B_DQ46 19 208
{12} SDDR_B_DQS[0..7] DM7 DQ46 VSS7 NPTH2 +VTT_DDR
160 SDDR_B_DQ47 20
SDDR_B_DQS0 DQ47 SDDR_B_DQ48 VSS8
12 DQS0 DQ48 163 25 VSS9
SDDR_B_DQS1 29 165 SDDR_B_DQ49 26 203
SDDR_B_DQS2 DQS1 DQ49 SDDR_B_DQ50 VSS10 VTT1
47 DQS2 DQ50 175 31 VSS11 VTT2 204
SDDR_B_DQS3 64 177 SDDR_B_DQ51 32
SDDR_B_DQS4 DQS3 DQ51 SDDR_B_DQ52 VSS12


137 DQS4 DQ52 164 37 VSS13 G1 205
SDDR_B_DQS5 154 166 SDDR_B_DQ53 38 206
SDDR_B_DQS6 DQS5 DQ53 SDDR_B_DQ54 VSS14 G2
171 DQS6 DQ54 174 43 VSS15
SDDR_B_DQS7 188 176 SDDR_B_DQ55
{12} SDDR_B_DQS#[0..7] DQS7 DQ55
SDDR_B_DQS#0 10 181 SDDR_B_DQ56 AS0A621-J8SG-7H
SDDR_B_DQS#1 DQS#0 DQ56 SDDR_B_DQ57
27 DQS#1 DQ57 183
SDDR_B_DQS#2 45 191 SDDR_B_DQ58 +V1_5SM
SDDR_B_DQS#3 DQS#2 DQ58 SDDR_B_DQ59 DIMM2 +VTT_DDR
62 DQS#3 DQ59 193
SDDR_B_DQS#4 135 180 SDDR_B_DQ60 Place these Caps near So-DIMM1
SDDR_B_DQS#5 DQS#4 DQ60 SDDR_B_DQ61
152 182


SDDR_B_DQS#6 DQS#5 DQ61 SDDR_B_DQ62
169 DQS#6 DQ62 192
SDDR_B_DQS#7 186 194 SDDR_B_DQ63
DQS#7 DQ63 R7 CM20 CM21 CX84
C CM22 C
AS0A621-J8SG-7H 1K 1% CM19 1uF/6.3V,X5R 1uF/6.3V,X5R
0.1uF/10V,X5R 0402 0402 33pF/50V,NPO
0.1uF/10V,X5R 0 5% I I 10uF/6.3V,X5R
DIMM2 C4 DIMM_DQ_VREF_B_LR8 DIMM_DQ_VREF_B
0402 DIMM2 DIMM2
DIMM2 DIMM2 +V1_5SM
DIMM2 DIMM2 DIMM2
CM24
DIMM2 R9


1K 1% CM23 2.2uF/10V,X5R
C0603
0.1uF/10V,X5R

DIMM2 CM25
DIMM2 DIMM2 0.1uF/10V,X5R CM27 CM28 CM29
CM26
0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R
+V1_5SM 33pF/50V,NPO
DIMM2


DIMM2 DIMM2 DIMM2
DIMM2
+V1_5SM

R10
1K 1%
0 5%
0.1uF/10V,X5R DIMM_CA_VREF_B_LR11 DIMM_CA_VREF_B CX85 CX86 CX87
C5 0402
DIMM2


CM31
R12
DIMM2 10uF/6.3V,X5R10uF/6.3V,X5R10uF/6.3V,X5R
DIMM2 1K 1% CM30 2.2uF/10V,X5R
C0603
D DIMM2 DIMM2 DIMM2 D
0.1uF/10V,X5R

DIMM2
DIMM2 DIMM2

深圳仁聚科技有限公司
Title
DDR3 SO-DIMM_2

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 27 of 67


1 2 3 4 5 6 7 8
5 4 3 2 1

+PEX_VDD +V3_3SGFX
U1A

+V3_3SGFX COMMON

1/12 PCI_EXPRESS GC2 GC4 GC5 GC6 GC3 GC20 OP1 GC1
PEX_IOVDD AC9 {22} PCH_PEX_RST# GR21 0 5% 0.1uF/10V,X5R

5
PEX_IOVDD AD7 0.1uF/10V,X5R 0.1uF/10V,X5R 22uF/6.3V GU1 GPU
PEX_IOVDD AD8 1uF/16V,X5R 4.7uF/10V,X5R C0805 10uF/6.3V,X5R {37} EC_PEX_RST# GR20 0 5% 1 VCC
GR3 PEX_IOVDD AE7 GPU GE1 4 GPU_RST#


GPU 10K 5% PEX_IOVDD AF7 GPU GPU GPU {11,21} PLT_RST# 2
GPU GPU GND
PEX_IOVDD AG7
GT218 G98
SN74AHC1G08DBV GR1

3
SOT23_5 10K 5%
D D
PEX_CLKREQ AE9 PEX_CLKREQ NC PEX_IOVDDQ AB13 +PEX_VDD GPU
PEX_IOVDDQ AB16
PEX_IOVDDQ AB17
PEX_IOVDDQ AB7 GR19 0 5%
R13 200 1% AF10 PEX_TSTCLK_OUT PEX_IOVDDQ AB8 GC10 GC8 GC9 GC7 GC11 GC19
AE10 PEX_TSTCLK_OUT PEX_IOVDDQ AB9 ns U1J
ns PEX_IOVDDQ AC13 0.1uF/10V,X5R 0.1uF/10V,X5R 22uF/6.3V 10uF/6.3V,X5R
PEX_IOVDDQ AC7 1uF/16V,X5R C0805 10uF/6.3V,X5R
COMMON
AD6 GPU


PEX_IOVDDQ
GPU_RST# AD9 PEX_RST PEX_IOVDDQ AE6 GPU GPU GPU GPU 12/12 GND_NC
PEX_IOVDDQ AF6 GPU
PEX_IOVDDQ AG6 AC11 GND NC C15
AC14 GND NC D15
{18} CLK_PCH_PEG_R AB10 PEX_REFCLK AC17 GND NC J5
{18} CLK_PCH_PEG#_R AC10 PEX_REFCLK AC2 GND
AC20 GND
PEG_RXP0 GC13 0.1uF/10V,X5R AD10 PEX_TX0 AC23 GND
PEG_RXN0 0.1uF/10V,X5R AD11 PEX_TX0 AC26 GND
GC17 AC5
GPU +VGA_CORE
GND
AE12 PEX_RX0 AC8 GND
{10} PEG_TXP0_C GPU AF12 PEX_RX0 AF11 GND
{10} PEG_TXN0_C


AF14 GND
PEG_RXP1 GC14 0.1uF/10V,X5R AD12 PEX_TX1 VDD J10 AF17 GND
PEG_RXN1 0.1uF/10V,X5R AC12 PEX_TX1 VDD J12 AF2 GND
GC18 J13 AF20
GPU VDD GND
AG12 PEX_RX1 VDD J9 C455 C450 C451 C452 C453 C454 AF23 GND
{10} PEG_TXP1_C GPU AG13 PEX_RX1 VDD L9 AF26 GND
{10} PEG_TXN1_C
VDD M11 0.01uF/16V,X7R 0.01uF/16V,X7R AF5 GND
PEG_RXP2 GC25 0.1uF/10V,X5R AB11 PEX_TX2 VDD M17 0.01uF/16V,X7R AF8 GND
PEG_RXN2 0.1uF/10V,X5R AB12 PEX_TX2 VDD M9 0.01uF/16V,X7R 0.01uF/16V,X7R B11 GND
GC26 N11 GPU GPU GPU GPU GPU GPU B14
GPU VDD
0.01uF/16V,X7R
GND
AF13 PEX_RX2 VDD N12
{10} PEG_TXP2_C GPU AE13 PEX_RX2 VDD N13 B17 GND
{10} PEG_TXN2_C


VDD N14 B2 GND
PEG_RXP3 GC27 0.1uF/10V,X5R AD13 PEX_TX3 VDD N15 B20 GND
PEG_RXN[15..0] {10}
PEG_RXN3 0.1uF/10V,X5R AD14 PEX_TX3 VDD N16 GC30 C456 C457 C458 C459 C460 PEG_RXN15 B23 GND
GC28 N17 PEG_RXN14 B26
GPU VDD
0.1uF/10V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R PEG_RXN13
GND
C AE15 PEX_RX3 VDD N19 B5 GND C
{10} PEG_TXP3_C GPU PEG_RXN12
{10} PEG_TXN3_C AF15 PEX_RX3 VDD N9 GPU GPU GPU GPU GPU B8 GND
VDD P11 PEG_RXN11 E11 GND
PEG_RXP4 GC35 0.1uF/10V,X5R AD15 PEX_TX4 VDD P12 GPU 0.047uF/16V,X7R PEG_RXN10 E17 GND
PEG_RXN4 0.1uF/10V,X5R AC15 PEX_TX4 VDD P13 0.047uF/16V,X7R PEG_RXN9 E2 GND
GC36 P14 0.047uF/16V,X7R PEG_RXN8 E20
GPU VDD
PEG_RXN7
GND
AG15 PEX_RX4 VDD P15 E23 GND
{10} PEG_TXP4_C GPU AG16 PEX_RX4 VDD P16 PEG_RXN6 E26 GND
{10} PEG_TXN4_C
VDD P17 PEG_RXN5 E5 GND


PEG_RXP5 GC37 0.1uF/10V,X5R AB14 PEX_TX5 VDD R11 PEG_RXN4 E8 GND
PEG_RXN5 0.1uF/10V,X5R AB15 PEX_TX5 VDD R12 PEG_RXN3 H2 GND
GC41 R13 PEG_RXN2 H5
GPU VDD
PEG_RXN1
GND
AF16 PEX_RX5 VDD R14 J11 GND
{10} PEG_TXP5_C GPU AE16 PEX_RX5 VDD R15 PEG_RXN0 J14 GND
{10} PEG_TXN5_C
VDD R16 PEG_RXP[15..0] {10} J17 GND
PEG_RXP6 GC45 0.1uF/10V,X5R AC16 PEX_TX6 VDD R17 PEG_RXP15
PEG_RXN6 0.1uF/10V,X5R AD16 PEX_TX6 VDD R9 PEG_RXP14 K19 GND
GC50 T11 PEG_RXP13 K9
GPU VDD
PEG_RXP12
GND
AE18 PEX_RX6 VDD T17 L11 GND
{10} PEG_TXP6_C GPU AF18 PEX_RX6 VDD T9 PEG_RXP11 L12 GND
{10} PEG_TXN6_C
VDD U19 PEG_RXP10 L13 GND


PEG_RXP7 GC52 0.1uF/10V,X5R AD17 PEX_TX7 VDD U9 PEG_RXP9 L14 GND
PEG_RXN7 0.1uF/10V,X5R AD18 PEX_TX7 VDD W10 PEG_RXP8 L15 GND
GC53 W12 PEG_RXP7 L16
GPU VDD
PEG_RXP6
GND
AG18 PEX_RX7 VDD W13 L17 GND
{10} PEG_TXP7_C GPU AG19 PEX_RX7 VDD W18 PEG_RXP5 L2 GND
{10} PEG_TXN7_C
VDD W19 PEG_RXP4 L5 GND
PEG_RXP8 GC54 0.1uF/10V,X5R AC18 PEX_TX8 VDD W9 PEG_RXP3 M12 GND
PEG_RXN8 0.1uF/10V,X5R AB18 PEX_TX8 PEG_RXP2 M13 GND
GC55 PEG_RXP1 M14
GPU G98 GT218
PEG_RXP0
GND
AF19 PEX_RX8 M15 GND
{10} PEG_TXP8_C GPU AE19 PEX_RX8 VDD_SENSE W15 1 M16 GND
{10} PEG_TXN8_C VDD_SENSE TP217 Test Point_30mil
GND_SENSE GND_SENSE W16 1 TP218 Test Point_30mil P19 GND
PEG_RXP9 GC56 0.1uF/10V,X5R AB19 P2


PEX_TX9 GND
PEG_RXN9 0.1uF/10V,X5R AB20 PEX_TX9 NC VDD_SENSE E15 1 Test Point_30mil P23 GND
TP219
GC57 GND_SENSE E14 1 P26
GPU GND TP220 Test Point_30mil +V3_3SGFX
GND
AE21 PEX_RX9
{10} PEG_TXP9_C GPU AF21 PEX_RX9 VDD33 A12 P5 GND
B {10} PEG_TXN9_C B
VDD33 B12 P9 GND
PEG_RXP10 GC58 0.1uF/10V,X5R AD19 PEX_TX10 VDD33 C12 GC62 GC64 GC63 GC67 C461 T12 GND
PEG_RXN10 0.1uF/10V,X5R +V3_3SGFX
AD20 PEX_TX10 VDD33 D12 T13 GND
GC59 E12 4.7uF/10V,X5R T14
GPU VDD33 GND

1
AG21 PEX_RX10 VDD33 F12 0.1uF/10V,X5R 1uF/16V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R T15 GND
{10} PEG_TXP10_C GPU AG22 PEX_RX10 T16 GND
{10} PEG_TXN10_C
GPU GPU GPU U11 GND
PEG_RXP11 GC65 0.1uF/10V,X5R AD21 PEX_TX11 G98 GT218 GPU GPU PEX_CLKREQ 2 3 GPU_CLK_REQ# {18} U12 GND


PEG_RXN11 0.1uF/10V,X5R AC21 PEX_TX11 U13 GND
GC66 PEX_SVDD_3V3 AG9 U14
GPU NC 2N7002PT
GND
{10} PEG_TXP11_C GPU AF22 PEX_RX11
Q33
ns U15 GND
{10} PEG_TXN11_C AE22 PEX_RX11 U16 GND
U17 GND
PEG_RXP12 GC71 0.1uF/10V,X5R AB21 PEX_TX12 U2 GND
PEG_RXN12 0.1uF/10V,X5R AB22 PEX_TX12 U23 GND
GC72 U26
GPU GND
AE24 PEX_RX12 U5 GND
{10} PEG_TXP12_C GPU AF24 PEX_RX12 V19 GND
{10} PEG_TXN12_C
+PEX_VDD V9 GND
PEG_RXP13 GC73 0.1uF/10V,X5R AC22 PEX_TX13
PEG_RXN13 0.1uF/10V,X5R +PEX_PLLVDD L27 I 150nH/450mA 0805


AD22 PEX_TX13 PEX_PLLVDD AF9 W11 GND
GC74 W14
GPU GC75 GC76 GC77 GC78 GC79
GND
AG24 PEX_RX13 GPU W17 GND
{10} PEG_TXP13_C GPU AF25 PEX_RX13 Y2 GND
{10} PEG_TXN13_C
0.01uF/16V,X7R 1uF/16V,X5R 4.7uF/10V,X5R 4.7uF/10V,X5R Y23 GND
PEG_RXP14 GC80 0.1uF/10V,X5R AD23 PEX_TX14 0.1uF/10V,X5R GPU Y26 GND
PEG_RXN14 0.1uF/10V,X5R AD24 PEX_TX14 Y5 GND
GC81 GPU GPU
GPU
AG25 PEX_RX14 GPU GPU
{10} PEG_TXP14_C GPU AG26 PEX_RX14
{10} PEG_TXN14_C
PEG_RXP15 GC82 0.1uF/10V,X5R AE25 PEX_TX15
PEG_RXN15 0.1uF/10V,X5R AE26 PEX_TX15


GC83
GPU GR4 2.49K 1%
AF27 PEX_RX15 PEX_TERMP AG10
{10} PEG_TXP15_C GPU AE27 PEX_RX15
{10} PEG_TXN15_C
GPU
A A

OP1

深圳仁聚科技有限公司
Title
N10m_PCIEX16_PWR_GND

Size Document Number Rev


C M02 X1

Date: Wednesday, May 05, 2010 Sheet 28 of 67


5 4 3 2 1
5 4 3 2 1

U1B

COMMON

2/12 FRAME_BUFFER

+V1_5GDDR
GT218 G98
{30,31} GDDR_A_DQ[0:63]
GDDR_A_DQ0 D22 FBA_D0 FBA_D8
GDDR_A_DQ1 E24 FBA_D1 FBA_D10 FBVDDQ A13
GDDR_A_DQ2 E22 FBA_D2 FBA_D9 FBVDDQ B13
GDDR_A_DQ3 D24 FBA_D3 FBA_D11 FBVDDQ C13
GDDR_A_DQ4 D26 FBA_D4 FBA_D12 FBVDDQ D13


GDDR_A_DQ5 D27 FBA_D5 FBA_D13 FBVDDQ D14 C465 C464 C462 GC91 GC94 GC93 GC95 GC97
GDDR_A_DQ6 C27 FBA_D6 FBA_D14 FBVDDQ E13 GPU
GDDR_A_DQ7 B27 FBA_D7 FBA_D15 FBVDDQ F13 GPU GPU GPU GPU GPU
GDDR_A_DQ8 A21 FBA_D8 FBA_D31 FBVDDQ F14 GPU GPU 0.1uF/10V,X5R 0.47uF/16V,X7R 0.47uF/16V,X7R 4.7uF/10V,X5R
D D
GDDR_A_DQ9 B21 FBA_D9 FBA_D30 FBVDDQ F15
GDDR_A_DQ10 C21 FBA_D10 FBA_D29 FBVDDQ F16 0.01uF/16V,X7R 0.01uF/16V,X7R
GDDR_A_DQ11 C19 FBA_D11 FBA_D28 FBVDDQ F17 0.01uF/16V,X7R 0.47uF/16V,X7R
GDDR_A_DQ12 C18 FBA_D12 FBA_D26 FBVDDQ F19
GDDR_A_DQ13 D18 FBA_D13 FBA_D27 FBVDDQ F22
GDDR_A_DQ14 B18 FBA_D14 FBA_D25 FBVDDQ H23
GDDR_A_DQ15 C16 FBA_D15 FBA_D24 FBVDDQ H26
GDDR_A_DQ16 E21 FBA_D16 FBA_D22 FBVDDQ J15
GDDR_A_DQ17 F21 J16


FBA_D17 FBA_D23 FBVDDQ
GDDR_A_DQ18 D20 FBA_D18 FBA_D20 FBVDDQ J18
GDDR_A_DQ19 F20 FBA_D19 FBA_D21 FBVDDQ J19
GDDR_A_DQ20 D17 FBA_D20 FBA_D18 FBVDDQ L19
GDDR_A_DQ21 F18 FBA_D21 FBA_D19 FBVDDQ L23
GDDR_A_DQ22 D16 FBA_D22 FBA_D16 FBVDDQ L26
GDDR_A_DQ23 E16 FBA_D23 FBA_D17 FBVDDQ M19
GDDR_A_DQ24 A22 FBA_D24 FBA_D3 FBVDDQ N22
GDDR_A_DQ25 C24 FBA_D25 FBA_D4 FBVDDQ U22
GDDR_A_DQ26 D21 FBA_D26 FBA_D0 FBVDDQ Y22
GDDR_A_DQ27 B22 FBA_D27 FBA_D2
GDDR_A_DQ28 C22 FBA_D28 FBA_D1
GDDR_A_DQ29 A25 FBA_D29 FBA_D6


GDDR_A_DQ30 B25 FBA_D30 FBA_D5
GDDR_A_DQ31 A26 FBA_D31 FBA_D7
GDDR_A_DQ32 U24 FBA_D32 FBA_D37
GDDR_A_DQ33 V24 FBA_D33 FBA_D39
GDDR_A_DQ34 V23 FBA_D34 FBA_D38
GDDR_A_DQ35 R24 FBA_D35 FBA_D35
GDDR_A_DQ36 T23 FBA_D36 FBA_D36 FBA_CMD0 F26 N11M-GE1-S-A3
GDDR_A_A4 {30}
GDDR_A_DQ37 R23 FBA_D37 FBA_D34 FBA_CMD1 J24 GDDR_A_RAS# {30,31}
GDDR_A_DQ38 P24 FBA_D38 FBA_D33 FBA_CMD2 F25 GDDR_A_A5 {30} GL40
GDDR_A_DQ39 P22 FBA_D39 FBA_D32 FBA_CMD3 M23 GDDR_A_BA1 {30,31}
GDDR_A_DQ40 AC24 FBA_D40 FBA_D55 FBA_CMD4 N27 GDDR_B_A2 {31}
GDDR_A_DQ41 AB23 FBA_D41 FBA_D53 FBA_CMD5 M27 GDDR_B_A4 {31}
GDDR_A_DQ42


AB24 FBA_D42 FBA_D54 FBA_CMD6 K26 GDDR_B_A3 {31}
GDDR_A_DQ43 W24 FBA_D43 FBA_D51 FBA_CMD7 J25 GDDR_A_CKE1 {31}
GDDR_A_DQ44 AA22 FBA_D44 FBA_D52 FBA_CMD8 J27 U1_
GDDR_A_CS1# {31}
GDDR_A_DQ45 W23 FBA_D45 FBA_D50 FBA_CMD9 G23 GE1
GDDR_A_A11 {30,31}
C GDDR_A_DQ46 W22 FBA_D46 FBA_D49 FBA_CMD10 G26 C
GDDR_A_CAS# {30,31}
GDDR_A_DQ47 V22 FBA_D47 FBA_D48 FBA_CMD11 J23 GDDR_A_WE# {30,31}
GDDR_A_DQ48 AA25 FBA_D48 FBA_D59 FBA_CMD12 M25 GDDR_A_BA0 {30,31}
GDDR_A_DQ49 W27 FBA_D49 FBA_D58 FBA_CMD13 K27 GDDR_B_A5 {31}
GDDR_A_DQ50 W26 FBA_D50 FBA_D57 FBA_CMD14 G25 GDDR_A_A12 {30,31}
GDDR_A_DQ51 W25 FBA_D51 FBA_D56 FBA_CMD15 L24 MEM_RST
MEM_RST {30,31}
GDDR_A_DQ52 AB25 FBA_D52 FBA_D60 FBA_CMD16 K23 GDDR_A_A7 {30,31}
GDDR_A_DQ53 AB26 FBA_D53 FBA_D61 FBA_CMD17 K24 GDDR_A_A10 {30,31}
GDDR_A_DQ54 AD26 FBA_D54 FBA_CMD18 G22


FBA_D62 GDDR_A_CKE0 {30}
GDDR_A_DQ55 AD27 FBA_D55 FBA_D63 FBA_CMD19 K25 GDDR_A_A0 {30,31}
GDDR_A_DQ56 V25 FBA_D56 FBA_D46 FBA_CMD20 H22 GDDR_A_A9 {30,31}
GDDR_A_DQ57 R25 FBA_D57 FBA_D42 FBA_CMD21 M26 GDDR_A_A6 {30,31}
GDDR_A_DQ58 V26 FBA_D58 FBA_D45 FBA_CMD22 H24 GDDR_A_A2 {30}
GDDR_A_DQ59 V27 FBA_D59 FBA_D47 FBA_CMD23 F27 GDDR_A_A8 {30,31}
GDDR_A_DQ60 R26 FBA_D60 FBA_D43 FBA_CMD24 J26 GDDR_A_A3 {30}
GDDR_A_DQ61 T25 FBA_D61 FBA_D44 FBA_CMD25 G24 GDDR_A_A1 {30,31}
GDDR_A_DQ62 N25 FBA_D62 FBA_D40 FBA_CMD26 G27 GDDR_A_A13 {30,31}
GDDR_A_DQ63 N26 FBA_D63 FBA_D41 FBA_CMD27 M24 GPU_SUPPORT
GDDR_A_BA2 {30,31}
FBA_CMD28 K22 GDDR_A_ODT1 {31}
{30,31} GDDR_A_DM[7:0] FBA_CMD29 J22 GDDR_A_CS0# {30}
GDDR_A_DM0 C26 FBA_DQM0 FBA_DQM1 FBA_CMD30 L22 GPU_SUPPORT1
GDDR_A_ODT0 {30}


GDDR_A_DM1 B19 FBA_DQM1
GDDR_A_DM2 D19 FBA_DQM2
FBA_DQM3 Assembly
FBA_DQM2
GDDR_A_DM3 D23 FBA_DQM3 FBA_DQM0
GDDR_A_DM4 T24 FBA_DQM4 FBA_DQM4 FBA_CLK0 F24 GDDR_A_CLK0 {30}
GDDR_A_DM5 AA23 FBA_DQM5 FBA_DQM6 FBA_CLK0 F23 GDDR_A_CLK#0 {30}
GDDR_A_DM6 AB27 FBA_DQM6 FBA_DQM7 FBA_CLK1 N24 GDDR_A_CLK1 {31}
GDDR_A_DM7 T26 FBA_DQM7 FBA_DQM5 FBA_CLK1 N23 GDDR_A_CLK#1 {31}

GDDR_A_DQS0 C25 FBA_DQS_WP0


+V1_5GDDR
{30} GDDR_A_DQS0 FBA_DQS_WP1
GDDR_A_DQS1 A19 FBA_DQS_WP1 FBA_DQS_WP3 FBA_DEBUG M22 GR167 60.4 1%
{30} GDDR_A_DQS1
GDDR_A_DQS2 E19 FBA_DQS_WP2 FBA_DQS_WP2
{30} GDDR_A_DQS2
GDDR_A_DQS3 A24 GPU


{30} GDDR_A_DQS3 FBA_DQS_WP3 FBA_DQS_WP0
GDDR_A_DQS4 T22 FBA_DQS_WP4 FBA_DQS_WP4
{31} GDDR_A_DQS4
GDDR_A_DQS5 AA24 FBA_DQS_WP5 FBA_DQS_WP6
{31} GDDR_A_DQS5
GDDR_A_DQS6 AA26 FBA_DQS_WP6 FBA_DQS_WP7
MEM_RST
{31} GDDR_A_DQS6
GDDR_A_DQS7 T27 FBA_DQS_WP7 FBA_DQS_WP5
B {31} GDDR_A_DQS7 B
GDDR_A_ODT0 GDDR_A_CKE0
GDDR_A_ODT1 GDDR_A_CKE1
GDDR_A_DQS#0 D25 FBA_DQS_RN0 FBA_DQS_RN1
R61 R66 R756
{30} GDDR_A_DQS#0
GDDR_A_DQS#1 A18 FBA_DQS_RN1 FBA_DQS_RN3 GPU 10K 5% 10K 5% 10K 5%
{30} GDDR_A_DQS#1
GDDR_A_DQS#2 E18 FBA_DQS_RN2 FBA_DQS_RN2
R67 R755
{30} GDDR_A_DQS#2
GDDR_A_DQS#3 B24 FBA_DQS_RN3 FBA_DQS_RN0 GPU 10K 5% GPU 10K 5%
{30} GDDR_A_DQS#3
GDDR_A_DQS#4 R22 FBA_DQS_RN4 FBA_DQS_RN4 GPU GPU
{31} GDDR_A_DQS#4
GDDR_A_DQS#5 Y24 FBA_DQS_RN5 FBA_DQS_RN6
{31} GDDR_A_DQS#5


GDDR_A_DQS#6 AA27 FBA_DQS_RN6 FBA_DQS_RN7
{31} GDDR_A_DQS#6
GDDR_A_DQS#7 R27 FBA_DQS_RN7 FBA_DQS_RN5
{31} GDDR_A_DQS#7 +V1_5GDDR

FB_CAL_PD_VDDQ B15R68 40.2 1%


GPU
FB_CAL_PU_GND A15R71 40.2 1%
GR5 GPU
FB_CAL_TERM_GND B16 60.4 1%

GPU


+PEX_VDD
G98 GT218

FB_PLLAVDD R19 MAX:35mA GFB2


1 2
FB_PLLAVDD
300ohm@100MHz,300mA
A16 FB_VREF FB_DLLAVDD FB_DLLAVDD T19 GC112 GC113 GC114 GPU
NC FB_PLLAVDD AC19 0.1uF/10V,X5R 4.7uF/10V,X5R
0.1uF/10V,X5R

OP1 GPU GPU


GPU

A A

深圳仁聚科技有限公司
Title
N10m_GDDR3

Size Document Number Rev


C M02 X1

Date: Wednesday, May 05, 2010 Sheet 29 of 67


5 4 3 2 1
5 4 3 2 1

+V1_5GDDR +V1_5GDDR

UG1
420mA UG2
{29,31} GDDR_A_RAS# J3 RAS# VDD_9 K2 {29,31} GDDR_A_RAS# J3 RAS# VDD_9 K2
{29,31} GDDR_A_CAS# K3 CAS# VDD_8 R9 {29,31} GDDR_A_CAS# K3 CAS# VDD_8 R9
{29,31} GDDR_A_WE# L3 WE# VDD_7 R1 {29,31} GDDR_A_WE# L3 WE# VDD_7 R1
{29} GDDR_A_CS0# L2 CS# VDD_6 N9 {29} GDDR_A_CS0# L2 CS# VDD_6 N9
N1 N1


VDD_5 VDD_5
{29,31} GDDR_A_A0 N3 A0 VDD_4 K8 {29,31} GDDR_A_A0 N3 A0 VDD_4 K8
D D
{29,31} GDDR_A_A1 P7 A1 VDD_3 G7 {29,31} GDDR_A_A1 P7 A1 VDD_3 G7
{29} GDDR_A_A2 P3 A2 VDD_2 D9 {29} GDDR_A_A2 P3 A2 VDD_2 D9
N2 B2 +V1_5GDDR N2 B2
{29} GDDR_A_A3 A3 VDD_1 +V1_5GDDR {29} GDDR_A_A3 A3 VDD_1 +V1_5GDDR
{29} GDDR_A_A4 P8 A4 {29} GDDR_A_A4 P8 A4
{29} GDDR_A_A5 P2 A5 {29} GDDR_A_A5 P2 A5
{29,31} GDDR_A_A6 R8 A6 VDDQ_9 H9 {29,31} GDDR_A_A6 R8 A6 VDDQ_9 H9
{29,31} GDDR_A_A7 R2 A7 VDDQ_8 H2 {29,31} GDDR_A_A7 R2 A7 VDDQ_8 H2


{29,31} GDDR_A_A8 T8 A8 VDDQ_7 F1 {29,31} GDDR_A_A8 T8 A8 VDDQ_7 F1
{29,31} GDDR_A_A9 R3 A9 VDDQ_6 E9 {29,31} GDDR_A_A9 R3 A9 VDDQ_6 E9
L7 D2 CM32 CM33 CM34 CM35 CM36 L7 D2
{29,31} GDDR_A_A10 A10/AP VDDQ_5 {29,31} GDDR_A_A10 A10/AP VDDQ_5
R7 C9 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R R7 C9
{29,31} GDDR_A_A11 A11 VDDQ_4 {29,31} GDDR_A_A11 A11 VDDQ_4
{29,31} GDDR_A_A12 N7 A12/BC# VDDQ_3 C1 {29,31} GDDR_A_A12 N7 A12/BC# VDDQ_3 C1
{29,31} GDDR_A_A13 T3 A13 VDDQ_2 A8 {29,31} GDDR_A_A13 T3 A13 VDDQ_2 A8
T7 A1 0.1uF/10V,X5R 0.1uF/10V,X5R T7 A1
A14 VDDQ_1 GPU GPU A14 VDDQ_1
M7 A15 GPU GPU GPU M7 A15


M2 +V1_5GDDR M2
{29,31} GDDR_A_BA0 BA0 {29,31} GDDR_A_BA0 BA0
{29,31} GDDR_A_BA1 N8 BA1 VSSQ_9 G9 {29,31} GDDR_A_BA1 N8 BA1 VSSQ_9 G9
{29,31} GDDR_A_BA2 M3 BA2 VSSQ_8 G1 {29,31} GDDR_A_BA2 M3 BA2 VSSQ_8 G1
VSSQ_7 F9 VSSQ_7 F9
K9 E8 GC84 GC85 GC86 GC87 K9 E8
{29} GDDR_A_CKE0 CKE VSSQ_6 {29} GDDR_A_CKE0 CKE VSSQ_6
{29} GDDR_A_CLK0 J7 CK VSSQ_5 E2 {29} GDDR_A_CLK0 J7 CK VSSQ_5 E2
K7 D8 1uF/16V,X5R 1uF/16V,X5R1uF/16V,X5R 1uF/16V,X5R K7 D8
C {29} GDDR_A_CLK#0 CK# VSSQ_4 {29} GDDR_A_CLK#0 CK# VSSQ_4 C
VSSQ_3 D1 VSSQ_3 D1


VSSQ_2 B9 VSSQ_2 B9
VSSQ_1 B1 VSSQ_1 B1
GPU GPU GPU GPU
J1 NC_4 J1 NC_4
L1 NC_5 VSS_12 T9 L1 NC_5 VSS_12 T9
J9 T1 +V1_5GDDR J9 T1
NC_6 VSS_11 NC_6 VSS_11
L9 NC_7 VSS_10 P9 L9 NC_7 VSS_10 P9
P1 P1


MEM_RST VSS_9 MEM_RST VSS_9
{29,31} MEM_RST RG1 T2 RESET# VSS_8 M9 T2 RESET# VSS_8 M9
K1 M1 GDDR_A_ODT0 K1 M1
{29} GDDR_A_ODT0 ODT VSS_7 ODT VSS_7
L8 ZQ VSS_6 J8 L8 ZQ VSS_6 J8
243 1% J2 243 1% J2
VSS_5 CM44 CM46 RG2 VSS_5
VSS_4 G8 VSS_4 G8
GDDR_A_DQ21 E3 E1 +V1_5GDDR 0.1uF/10V,X5R 0.1uF/10V,X5R GDDR_A_DQ27 E3 E1 +V1_5GDDR
GPU GDDR_A_DQ22 F7
DQL0 VSS_3
B3
GPU GDDR_A_DQ30 F7
DQL0 VSS_3
B3
GDDR_A_DQ19 DQL1 VSS_2 GDDR_A_DQ28 DQL1 VSS_2
F2 DQL2 VSS_1 A9 F2 DQL2 VSS_1 A9
GDDR_A_DQ23 F8 GDDR_A_DQ31 F8


GDDR_A_DQ17 DQL3 GDDR_A_DQ24 DQL3
H3 DQL4 GPU GPU H3 DQL4
GDDR_A_DQ16 H8 R84 GDDR_A_DQ25 H8 R85
GDDR_A_DQ18 DQL5 1K 1% GPU GDDR_A_DQ26 DQL5 1K 1% GPU
G2 DQL6 G2 DQL6
GDDR_A_DQ20 H7 +V1_5GDDR GDDR_A_DQ29 H7
DQL7 DQL7
B {29} GDDR_A_DM2 E7 DML VREFDQ H1 VRAM_VREF_DQ_CA1 {29} GDDR_A_DM3 E7 DML VREFDQ H1 VRAM_VREF_DQ_CA2 B
{29} GDDR_A_DQS2 F3 DQSL VREFCA M8 {29} GDDR_A_DQS3 F3 DQSL VREFCA M8
{29} GDDR_A_DQS#2 G3 DQSL# {29} GDDR_A_DQS#3 G3 DQSL#
C6 GC98 GC100 C7
0.1uF/10V,X5R R86 0.1uF/10V,X5R R87


1K 1% GPU 1uF/16V,X5R 1uF/16V,X5R 1K 1% GPU
GDDR_A_DQ12 D7 GPU GDDR_A_DQ2 D7 GPU
GDDR_A_DQ11 DQU0 GDDR_A_DQ4 DQU0
C3 DQU1 C3 DQU1
GDDR_A_DQ15 C8 GDDR_A_DQ0 C8
DQU2 DQU2
GDDR_A_DQ10 C2 DQU3
GPU GPU GDDR_A_DQ6 C2 DQU3
GDDR_A_DQ14 A7 GDDR_A_DQ1 A7
GDDR_A_DQ9 DQU4 GDDR_A_DQ7 DQU4
A2 DQU5 A2 DQU5
GDDR_A_DQ13 B8 GDDR_A_DQ3 B8
DQU6 DQU6


GDDR_A_DQ8 A3 GDDR_A_DQ5 A3
DQU7 DQU7
{29} GDDR_A_DM1 D3 DMU {29} GDDR_A_DM0 D3 DMU
{29} GDDR_A_DQS1 C7 DQSU {29} GDDR_A_DQS0 C7 DQSU
{29} GDDR_A_DQS#1 B7 DQSU# {29} GDDR_A_DQS#0 B7 DQSU#
H5TQ1G63BFR-12C H5TQ1G63BFR-12C
GDDR_A_CLK0
GPU GPU


RG4
GDDR_A_DQ[0:31] 121 1%
GDDR_A_DQ[0:31] {29}
A GPU A

C8
0.01uF/16V,X7R 深圳仁聚科技有限公司
RG3 Title
121 1% GPU VRAM (DDR3) 1/3


GPU
Size Document Number Rev
GDDR_A_CLK#0 B C02 A

Date: Wednesday, May 05, 2010 Sheet 30 of 67


5 4 3 2 1
5 4 3 2 1


+V1_5GDDR
+V1_5GDDR

D UG4 D
UG3 J3 K2
{29,30} GDDR_A_RAS# RAS# VDD_9
{29,30} GDDR_A_RAS# J3 RAS# VDD_9 K2 {29,30} GDDR_A_CAS# K3 CAS# VDD_8 R9
{29,30} GDDR_A_CAS# K3 CAS# VDD_8 R9 {29,30} GDDR_A_WE# L3 WE# VDD_7 R1
{29,30} GDDR_A_WE# L3 WE# VDD_7 R1 {29} GDDR_A_CS1# L2 CS# VDD_6 N9
{29} GDDR_A_CS1# L2 CS# VDD_6 N9 VDD_5 N1
VDD_5 N1 {29,30} GDDR_A_A0 N3 A0 VDD_4 K8


{29,30} GDDR_A_A0 N3 A0 VDD_4 K8 {29,30} GDDR_A_A1 P7 A1 VDD_3 G7
{29,30} GDDR_A_A1 P7 A1 VDD_3 G7 {29} GDDR_B_A2 P3 A2 VDD_2 D9
{29} GDDR_B_A2 P3 A2 VDD_2 D9 {29} GDDR_B_A3 N2 A3 VDD_1 B2
N2 B2 P8 +V1_5GDDR
{29} GDDR_B_A3 A3 VDD_1 +V1_5GDDR {29} GDDR_B_A4 A4
{29} GDDR_B_A4 P8 A4 {29} GDDR_B_A5 P2 A5
{29} GDDR_B_A5 P2 A5 {29,30} GDDR_A_A6 R8 A6 VDDQ_9 H9
{29,30} GDDR_A_A6 R8 A6 VDDQ_9 H9 {29,30} GDDR_A_A7 R2 A7 VDDQ_8 H2
R2 H2 +V1_5GDDR T8 F1
{29,30} GDDR_A_A7 A7 VDDQ_8 {29,30} GDDR_A_A8 A8 VDDQ_7
{29,30} GDDR_A_A8 T8 A8 VDDQ_7 F1 {29,30} GDDR_A_A9 R3 A9 VDDQ_6 E9
{29,30} GDDR_A_A9 R3 A9 VDDQ_6 E9 {29,30} GDDR_A_A10 L7 A10/AP VDDQ_5 D2


{29,30} GDDR_A_A10 L7 A10/AP VDDQ_5 D2 {29,30} GDDR_A_A11 R7 A11 VDDQ_4 C9
{29,30} GDDR_A_A11 R7 A11 VDDQ_4 C9 {29,30} GDDR_A_A12 N7 A12/BC# VDDQ_3 C1
{29,30} GDDR_A_A12 N7 A12/BC# VDDQ_3 C1 {29,30} GDDR_A_A13 T3 A13 VDDQ_2 A8
{29,30} GDDR_A_A13 T3 A13 VDDQ_2 A8 T7 A14 VDDQ_1 A1
T7 A1 CM37 CM38 CM39 CM40 CM41 M7
A14 VDDQ_1 0.1uF/10V,X5R 0.1uF/10V,X5R A15
M7 A15 0.1uF/10V,X5R

{29,30} GDDR_A_BA0 M2 BA0


M2 0.1uF/10V,X5R 0.1uF/10V,X5R N8 G9
{29,30} GDDR_A_BA0 BA0 {29,30} GDDR_A_BA1 BA1 VSSQ_9
N8 G9 GPU GPU GPU GPU GPU M3 G1
{29,30} GDDR_A_BA1 BA1 VSSQ_9 {29,30} GDDR_A_BA2 BA2 VSSQ_8


{29,30} GDDR_A_BA2 M3 BA2 VSSQ_8 G1 VSSQ_7 F9
VSSQ_7 F9 {29} GDDR_A_CKE1 K9 CKE VSSQ_6 E8
K9 E8 +V1_5GDDR J7 E2
C {29} GDDR_A_CKE1 CKE VSSQ_6 {29} GDDR_A_CLK1 CK VSSQ_5 C
{29} GDDR_A_CLK1 J7 CK VSSQ_5 E2 {29} GDDR_A_CLK#1 K7 CK# VSSQ_4 D8
{29} GDDR_A_CLK#1 K7 CK# VSSQ_4 D8 VSSQ_3 D1
VSSQ_3 D1 VSSQ_2 B9
B9 GC88 GC89 GC90 GC92 B1
VSSQ_2 VSSQ_1
VSSQ_1 B1
1uF/16V,X5R 1uF/16V,X5R1uF/16V,X5R 1uF/16V,X5R
J1 NC_4


J1 NC_4 L1 NC_5 VSS_12 T9
L1 NC_5 VSS_12 T9 J9 NC_6 VSS_11 T1
J9 NC_6 VSS_11 T1 GPU GPU GPU GPU L9 NC_7 VSS_10 P9
L9 NC_7 VSS_10 P9 VSS_9 P1
P1 MEM_RST T2 M9
VSS_9 GDDR_A_ODT1 RESET# VSS_8
{29,30} MEM_RST RG5 T2 RESET# VSS_8 M9 K1 ODT VSS_7 M1
{29} GDDR_A_ODT1 K1 ODT VSS_7 M1 GPU L8 ZQ VSS_6 J8
L8 J8 243 1% J2
243 1% ZQ VSS_6 RG6 VSS_5
VSS_5 J2 VSS_4 G8
GPU G8 +V1_5GDDR GDDR_A_DQ40 E3 E1 +V1_5GDDR
VSS_4 DQL0 VSS_3


GDDR_A_DQ60 E3 E1 +V1_5GDDR GDDR_A_DQ43 F7 B3
GDDR_A_DQ61 DQL0 VSS_3 GDDR_A_DQ44 DQL1 VSS_2
F7 DQL1 VSS_2 B3 F2 DQL2 VSS_1 A9
GDDR_A_DQ57 F2 A9 GDDR_A_DQ45 F8
GDDR_A_DQ59 DQL2 VSS_1 GDDR_A_DQ42 DQL3
F8 DQL3 H3 DQL4
GDDR_A_DQ62 H3 GDDR_A_DQ47 H8 R89
GDDR_A_DQ56 DQL4 R88 GDDR_A_DQ41 DQL5 1K 1% GPU
H8 DQL5 G2 DQL6
GDDR_A_DQ63 G2 1K 1% GPU CM45 CM47 GDDR_A_DQ46 H7
GDDR_A_DQ58 DQL6 DQL7
H7 DQL7
0.1uF/10V,X5R 0.1uF/10V,X5R
{29} GDDR_A_DM5 E7 DML VREFDQ H1 VRAM_VREF_DQ_CA4
{29} GDDR_A_DM7 E7 DML VREFDQ H1 VRAM_VREF_DQ_CA3 {29} GDDR_A_DQS5 F3 DQSL VREFCA M8
{29} GDDR_A_DQS7 F3 DQSL VREFCA M8 {29} GDDR_A_DQS#5 G3 DQSL#


G3 C10
{29} GDDR_A_DQS#7 DQSL# C9 GPU GPU 0.1uF/10V,X5R R91
0.1uF/10V,X5R R90 1K 1% GPU
B 1K 1% GPU GDDR_A_DQ51 D7 GPU B
GDDR_A_DQ36 GPU +V1_5GDDR GDDR_A_DQ53 DQU0
D7 DQU0 C3 DQU1
GDDR_A_DQ39 C3 GDDR_A_DQ49 C8
GDDR_A_DQ34 DQU1 GDDR_A_DQ54 DQU2
C8 DQU2 C2 DQU3
GDDR_A_DQ38 C2 GDDR_A_DQ48 A7
GDDR_A_DQ32 DQU3 GC103 GC104 GDDR_A_DQ55 DQU4
A7 DQU4 A2 DQU5
GDDR_A_DQ35 A2 GDDR_A_DQ50 B8
DQU5 DQU6


GDDR_A_DQ33 B8 1uF/16V,X5R 1uF/16V,X5R GDDR_A_DQ52 A3
GDDR_A_DQ37 DQU6 DQU7
A3 DQU7 {29} GDDR_A_DM6 D3 DMU
{29} GDDR_A_DM4 D3 DMU {29} GDDR_A_DQS6 C7 DQSU
{29} GDDR_A_DQS4 C7 DQSU {29} GDDR_A_DQS#6 B7 DQSU#
{29} GDDR_A_DQS#4 B7 DQSU#
GPU GPU
H5TQ1G63BFR-12C
H5TQ1G63BFR-12C
GPU
GPU


GDDR_A_DQ[32:63] GDDR_A_CLK1
GDDR_A_DQ[32:63] {29}

RG8
121 1%
GPU


C11

A 0.01uF/16V,X7R A

GPU
RG7
121 1%
GPU

深圳仁聚科技有限公司
GDDR_A_CLK#1 Title
VRAM (DDR3) 2/3

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 31 of 67


5 4 3 2 1
5 4 3 2 1

+V3_3SGFX 2.2K 5%
OP1
R305 I2CA_SCL
R304 I2CA_SDA +V3_3SGFX
U1I
2.2K 5% N11m_LP1 install
OP1 U1K
COMMON +V3_3SGFX +V3_3SGFX +V3_3SGFX
9/12 I2C_GPIO_THERM_JTAG
COMMON
GE1 R779 R778 R196
D8 THERMDN I2CA_SCL R1 I2CA_SCL R92 33 5%
GPU_CRT_DDC_CLK {47}
34.8K 1% 34.8K 1% 45.3K 1% 10/12 MISC R204 R200 R212
I2CA_SDA T3 I2CA_SDA R99 33 5% GE1 GPU_CRT_DDC_DATA {47} ns GPU GPU 15K 1% 15K 1% 15K 1%


D9 THERMDP ROM_CS B10 T4 ns ns ns
R100 2.2K GPU
5% +V3_3SGFX STRAP0_GPU
I2CB_SCL R2 C7 STRAP0
AF3 JTAG_TCK I2CB_SDA R3 R102 2.2K GPU
5% STRAP1_GPU B9 STRAP1 ROM_SI A10 ROM_SI_GPU GPU
AF4 JTAG_TMS STRAP2_GPU A9 STRAP2 ROM_SO C10 ROM_SO_GPU
D D
AG4 JTAG_TDI I2CC_SCL A2 I2CC_SCL R105 33 5% GE1 GPU_LVDS_DDC_CLK {48} ROM_SCLK C9 ROM_SCLK_GPU
AE4 JTAG_TDO I2CC_SDA B1 I2CC_SDA R106 33 5% GE1 GPU_LVDS_DDC_DATA {48}
R789 1KGPU
5% AG3 JTAG_TRST R780
15K 1% R782 R783 I2CH_SCL A3 I2CH_SCL
30K 1% 30K 1% GPU R111 40.2K 1% F11 MULTI_STRAP_REF0_GND I2CH_SDA A4 I2CH_SDA R209 R208 R781
GE1 =30K,OP1=15K ns ns 15K 1% 15K 1% 10.2K 1%
GPU R113 40.2K 1% F10 MULTI_STRAP_REF1_GND
ns GPU
N5 T6 ns GPU-15K for HY ,20K for Samsung


BUFRST

R780_ N11m_GE1 install


30K 1% G98 GT218
I2CS_SLC GE1 +V3_3SGFX
T1 I2CS_SCL GPIO2 C1 GPU_LVDS_BKLTCTL {48}
I2CS_SDA T2 I2CS_SDA GPIO3 M2 I2CD_SCL CEC N2 GR9 10K 5%
GPU_LVDS_VDDEN {48} +V3_3SGFX
GPIO4 M3 GPU_LVDS_BKLTEN {37,48}
GPIO5 K3 GPIO_VID0 {59} GPU
GPIO6 K2 GPIO_VID1 {59} F9 SPDIF TESTMODE AD25
GPIO7 J2 GPU_VID2
GPIO8 C2 GPIO8_OVERTEMP# R791 0 5% GPU GND F6 GR10
OVT_SHUTDOWN# {66}
GPIO9 M1 THER_ALERT#_R 10K 5%
GPIO10 D2 到85度 GPU发alert,109 度发overtemp GND AC6


GPIO11 D1 SLI_SYNC GR11 GR12
GPIO12 J3 AC_IN_GPU R793 0 5%
ns 10K 5% 10K 5%
AC_IN {37,56}
GT218 G98 GPIO13 J1
GPIO14 K1 GPU GPU GPU
ns T7 T6 RFU NC
I2CH_SCL
ns T8 W6 RFU I2CE_SDA GPIO16 G3 I2CH_SDA
ns T9 Y6 RFU I2CE_SCL GPIO17 G2 GPU_GPI17
ns T10 AA6 RFU NC GPIO18 F1 GPIO18_DVI_E
ns +V3_3SGFX
T11 N3 RFU I2CD_SDA

GPU_LVDS_DDC_CLK R116 2.2K 5% GPU


GPU_LVDS_DDC_DATA R117 2.2K 5%


+V3_3SGFX GPU

1
GPU_VID2 R120 10K 5% ns
GPIO8_OVERTEMP# R121 10K 5% +V3_3SGFX 2.2K 5%
C GPU GPU +V3_3SGFX C

1
R510 GPU
THER_ALERT#_R 2 3 THER_ALERT#_R R122 10K 5% R485
THER_ALERT# {37}
GPU GPU 2.2K 5%
I2CS_SLC 2 3
2N7002PT EC_SMB0_CLK_3AL {37}
U1D

1
Q37 GPU_LVDS_BKLTCTL R124 10K 5% ns
SLI_SYNC R125 10K 5% ns 2N7002PT
COMMON
AC_IN_GPU R126 10K 5% ns Q28


4/12 DACB GPU_GPI17 R127 10K 5% GPU I2CS_SDA 2 3 EC_SMB0_DAT_3AL {37}
GT218 G98
GPIO18_DVI_E R128 10K 5%
GPU
GPU 2N7002PT
GR44 10K 5%
GPU W5 DACB_VDD G98 GT218 GPU Q27
ns T12 R6 DACB_VREF DACC DACB_HSYNC U6
DACB_VSYNC U4
ns T13 GPU
V6 DACB_RSET

DACC DACB_RED T5

DACB_GREEN T4


DACB_BLUE R4

U1H

COMMON

8/12 IFPE


GT218 G98
+PEX_VDD
D7 IFPE_PLLVDD DACB_VDD
F8 IFPE_RSET DACB_RSET
0805 150nH/450mA I L28 VID_PLLVDD
B B
GC99 GC102 GC96 GC101
GR42 GT218 GPU U1L
G98 DVI/HDMI DP
10K 5% 4.7uF/10V,X5R 1uF/16V,X5R
COMMON
0.1uF/10V,X5R 0.1uF/10V,X5R
GPU DACB_VREF I2CY_SDA IFPE_AUX G6 11/12 XTAL_PLL
DACB_RED I2CY_SCL IFPE_AUX F7
GPU GPU GPU GPU K5 PLLVDD


DACB_GREEN TXC IFPE_L3 E7 +PEX_VDD K6 VID_PLLVDD
DACB_BLUE TXC IFPE_L3 E6
0805 I L29 150nH/450mA SP_PLLVDD L6 SP_PLLVDD
HDA_SYNC TXD0 IFPE_L2 B7
B6 GC105 GC106
HDA_SDO TXD0 IFPE_L2 GPU
HDA_BCLK TXD1 IFPE_L1 A7 4.7uF/10V,X5R 1uF/16V,X5R
HDA_SDI TXD1 IFPE_L1 A6 XTAL_SSIN D11 XTAL_SSIN XTAL_OUTBUFF E9 XTALOUTBUFF_GPU

HDA_RST_N TXD2 IFPE_L0 C6


DACB_CSYNC TXD2 IFPE_L0 D6 GPU GPU 27M_nonSSC_IN D10 XTAL_IN XTAL_OUT E10 XTALOUT
GR13


10K 5%GPU
H6 IFPE_IOVDD IFPE_HPD GPIO15 F3 IFPE_HPD

0 5% XTAL_SSIN
GR14 {9} 27M_SSC GR15
GR43 10K 5% GR16
10K 5% GPU 10K 5%
U1C GPU
GPU GPU
GR17 0 5% 27M_nonSSC_IN
COMMON {9} 27M_nonSSC
+V3_3SGFX OP1 GPU
GR45 3/12 DACA GC133 18pF/50V,NPO XTALOUT


10K 5% ns
FB28 120 mA 16mil width

3
1 2GE1 DACA_VDD AG2 DACA_VDD GR18
GY1 1M 5%
A 300ohm@100MHz,300mA
GC162 GE1 AF1 DACA_VREF DACA_HSYNC AD2 GPU_CRT_HSYNC {47} ns A
GC158 GC157 GC159 DACA_VSYNC AD1 GPU_CRT_VSYNC {47} ns x4-3225
4.7uF/10V,X5R GE1 GE1 GE1470pF/50V,X7R AE1 DACA_RSET

DACA_RED AE2 GPU_CRT_R {47}

4
0.1uF/10V,X5R 4700pF/25V,X7R R132 150 1% R193 GPU_CRT_R
GE1
GC139 124 1% DACA_GREEN AE3 GC138 18pF/50V,NPO
GPU_CRT_G {47} 150 1% R194
DACA_VDD 0.1uF/10V,X5R GE1 GPU_CRT_G ns
GPU GPU DACA_BLUE AD3 GPU_CRT_B {47} 150 1%
C193 GC160 GC161
0.1uF/10V,X5R
R195
GE1 GPU_CRT_B
深圳仁聚科技有限公司
1uF/16V,X5R Title
0.1uF/10V,X5R N10m_CRT_I2C_STRAP
GE1 GE1 GE1
Size Document Number Rev
C M02 X1

Date: Wednesday, May 05, 2010 Sheet 32 of 67

5 4 3 2 1
5 4 3 2 1

U1E

COMMON

5/12 IFPAB
IFPA_TXD0 V4 GPU_LVDS_A_DN0 {48}
LVDS DUAL LINK OUTPUT IFP_A/B
IFPA_TXD0 V5 GPU_LVDS_A_DP0 {48}
GR46
+PEX_VDD 10K 5%
OP1 AA4


GFB3 IFPA_TXD1 GPU_LVDS_A_DN1 {48}
IFPA_TXD1 AA5 GPU_LVDS_A_DP1 {48}
D IFPAB_PLLVDD D
1 2 AD5 IFPAB_PLLVDD
AB6 IFPAB_RSET A
180ohm@100MHz,300mA IFPA_TXD2 Y4 GPU_LVDS_A_DN2 {48}
GE1 GC136 GC33 GC21 IFPA_TXD2 W4 GPU_LVDS_A_DP2 {48}
R133
0.1uF/10V,X5R 1K 1% R767 499 1%GE1 GPU_HDMI_CLKN
1uF/16V,X5R IFPA_TXD3 AB5 GPU_LVDS_A_DN3 {48} R766 499 1%GE1 GPU_HDMI_CLKP
4.7uF/10V,X5R R765 499 1%GE1 GPU_HDMI_TX0N


IFPA_TXD3 AB4 GPU_LVDS_A_DP3 {48}
GE1 GE1 ns R764 499 1%GE1 GPU_HDMI_TX0P
GE1 DATA R763 499 1%GE1 GPU_HDMI_TX1N
IFPB_TXD4 V1 GPU_LVDS_B_DN0 {48} R762 499 1%GE1 GPU_HDMI_TX1P
IFPB_TXD4 W1 GPU_LVDS_B_DP0 {48} R761 499 1%GE1 GPU_HDMI_TX2N
R760 499 1%GE1 GPU_HDMI_TX2P

GR47 IFPB_TXD5 W2 GPU_LVDS_B_DN1 {48}


+V1_8SGFX 10K 5% IFPB_TXD5 W3 GPU_LVDS_B_DP1 {48}


OP1 PQ4
GFB4

3
B +V3_3SGFX 2N7002PT
1 2 220mA IFPAB_IOVDD V3 IFPA_IOVDD IFPB_TXD6 AA3 GPU_LVDS_B_DN2 {48}
IFPB_TXD6 AA2 GPU_LVDS_B_DP2 {48}
180ohm@100MHz,300mA V2 IFPB_IOVDD 1
GE1 GC142 GC15 GC16 GC31 GC32
IFPB_TXD7 AA1 GPU_LVDS_B_DN3 {48} GE1

2
0.1uF/10V,X5R IFPB_TXD7 AB1 GPU_LVDS_B_DP3 {48} R758
C C
4.7uF/10V,X5R 0.1uF/10V,X5R 1uF/16V,X5R 1M 5%


1uF/16V,X5R GE1
GE1 GE1 GE1 IFPA_TXC AD4 GPU_LVDS_A_CLKN {48}
GE1 GE1 OP1 A IFPA_TXC AC4 GPU_LVDS_A_CLKP {48}
CLOCK
IFPB_TXC AB2 GPU_LVDS_B_CLKN {48} U1G
B IFPB_TXC AB3 GPU_LVDS_B_CLKP {48}
COMMON


IFPAB_HPD GPIO0 N1 GPIO0_GPU R192 10K 5% 7/12 IFPD
GT218 G98
ns
N6 IFPD_PLLVDD IFPE_PLLVDD
M6 IFPD_RSET IFPE_RSET

IFPC_PLLVDD 0 5% R794 IFPD_PLLVDD GT218


U1F G98 DVI/HDMI DP
ns


COMMON
R0402
GR48 I2CX_SDA IFPD_AUX D4
+V3_3SGFX 10K 5% 6/12 IFPC I2CX_SCL IFPD_AUX D3
FB27 OP1
B B
1 2GE1 IFPC_PLLVDD P6 IFPC_PLLVDD TXC IFPD_L3 B4
300ohm@100MHz,300mA IFPC_RSETR5 IFPC_RSET TXC IFPD_L3 B3
IFPE
GC143 GC34 GC38


C187 TXD0 IFPD_L2 C4
R223 TXD0 IFPD_L2 C3
4.7uF/10V,X5R 1uF/16V,X5R 0.1uF/10V,X5R 1K 1% DVI/HDMI DP
0.1uF/10V,X5R TXD1 IFPD_L1 D5
I2CW_SDA IFPC_AUX G5 GPU_HDMI_DDC_DATA {49} TXD1 IFPD_L1 E4
GE1 GE1 GE1 I2CW_SCL IFPC_AUX G4 GPU_HDMI_DDC_CLK {49}
GE1 TXD2 IFPD_L0 F4
GPU TXD2 IFPD_L0 F5
TXC IFPC_L3 J4 GPU_HDMI_CLKN {49}


TXC IFPC_L3 H4 GPU_HDMI_CLKP {49}
IFPD_HPD GPIO19 F2
+PEX_VDD
GE1 TXD0 IFPC_L2 K4 GPU_HDMI_TX0N {49}
FB26 TXD0 IFPC_L2 L4 GPU_HDMI_TX0P {49}
1 2 IFPCD_IOVDD J6 IFPCD_IOVDD
TXD1 IFPC_L1 M4 GPU_HDMI_TX1N {49}
220ohm@100MHz,300mA TXD1 IFPC_L1 M5 GPU_HDMI_TX1P {49}
GC148 GC22 GC23
C188 C189 GR49 TXD2 IFPC_L0 N4 GPU_HDMI_TX2N {49} OP1


GE1 GE1 0.1uF/10V,X5R
0.1uF/10V,X5R 10K 5% TXD2 IFPC_L0 P4 GPU_HDMI_TX2P {49}
1uF/16V,X5R OP1
A 1uF/16V,X5R A
4.7uF/10V,X5R GE1 GE1 IFPC_HPD GPIO1 G1 GPU_HDMI_DET {49}
GE1
深圳仁聚科技有限公司
OP1 Title
N10m_LVDS_HDMI


Size Document Number Rev
B M02 X1

Date: Wednesday, May 05, 2010 Sheet 33 of 67


5 4 3 2 1
1 2 3 4 5 6 7 8


A A


B

必 B




C C


D

文 D


深圳仁聚科技有限公司
Title
blank

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 34 of 67


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8


A A




B B


C

, C



D

密 D


深圳仁聚科技有限公司
Title
BLANK

Size Document Number Rev


Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 35 of 67


1 2 3 4 5 6 7 8
5 4 3 2 1


D D

+V5S
Co-layout with APL5315A

PU2
Vout=0.8*(1+220/100)=3.36

+VCCADAC



1 SHDN OUT 4

R825
100K 1%

GND
C C
3 IN SET 5 CS93
C39


10uF/6.3V,X5R
1uF/16V,X5R ns

2
G913CF R824 C0805
100K 1%
ns
ns
ns
ns


B

, B




A A

深圳仁聚科技有限公司
Title
BLANK


Size Document Number Rev
Custom C02 A

Date: Wednesday, May 05, 2010 Sheet 36 of 67


5 4 3 2 1
1 2 3 4 5 6 7 8

+V3_3S 0.1uF/16V,X7R
EC_V3.3AL
FB2 +V3_3AL
120ohm@100MHz,500mA R139 +V3_3AL C19 C20 C21 C22 C23 C24 C25
R138 0 5% 10uF/6.3V,X5R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R 0.1uF/16V,X7R
8.2K 5% 1 2 EC_V3.3AL EC_SPI_MOSI R145 10K 5% ns
EC_SPI_MISO R146 10K 5% ns
EC_SPI_SCK R147 10K 5% ns
D1 C27 C28 V18R
Should have a 0.1uF capacitor close to every
1 1N4148WS A20GATE 0.1uF/16V,X7R 0.1uF/16V,X7R GND-VCC pair + one larger cap on the supply.

V18R
{22} H_A20GATE
SOD323 SM_BAT_SDA2 R148 2.2K 5%
EC Output Signal! C29 SM_BAT_SCL2 R149 2.2K 5%
+V3_3S 0.1uF/16V,X7R C30 LIDR# R150 10K 5%

124

111

125

EC_dGPU_PWR_ON R151 10K 5%

67

96
33
22
1uF/16V,X5R

9
U2

V18R

AVCC

VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
R143 ALT_ON R156 10K 5% ns
A 10K 5% PWRSW# R158 10K 5% A
D2 63 EC_PEX_RST# R159 10K 5%
AD0/GPI38

ADC
1 1N4148WS RCIN# 64 TPCLK R160 10K 5% ns
{22} KBRST# AD1/GPI39 BAT_I_Sense {56}
SOD323 A20GATE 1 65 R144 TPDAT R161 10K 5% ns
GA20/GPIO00 AD2/GPI3A AD_I_Sense {56,66}
RCIN# 2 66 PCB_Mark0 10K 5%
+V3_3S EC_RUN_SCI# KBRST#/GPIO01 AD3/GPI3B THER_ALERT# R162 10K 5%
20 SCI#/GPIO0E

MSIC
EC_RESET# 37 ECRST#


R155
10K 5% 12 21
{21} CLK_PCI_KBC PCICLK PWM0/GPIO0F BTL_BEEP {39}

PWM
D3 3 23
{17,38} INT_SERIRQ SERIRQ PWM1/GPIO10 POWER_LED {51,54}
1 1N4148WS EC_RUN_SCI# 4 25 T37 ns EC_V3.3AL
{22} RUN_SCI# {17,38} LPC_FRAME# LFRAME# GPIO11/PWM2
SOD323 10 34 ICTP ns
{17,38} LPC_AD0 LAD0 GPIO19/PWM3 EC_BKLT_PWM {48}
8 R548 10K 5%
{17,38} LPC_AD1 LAD1
+V3_3AL 7 R80
{17,38} LPC_AD2 LAD2
5 AT88_CTL 100 1%

LPC
{17,38} LPC_AD3 LAD3
EC_PCI_RST# 13 28 R0402
PCIRST#/GPIO05 FANFB0/GPIO14 FAN_BACK {51}

1
FAN
ns R152 0 5% 38 29 AT88_SCL R652 R648
{19} PM_CLKRUN# CLKRUN#/GPIO1D FANFB1/GPIO15
R154 4.7K 5% EC_PCI_RST# 26 Q25 10K 5% 10K 5% EC_V3.3AL_U3
C476 4.7uF/6.3V C0603
FANPWM0/GPIO12 FAN1_V {51}
27 AT88_DATA 2N7002PT
EC_BUF_PLT_RST# R157 0 5% FANPWM1/GPIO13 ns U22
2 3 ns
SCANIN7


62 KSI7/GPIO37 8 VCC NC1 1
SCANIN6 61 7 2
KBCON1 SCANIN5 KSI6/GPIO36 AT88_SCL R543 0 5% AT88_SCL_R NC4 NC2
60 KSI5/GPIO35 ns 6 SCL NC3 3
85202-26151 SCANIN4 59 ns ns AT88_DATA 5 4
+V5S +V3_3AL SCANIN3 KSI4/GPIO34 ns SDA GND
58 KSI3/GPIO33
SCANIN2 57 83 AT88SC0104CA
KSI2/GPIO32 PSCLK1/GPIO4A/P80CLK TPCLK {51}
26 KB_CAP_LED# R642 330 5% SCANIN1 56 84 SO8_50_150
26 KSI1/GPIO31 PSDAT1/GPIO4B/P80DAT TPDAT {51}

PS2
25 R641 330 5% SCANIN0 55 85
25 KSI0/GPIO30/E51_TXD(ISP) PSCLK2/GPIO4C HW_RATIO_OFF2# {45}
24 SCANOUT15 ns 86
24 PSDAT2/GPIO4D HW_RATIO_OFF1# {44,54} ns
23 SCANOUT14 +V3_3AL 82 87
23 KSO17/GPIO49 PSCLK3/GPIO4E EC_PROCHOT2# {11}
22 SCANOUT13 81 88 EC_SMI# +V3_3AL
22 SCANOUT12 SCANOUT15 KSO16/GPIO48 PSDAT3/GPIO4F
21 21 54 KSO15/GPIO2F/E51_RXD(ISP)
20 SCANOUT11 KB_CAP_LED# R631 SCANOUT14 53
20 SCANIN7 ns SCANOUT13 KSO14/GPIO2E
19 52


19 4.7K 5% KSO13/GPIO2D
18 SCANOUT10 SCANOUT12 51 For CPU thermal sensor
18 KSO12/GPIO2C
3

KB
17 SCANIN6 SCANOUT11 50 0 5% R169 R166 I

KB3926
17 KSO11/GPIO2B EC_SMB2_DAT_3AL {18}
16 SCANIN5 Q32 1R639 KB_CAP_LED#_CTL SCANOUT10 49 0 5% R170 4.7K 5% +V3_3AL
16 KSO10/GPIO2A EC_SMB2_CLK_3AL {18}
15 SCANOUT9 HMBT3904 4.7K 5% SCANOUT9 48
B 15 SCANIN4 SCANOUT8 KSO9/GPIO29 B
14 47 8 1EC_SPI_CS# R165 4.7K 5%
2

14 KSO8/GPIO28 VCC CS#

SMBUS
13 SCANOUT8 SCANOUT7 46 80 EC_RESET# R681 0 5% +V3_3AL_PWROK 7 2EC_SPI_MISO ns
13 KSO7/GPIO27 SDA1/GPIO47 EC_SMB0_DAT_3AL {32} HOLD# DO
12 SCANOUT7 SCANOUT6 45 79 ns EC_SPI_SCK 6 3 R167 4.7K 5%
12 KSO6/GPIO26 SCL1//GPIO46 EC_SMB0_CLK_3AL {32} CLK WP#
11 SCANOUT6 SCANOUT5 44 78 EC_SPI_MOSI 5 4
11 KSO5/GPIO25 SDA0/GPIO45 SM_BAT_SDA2 {55} DIO GND
10 SCANOUT5 SCANOUT4 43 77 C34
10 KSO4/GPIO24 SCL0/GPIO44 SM_BAT_SCL2 {55}
9 SCANOUT4 SCANOUT3 42 U3 1uF/16V,X5R
9 SCANOUT3 SCANOUT2 KSO3/GPIO23/TP_ISP C0603
8 8 41 KSO2/GPIO22
7 SCANIN3 SCANOUT1 40 W25X40AVSSIG
7 SCANOUT2 SCANOUT0 KSO1/GPIO21/TP_PLL
28 6 39 97


28 6 KSO0/GPIO20/TP_TEST GPXOA00/SDICS# BTL_LED