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Annals of the University of Craiova, Electrical Engineering series, No.

32, 2008; ISSN 1842-4805


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TOTAL LOSS DISTRIBUTION IN THREE-LEVEL


STACKED NPC CONVERTER

Dan FLORICAU1, Dragos KISCH1, Ioan POPA2


1)
Politehnica University of Bucharest, Faculty of Electrical Engineering, 313 Splaiul
Independentei, 060042 Bucharest, 2)University of Craiova, Faculty of Electrical
Engineering, 107 Bd.Decebal, 200440 Craiova
danfl2005@yahoo.com

Abstract  Static converters design has to ensure that in Recently, a new structure 3L-SNPC (Stacked NPC)
all specific operating conditions the junction was developed [9-10]. This converter is a
temperature of power devices does not exceed the combination between 2 well-known 3L concepts (3L-
admitted limits. The junction temperature of power SC and 3L-NPC) and it improves the static
devices is a direct consequence of conduction and
conversion.
switching losses. The unequal distribution of losses
among the semiconductors represents one major This paper calculates and compares the losses in
disadvantage for 3L-SC (Stacked Cells) and 3L-NPC power devices between three 3L topologies: 3L-SC,
(Neutral Point Clamped) converters. The paper studies 3L-NPC and 3L-SNPC. The structures are composed
the loss distribution problem for 3L-SC and 3L-NPC by IGBT modules type Eupec FF200R33KF2C, and
topologies and proposes the 3L-SNPC (Stacked NPC) the clamp diodes are equivalent to the IGBT
converter to overcome this drawback. A numeric modules’ diodes. The switching states and
calculus method for the total losses in switches was commutations of the converters are analyzed and
developed in order to compare the analyzed structures. their influence on the balancing of losses within the
The 3L-SNPC converter allows the natural doubling of
converter is explained.
the apparent switching frequency and leads to a better
balancing of total losses. A numeric calculus method for total losses in switches
was elaborated to compare the studied structures. The
Keywords: Three-level converters, Power losses, analytic expressions for medium and effective currents
Voltage source converter. in conduction and switching states were also
calculated. A validation of these expressions was made
using PSIM simulations. The analysis made on the 3L-
1. INTRODUCTION
SC and 3L-NPC topologies proved that the losses in
Multilevel structures have been studied for over 25 middle side power devices (3L-SC) and the losses in
years and they represent an intelligent solution to inner switches (3L-NPC) increase simultaneously with
connect serial switches [1]. The first developed the reducing of the modulation index. This leads to the
topology consisted in a serial connection of single- increase of the junction temperature in power devices,
phase inverters with DC separate sources [2]. This which limits the converters output power and the
structure was followed by a stacked commutation switching frequency, especially at zero speed
cells concept in order to obtain a multilevel operating. The paper shows that 3L-SNPC structure
conversion (SC – Stacked Cells) [3-4]. Following the has more degrees of freedom and allows a better
SC structure, a new multilevel NPC (Neutral Point balancing of losses in power devices.
Clamped) topology was developed [5]. This is the
most popular multilevel conversion structure. The 2. POPULAR THREE-LEVEL STRUCTURES
3L-NPC converter are considered a particular way of
implementing the 3L-SC topology. The role of the 2.1. Three-Level SC Converter
middle switches in the 3L-SC structure is taken by
the inner switches and by the 2 clamp diodes. Later, The 3L-SC structure is made of 6 switches disposed
another invention [6] introduced the concept of the on three sides (Fig.1). Each switch is capable to
multilevel converter with flying-capacitors (FC – support a voltage equal to VDC/2. The exterior sides
Flying Capacitor). In the range of low and moderate are made of 2 switches serially connected and the
switching frequencies (200Hz – 1kHz), the 3L-NPC middle side is composed by 2 switches opposite
converter is especially advantageous because of the connected. The switches form 3 commutation cells
required flying-capacitor size, which is inversely controlled with D1, D2 and D3 duty cycles: cell 1 (S1-
proportional to the switching frequency. The 3L-NPC S1c), cell 2 (S2-S2c) and cell 3 (S3-S3c). A sinusoidal
structure performances were improved by developing PWM strategy was used in order to emphasize the
the 3L-ANPC (Active NPC) converter [7-8]. constraints applied to 3L-SC converter [9].

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The PWM strategy has 4 switching states (Table 1).


Two switching states (P and N) correspond to direct
connection of the load at DC voltage and the other
two correspond to obtain zero states (O1- and O2+).
For the state P (VDC/2) the switches S1, S2 and S3
must be turned on. For the state N (-VDC/2) the
switches S1c, S2c and S3c must be turned on.
The state O1- is obtained when the reference output
voltage is negative. In this case, the S1c, S2c and S3
are turned on. The state O2+ is obtained when the
reference output voltage is positive. For this
switching sequence the S1c, S2 and S3 must be turned
on.
A calculus methodology for the total losses in
switches was developed in order to emphasize the
unequal distribution of losses. This methodology was Figure 2: Simulated distribution of losses in 3L-SC
first carried out in [11], and was extended in section converter featuring Eupec IGBTs (VDC= 3000V,
4. By using this methodology for the analyzed 3L Irms=200A, fs=1000Hz, Eupec FF200R33KF2C):
structures, it has been observed that the conduction (a) PF=-1, M=0.05, (b) PF=1, M=0.95.
and switching losses of the power devices depend on
the operating points and on the PWM strategy. The 2.2. Three-Level SC Converter
most critical operating points are located at the
boundaries of the converter’s operating area, being The 3L-NPC is the most popular 3L topology
maximum and minimum modulation depth (M), at [Fig.3(a)]. It is composed by 4 bidirectional switches
power factor PF=1 and PF=-1. and 2 clamp diodes. Each switch is capable to
support a voltage equal to VDC/2. The switches form
S1 2 basic commutation cells: cell-1 (S1-S1c) and cell-2
Duty cycle
+
- 1 (S2-S2c). These are controlled by D1 and D2 duty
S2 cycles. The duty cycle presented in Fig.3(b) was used
iload D3 D2 D1 to analyze the switching states.
O A
S1c S3
+ -1 0 1 S1
- vAO [u.r.] Duty cycle
VDC S2c +
S3c - 1
(a) (b)
Du S2
iload D2 D1
Figure 1: Three-level SC converter: O A
(a) topology, (b) duty cycle control. Dd
+ -1 0 1
- vAO [u.r.]
Output Switch Sequence VDC S1c
Switching S2c
Voltage (a) (b)
State S1 S1c S2 S2c S3 S3c
(vAO)
-VDC/2 N 0 1 0 1 0 1 Figure 3: Three-level NPC converter:
0
O- 0 1 0 1 1 0 (a) topology, (b) duty cycle control.
O+ 0 1 1 0 1 0
VDC/2 P 1 0 1 0 1 0 The 3L-NPC topology has only 3 switching states: P,
O and N (Table 2). The P and N states correspond to
Table 1: Switching sequences of 3L-SC converter. a direct connecting of the load with the DC supply
voltage. The P state is obtained by turning on the
Fig.2 shows the conduction (Pcon) and switching losses switches S1 and S2. Similarly, the N state is obtained
(Psw) for 2 operating modes. The losses for the by turning on the S1c and S2c.
switches were emphasized when the distribution is
most unbalanced. All operating points in between are Output Switch Sequence
Switching
Voltage
less critical. (vAO)
State S1 S1c S2 S2c
In the case of PF=-1 and small modulation index -VDC/2 N 0 1 0 1
(M=0.05) the middle side transistors (T1c and T3) are
0 O 0 1 1 0
the most stressed devices for rectifier operating mode
[Fig.2(a)]. The transistors from exterior sides (T1 and VDC/2 P 1 0 1 0
T3c) are the most stressed devices for inverter
operating mode, when PF=1 and M=0.95 [Fig.2(b)]. Table 2: Switching sequences of 3L-NPC converter.

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The zero state is obtained when the inner switches S1c


S1
and S2 are turned on. In this case, the inductive load Duty cycle
+
current passes through 2 different paths, depending - 1
S2 D2
on its direction. If the load current is positive, the Du D3
O A iload
paths will be through the Du diode and S2. If the load
D1
current is negative, the paths will be through Dd and Dd S1c S3
-1 0 1
S1c. The existence of a single one switching zero state + vAO [u.r.]
represents a limitation on the 3L-NPC structure that -
VDC S2c
has direct consequences for the distribution of losses S3c
(a) (b)
among the switches.
Fig.4 shows the conduction and switching losses (Pcon Figure 5: Three-levels SNPC converter:
and Psw) for 2 operating modes. They were (a) topology, (b) duty cycle control.
emphasized the losses for the outer and inner
switches and for the clamp diodes when the The clamp diodes Du and Dd are similarly connected
distribution is most unbalanced. All operating points to the 3L-NPC converter. The 3L-SNPC converter
in between are less critical. In the case of PF=-1 and has more degrees of freedom and can be controlled
small modulation index (M=0.05) the inner with different PWM strategies. In this paper a
transistors (T2 and T1c) are the most stressed devices sinusoidal PWM strategy is presented (Fig.6). It
for rectifier operating mode [Fig.4(a)]. The outer allows the natural doubling of the apparent switching
transistors (T1 and T2c) are the most stressed devices frequency. The intention is not to save total converter
for inverter operating mode, when PF=1 and M=0.95 losses, but to distribute them equally. In order to
[Fig.4(b)]. emphasize this advantage, the states and sequences
are analyzed at one switching period Ts.

VDC/2 VDC/2
Sd2 Sd1 Sd2 Sd1

Sr
O1+ P O2+ P O 1+
0 0
O1 - O2 - O1 -
Sr
N N
-VDC/2 -VDC/2
0 Ts 0 Ts

S1 S1

S1c S1c

S2 S2

S2c S2c

S3 S3

S3c S3c

Figure 4: Simulated distribution of losses in 3L-NPC vAO 0


VDC/2
VDC/2 vAO
converter featuring Eupec IGBTs (VDC= 3000V, 0
(b)
Irms=200A, fs=1000Hz, Eupec FF200R33KF2C): (a)

(a) PF=-1, M=0.05, (b) PF=1, M=0.95.


Figure 6: Sinusoidal PWM for 3L-SNPC converter:
(a) Sr>0, (b) Sr<0.
3. THREE-LEVEL SNPC CONVERTER
The reference voltage Sr is compared with 2 carrier
The 3L-SNPC (Stacked Neutral Point Clamped) waves Sd1 and Sd2 that are phase-shifted on the
converter represents a static conversion concept with horizontal axis with Ts/2. The 3L-SNPC has 6
three voltage levels [Fig.5(a)]. switching states: P, N, O1-, O2-, O1+ and O2+ (Table
The 3L-SNPC converter is composed by 6 3). The switches S1, S2 and S3 must be turned on in
bidirectional switches disposed on 3 sides and 2 order to obtain the switching state P (VDC/2). The
clamp diodes [9-10]. The exterior sides are made of 2 state N (-VDC/2) is obtained by turning on the
switches serially connected (S1-S2 and S2c-S3c) and switches S1c, S2c and S3c. In the case of P and N
the middle side is composed by 2 switches oppositely sequences the load current paths through the switches
connected (S1c-S3). Each switch is capable to support are the same with the other 3L converters studied in
a voltage equal to VDC/2. The bidirectional switches the paper. For the zero states, 4 different control
are grouped in 3 basic commutation cells: cell-1 (S1- sequences are used: O1-, O2-, O1+ and O2+. The state
S1c), cell-2 (S2-S2c) and cell-3 (S3-S3c). These are O1- is obtained when the switches S2c and S3 are
controlled by D1, D2 and D3 duty cycles [Fig.5(b)]. turned on and S1, S1c, S2 and S3c are turned off.

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Annals of the University of Craiova, Electrical Engineering series, No. 32, 2008; ISSN 1842-4805
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Output
Switching Switch Sequence mode when PF=1 and M=0.95 [Fig.7(b)]. In this
Voltage case, the total losses in the most stressed switches are
State S1 S1c S2 S2c S3 S3c
(vAO)
reduced with 20% in comparison with the other
-VDC/2 N 0 1 0 1 0 1
studied structures, without any additional
O1- 0 0 0 1 1 0 semiconductor expense.
O2- 0 1 1 0 0 1
0
O1+ 0 1 1 0 0 0
O2+ 1 0 0 1 1 0
VDC/2 P 1 0 1 0 1 0

Table 3: Switching sequences of 3L-SNPC converter.

If the load current is positive, it will pass through the


switches from the middle side (S1c and S3). If the load
current is negative, it will pass through S2c and the
clamp diode Dd. The state O2- is obtained when S1c,
S2 and S3c are turned on and S1, S2c and S3 are turned
off. Depending on its direction, the inductive load
current will pass through 2 different paths. If the load
current is positive, it will pass through S2 and clamp
diode Du. If the load current is negative the path will
be through the switches contained in the middle side Figure 7: Simulated distribution of losses in 3L-SNPC
(S1c and S3). The state O1+ is obtained when the converter featuring Eupec IGBTs (VDC= 3000V,
switches S1c and S2 are turned on and S1, S2c, S3 and Irms=200A, fs=1000Hz, Eupec FF200R33KF2C):
S3c are turned off. The paths of the load current are (a) PF=-1, M=0.05, (b) PF=1, M=0.95.
similarly with the state O2-. The state O2+ is obtained
when S1, S2c and S3 are turned on and the switches 4. CALCULUS OF TOTAL LOSSES
S1c, S2 and S3c are turned off. The paths of the load
current are similarly with the O1- case. The evolution of temperature in IGBT modules is a
These switching sequences lead to a natural doubling direct consequence of the total losses and imposes the
of the apparent switching frequency similar to the maximum power that can be delivered by power
flying-capacitor concept (3L-FC), although the 3L- switches.
SNPC converter does not have flying-capacitors. The following hypotheses were considered to
Another advantage of the PWM strategy consists in calculate the losses in power devices:
the natural improving of the static conversion when x the load current is sinusoidal;
the reference voltage is close to zero value. The dead x the current and voltage ripples are neglected;
times do not influence the operating of the converter x the dead times of the IGBT modules are
at Sr # 0, because the commutations are made by neglected.
using 2 different basic cells. Thus, close to zero The total losses (PX) are made of conduction losses
voltage, when Sr>0 the cells 1 and 2 switch and and switching losses:
when Sr<0 the cells 2 and 3 switch. The control
PX PconX  PswX (1)
principle can be used at every switching frequency
(higher or lower) without requiring structural changes 4.1. Conduction losses
in the frame of the structure (e.g. modification of
some flying capacitors, as in the case of 3L-FC The conduction losses are obtained as a sum of
converter). conduction losses in transistors (PconT) and diodes
Fig.7 shows the conduction and switching losses (Pcon (PconD):
and Psw) for both operating modes (rectifier/inverter) PconX PconT  PconD (2)
in the most critical operating points. All operating
points in between are less critical. PconT conT
vCE 0 ˜ I avg conT
 rdT ˜ I rms 2
(3)
In the case of PF=-1 and small modulation index
(M=0.05) the switches T1c, T2, T3 and T2c are the
PconD conD
v D 0 ˜ I avg  rdD ˜ I conD 2
rms (4)
most stressed devices in rectifier operating mode
[Fig.7(a)]. It is observed that in comparison with 3L- where: vCE0, rdT, vD0 and rdD – parameters of the
NPC and 3L-SC structures the 3L-SNPC allows a conX conX
decrease of 50% of the total losses in the most transistors and diodes, I avg and I rms – average
stressed switches. The inner transistors (T2 and T2c) and RMS values of the conduction current through X
are the most stressed devices in inverter operating semiconductor.

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The expressions for conduction losses depend on the where, AswX, BswX, CswX and vdef – constants taken from
RMS load current (I). The paper presents an example the IGBT’s characteristics; ǻsw – ratio between the
to calculate the conduction losses in T1 transistor switching interval and the switching period for
from the S1 switch (3L-SC, 3L-NPC and 3L-SNPC). swX
semiconductor device; I avg swX
and I rms – average
The modulation function for T1 is sinusoidal:
and RMS values of the switched current through X
fT1 x M ˜ sin x , x  >0,S @ (5) semiconductor, fs – switching frequency and vsw –
switched voltage.
The T1 transistor is in conduction during [T, S]
The expressions for switching currents also depend
interval. As a result, the average and RMS values of
on the commutation intervals and on the RMS load
the conduction current through T1 semiconductor can
current (I). The paper presents an example to
be written:
calculate the switching losses in T1 transistor from
1
S the S1 switch (3L-SC, 3L-NPC and 3L-SNPC). This
conT1
I avg ³ 2 ˜ I ˜ sin x  T ˜ f T 1 x ˜ dx transistor switches on [T, S] interval. As a result, the
2S (6)
T average and RMS values of the switching current
I ˜ 2 ˜M through T1 semiconductor can be written as follows:
˜ > S  T ˜ cos T  sinT @
4 ˜S S
swT 1 1
I avg ˜ ³ 2 ˜ I ˜ sin x  T ˜ dx
1
S 2S
(12)
³
conT 1 2 T
I rms 2 ˜ I ˜ sin x  T ˜ f T 1 x ˜ dx
2S (7) I˜ 2
T
˜ 1  cos T
M ª 4 1 º 2S
I˜ ˜ «1  ˜ cos T  ˜ cos 2 ˜ T »
2S ¬ 3 3 ¼ S
1
³ 2
swT 1
For the other switches, the conduction losses are I rms 2 I sin x  T ˜ dx
2S
similarly calculated but the modulation functions and T (13)
the conduction intervals differ from a switch to 1 § sin 2T ·
another for each structure. I ˜ ¨S  T  ¸
2S © 2 ¹
4.2. Switching losses
For the other switches, the switching losses are
The IGBTs designers deliver the characteristics for similarly calculated but the commutation intervals
the consumed energy at the turning off Eoff(IC) and differ from a switch to another for each structure.
the consumed energy at the turning on Eon(IC). These
characteristics depend on the switched voltage (vdef) 5. CONCLUSIONS
and on the switched current IC. For an entire
switching period, the total energy absorbed by a In this paper the distribution of losses among the
semiconductor device at vdef corresponds to the sum semiconductors in the three-level SC and NPC
of these energies: converters has been investigated. The analysis shows
Evdef I C Eon I C  Eoff I C (8) an unequal distribution, which severely limits the
output power of the converter. The 3L-SC and 3L-
This sum (8) can be approximated with a parabola NPC concepts were extended to the 3L-SNPC
with AswX, BswX and CswX coefficients: concept, in order to overcome this drawback. A
numeric calculus method for total losses in switches
Evdef I swX swX
AswX  BswX ˜ I avg swX
 C swX ˜ I rms 2
(9) was elaborated to compare the studied structures and
the analytic expressions for average and effective
The following law of proportionality is used to take currents in conduction and switching states were also
into account the real commutation voltage (vsw) for calculated. A validation of these expressions has been
transistors: made using PSIM simulations.
v sw The 3L-SNPC converter has more degrees of

Evdef v sw , I swX v def
˜ Evdef I swX (10) freedom and can be controlled with different PWM
strategies. The sinusoidal PWM strategy described in
For a semiconductor device that switches at fs on 'sw the paper presents new switching states and
interval, the switching losses can be written as commutations that enable a substantial improvement
follows: of the unequal distribution. The performances of this
PWM strategy have been compared with other 3L
v sw §
PswX fs swX swX
¨ AswX ' sw  BswX I avg C swX I rms
v def ©
·¸¹ (11)
2
structures. The total losses in 3L-SNPC converter are
not smaller, but a better balancing of losses is
obtained. The 3L-SNPC topology allows the natural

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doubling of the apparent switching frequency, Inverters”, IEEE Power Electronics Specialist
similarly with the 3L-FC concept. This represents an Conference, 1992, pp.397-403.
important advantage because the 3L-SNPC converter [7] T.Brückner, S.Bernet, Loss balancing in three-
does not have flying-capacitors. level voltage source inverters applying active
NPC switches, Proc. IEEE PESC, Vancouver,
References 2001, pp.1135-1140.
[8] T.Brückner, S.Bernet, H.Güldner, The Active
[1] J.Rodriquez, J.-S.Lai, F.Z.Peng, Multilevel NPC Converter and Its Loss-Balancing Control,
Inverters: A Survey of Topologies, Controls, and IEEE Trans.Ind.Electronics, Vol.52, 2005,
Applications, IEEE Trans. on Ind. Electronics, pp.855—868.
Vol.49, 2002, pp. 724-738.
[9] D.Floricau, G.Gateau, M.Dumitrescu,
[2] R.H.Baker, Electric Power Converter, R.Teodorescu, A New Stacked NPC Converter:
U.S.Patent 3 867 643, 1975. 3L-topology and control, 12th European
[3] P.Bhagwat, V.R.Stefanovic, Generalized Conference on Power Electronics and
structure of a multilevel PWM inverter, IEEE Applications – EPE 2007, Aalborg, Denmark,
Industry Applications Society Annual Meeting, 2007, pp.1—10.
1980, pp.761-767. [10] D.Floricau, E. Floricau, G. Gateau, Three-level
[4] W.E.Brumsickle, D.M.Divan, T.A.Lipo, SNPC Commutation Cell: Features and
Reduced Switching Stress in High-Voltage IGBT Control, IEEE International Symposium on
Inverters via a Three-Level Structure, Applied Industrial Electronics – ISIE, Cambridge, UK,
Power Electronics Conference and Exposition 2008, pp.44-49.
APEC’98, Vol.2, 1998, pp.544-550. [11] D.Floricau, G.Gateau, I.Popa, M.Dumitrescu,
[5] A.Nabae, I.Takahashi, H.Akagi, A new neutral- Calculus of total losses in three-levels voltage
point-clamped PWM inverter, IEEE source converters, International Workshop on
Trans.Industry Applications, Vol.IA-17, 1981, Computational Problems of Electrical
pp.518-523. Engineering-CPEE 2007, Wilkasy, Polonia,
[6] T.A.Meynard, H.Foch, Multi-level Conversion: 2007, pp.131—134.
High Voltage Choppers and Voltage-Source-

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