4 views

Uploaded by money_kandan2004

Digital Logic Circuits Notes

- Power Gating Structure for Reversible Programmable Logic Array
- A Simple Research Proposal
- UIET ECE Curriculum
- 2 - The Mosfet
- Analog & Digital[Microp]
- Nmos inverter
- Course Coverage EE 330 Fall 2012
- TTL AND C
- Homework Assignment
- ds8vjvjv
- Electronic_Devices.pdf
- VLSI Question Bank.pdf
- EKV26_QUCS
- 01568712.pdf
- Logic Gates
- 6568738 Cmos Transistor Theory 1
- Cmosvlsi Devicech Psr
- Lec3 Switch
- 06044961
- chapter5.ppt

You are on page 1of 82

Introduction

Classification:

1. Bipolar

a. Saturated

b. Unsaturated

i. Schottkey TTL

2. Unipolar

3. CMOS(Complementary MOSFET)

simply saturated logic. TTL is the example of a

saturated logic.

leave.

5. Power dissipation

6. Propagation delay

Power and Ground

TTL is +5V and V DD for CMOS device can range from +3V

to + 1 8 V.

package.

be indeterminate and should not be used as inputs to

table

Low

High Low High

Indeterminate Indetermina

Logic Logic Logic Logic

State te State

0 1 0 1

0 to

2 to 0 to > .4 and < 2.4

>0.8 and <2

0.8 5 0.4 2.4 to 5

Low Low

Indetermin High Indetermi High

Logic Logic

ate State Logic 1 nate State Logic 1

0 0

>1.5 and

0 to >0.8 and <2 0 to 3.5 to

2 to 5

0.8 1.5 <3.5 5

The fig (a) & (b) show the input logic voltage range

Figure (b) CMOS Voltage Range

Noise immunity and Noise margin

V IL (max).

logic circuit.

in volts.

V NH = V OH – V IH (min)

V NL = V IL (max) – V OL (min)

Power Dissipation

Transition or Low state, there are three different

transition.

Propagation Delay

Figure Propagation delay

time.

Fan in and Fan Out

input AND gate has fan-in of two, a three input NAND gate

one

TTL (Transistor-Transistor Logic) circuit

1. Standard TTL.

3. Schhottky TTL.

A B Q

0 0 1

0 1 1

1 0 1

1 1 0

Construction

TR2.

Operation:

is logic 1.

totem-pole output

Construction

GND-side transistor.

Input Output

A B Vo

0 0 1

0 1 1

1 0 1

1 1 0

Circuit Operation –High input state

terminal drops.

state logic 1.

- If both transistors were ON at the same time,

HIGH state.

TTL outputs.

HIGH state.

Construction

Circuit Operation

cannot source current). To get a HIGH output, an

output.

Figure: TTL NOR Gate

a PN junction,

flow.

signal source.

resistor is needed

Outputs of two gates cannot be Outputs of two gates can

Advantages

5. Low cost

ECL (Emitter coupled logic) circuit

logic.

level at V IN .

Figure: Basic ECL

and

output levels

V OU T1 = V IN , and V OU T2 = V IN

out of the terminal is negative. The OR -NOR gate has a

- Applying HIGH input to the base of the transistor

network.

AND–NAND gate

Figure ECL AND NAND Logic

Characteristics of ECL

Advantages

Disadvantages

MOS

three categories:

small chip.

inexpensive to fabricate.

Disadvantage:

damage.

logic 0.

NMOS NAND Operation Table

Inputs

Q2 Q3 Output

A B

0 1 OFF ON 1 ( HIGH)

1 0 ON OFF 1 ( HIGH)

1 1 ON ON 0 ( LOW)

Inputs

Q2 Q3 Output

A B

0 1 OFF ON 0 ( LOW)

1 0 ON OFF 0 ( LOW)

1 1 ON ON 0 ( LOW)

- If any of the inputs A or B is logic 1, the

Input Q2 Output

0 OFF 1 (HIGH)

1 ON 0 (LOW)

- It has two MOSFETs in series in such a way that

ground.

will be ON.

Figure CMOS NAND & NOR

CMOS NOR

CMOS NAND

gets turned OFF and vice versa. Thus LOW output will

Loading and Fan-out in CMOS family

gates.

discharging.

increases.

of 50 for low frequency operation. For high frequency

Dynamic CMOS

networks.

an NMOS device.

during the pre charge cycles. This is avoided in domino

Cout can discharge through logic array and Mn. This gives

If the inputs cause the block to behave like an

output is 1

Gated pre-charged low, 2 input PMOS NOR gate

charge inputs

is 0

Clock Mode Vout

output is 0

charge inputs

is 1

Advantages over static logic:

- Power Gating Structure for Reversible Programmable Logic ArrayUploaded byAnonymous ox4aPr
- A Simple Research ProposalUploaded byDharamvir Kumar
- UIET ECE CurriculumUploaded byCopenhagen Alex
- 2 - The MosfetUploaded byroxy8marie8chan
- Nmos inverterUploaded byasifcjabbar
- Analog & Digital[Microp]Uploaded byBharath Ch
- Course Coverage EE 330 Fall 2012Uploaded byDebolina Ghosh
- TTL AND CUploaded byManas Nag
- Homework AssignmentUploaded bySơn Nguyễn
- ds8vjvjvUploaded bykrishnagdeshpande
- Electronic_Devices.pdfUploaded bys12original
- VLSI Question Bank.pdfUploaded byJoshua Duffy
- EKV26_QUCSUploaded byCharanraj Mohan
- 01568712.pdfUploaded bybptimst
- Logic GatesUploaded byJulio Gabriel Aseron
- 6568738 Cmos Transistor Theory 1Uploaded byVenkatesh Desineni
- Cmosvlsi Devicech PsrUploaded bymoazzam hussain
- Lec3 SwitchUploaded byAzman Mat Hussin
- 06044961Uploaded byblue_sky_lx
- chapter5.pptUploaded byGayathriRaji
- pu syllabu ece 2013-14Uploaded byRajinder Maurya
- Improve Offset Speed AccuracyUploaded byPavan Pakki
- Circuit Tech 2010Uploaded byVishaal Dhamotharan
- Main Paper EC-306.docUploaded bySachin Pal
- 64 Modeling NmosUploaded byDuc Duc
- Lab10 Logic GatesUploaded bysai sumanth
- 55709_1Uploaded byAnonymous HyOfbJ6
- wkUploaded byMary Morse
- hw9Uploaded bySaied Aly Salamah
- Comp Electronics PptUploaded byraipras

- PID TuningUploaded bymoney_kandan2004
- An Internal startup circuit for pacemakers using body temperature.pdfUploaded bymoney_kandan2004
- FOLI - Unit 1 NotesUploaded bymoney_kandan2004
- AwayFromHome-TimeWorksheetUploaded bymoney_kandan2004
- Malaysian Technical PLC PPTUploaded bymoney_kandan2004
- Performance Analysis of Chaos Controllers in Dc-dc PowerUploaded bymoney_kandan2004
- Linear Integrated Circuit 2nd Edition - D. Roy Choudhary.pdfUploaded bymoney_kandan2004
- PLC Scan.pptxUploaded bymoney_kandan2004
- 555 Timer (Important)Uploaded bymoney_kandan2004
- PLC ScanUploaded bymoney_kandan2004
- AICTE ProposalsUploaded bymoney_kandan2004
- RID 10_FDPUploaded byDrRumana Shaikh
- Expected OutcomesUploaded bymoney_kandan2004
- Evaluation Guidelines Tier II v0Uploaded byHarminderSingh Bindra
- Digital Image Processing HW2Uploaded byDebjyoti Paul
- [eBook] (Computer Graphics) Fundamentals of Image ProcessingUploaded bymahna87
- Anode Display CounterUploaded bymoney_kandan2004
- Distributed Control Systems Theory & ImplementationUploaded bymoney_kandan2004
- DCSUploaded byhoneymanku
- Athletics Omnibus - Long Jump (Important Paper)Uploaded bymoney_kandan2004
- Linear Integrated Circuit [Second Edition by - D. Roychodhary Sahil B. Jain, New Age International,2000] From UandistaUploaded bymoney_kandan2004
- Ee2254 NotesUploaded bymoney_kandan2004
- Ee2201 Measurements and InstrumentationUploaded bymoney_kandan2004
- EE2254-QBUploaded byJabeen Banu
- EE2254-LINEAR INTEGRATED CIRCUITS AND APPLICATIONS-R8Uploaded byJeeva K
- FillingUploaded bymoney_kandan2004
- A Novel Bacterial Foraging Algorithm ForUploaded bymoney_kandan2004
- Plugin Chapter 1Uploaded bymoney_kandan2004
- 05720764Uploaded bymoney_kandan2004

- Virginia Klenk - Understanding Symbolic LogicUploaded byitakodalje
- ResolutionUploaded by20070645
- Saul Kripke, The First PersonUploaded byapplicative
- Mugnai --Leibniz Theory of RelationsUploaded byYual Chiek
- Mccluskey Ver 1Uploaded byClarisse Gambota
- Politics, Identification, And SubjectivizationUploaded byLeonel Pérez Expósito
- invalidity.docxUploaded byfaizfrasat123
- TCSUploaded by'Nimesh' Shah
- [Kwame_Gyekye,_Abū_al-Faraj_ʻAbd_Allāh_ibn_al-T(BookFi)-2.epubUploaded byPandelis
- L_1.pdfUploaded byALIKNF
- Chisholm - The Logic of RequirementUploaded byRakatonq
- Lunsford_Bains Contribution to Discourse TheoryUploaded byMinal Shekhawat
- Discrete MathsUploaded bySivabalan
- 420 Lewis Time TravelUploaded byShanka Udugampola
- Argument by Analogy-A. JUTHE-Analogy ProjectUploaded byBalingkang
- Peirce Prolegomena to an Apology for PragmatismUploaded byJack Sidnell
- Lecture Guide Math006-1.pdfUploaded byJang Obis
- AristotleUploaded byHerxhie Branzuela Magallanes
- How to Be an AtheistUploaded byScott Kirkland
- Logic for Equivocators, David LewisUploaded byDante Abelardo Urbina Padilla
- Mathematics Part I (Class XII)Uploaded byRamnaresh Sharma
- Dan LUSTHAUS - Critical Buddhism and Returning to the Sources - p. 30Uploaded byƁuddhisterie
- Set 1 - Introduction & Probability ModelUploaded byambady123
- Commentators_on_the_Carvakasutra.pdfUploaded byAbhishekChatterjee
- 0704-001Uploaded byorfeu_niko
- InductionUploaded byHimraj Bachoo
- Context Free LanguagesUploaded bymyngcode
- Theory Construction as Immagination by WeickUploaded bySalisu Borodo
- Neki Zadaci AnalizaUploaded byJohanna Carlson
- Logic Math PpUploaded byChyNaluri89