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Anirban Dutta Choudhury’s Résumé

Anirban Dutta Choudhury

ALaRI T +31-(0)243538136
Universita dellà Svizzera Italiana H +31-(0)611498390
B Via G. Buffi 13 URL:
CH-6904 Lugano, Switzerland k,

Objective To pursue Doctoral Study that matches my expertise and interest.

Research In general Embedded Systems Design with special emphasis on Digital Signal Processing,
Interest Image and Video Codecs, Pattern Matching, Application Specific Integrated Circuits Design,
Network on Chip Architectures.
Education Sep, 2006 - Present: M.Sc. in Embedded System Design, Advanced Learning and
Research Institute(ALaRI), Università dellà Svizzera italiana (a.k.a. University of Lugano).
Thesis: Customizing Networks-on-Chip for Application-Specific Designs.
Advisor: Dr. Gianluca Palermo, Electronics and Information Technology Department,
Politecnico di Milano.

Aug, 2001 - May, 2005: B.E. in Electronics & Tele-Communication Engineer-

ing, Jadavpur University, Kolkata, 2005

Employment May, 2008 - Present: Intern in Mobile Multimedia Product Line, NXP Semiconductors,
Nijmegen, Netherlands.

July, 2005 - Sep, 2006: Assistant System Engineer in Center of Excellence Em-
bedded System Design Group, Tata Consultancy Services, Kolkata, India.
Honors &
Awards 1. Receiver of Full Scholarship at 2-year MSc. Program on Embedded System Design at
ALaRI, Università dellà Svizzera Italiana.
2. 123rd rank and 82nd rank in state Engineering and Medical entrance merit list, re-
spectively, among 50,000 students.
3. National Scholarships of merit in 10th and 12nd examinations.

4. 54th and 42nd state rank in the regional merit list in 10th and 12nd standard, respec-
tively, among 400,000 students.
5. Receiver of Letter of Appreciation from Center of Excellence Embedded Systems, Tata
Consultancy Services.
Publication A. Dutta Choudhury, U. Pal, P. Dey, N. Tripathy, ”Recognition of Multi-oriented and Multi-
sized English Characters”, International Conference on Knowledge Base Computer Science,
Hyderabad, India, pages 358-367, 2004.
Vocational Summer training on ”Electromagnetic interference / Electromagnetic Compatibility & Elec-
Training trostatic Discharge”, Society for Applied Microwave Electronics Engineering & Research ( R
& D Laboratory of Department of Information Technology, Ministry of Communications and
Information Technology, Government of India), Plot L-2, Salt Lake Electronics Complex,
Kolkata 700091, West Bengal , India.
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Anirban Dutta Choudhury’s Résumé

Academic A MATLAB Implementation of Time Scaling / Pitch Shifting of Speech and Audio
Projects The goal of this project was to implement time scaling and pitch shifting of digital
audio(Speech and Music) using OLA, SOLA and PSOLA algorithms using MATLAB and
compare the results of the algorithms.

ANT Brain modeling using VHDL

The classical problem of antbrain has been studied and a VHDL code has been developed
for the same. Synopsys design compiler is used to study various tradeoffs and optimizations
in the resultant circuit. After the thorough analysis of the code and the reports generated
from the design compiler, various optimization are proposed and the results are evaluated.

Implementation of John Conway’s Game of Life in Altera APEX20KE FPGA

The famous cellular automaton of Game of Life is implemented using Alter
APEX20K200EFC484-2X board. Here the challenge was to implement the algorithm
in the highest possible resolution of a VGA display using the limited resource of the FPGA
and maintaining the maximum sped i.e. 60 frames per second which leads to a minimum
frequency 25 MHz for the VHDL design. We designed it using two different control state
machines and a ”smart local calculation and update” algorithm.

Design of an efficient JPEG encoder using SystemC

In this project an efficient JPEG encoder was designed and implemented using SystemC.
The RTL model for the DCT operation of the jpeg encoder was efficiently implemented
using a fast DCT approach(Butterfly Algorithm). The throughput of the designed JPEG
encoder was verified with the given SystemC simulator for the real time behavior.

Reliance - Web Transaction Analyzer

A novel idea of measuring customer satisfaction in websites is proposed, and the ideas are
assimilated in form of a product Web Transaction Analyzer. A startup company Reliance is
also proposed. This project won the Best Project Prize at Dependable Systems Workshop,
ALaRI, Lugano

Iteration-constrained Optimization of PISA Architecture for MPEG Decoder Benchmark

Design Space Exploration
In this project, We worked on the MPEG Decoder Benchmark code using Simplescalar
and Wattch tools. The size of the the design space was constrained by a given simulation
time. The MPEG code was studied to point out different resource requirements and their
effect on both cost and performance. Different Processor parameters (e.g. the functional
blocks like ADDER, MUL, MAC etc.; cache parameters like associativity, line size, cache
replacement policy etc.) were varied to plot the cost-performance Pareto curve.

Web Browser Development for Mobile phones using J2ME

A fully featured web browser for mobile phones were developed using Java 2 Platform,
Micro Edition. The features included history, bookmark options(e.g. save and open saved
bookmarks) and buffer overflow detection (for opening pages with large data accumulation
e.g. w.r.t a mobile display).

Digital Mobile Receiver Design: Synchronization and Detection using MATLAB

A step-by-step approach was taken to develop a digital mobile receiver using MATLAB. The
steps included: Mapping and Demapping of noisy signals, Frame Synchronization, Pulse
Shaping and Matched Filtering, Timing Synchronization and finally Phase Synchronization
of the noisy QPSK modulated signal. Different statistics like Change of BER over SNR,
Eye diagram etc. were reported.

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Anirban Dutta Choudhury’s Résumé

Academic Embedded Processor Designing with Custom Instruction Implementation using LISA 2.0
Projects and microProfiler
The functional hotspots of the computationally intensive Blowfish encryption algorithm
were pointed out using microProfiler. Few special instructions were designed using the
LISA HDL in order to speed up the application.

Industry Intern May 2008 - Present

Experience Mobile Multimedia Product Line Nijmegen
NXP Semiconductors Netherlands

Project Description Project Modules

I am working as an intern on the feasi-

bility study of different navigation algo- • Comparing the ideas proposed in Iner-
rithms proposed in literature. The suit- tial Navigation System(INS) and Pedestrian
able ideas will be implemented it on mo- Dead Reckoning(PDR) researches.
bile devices like Nokia N810. Maemo
Linux environment is used for cross- • Suitable filter implementation to process ac-
compiling. cumulated real-time data.
• Integration with GPS.

Assistant System Engineer July 2005 - September 2006

Center of Excellence Embedded System Group Kolkata
Tata Consultancy Services India

Project Description Project Modules

I played the role of a team member in

H.264 Videophone team. I was personally • Basic H.264 Video Codec in PC environ-
responsible for the optimization and other ment.
enhancements of the QCIF H.264/AVC
Baseline Video Encoder code and porting • Porting H.264 Video Encoder on C5510.
the same on OMAP 5912 platform. My
group performed the basic C optimiza- • Porting H.264 Video Encoder on OMAP
tion as well as C55x-specific optimization 5912 DSP core(using TI CCS).
of the video and audio codec. Texas In- • Porting H.264 Video Decoder on OMAP
strument Code Composer Studio 3.1 in 5912 ARM Processor(in Linux Montavista
Windows XP and gcc compiler in Mon- OS).
tavista Linux environment were used in
this project. Responsibilities included De- • Employing DMA, Cache operations, C-level
sign, Implementation, Testing, Optimiza- and Processor-specific optimization of the
tion, Porting, and Module Integration. encoder code.

Teaching Sep, 2007: Teaching Assistant in Introduction to Mathematics Course in ALaRI, University
Experience of Lugano.

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Anirban Dutta Choudhury’s Résumé

Skills 1. Languages: C, C++, Java, Embedded Java using J2ME, VHDL, SystemC, Intel 8086,
TI C55x, C64x Assembly Language.
2. Applications:

(a) EDA Tools: ModelSim, Lenardo Spectrum, Synopsys Design Compiler & Power
Compiler, LisaTEK Processor Designer, Microsoft Visual Studio, Texas Instru-
ment CCS 3.1.
(b) Simulation Softwares: MATLAB 7.1, SIMULINK, Eclipse, Microsoft Visual Stu-
(c) Text Processing Tools: LATEX, MS Office, OpenOffice.
3. Operating Systems: Linux(Redhat, (K)Ubuntu, Fedora, Montavista), Windows.
4. RTOS: VxWorks.

5. Hardware Platforms: Intel 8086, ARM 9, TI TMS 320 VC5510, OMAP 5912, Altera

Academic MSc.: 8.32/10 (Average Weighted Grade, ongoing)

Performance B.E.: 82.75% (Total Marks obtained); 9.09/10.00 (Average Weighted Grade)
12th : 87.1% (Total Marks obtained)
10th : 88.0% (Total Marks obtained)

Personal Date of Birth: 21 Sepetember, 1983

Information Nationality: Indian
Language Proficiency: English(Fluent), Bengali(Native), Hindi(Good), Italian(Basic)

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Anirban Dutta Choudhury’s Résumé

References Dr. Gianluca Palermo

Assistant Professor, Dipartimento di Elettronica e Informazione
Politecnico di Milano, 20133 Milano, Italy
Relationship: Master Thesis Advisor

Dr. Ajeesh Gopalakrishnan

Technical Marketing, NXP Semiconductors
FT 8.163B, Jonkerbosplein 52, 6534 AB Nijmegen, The Netherlands
Relationship: Managerial Supervisor

Bjarne Schwartzbach
System Architect, NXP Semiconductors
FT 9.129, Jonkerbosplein 52, 6534 AB Nijmegen, The Netherlands
Relarionship: Technical Supervisor

Dr. Umapada Pal

Faculty Member, Computer Vision And Pattern Recognition Unit
Indian Statistical Institute, Kolkata 700108, India
Relationship: Research Advisor (past)

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