arallel ports have been a staple of the PC system since the original version was introduced. They are most widely used to connect printers to the computer.

In many instances, parallel ports are referred to as parallel printer ports. Due to the parallel port’s capability of quickly transferring bytes of data in a parallel mode, this type of port has been adopted to interface a number of other peripheral devices to the computer. These devices include X-Y plotters; fast computer-to-computer transfer systems; high-speed, high volume, removable disk backup systems; and optical scanners. The parallel port’s simplicity makes it a natural for hobbyists and designers to use for specialized interface projects.

A simplified parallel port operation is illustrated in Figure 1. The system applies a decoded port address and an I/O write signal to the port. It then moves data to the port in parallel format from the system’s data bus. If the device attached to the port is ready to receive data, it moves through the port still in parallel format.

Figure 1: Parallel Port Transfers


The port’s address decoder compares each address placed on the address bus with its preset address. This address may be designated by a set of jumper wires, a bank of DIP switches, or by firmware/Plug-and-Play settings. All of these methods enable the peripheral device’s address to be changed, by rearranging the jumpers, re-configuring the positions of the switches, or allowing it to be detected by the BIOS’ PnP firmware. Other address-decoding tactics include using SSI and MSI logic circuit arrangements, or PROM devices, to decode the bits of the address bus. When the address on the bus matches the port address, the decoder produces an enabling output (EN) that is used to enable the peripheral’s sending and receiving circuits. When a data-out (microprocessor-to-peripheral) operation is performed, the microprocessor places a data word on the data bus and sends an I/O write signal to the port. The port applies a data available strobe signal to the peripheral, indicating the presence of valid data on the bus. The strobe signal causes the data word to be transferred to the peripheral in parallel format. At the input to the peripheral, the data is latched (held) in its in-bound register for processing. When a data-in (peripheral-to-microprocessor) operation is performed, one of the four transmission methods previously discussed occurs to initiate the transfer of data. When the attention of the microprocessor has been gained, the peripheral’s outbound register dumps its contents onto the system’s data bus, where it is read by the microprocessor.

Figure 2 shows a typical parallel printer connection, using the IBM version of the Centronics standard. This interface enables the computer to pass information to the printer, 8 bits at a time, across the eight data lines. The other lines in the connection carry control signals (handshaking signals) back and forth between the computer and the printer.

Figure 2: Parallel Port Signals


The original Centronics interface used a 36-pin D-shell connector at the adapter, and the IBM version reduced the pin count to 25. Table 1 defines the signals of the IBM parallel printer port connection standard.
PIN NO. 1 SIGNAL STROBE DIRECTION* In DESCRIPTION STROBE pulse to read data in. Pulse width must be more than 0.5 ms at the printer. The signal level is normally “high”; read-in of data is performed at the “low” level. These signals represent information of the 1st to 8th bits of parallel data, respectively. Each signal is at “high” level when data is logical “1" and ”low" when logical “0."

Table 1: Pin Assignments

2 3 4 5 6 7 8 9 10


In In In In In In In In Out Approximately 5ms pulse; “low” indicates that data has been received and the printer is ready to accept other data. A “high” signal indicates that the printer cannot receive data. The signal becomes ”high" in the following cases: 1. During data entry 2. During printing operation 3. In “Off line” state 4. During printer error status A “high” signal indicates that the printer is out of paper. This signal indicates that the printer is in the selected state. With this signal being at “low” level, the paper is automatically fed one line after printing. The level of this signal becomes “low” when the printer is in “Paper End” state, “Off line” state, and “Error” state. When the level of this signal becomes “low,” the printer controller is reset to its initial state and the print buffer is cleared. This signal is normally at “high” level, and its pulse width must be more than 50ms at the printer. Data entry to the printer is possible only when the level of this signal is “low.” Ground level.




12 13 14 15


Out Out In Out




17 18-25


In —

* As viewed from the printer

The Data Strobe line (STROBE) is used by the computer to signal the printer that a character is available on the Data lines. The printer reads the character from the Data lines into its buffer, to be printed at the printer’s convenience. If for some reason, the printer cannot accept the character from the data lines (for example, if the printer is out of paper or if its buffer is full), the printer sends a “busy” signal to the computer on the Busy line, telling the computer not to send any more data.


After the peripheral device has read the data word from the Data lines, it pulses the Acknowledge (ACK) line to tell the computer it is ready to accept another data word, as long as the Busy line is not asserted. The printer also uses the Select line (SLCT) to let the computer know that data can be sent to it. In the event that the SLCT signal is not present, the computer can’t send the printer any data. In addition to the lines discussed above, the Centronics standard calls for additional printerrelated control lines, which include Paper End (PE), Auto Feed (AUTO-FD), Error, Initialize Printer (INIT), and Select Input (SLCT-IN). Not all printers use the complete standard and all its control lines. In many instances, only a few of the lines are used and non-standard pin numbers and connector types may be used.

A PC-compatible parallel port interface typically offers 8-bit parallel data words and nine I/O control lines at a 25-pin, female D-shell connector at the rear of the system unit. In early PCs, the parallel port was located on the back of the video adapter card, on a dedicated parallel printer card or on a multi I/O card. The primary port was always located on the video adapter card. With the VGA card, the primary printer port was normally located on an MI/O card in one of the slots. In earlier MI/O cards, all the I/O functions were controlled by discrete circuit devices. On newer MI/O cards, the various standard I/O functions were increasingly integrated into more complex ICs. Finally, IC manufacturers combined the standard MI/O functions (HDD/FDD/IP/2S/1G ports) into ASIC devices. When the Pentium system boards were developed, the ASIC chip containing the parallel port circuitry moved to the system board. The printer port connector may be located directly on the back plate of an I/O card, or the port’s circuitry may be connected via a ribbon cable to the 25-pin D-shell connector on the unit’s back panel. Figure 3 depicts a block diagram of a typical parallel printer port. The interface includes a port address decoder, data-latching register, data bus buffer, control-line latching register, status-line buffer, and control-line drivers. In operation, the adapter performs five I/O instructions, which correspond to three different port addresses and the condition of the system’s IOR line. The adapter supports the two-way handshaking scheme using the Strobe, Acknowledge, and Busy lines described earlier.


Figure 3: Block Diagram of Printer Interface

Writing to the Printer Port
The printer adapter is enabled by port addresses 378h–37Fh. When the system wishes to send a byte of data to the printer, it must place the data byte on the data bus, set its IOR line to an inactive state (this is equivalent of IOW being active to the adapter), and apply an address of 378h to the adapter. This action causes the adapter’s data latch to accept the data from the data bus, and latch it. Next the computer must read the adapter’s status buffer to check the condition of the printer’s Busy line. To read the printer’s status bits, the computer must make its IOR line active and apply an address of 379h to the adapter. This places the ERROR, SLCT, PE, INIT, and BUSY status bits on the adapter’s data bus. If the Busy line is active, indicating that the printer can accept data, the system unit pulses the Strobe line to tell the printer that a valid data byte is present on the data lines from the port. Actually, the system unit writes a complete, 6-bit control word into the control latch by placing the control word on the adapter’s data bus, making the IOR line inactive, and applying an address of 37Ah to the adapter. This places the control word in the latch, which, in turn, applies the individual bits to the line driver amplifiers and then to the printer’s input control lines.


Reading from the Printer Port
Two other instructions enable the system to read the contents of the two latches. To read the current contents of the data-latching register, the microprocessor must make the IOR line active and apply an address of 378h to the adapter. This action enables the data bus buffer and places the outputs of the data latch register on the adapter’s data bus. When the system unit reads the status of the printer, it activates the IOR line and applies an address of 37Ah to the adapter. This enables the system to read the printer’s SLCT-IN, ACK, STROBE, and AUTO-FD status lines as well as the port’s IRQ line. If the printer is not driving these pins, the system reads the last control word written into the control latch register. In the event that the printer is driving these pins, the status bits from the printer is logically ORed with the bits of the control latch and is placed on the adapter’s data bus. In addition to the primary handshaking lines (Strobe, ACK, Busy), the parallel printer interface provides secondary control lines for PE, SLCT and ERROR input signals from the printer, and AUTO-FD, INIT, and SLCT-IN outputs to the printer. The interrupt level of the printer port section may be set at a number of different levels by changing its configuration jumpers or CMOS enabling setting. The interrupt from the printer is actually obtained through the INIT line. This signal is gated to the adapter’s interrupt line by the interrupt enable (INT EN) bit of the control word stored in the control latch. The status of this bit determines whether the printer adapter can interrupt the system unit. In this manner, the printer can use the printer port’s INIT input to cause an interrupt to occur, provided that the interrupt enable bit of the control word has not been masked. Normal interrupt settings for printer ports in a PC-compatible system are IRQ5 or IRQ7. All the signals discussed earlier are transmitted between the adapter card and the printer at standard Transistor-Transistor Logic (TTL) levels. This means that the signals can deteriorate quickly with long lengths of cable. The cable length used for the parallel printer should be kept to less than 10 feet. If longer lengths are needed, the cable should have a lowcapacity value. The cable should also be shielded so as to minimize interference.

LPT Handles
DOS keeps track of the system’s installed printer ports by assigning them the logical device names (handles) LPT1, LPT2 and LPT3. Whenever the system is booted up, DOS searches the hardware for parallel ports installed at hex addresses 3BCh, 378h and 278h consecutively. If a printer port is found at 3BCh, then DOS assigns it the title of LPT1. If, however, no printer port is found at 3BCh but one exists at 378h, then DOS assigns LPT1 to the latter address. Likewise, a system that has printer ports at physical addresses 378h and 278h would have LPT1 assigned at 378h, and LPT2 at location 278h.


Parallel printer ports located on video display cards are normally set for 3BCh operation. Therefore, this is the parallel port that the system normally defines as LPT1. This is also true of system boards that come equipped with built-in parallel ports. Problems arise in any system with different parallel ports that share the same physical address. If this occurs, you must disable or re-address one of the ports before either of them will work. This is usually accomplished through jumpers located on the I/O cards. The address of the printer port can normally be changed to respond as LPT1, LPT2, or LPT3, depending on the setting of address selection jumpers. The printer port can also be disabled completely through these jumper settings. IRQ7 is normally assigned to the LPT1 printer port, and IRQ5 typically serves the LPT2 port, if installed. Although the data pins of the parallel printer port are defined as output pins, the figure illustrates that they are actually bi-directional. Many PC-compatible parallel ports are bidirectional, but some cheaper ports may not have the electronics built into them to handle the input function. This is not important for printer operations, so most users won’t notice. However, newer Enhanced Parallel Port (EPP) and Enhanced Centronic Parallel (ECP) ports can be converted between uni-directional and bi-directional operation through the CMOS setup screen. If a bi-directional port is being used to support an I/O device, such as a local area network adapter, or a high-capacity storage device, then this feature would need to be checked at both a hardware and software level.


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