You are on page 1of 64

Completed 07 Feb 2018 05:46 PM HKT

Disseminated 07 Feb 2018 06:16 PM HKT


Asia Pacific Equity Research
07 February 2018

Clients should contact representatives and execute transactions through a J.P. Morgan subsidiary or affiliate in their home
jurisdiction unless governing law permits otherwise.

AI and Semiconductors
Exponential growth from AI adoption in the cloud and
at the edge

We see Artificial Intelligence (AI) as the next growth driver for the semiconductor Technology
industry, accelerating growth in the Cloud as well as in Edge devices. In this AC
Gokul Hariharan
collaborative report, we lay out key drivers for AI semis demand growth and the
(852) 2800-8564
impact on industry dynamics from rising AI adoption. We forecast AI gokul.hariharan@jpmorgan.com
semiconductor revenues (focusing on Computing demand) to record a 59% CAGR Bloomberg JPMA HARIHARAN <GO>
from 2017-22, reaching a $33bn market size. While initial demand is likely to be J.P. Morgan Securities (Asia Pacific) Limited
led by AI training workloads in the datacenter, we expect AI inference to take off AC
JJ Park
in the next 2-3 years and become the biggest semiconductor market. AI and High (82-2) 758-5717
Performance Computing (HPC) are the next catalysts of leading-edge semis jj.park@jpmorgan.com
demand, helping advanced process technology in logic semis, lifting high-end Bloomberg JPMA PARK <GO>
memory adoption and semiconductor capital equipment spending. Key stocks J.P. Morgan Securities (Far East) Limited,
under our global semis coverage leveraged to the AI trend are TSMC, DRAM Seoul Branch
makers, Intel, Inphi, NVIDIA, ASML, KLAC, and Hitachi High-Tech. Hisashi Moriyama
AC

(81-3) 6736-8601
 AI training demand already rising rapidly, GPUs currently dominant: AI hisashi.moriyama@jpmorgan.com
training (computing demand for training AI algorithms) has been the first Bloomberg JPMA MORIYAMA <GO>
market to take off, primarily in hyperscale datacenters for large internet players. JPMorgan Securities Japan Co., Ltd.
We expect this segment to grow at a 49% CAGR, reaching $14bn by 2022. AC
Harlan Sur
 AI inference the real deal, but likely a fragmented market structure: While (1-415) 315-6700
AI inference (putting AI into real world use-cases) may have a delayed take-off, harlan.sur@jpmorgan.com

we expect it to become the biggest market as use cases proliferate. We forecast Bloomberg JPMA SUR <GO>
J.P. Morgan Securities LLC
AI inference semis to be a $19bn market by 2022, growing at a 70% CAGR.
AC
Sandeep Deshpande
 AI key for leading edge logic, high-end memory and semi capex growth: AI (44-20) 7134-5276
is key for the next leg of growth in leading-edge logic semis (GPU, accelerators sandeep.s.deshpande@jpmorgan.com
and CPU), high-end memory (higher bandwidth requirement for parallel Bloomberg JPMA DESHPANDE <GO>
processing), and consequently for increasing semiconductor equipment J.P. Morgan Securities plc
spending. We expect AI semis to be 6% of the global semi market by 2022. Albert Hung
(886-2) 2725-9875
 Ushering in new era – ‘xPU’ startups and rising accelerator demand: AI is
albert.hung@jpmorgan.com
also ushering in a new breed of semiconductor startups focusing on specific AI J.P. Morgan Securities (Taiwan) Limited
training and inference solutions or ‘xPUs’. Furthering the trend of
Erica Wong
heterogenization of silicon in the cloud, we also see a rapid surge in demand for
(852) 2800-8568
accelerators (FPGAs, custom ASICs) in hyperscale datacenters. erica.wong@jpmorgan.com
 See more views from our global semiconductor analyst teams on pages 43-53. J.P. Morgan Securities (Asia Pacific) Limited
Note that the AI semi market size estimate is based mainly on logic and
computing and does not include demand from memory, storage or networking
semiconductors, which would also grow rapidly along with rising AI adoption.
Table 1: Beneficiaries of rising AI semiconductor market
IC design houses NVIDIA, Inphi
Foundry/OSATs TSMC, Leading OSATs, Amkor
Memory Micron
IDM Intel, STMicro
Semi Equipment ASML, Hitachi High-Tech, KLA-Tencor
Source: J.P. Morgan.

See page 61 for analyst certification and important disclosures, including non-US analyst disclosures.
J.P. Morgan does and seeks to do business with companies covered in its research reports. As a result, investors should be aware that the
firm may have a conflict of interest that could affect the objectivity of this report. Investors should consider this report as only a single factor in
making their investment decision.

www.jpmorganmarkets.com
This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Table of Contents
Investment Summary ...............................................................4
AI semiconductor market size to reach $33bn by 2022.............................................4
Training is initial market catalyst for AI semiconductors..........................................4
AI Inference the real deal and likely much bigger than training ................................5
AI seeing strong growth in the cloud and at the edge................................................6
Key stocks with meaningful AI exposure.................................................................6
What does AI mean for semiconductors?..............................8
The next growth driver after the smartphone era ......................................................8
Semis are critical in every step of the AI process flow..............................................9
IoT and AI / deep learning should go hand in hand.................................................10
AI fits well within the move towards accelerated computing and heterogenization of
the datacenter ........................................................................................................10
AI semiconductor market – $33bn by 2022 ..........................11
AI – Training and inference...................................................................................12
AI – Training market to grow at a 49% CAGR until 2022E ..13
AI – Training adoption picking up in key Internet vendors .....................................14
Strong datacenter growth driven by migration to public cloud ................................15
AI training silicon – Parallel processing is a key attribute.......................................17
Memory bandwidth also an important feature for training ......................................19
Floating Point Computing more common in use than Integer in deep learning ........20
AI training semis’ market size ...............................................................................22
AI – Training – a $14bn market by 2022................................................................23
NVIDIA GPUs have an early lead in silicon and ecosystem ...................................24
Other accelerators and ASICs are also being trialed ...............................................24
Integrated solutions likely to emerge as market matures .........................................25
AI – Inference – the real deal .................................................25
Inference should be much bigger than training but a lot more fragmented...............26
Inference in the cloud or at the edge? Four key decision factors..............................26
Inference in the cloud ............................................................27
Inference training market is still very fragmented...................................................27
A steeper adoption curve, rising to $8bn in 2022....................................................28
What kind of Semiconductor solutions fit inference?..............................................29
Inference at the edge..............................................................31
Embedded solutions likely to be common in consumer devices ..............................32
Market size and assumptions .................................................................................32
Smartphone AI-Inference market...........................................................................33
Automotive Inference market – ADAS key driver..................................................35
Surveillance market...............................................................................................38
Number of use cases likely to grow exponentially..................................................40

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

What can AI do to the Semis landscape?.............................40


More new startups coming to the market …...........................................................40
… vs a well-established consolidation trend...........................................................40
System vendors becoming silicon designers – trend to accelerate ...........................41
More demand at the bleeding edge of Moore’s Law ...............................................41
Implications for Logic Semis.................................................43
Foundries..............................................................................................................43
OSAT ...................................................................................................................44
Implications for the DRAM market ........................................46
Implications for US Semis and key beneficiaries ................48
Implications for Japan Semis and key beneficiaries...........50
Implications for European Semis and key beneficiaries.....53
AI Basics .................................................................................54
What is the difference between training and inference? ..........................................54
AI / Deep Learning Value Chain.............................................56
AI Glossary .............................................................................57

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Investment Summary
AI semiconductor market size to reach $33bn by 2022
In a very simplified sense, the process of We forecast the total AI-related semiconductor market size to grow at a 59% CAGR
AI / Machine Learning can be segregated to reach $33bn by 2022, driven by increasing use cases for AI applications, a
into 2 main steps – (1) Training, for the
system to learn and perfect a model or dramatic increase in AI training needs across hyperscale Internet vendors and
algorithm from massive datasets and (2) enterprises, as well as rising adoption of inference use cases in datacenters,
Inference, for the system to apply the smartphones, cars, and several IoT-related applications.
model on a real-life scenario or use case
like facial recognition, speech recognition.
Note that the market size estimate is largely based on logic and computing and does
See more details on AI Basics and AI/ not include demand in other areas which would rise in sync with AI adoption, such
Deep Learning value chain. as memory, storage, and networking semiconductors.

We expect the AI training to dominate the AI semi market in the beginning, likely
followed by a strong pick-up in the AI inference once the use cases broaden. By
2022, we expect AI inference to account for 57% of the AI semiconductor market.

Figure 1: AI semis’ market revenue


$ billion
40
35 33
30 26
25
19
20
15 12
10 6
5 3
0
0
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI training market AI inference market

Source: J.P. Morgan estimates.

AI-related silicon to reach 6% of overall semi industry revenues by 2022E


In the post-smartphone era of semiconductor growth, we believe that the AI and deep
learning opportunity represents a strong growth area for semiconductor content
growth, both in the cloud/datacenter as well as in multiple edge devices. We expect
AI-related silicon to represent the fastest growing part of the semiconductor industry,
accounting for 6% of overall industry revenues by 2022, in our view.

Training is initial market catalyst for AI semiconductors


Training is the process of digesting huge
datasets to figure out a model. Given its AI training or training the algorithm with massive sets of data to develop predictive
data and compute-intensive nature, it properties is likely to be the initial driver of AI semiconductor demand. Larger
usually occurs in the cloud (datacenters).
Internet companies (Google, Amazon, Facebook, Microsoft etc.) are the main drivers
The high capex requirement for datacenter of this demand at this point and we also expect increasing training workload from
sets high entry barriers, which makes enterprise players. With a broadening out of training demand in the datacenter and
Internet companies the leading players. Of accelerated adoption of a cloud-based AI training model, we expect the
note, some Internet players rent out their
computing capacity to enterprises. semiconductor market for AI training to reach $14bn in 2022 from $1.9bn in 2017, a
49% CAGR.

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

While CPU is powerful, it runs on a serial GPU the early leader for AI training, much higher bandwidth requirements for
processing architecture, which, to some memory
extent, means it can only solve one task at
one time. Among AI training silicon solutions, we believe GPU (NVIDIA in particular) has
taken the lead thanks to its parallel processing characteristics while other accelerators
However, machine learning often involves and ASICs are also being trialed. We expect more integrated solutions (CPU-
millions and even billions of calculations,
which makes more sense for simultaneous
GPU/multiple accelerators) to start gaining traction once the market becomes more
computations and prompts the use of mature.
accelerators. GPU, FPGA and ASIC are
some common examples of accelerators. Besides chip processing capability, the speed of data transfer is also critical in
determining the efficiency of training, given its data-intensive nature. This
consequently calls for an upgrade in the memory architecture and stimulates the
demand for High Bandwidth Memory (HBM), which stacks memory chips vertically
onto one another.

AI Inference the real deal and likely much bigger than


Inference refers to the step when the
system applies the pre-trained model to training
real-life scenarios.
We believe that AI inference or the use of AI algorithms in real world predictive
It can happen both in the cloud and at the
applications will be the much bigger market eventually, even though use cases are
edge. Where to reside the processing likely to take off later than the AI training market. We expect the AI inference silicon
depends on a function of cost, algorithm market revenue to grow by a 70% CAGR from 2017 to 2022 and reach $19bn in
maturity, bandwidth and latency. 2022, driven by rising adoption of inference use cases, at the datacenter and the edge.
In our analysis, we restrict the AI inference market analysis to inference use cases in
For instance, relatively cost-sensitive and
latency-tolerant smart speakers can afford
the cloud, embedded in smartphones, assisted driving (ADAS) for cars, and the
to transmit the data back to the cloud for surveillance industry. However, eventual use cases for AI inference could be a lot
inference. On the other hand, for more numerous and much bigger in size.
autonomous driving and surveillance, the
inference would have to be done at the
edge to minimize latency. Semiconductor solutions still fragmented; likely to be very use case specific
Different from GPU’s dominance in AI training market, silicon solutions for the AI
inference market are likely to be fragmented, with key ones such as CPU, GPU,
ASIC, FPGA and embedded solutions all having a role to play. All of the
acceleration options offer some advantages and disadvantages for AI-inference
workloads and each workload is likely to use different combinations of acceleration
(along with x86 CPUs for running the core server and some inference work).

Figure 2: AI training semiconductor market revenue Figure 3: AI inference semiconductor market revenue
US$bn, yoy growth (%) US$bn, yoy growth (%)
16 14 25
14 19
12 20
12
9 14
10 15
8 6 10
10
6
4 6
4 2 5
3
2 0 0 1
- -
2016 2017E 2018E 2019E 2020E 2021E 2022E 2016 2017E 2018E 2019E 2020E 2021E 2022E
AI training market AI inference market

Source: J.P. Morgan estimates Source: J.P. Morgan estimates.

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI seeing strong growth in the cloud and at the edge


AI in the cloud – both for training as well as inference
As mentioned, AI training is mostly done in Given the established nature of the public cloud business model for machine learning
the cloud (datacenters) while inference and AI and the fact that in-house AI infrastructure (with GPUs and expensive
activities could be in datacenters or at
edge devices computation silicon) is expensive, we firmly believe that cloud-based AI will be the
way to go.
As such, datacenter vendors are the key
participants in the AI trend and we see a The AI training market by definition is likely to be mostly datacenter-driven, given
faster adoption curve for hyperscale
datacenter vendors (Google, Facebook
the requirement for extremely high computational power. AI inference workloads are
etc.) due to the high capex requirements. also likely to have a significant presence in the cloud, especially where cost-
We believe this could accelerate the effectiveness for terminal devices is critical and low-latency is not a critical factor.
migration for AI workload to public cloud We forecast AI servers (for training and inference combined) to rise to 33% of total
hyperscale datacenter servers by 2022, up from 6% only in 2017.

AI cloud semiconductor market size should reach $22bn by 2022, in our view,
growing at a 61% CAGR.

Figure 4: AI workloads penetration in hyperscale server


35% 33%
30% 28%
25% 22%
20% 16%
15%
10%
10% 6%
5% 3%
0%
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI training server penetration (%) AI inference server penetration (%)

Source: J.P. Morgan estimates.

AI at the edge – Smartphone and ADAS likely big drivers


For mobile applications (such as smartphones) and applications with low-latency
requirements, we expect AI functionality to be progressively built at the edge. We
believe the smartphone market will be the earliest to take off (embedded within the
application processor), followed by ADAS or assisted driving and surveillance
cameras. We expect semiconductor revenues from the adoption of AI at the edge to
grow to $11bn market size by 2022, just from these three verticals, with potential
upside from other use cases.

Key stocks with meaningful AI exposure


TSMC
TSMC, in our view, is already transitioning to a post-smartphone growth stage with
High Performance Computing (HPC at 25% of revenues in 2018) already being the
key growth driver. AI is a key driver of demand from HPC, with growth in GPUs,
accelerators and ARM servers. AI and HPC are key drivers of demand for future
leading edger process nodes from TSMC (7nm, 7+nm and 5nm), as well as advanced
packaging technology (CoWoS) and InFO.

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Table 2: Foundry revenue from AI applications


2016 2017E 2018E 2019E 2020E 2021E 2022E
AI training market 19 179 328 646 920 1,154 1,849
Server 19 179 328 646 920 1,154 1,849
AI inference market 15 660 1,278 2,445 3,680 4,940 7,037
Server 8 33 86 307 604 1,013 1,946
Smartphone - 546 998 1,612 2,190 2,695 3,449
ADAS - 41 76 189 334 487 661
Surveillance 7 40 119 335 551 745 981
Total AI silicon market (US$mn) 34 839 1,606 3,090 4,599 6,094 8,886
As % of total foundry market size 0% 1% 3% 5% 7% 8% 11%
Source: J.P. Morgan estimates, Gartner.

DRAM
As machine learning requires large amounts of data processing, we expect a broader
adoption of High Bandwidth Memory and GDDR (graphics double-data-rate
DRAM). This bodes well for DRAM vendors such as SEC, SK Hynix and Micron in
the long term.

NVIDIA
NVIDIA is the dominant player in the AI/Deep Neutral Network (DNN) training
GPU market, with strong silicon offerings and growing software ecosystem support.
Although there are several vendors attempting to enter this market, we see NVDIA
well-positioned to maintain its market leadership in the medium to near term.

Intel
Intel has strengthened the muscles for AI through a number of M&A (Altera,
Nervana, Movidius and Mobileye) over the past few years. We are upbeat on Intel’s
FPGA opportunities in AI inference market and its Nervana Neural Network
Processor (NNP) solutions are still in the early stage but have good potential in the
AI learning market. The company is also able to address automotive demand through
Mobileye and low-power edge inference market through Movidius.

ASML
As most AI silicon solutions are likely to use leading-edge nodes (7nm and beyond),
the robust AI demand could translate into upside for EUV tools and benefit ASML.
We expect ASML to benefit from the higher revenue and GMs improvement from
EUV tools.

Hitachi High-Tech
Hitachi High-Tech is our top pick in Japan’s SPE sector given its high leverage to
elevated Foundry spending for leading edge (thus helping Hitachi High-Tech high-
end Scanning Electron Microscope and etcher business) to support AI and machine
learning related computing processor demand.

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

What does AI mean for semiconductors?


The next growth driver after the smartphone era
Given the saturation in consumer products (PC/smartphone/tablets), the
semiconductor industry has entered a more stable and less cyclical growth phase
characterized by mid-single-digit percentage annual revenue growth and high-single-
digit percentage unit growth, in our view. Logics semis are relatively stable
compared to the memory market due to the lack of volatile price dynamics.

Figure 5: Overall semiconductor market size


$ billion, yoy growth (%)
450 32% 35%
400 30%
21% 25%
350
300 20%
10% 15%
250 5% 4% 10%
200 0% 0% 1%
-2% 5%
150 0%
100 -9%
-5%
50 -10%
0 -15%
2009 2010 2011 2012 2013 2014 2015 2016 2017E 2018E
(Base) (Base)
Total Semiconductor Device Shipment Forecast ($, billion) yoy growth (%) (RHS)

Source: WSTS, J.P. Morgan estimates.

Looking ahead to the next 3-5 years, although we do not see one single high-volume
consumer product such as Smartphone/PC which could drive meaningful top-line
growth in semis, we believe that the AI and deep learning opportunity represents a
strong growth area for semiconductor content growth, both in the cloud/datacenter
and in multiple edge devices.

Already showing up in growth for major semiconductor vendors


Early winners such as NVIDIA are already seeing a significant proportion of growth
coming from AI-related datacenter demand, while Foundries such as TSMC are also
expecting HPC (of which AI is likely to be a major subset) to be a key driver from
2018 and beyond.

Table 3: Different forecasts on AI-related silicon market size


NVIDIA AI / Datacenter TAM $30bn by 2020
- HPC $4bn; DL Training $11bn; DL Inference $15bn by 2020
Intel Datacenter Silicon TAM $65bn by 2021
- Including revenue from networking, memory, silicon photonics and omni-path
Xilinx Cloud computing $6bn SAM, embedded vision $4bn SAM, industrial IoT $2.5bn SAM by 2021
TSMC Foundry HPC TAM $15bn in 2020 vs. $6bn in 2015
- Including revenue from server chips, FPGA, GPU, AR / VR chips
IDC >$10bn incremental AI semi market opportunity in selected markets by 2021
- Excluding smartphones with AI capabilities
Gartner $3bn discrete AI semi and $12.8bn semi with integrated AI functionality by 2022
- $2.7bn discrete AI semi in datacenter, and $9.2bn semi with integrated AI in personal devices
Source: NVIDIA, Intel, TSMC, Xilinx, IDC, Gartner.

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

We expect the AI semiconductor market to grow at the cloud as well as the edge
level. AI in the cloud is where adoption is happening earlier, and we expect the
market to reach $22bn by 2022, growing at a 61% CAGR. AI at the edge is likely to
evolve later, but is likely to grow faster in future years – we expect a market size of
$11bn by 2022, growing at a 57% CAGR.

Note that the market size estimate is largely based on logic and computing and does
not include demand in other areas which would rise in sync with AI adoption such as
memory, storage and networking semiconductors.

Figure 6: AI in the cloud – Semis’ market size and yoy growth Figure 7: AI at the edge – Semis’ market size and yoy growth
US$ bn, yoy growth (%) US$ bn, yoy growth (%)
25 22 12 11

10 9
20 17
8 7
15 12
6 5
10 7
4
4 2
5 2 2 1
0 0
- -
2016 2017E 2018E 2019E 2020E 2021E 2022E 2016 2017E 2018E 2019E 2020E 2021E 2022E
AI in the cloud AI at the edge

Source: J.P. Morgan estimates. Note: This includes AI Training and Inference in the datacenter. Source: J.P. Morgan estimates. Note: This is largely comprised of AI Inference in Edge devices
– use cases may be much bigger than what we anticipate in our analysis.

See the JPM tech report: An Investors' AI adoption at an inflection point


Guide to Artificial Intelligence: AI adoption
In our view, AI is an evolution and culmination of several key trends in the
at an inflection point, published in
November 2017 technology space over the last few years – Proliferation of IoT (Internet of Things)
and the creation of extremely large sets of data, Big Data analytics, a significant rise
in computing power due to adoption of cloud computing and furthered by new
developments such as accelerated computing and heterogeneous computing in the
datacenter.

Semis are critical in every step of the AI process flow


If we distil the AI ecosystem into a simplistic process flow (as shown in Figure 8),
semiconductors will be performing core functions in all three key areas – data
generation (through smartphones, automotive and multiple IoT devices, with
machine generated data likely to approach user generated data by 2022), training the
AI/deep learning algorithms using GPUs or other heavy performance centric
processors, and AI inference in real world use cases – either through embedded semis
or discrete chips – on the premises or in the cloud.

Figure 8: AI schematic – Process of machine learning

Source: J.P. Morgan.

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

For the purview of this report, we are restricting the discussion largely to the training
and inference aspects of AI and their impact on semiconductor demand. The demand
creation for semiconductors used for data collection through sensors and other IoT
devices is also a very large and fragmented market.

IoT and AI / deep learning should go hand in hand


In our view, IoT and AI/deep learning are two sides of the same coin. As we
illustrated above, IoT applications create the bulk of data that gets fed into the
machine learning algorithms and the vastness and diversity of the datasets should
determine the robustness and variety of AI use cases.

We believe a large amount of data is crucial to the success of deep learning. As a


result, if we want to stretch deep learning to more applications, it is essential for
players to expand the datasets that they possess.

Deploying more IoT devices with sensors would likely be the starting point. Take the
example of facial recognition; its development was largely accelerated by the
availability of huge photo databases, which were built on the contribution from
millions of smartphones and cameras.

There is a virtuous circle at work here, in our view, since credible AI use cases will
incentivize enterprises and even governments to collect more data and install more
IoT devices for machine learning.

Figure 9: Virtuous circle of IoT devices and deep learning

Source: NVIDIA.

AI fits well within the move towards accelerated computing


and heterogenization of the datacenter
Datacenter workloads have already been progressing away from a one-size-fits-all
approach (using CPU for every workload) towards matching workloads with specific
silicon solutions (see our note on Heterogeneous Computing, March 2016).

We have witnessed many hyperscale datacenter vendors use accelerators (GPU,


FPGA, ASICs) to speed up specific tasks handled by datacenters, such as video
streaming and search queries.

10

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

For example, Microsoft leads in deploying FPGAs in datacenters. The use of such
reprogrammable chips allows its developers to directly code on the hardware and
skip the software middle layer, which speeds up the overall processing.

For AI and deep learning, the same trend is repeating given that deep neural
networks require heavy parallelization in processing. GPUs and other accelerators
are seeing much bigger adoption for AI/deep learning training related workloads.
For AI inferencing, workloads are even more varied, given that the inference
requirements could be very application-specific.
We believe that rising AI adoption could lead to a significant growth in the adoption
of heterogeneous computing in the datacenter.

Figure 10: Block diagram of a heterogeneous compute implementation

Source: Gartner, J.P. Morgan

AI semiconductor market – $33bn by 2022


Note that the market size estimate is We forecast the total AI semiconductor market size to grow at a 59% CAGR to reach
largely logic and computing semiconductor
$33bn by 2022E, driven by increasing use cases for AI applications, dramatic
related and does not include other areas of
demand which would rise in sync with AI increase in AI training needs across hyperscale Internet vendors and enterprises a
adoption like memory, storage and well as rising adoption of inference use cases in smartphones, cars and several IoT-
networking semiconductors. related applications.
For the purview of this report, we are limiting our analysis to the computing-related
demand for AI training and inference markets and excluding other semiconductor
markets, such as IoT, which is an important part of the overall ecosystem that fuels
AI and deep learning adoption. This analysis also excludes the memory market
demand for AI applications, as well as the impact on AI ecosystem semiconductors
such as networking and storage, which should also see fast growth with rising AI
adoption. We elaborate on the impact on foundry and memory markets on pages 43-
46 of this report.

11

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 11: AI semis market revenue


US$ bn, yoy growth (%)
40
35 33
30 26
25
19
20
15 12
10 6
5 3
0
0
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI training market AI inference market

Source: J.P. Morgan estimates.

AI silicon should represent the fastest growing part of the semiconductor industry,
accounting for 6% of overall industry by 2022, in our view.

Figure 12: AI semis as a percentage of the total semi market

Source: WSTS, J.P. Morgan estimates. Note: We expect global semis market to grow 5-6% CAGR from 2018-2022.

Demand from AI is likely to be extremely computing-centric, especially for deep


learning training and inference-related demand, and should drive meaningful
semiconductor development at leading-edge process nodes, renewing the demand for
pursuing an aggressive leading edge process pipeline.

AI – Training and inference


We segregate the semiconductor market into AI Training and AI Inference, given
that solutions and usage models are likely to be different in both.

Figure 13: AI schematic – Process of machine learning

Source: J.P. Morgan.

12

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI Training refers to the part of the process flow (as indicated above) which deals
predominantly with training the deep learning/AI algorithms using large sets of data
and building predictive power and intelligence. This is extremely computing-
intensive and requires very large parallel processing capabilities and happens mainly
through AI servers (servers accelerated with GPUs or other silicon tailored for deep
learning workloads).

AI Inference refers to the use of the trained model in real-world use cases – be it facial
recognition or robotics or surveillance. In most of these instances, the algorithm is
hardwired into semiconductors on the edge (in terminal devices) or the devices access
inference-related hardware on the cloud. Inference-related workloads are likely less
computing-intensive, but may be very sensitive to latency and accuracy due to real-
world performance implications. Silicon needs are likely to be very fragmented, from
AI inference servers (with accelerators for inference workloads) in the cloud to simple
processor chips with embedded AI processing units.

AI Training to take off first, but AI Inference should by far be the bigger
market
AI Training is already taking off (since 2016) as multiple companies see value in
training algorithms for multiple use cases. Inference-related use cases are likely to
follow, once algorithm training reaches mature levels and deployment in various use
cases picks up speed. Eventually, inference-related AI workloads should be much
bigger than AI Training demand, in our view.

AI – Training market to grow at a 49%


CAGR until 2022E
We expect the AI training market to grow by a 49% CAGR from 2017 to 2022 and
reach $14bn by 2022, driven by rising demand for AI/deep learning training within
datacenters and proliferation of affordable cloud-based AI training instances from
leading public cloud vendors. We expect 9% of total servers shipped in 2022 to be
used for AI training purposes, with hyperscale datacenter vendors taking the lead.

Figure 14: AI training market revenue


US$bn, yoy growth (%)
16 14
14
12
12
10 9
8 6
6
4
4 2
2 0
-
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI training market

Source: J.P. Morgan estimates.

13

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI – Training adoption picking up in key Internet vendors


We have witnessed rising adoption of AI servers in datacenters for the large Internet
players (Google, Amazon, Facebook, Microsoft etc.) with a key focus on AI training
for different applications. Most large internet companies are already using their
substantial databases and self-built IP in DNN algorithms in areas such as Natural
Language Processing (NLP), computer vision, payment processing, targeted
customer management and marketing.

As the value of developing deep learning algorithms becomes more apparent for
diverse use cases and datasets, we expect rapid growth for AI training in the next few
years. Internet vendors are by far the leaders in AI training adoption, but we expect
traditional enterprises also to follow through over the next few years.

While on-premises AI training is a costly exercise (an NVIDIA DGX1 GPU server
costs $149k), the widespread offering of deep learning training instances by various
public cloud providers should make it much more affordable for a vast number of
enterprises.

Large ISPs are the early adopters of AI training servers


Large internet players became active in AI and deep learning development much
earlier, and have seen exponential growth recently due to breakthroughs in deep
learning and proliferation of use cases.

Currently, we estimate AI training servers to comprise only around a mid-single-digit


percentage of total hyperscale datacenter server shipments in 2017, but we forecast
the adoption rate of AI training to reach 13% by 2022, driven by emerging
applications for AI and proliferation of AI-as-a-service cloud models.
Our Global Software and Internet team led
by Stacy Pollard et al has published a
detailed report on AI for Software and
Several hyperscale internet vendors have opined on the importance of AI for future
Internet (link here). The text on Google, growth, including Google, Amazon, Alibaba, Tencent and Baidu.
Amazon, Alibaba, Tencent and Baidu is
modified and drawn from the company
Google
section of the Global note.
Google, Amazon are covered by Doug Google has rebranded itself from being a “mobile-first” company to an “AI-first”
Anmuth. company with AI/ML deployed throughout the organization. While Google has two
Alibaba, Tencent and Baidu are covered by teams primarily focused on AI – Google Brain, which it started in 2011, and
Alex Yao. DeepMind, which it acquired in 2014 – there are 1,000+ deep-learning projects
underway with applications across Search, YouTube, Android, Gmail, Photos, Maps,
Translate, Waymo and more.

Google’s use of AI/ML spread across search (RankBrain), hardware (Google Home/
Pixel Phones/Pixel Buds), Google Cloud (TensorFlow/various APIs), Waymo and
AlpahGo.

Amazon
Amazon was an early adopter of AI, which is prevalent throughout the company’s
retail and cloud business segments. The four key areas where AI is core to Amazon’s
offering are: 1) Amazon’s product recommendation engine, 2) Amazon Alexa, 3)
Amazon Web Services (AWS), and 4) Amazon Go. We note there are many other
areas where Amazon utilizes AI, including its supply chain, demand forecasting,
capacity planning, fraud detection, translations and more.

14

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Alibaba
Alibaba identifies four key elements of AI (the concept of “CUBA”), which includes
cloud computing, use case, big data and algorithm. We think the company has
competitive edges in all these areas with its strong cloud infrastructure (No.1 cloud
service provider in China), extensive use case (from ecommerce, local service to
digital content), rich data resource generated from various use cases and seasoned
technology team.

Alibaba’s AI applications range from personalized recommendation, automated


customer service, new retail, payment, risk management, logistics route optimization
to voice assistant.

Tencent
Tencent recently unveiled its AI strategy and related product lines in four major
aspects: (1) establishing AI laboratories, (2) deploying AI applications in its games,
content, social platform, financial service and healthcare, (3) providing AI-as-a-
service through Tencent Cloud, and (4) building an “open-source” ecosystem.

Baidu
Baidu’s AI strategy comprises four major projects:

 Autonomous driving platform ‘Project Apollo’: Complete autonomous driving


solution to outside partners, which includes key technology offering in auto,
hardware, software and cloud based data service;
 Baidu Cloud: AI-based cloud supported by Baidu Brain, with main focus on AI-
based SaaS (voice recognition, NLP, user portrait and visual recognition);
 Conversational-based AI smart device platform ‘DuerOS’: Integrated solution
of software and hardware that enables devices to communicate with users in
voices, with product offerings from Raven H, Raven R to Raven Q;
 Internet finance: Applications include smart investment advisor, identity
recognition (visual/voice recognition and optical character recognition), big data
risk management and AI-based customer service, with products such as Baidu
Wealth Management and Baidu Consumer Credit.
Strong datacenter growth driven by migration to public
cloud
Hyperscale cloud capex likely to remain very strong
We forecast the top nine Internet service providers’ capex to grow by a 24% CAGR
from 2012 to 2018, driven by ongoing migration to public cloud and rising demand
for cloud services. Besides, we also see early growth for AI-related servers, with high
GPGPU count and high memory densities.

15

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 15: Top ISPs aggregated capex


US$bn, yoy growth (%)
70 40% 45%
60 40%
35%
50 28%
25% 26% 30%
40 20% 25%
30 20%
15%
20
4% 10%
10 5%
- 0%
2012 2013 2014 2015 2016 2017E 2018E
Top ISPs aggregated CAPEX yoy (%)

Source: Company data, Bloomberg estimates.

Enterprises likely to use more of public cloud for AI training


Initial investment for a dedicated AI datacenter could be huge and require high
technological expertise. Therefore, we expect most enterprise players to employ on-
demand AI services provided by ISP, given a lot of enterprises are merely in the
development phase or only looking for small-scale AI deployment now, and cloud-
based AI training instances are already available.

For instance, Amazon Web Service and Google Cloud Platform both offer machine
learning engines that allow users to create deep learning models without managing
the hardware components, at affordable prices.

Table 4: Pricing model of AWS


Function Prices
Model Building
Data Analysis and Model Building Fees $0.42/hour
Prediction
Batch Prediction $0.10 per 1,000 predictions, rounded up to the next 1,000
Real-time Prediction $0.0001 per prediction, rounded up to the nearest penny +
reserved capacity charge of $0.001 per hour for each 10MB of memory provisioned for the model
Source: Company website. Note: Pricing data applicable for US East (N. Virginia) and EU (Ireland) regions.

These services not only enable enterprises to leverage AI at more controllable cost,
but also encourage a faster adoption of machine learning, in our view.

This is in-line with our long-held view that more of the IT spend in datacenter is
likely to go towards the public cloud. In case of AI, this migration is likely
happening at the start itself (AI on demand models already available) and could drive
much quicker adoption.

16

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 16: Public Cloud spend as a % of total DC IT spend

Source: J.P. Morgan estimates.

Enterprise in-house servers could also see some pickup, but remain limited
We still expect some enterprises to start building their own AI datacenters, especially
for industries who keep very sensitive data or players who have intensive AI
applications. For example, some auto OEMs are currently researching in ADAS or
automated driving, as this requires continued AI training to achieve higher accuracy
and lower failure rate.

However, economics work against the on-premise model (since demand for AI
training is likely to be happening only infrequently and not likely to be a regular and
predictable workload) and we expect it to be limited to only very large enterprise
vendors with significant spending power.

AI training silicon – Parallel processing is a key attribute


AI training is usually conducted using a neural network, a system in hardware or
software composed by interconnected neurons in different layers, which was inspired
by how human brains work. The neuron is a computational unit which is connected
to each other and conveys the outputs to other neurons for the further processing.
Usually a neural network includes numbers of hidden layers and each of them could
improve the data processing ability by further refining the data.

Feature extraction is one of the important steps in neural network training. During the
process, the neurons in each layer would convert the information (ex: image) into a
3-D input, process the data with its specific weight and biases factors, and generates
an output, which will go to the next layer for further processing. The inputs would be
refined and attributed into a smaller category after the processing in neurons in each
layer. At the end of the process, the neural network will generate an output. If it is
wrong, the neural network will revise the weight and biases for each neurons and see
whether it improve the success rates.

Readers can approximate this technique to a giant Goal-Seek function, in which


multiple iterations performed until the algorithm is perfected for the specified data
sent and the desired output.

17

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 17: How a deep neutral network works

Source: NVIDIA.

Figure 18: How a convolutional neural network works

Source: Mathworks.com. Note: Convolutional neural network is a subset of deep neural network.

During the training process, many neurons perform calculations simultaneously,


which can be termed as parallel computing. Therefore, among existing silicon
solutions, GPU which has thousands of less powerful cores that run parallel at the
same time (historically used for rendering video and graphics), has been a better
silicon solution for DNNs. On the other hand, CPUs, which contains only a relatively
small number of powerful cores, is more efficient in running complex and serial
processing.

For instance, Intel’s most advanced server CPU, Xeon Phi 7290 has 72 cores, each
running 1.5GHz, while NVIDIA's most advanced GPU, Tesla V100, has 5120 cores
which can each be run in parallel.

Some vendors are also trialing FPGAs or specific ASICs that are custom built for
deep-learning, for large workloads. Google, for instance, claims that it can use
merely eight TPUs and an afternoon to train a translation model, which would take a
full day for 32 GPUs.

18

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 19: GPU structure versus CPU

Source: NVIDIA.

Memory bandwidth also an important feature for training


For a deeper dive on HBM, please refer to Besides chip processing capability, the speed of data transfer is also critical in
Kevin Zhang’s initiation on ASM Pacific determining the efficiency of training, given its data-intensive nature. This
Technology (Link). The text in this section
is adopted and modified from the note. consequently calls for an upgrade in the memory architecture, as conventional memory
interface like GDDR5 delivers relatively low bandwidth but consumes much power.

High bandwidth memory (HBM), which stacks memory chips vertically onto one
another, thus emerges as a new viable solution. This new way of 3D packaging not
only expands the memory interface (from 32 bit in GDDR5 to 1024 bit), but also
places each DRAM chip closer to the processing unit and improves the efficiency of
space use, which makes it capable of delivering faster data transfer with smaller form
factors and lower power consumption.

Figure 20: HBM vs. GDDR5 structure

Source: NVIDIA.

Table 5: Comparison between GDDR5, HBM and HBM2


GDDR5 HBM HBM2
Bus width (bit) 32 1,024 1,024
Max bandwidth (GB/s) 32 128 256
VDD (v) 1.5v 1.2v 1.2v
Size per GB (mm*mm) 24*28 5*7 5*7
Source: AMD, SK hynix, J.P. Morgan.

19

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Given HBM’s superiority in data transmission, it has been adopted in most of the
advanced GPU and AI related chips, with users including NVIDIA, Google and Intel.

Table 6: Applications with HBM/HBM2


Year Company Product Series Memory
2015 AMD GPU Radeon Fury HBM1
2016 Intel PSG / Altera FPGA Stratix 10 HBM2
Xilinx FPGA Virtex UltraScale HBM2
NVIDIA GPU Tesla P100 HBM2
2017 AMD GPU Vega HBM2
NVIDIA GPU Tesla V100 HBM2
Google TPU TPU2 HBM2
Intel GPU Kaby Lake- G processors HBM2
Intel Accelerator Lake Crest HBM2
Source: Company data, J.P. Morgan

All leading memory players have been working on HBM, or at least related products
that use 3D packaging. Samsung and SK Hynix both commenced mass production of
HBM2 in 2016, and Samsung even further announced plan to increase 8GB HBM2
capacity in July 2017 to meet the strong demand. Intel and Micron are also
partnering to develop a similar technology named Hybrid Memory Cube (HMC).

Floating Point Computing more common in use than Integer


in deep learning
One of the most discussed metrics in the world of deep learning is floating point
operations per second, or more commonly known as FLOPS, which has often been
used by vendors like NVIDIA to showcase the powerfulness of their chipsets.

While different from typical measure of computing (especially integer computing)


like MIPS (Millions of Instructions per second), floating point computing is more
relevant in the discussion of deep learning, given its use in intensive calculations
including multiple vectors and matrix multiplications. Parallel architectures such as
GPU excel at delivering significantly higher FLOPS than serial processor
architectures such as CPU.

Figure 21: Floating-point operations per second for CPU and GPU

Source: NVIDIA.

20

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

What is floating point operation?


Without getting too much into the mathematical specifics, floating point can be
imagined as scientific notation (ex: 7.51×10-9) that is expressed in the base of two
instead of ten. Given this nature, it is extremely convenient to be used in computation
that involves either very large or very small numbers. However, it is also important
to note that floating point might not be the most exact representation of the actual
figure (ex: the difference between 75,963,459 and 75.963×106), which could result in
certain loss of precision when compared to integer program.

Why is FLOPS important to deep learning?


It might be easier to understand the significance of FLOPS to deep learning by
detouring to a similar but more visualized scenario – graphics rendering. While
neural network in deep learning is a composite of many inputs, weights and biases,
graphics is an analogous collection of large set objects formed by almost numerous
vectors underneath.

Figure 22: Illustration of rendering cubic splines

Source: NVIDIA.

Take the example of drawing a sphere – as humans are capable of analog


expressions, it is very intuitive for us to think the best way to perfect the sphere is to
draw a better curve.

However, for computers that process information in discrete form (think of the
difference between humans listening to a continuous stream of speech and computers
converting that into a series of separate binary code), it is extremely hard and at times
impossible for computers to directly output a perfect curve line. Instead, it makes
more sense to divide the curve into multiple small straight strokes and to increase the
number of small strokes – while each stroke could be a less "precise" representation
on its own, the fact that the curve is composed of more strokes effectively
compensates for the individual loss, and makes a better and more precise
representation of the full picture.

Similarly for deep learning, while each individual neuron in the neural network can
sacrifice some degree of accuracy with the use of floating point computing, the
existence of more neurons is more than enough to make up for that loss. It is also a
more efficient use of finite computing resources. This bodes well for GPUs that are
good at parallel processing or even ASICs that are specialized in heavy matrix
multiplications.

21

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI training semis’ market size


The first stage of AI-related demand appears at the AI training stage, since AI
algorithm development is quite computing-intensive (selecting the right algorithm for
the datasets, training the algorithm on vast sets of data, optimizing the algorithm for
real-world use cases etc.).

We have witnessed a meaningful pick-up in demand for AI training-related servers


from hyperscale internet vendors since 2016, and this is now 4-6% of overall
hyperscale datacenter server shipments. This, in our view, includes in-house training
workloads (ex: Alpha Go for Google, Amazon Echo/Alexa) and enterprises’ training
workloads in the public cloud.

We expect hyperscale datacenter players to take the lead in AI training activities


while training in on-premise datacenters in the enterprise is likely to happen slowly
due to high capex requirements. In the next few years, we expect the demand for AI
training to accelerate dramatically, given increasing training workload, vast variety
of data being created that starts to come under the purview of deep-learning training
and demand proliferation outside of the large internet companies.

Buying up the stack implies significant value at stake from adopting AI


Buying behavior for datacenter hardware at the current point also suggests significant
value in AI deployment. We are seeing enterprise and cloud vendors largely buying
up the stack for GPUs as well as memory, and demand is relatively price insensitive.
In our view, this typically happens when the value proposition is so compelling that
the hardware price tag becomes less significant.

Table 7: Normal datacenter server versus AI server – spec and cost comparison
Normal Server AI server
Specification Unit Cost Specification Unit Cost
CPU: E5-2650Lv4 (12 CORE) 2 $2,658 A lower grade of CPU vs. E5-2650Lv4 2 $1,994
GPU: Tesla V100 0 $0 GPU: Tesla V100 6 $42,000
Memory: 16GB, DDR4-2400, ECC 12 $1,716 Memory: 16GB, DDR4-2400, ECC 18 $2,574
Storage: Boot SSD, 120GB 1 $125 Storage: Boot SSD, 120GB 1 $125
Storage: 480GB, Medium Endurance SSD 2 $784 Storage: 480GB, Medium Endurance SSD 2 $784
Network Card: None 0 $0 Network Card: None 0 $0
Chassis Costs 0 $0 Chassis Costs 0 $0
Motherboard 1 $299 Motherboard 1 $299
CPU Heat Sink 2 $28 CPU Heat Sink 2 $28
Power Supply 1 $95 Power Supply 1 $143
Storage Backplane 1 $75 Storage Backplane 1 $75
Drive Caddies 4 $52 Drive Caddies 4 $52
Fans 5 $50 Fans 5 $125
Internal Cables 1 $20 Internal Cables 1 $20
Riser Cards 1 $19 Riser Cards 1 $19
Sheet Metal Case 1 $100 Sheet Metal Case 1 $100
Assembly Labor and Test 1 $150 Assembly Labor and Test 1 $150
10% Markup 1 $478 10% Markup 1 $478
Total Cost $6,650 Total Cost $48,966
Price difference 636%
Source: J.P. Morgan.

As illustrated above, an AI server could be 6-7x more expensive than a regular


server, with the key areas of upgrade being GPUs and heat dissipation/power system
(Please see our note – “Who will power and cool the next 'hot' tech products?”,
published in Nov 2017 for more details), while Intel server CPU content could be
cheaper, since most of the compute workload goes to the GPUs for AI training.

22

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

While it is not exactly the same, the last time we saw this kind of step-up in spending
was during the early stage of smartphone adoption, when consumers saw sufficient
value to be willing to spend $600-700 on iPhones and much higher dollars on data
plans, compared to $300-400 for feature phones previously, with largely cheap voice
based plans.

AI – Training – a $14bn market by 2022


We estimate that the semiconductor market for AI training will reach $14bn in 2022
from $1.9bn in 2017, a 49% CAGR, driven by increasing training workload from
datacenter and enterprise players.

Table 8: Servers for training market


2016 2017E 2018E 2019E 2020E 2021E 2022E
Global server unit (k) 9,466 9,794 10,134 10,543 11,059 11,390 11,732
yoy growth (%) 3.5% 3.5% 4.0% 4.9% 3.0% 3.0%

% of cloud server demand 30% 35% 40% 45% 50% 54% 57%
% of enterprise server 70% 65% 60% 55% 50% 46% 43%

% of cloud server for AI training 2% 4% 6% 8% 10% 12% 13%


% of enterprise server for AI training 0% 1% 2% 2% 3% 3% 4%

Server shipment for AI training (k) 57 201 334 496 691 864 1,012
AI training server penetration rate 1% 2% 3% 5% 6% 8% 9%

AI training chips market share


GPU based (using latest GPU in the market ) 85% 80% 75% 70% 65% 60% 60%
Accelerators 15% 20% 25% 30% 35% 40% 40%

ASP (US$)
GPU based (using latest GPU in the market ) 2500 3,000 3,060 3,121 3,043 2,967 2,893
Accelerators 600 618 637 656 675 696 716

Number of GPUs per server 3.0 4.0 4.8 5.5 6.3 7.0 7.5
Number of other accelerators per server 3.0 3.5 4.0 4.5 5.0 5.5 6.0

Semis value (US$mn)


GPU based (using latest GPU in the market ) 362 1,928 3,646 5,954 8,545 10,773 13,180
Accelerators 15 87 213 439 817 1,323 1,741

Incremental semis value from AI training server (US$mn) 377 2,014 3,859 6,393 9,362 12,096 14,921

Incremental logic Semis value for AI Training Server (US$mn) 364 1,920 3,682 6,180 9,023 11,621 14,295
Source: J.P. Morgan estimates, Company data.

Details for key assumptions


 Our interaction with the supply chain indicates faster progress for hyperscale
players in adopting AI training servers than for enterprise server vendors. We
expect hyperscale vendors to remain leaders in the space over the next few years
while enterprises could fulfill their AI demand through the public cloud.
 GPU is dominating the AI training silicon market but we model gradual declines
in market share due to rising adoption of other accelerators such as
FPGA/ASICs/TPU2 and Intel’s future integrated solutions.
 We reference a mid-range Tesla series GPU/ FPGA for GPU/accelerator ASP
assumptions in the exercise. These are clearly approximations, given the wide
range of prices.

23

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

 We currently see four GPUs in each AI server on average, but the number of
GPU deployed is likely to pick up gradually, given rising compute requirements.
 We take out the value of memory embedded in accelerators from the incremental
semis value, in order to get the logic semis value from AI training servers.
NVIDIA GPUs have an early lead in silicon and ecosystem
As we described before, parallel processing architecture in GPUs makes them
naturally suited to AI/deep learning workloads. In addition, NVIDIA has curated
demand in the early use cases (such as scientific computing, HPC and
supercomputing applications) and has a pretty sizeable lead with its programming
language for AI use cases (CUDA) and widespread support for most of the machine
learning software libraries and frameworks such as TensorFlow, Caffe2, Torch and
Theano. In addition, AI training workloads benefit from major parallelization and
hardware acceleration while being less sensitive to power consumption needs (since
AI training may not be happening all the time). Among currently available silicon,
GPUs are best suited to such workloads, in our view.

Hence, we expect GPU to dominate the AI training silicon market with its parallel
computing algorithms, and other accelerators (FPGA/ASIC) to account for only a
small portion of the market. NVIDIA is the dominant player in the AI/Deep Neutral
Network (DNN) training GPU market, with strong silicon offerings and growing
ecosystem support.

Table 9: Comparison of NVIDIA datacenter (Tesla) GPU specs


Tesla Product Tesla K40 Tesla M40 Tesla P100 Tesla V100
GPU Kepler (GK180) Maxwell (GM200) Pascal (GP100) Volta (GV100)
Die Size 551mm2 601mm2 610mm2 815mm2
Manf. Process 28nm 28nm 16nm FinFET+ 12nm FFN
Transistor 7.1bn 8.0bn 15.3bn 21.1bn
Core Numbers
FP32 Cores 2880 3072 3584 5120
FP64 Cores 960 96 1792 2560
Tensor Cores NA NA NA 640
Performance
Peak FP32 TFLOPS 5 6.8 10.6 15.7
Peak FP64 TFLOPS 1.7 0.21 5.3 7.8
Peak Tensor TFLOPS NA NA NA 125
Source: NVIDIA.

Other accelerators and ASICs are also being trialed


Custom-built Accelerators are also emerging for specific training use cases
While GPU is likely to remain dominant in deep learning training in the near future,
there are continuous efforts to develop alternative solutions using FPGAs (Field-
Programmable Gate Array) and custom ASIC.

Google’s second-generation Tensor Processing Unit (TPU) is one of the most well-
known attempts, in our view. The in-house designed ASIC can deliver up to 180
teraflops of floating point performance, which bodes well for the data-intensive
processes. This significantly challenges the existing GPU solutions, as Google has
already claimed that it takes merely eight TPUs and an afternoon to train a translation
model, which would take a full day for 32 GPUs.

24

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

It is important to note that these alternative solutions have yet to prove their potential
for large-scale deployment for a wide array of AI training use cases, and GPU
remains the most commercial option so far. Yet, even beyond the application for
deep learning, these accelerators still have a lot of potential within the datacenters, as
they are also very capable of accelerating other workloads, such as search engine
queries. Thus, in any case, they are likely to see increasing adoption in datacenters,
as the composition of the datacenter becomes more heterogeneous.

Integrated solutions likely to emerge as market matures


At this point, the market is largely using discrete solutions for AI training, with
GPUs and CPUs remaining discrete (as shown above, a standard AI server has 2 Intel
CPUs and 2-8 NVIDIA GPGPUs, with both having separate memory, and could also
have other accelerators). This is quite typical in the early stage of market adoption,
where cost is less critical than performance and time to market.

Once the market matures, we should see wider adoption of more integrated solutions,
likely with CPU-GPU integration or integration of multiple accelerators on the same
chip.

For example, Intel hired the industry expert Raja Koduri from AMD group as the
chief architect and senior vice president of the newly formed Core and Visual
Computing group. We believe Intel not only aims to develop the discrete GPUs, but
also to expand the application of discrete GPUs into AI and automotive by
integrating CPU and GPU architecture in the medium to longer term. Besides, Intel
began shipping Stratix 10 FPGAs in October 2017, which utilizes the FPGA
framework to accelerate the training process.

Given the importance of parallel computing for DNN training, GPU or any kind of
parallel computing architecture based silicon, is still likely to remain the core of AI
training silicon for a long time to come, in our view.

AI – Inference – the real deal


We believe that AI inference is the key eventual market and is likely to grow much
larger than the AI training market as use cases proliferate for deep learning.

Initially, we expect the AI training market to dominate the overall AI semiconductor


TAM, as multiple companies train algorithms for real-life use cases. However, once
the use cases become more established, the inference market is likely to pick up
rapidly, both in the cloud and at the edge, depending on latency requirements, cost
considerations, and maturity of the specific deep learning algorithms.

In the medium to longer term, we believe the inference silicon market will be much
larger than the training market given the likely wide deployment of trained neural
network in cloud and edge devices. After all, the purpose of training is to
commercialize and monetize the deployments of DNNs, which lead to a bigger
silicon market size at some point.

25

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Inference should be much bigger than training but a lot


more fragmented
We expect AI inference silicon market revenue to grow by a 70% CAGR from 2017
to 2022 and reach $19bn in 2022, driven by rising adoption of inference use cases, at
the datacenter and the edge. Now, use cases are likely to be very fragmented for AI
inference, but we expect smartphone-based AI inference, facial recognition, NLP,
and computer vision (including robotics, factory automation and autonomous driving
and surveillance) to be the early use cases.

We admit that it is tough to predict all the various use cases that could spring up for
AI and deep learning in various verticals. In our exercise, we restrict the demand
forecasting to AI inference in the cloud as well as three use cases on the edge
(Smartphones, Autonomous driving and Surveillance) to illustrate the demand
impact on semiconductors from AI inference.

Figure 23: AI inference market revenue


US$bn, yoy growth (%)
25
19
20
14
15
10
10
6
5
1 3
0
-
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI inference market

Source: J.P. Morgan estimates.

Inference in the cloud or at the edge? Four key decision


factors
An often-asked question is whether AI-Inference will happen in the cloud or at the
edge. We believe that this is likely to be very use case specific and will depend on
the following four factors: cost, algorithm maturity, bandwidth and latency.

Cost of integrating AI inference function


Fully-fledged AI inference chips for high-performance inference applications could
significantly lift device BOM costs. Therefore, we believe less price-sensitive
enterprise/automotive applications would likely see faster adoption of these costly
chips (for ADAS, heavy duty surveillance applications), while the consumer market
could see a slower pick-up with most high-performance inference workload
remaining in the cloud, given relatively high price elasticity for the end product
(smart speakers inference for NLP happens almost entirely on the cloud, which helps
keep the price low for terminal devices such as the Amazon Echo).

26

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Maturity of algorithm
Besides costs, algorithm maturity could also determine where the inference workload
resides. Mature models that have less iterative training needs are the most likely to be
deployed at edge, given their readiness to be compressed and fit the limited capacity
of on-device chips. One example of more mature deep learning models is facial
recognition which once mature may not require very frequent changes. (Apple has
embedded machine learning on its Neural Processing Engine in the A12 application
processor for iPhone X Face ID functionality).

Availability of bandwidth
Availability and cost of bandwidth is another concern. For always-connected devices
that have a stable network connection (smart speakers again, which are connected
through home networks or broadband connections), it may be more feasible to keep
the bulk of the inference workload online.

However, for automotive applications or smartphones where high bandwidth


connectivity may not always be available, more of the inference work load may have
to reside on the device itself.

Latency of computing
Closely linked to the bandwidth question is also the latency tolerance of the AI use
case. For very low latency use cases such as autonomous driving, real-time
surveillance and safety, or for mission-critical applications in industrial automation,
AI inference may need to be largely done at the edge.

Inference in the cloud


Inference training market is still very fragmented
After using DNNs training and perfecting the AI algorithms, developers will deploy
the optimized application model (or algorithm) for real-world use cases of AI
inference. This could be happening in the cloud itself in many instances, or at the
edge.

For inference in the cloud, the use cases are likely to be performance-heavy, with less
mature algorithms which are compute- and memory-intensive and likely to require
frequent re-training.

At this point, we believe that most of the inference related workloads in the cloud are
still handled through x86 CPUs. However, over a period of time, we believe there
will be a widespread adoption of accelerators (GPUs, FPGAs, ASICs, SoCs) which
could improve flexibility, parallelism (hence performance), and power efficiency for
specific workloads.

We expect that 50-65% of AI-Inference workloads in the cloud are likely to be


accelerated in the next five years, given the meaningful performance gains from
adopting accelerated computing.

27

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

A steeper adoption curve, rising to $8bn in 2022


Although the inference market is smaller than the training market currently, we
expect inference revenue in the cloud to accelerate in the next 3-4 years driven by
more established use cases. We expect AI-inference server-related semiconductor
revenue to reach $8bn by 2022.

Figure 24: AI inference at the cloud semiconductor revenues


US$bn, yoy growth (%)
9 8
8
7
6 5
5
4
3
3
2 1
1 0 0 0
-
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI inference at the Cloud

Source: Company data, J.P. Morgan estimates.

Table 10: Servers for inference market


2016 2017E 2018E 2019E 2020E 2021E 2022E
Global server unit (k) 9,466 9,794 10,134 10,543 11,059 11,390 11,732
yoy growth (%) 3.5% 3.5% 4.0% 4.9% 3.0% 3.0%

% of server demand from datacenter 30% 35% 40% 45% 50% 54% 57%
% of enterprise server 70% 65% 60% 55% 50% 46% 43%

% of datacenter server for AI inference 1% 2% 4% 8% 12% 16% 20%


% of enterprise server for AI inference 0% 0% 0% 1% 3% 7% 11%

Server shipment for AI inference (k) 17 88 162 438 829 1,351 1,892
AI inference server penetration rate 0% 1% 2% 4% 8% 12% 16%

AI inference chips market share


Accelerators (excluding stock Intel server CPUs) 0% 15% 30% 40% 50% 60% 65%

ASP (US$)
Accelerators (excluding stock Intel server CPUs) 600 615 630 646 630 614 599
Server CPUs 1,500 1,545 1,591 1,639 1,688 1,739 1,791

Number of accelerators per server 4.0 3.5 5.0 5.5 6.0 6.5 7.0

Semis value (US$mn)


Accelerators (excluding stock Intel server CPUs) - 28 153 622 1,568 3,236 5,156
Server CPUs 26 135 258 717 1,400 2,349 3,389
Incremental semis value from AI Inference server (US$mn) 26 164 411 1,339 2,968 5,585 8,546

Incremental Logic Semis Value from AI Inference Server (US$mn) 26 157 381 1,261 2,780 5,213 7,977
Source: J.P. Morgan estimates, Company data.

28

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Details for key assumptions


 AI inference demand is likely to start slow in the beginning, but we expect a steep
adoption curve driven by a broadening use cases in the next 2-3 years.
 However, we still believe hyperscale players could see higher adoption of AI
inference server vs. enterprise, given the likelihood of inference-related
workloads also moving to public cloud and massive consumer AI inference
workloads from vendors like Amazon (Alexa) and Google (Google Now, Map).
 Multiple commentaries (including NVIDIA) indicate that inference workload is
not accelerated currently, but majority of that should be accelerated soon. We
assume a fairly high accelerator bundle rate for AI inference servers as well.
 We make a simplistic assumption that accelerators for AI inference are the same
as those used in training, which is likely a mix of GPU, FPGA and ASIC etc.
However, individual configurations will vary once both markets become big.
 Note that we have included revenue from Intel CPUs in this exercise but only
those from non-accelerated servers, since they will be carrying the AI inference
workload in this case. In accelerated servers, we only count the incremental
revenue from accelerators.
 For server CPU used for inference, we factor a ~20% ASP premium to average
Intel server CPU and we model the usage of 2 CPUs per AI server on average.

What kind of Semiconductor solutions fit inference?


As we discussed earlier, most of the AI inference workloads in the cloud are still not
accelerated and are largely running on Intel CPUs. However, the benefits of
hardware acceleration are quite compelling, even for AI inference, in our view.

AI inference workloads are not likely to be as computing-intensive or parallelism-


focused as for AI training, since parameters and algorithms are largely set. However,
they are still going to be quite high in computing intensity, compared to edge device
silicon, and should benefit from various forms of hardware acceleration. Also, in
many applications (such as NLP), separating out training and inference workloads
could be difficult due to the recursive nature of the algorithms and hence may need
computing power similar to training algorithms.

Semiconductor accelerator choice depends on workload


As illustrated below, all of the acceleration options offer some advantages and
disadvantages for AI inference workloads. Thus, each use case is likely to use
different combinations of acceleration (along with x86 CPUs for running the core
server) based on what matches the workloads.

Figure 25: Inference silicon solution comparison


Flexibility of Scalability of
Applications Performance Power Efficiency Development Cost
CPU    Low
GPU    Low
ASIC    High
FPGA    Mid
Source: J.P. Morgan.

29

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

x86 CPU is a ready-made but less efficient solution in some cases


CPUs are already being widely used in servers for inferencing. The advantages are
the relatively low costs vs. GPUs, but the solution is less efficient in power
consumption and throughput compared to others. Intel, for instance, is strengthening
its inference CPU offering with the new product Xeon Scalable.

GPU is a good solution for inference, but could be an overkill


Besides the dominant shares in training market, NVIDIA is also developing its
opportunities in the inference market for GPUs. The company already saw several
design wins in automotive and datacenter for inference use cases.

In addition, NVIDIA is also strengthening its platform advantage by adding software


accelerators such as the new TensorRT3 software, a programmable inference
accelerator for neutral network on NVIDIA GPUs. According to the company, Tesla
V100 GPUs + TensorRT3 delivers up to 40x higher throughput in under 7ms real-
time latency vs. CPU-only inference.

Figure 26: NVIDIA’s Tensor RT optimize neural networks Figure 27: Tensor RT has 3.7x faster inference on V100 vs. P100; 18x
Faster inference of Tensorflow models on V100

Source: NVIDIA presentation.


Source: NVIDIA website.

The company has also indicated several design wins beyond US hyperscale vendors
– such as Alibaba, Baidu, Tencent and JD.com for the Tesla V100/TensorRT and
large enterprise customers like Huawei, Inspur and Lenovo for the NVIDIA’s HGX-
based servers with Volta GPUs, which is more power efficient and has a smaller
form factor.

However, the criticism of GPU remains that it may not be power-efficient enough for
inference workloads and could be overkill for many inference use cases. Cloud-based
provisioning (pay-as-you-go) could address some of these issues, but adoption of
such models is still in the early days.

ASICs – Best fit, but only for very large use cases
The most efficient silicon architectures for DNNs are likely to be the ones designed
from scratch (ASICs) so that designers could eliminate redundant features for other
applications and optimize the power efficiency. On the other hand, since the
designers fix the architectures for specific programs, ASICs will be unable to change
framework and meet the new demand.

30

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

We have seen hyperscale players designing their own custom ASIC for machine
learning, with the most well-known being Google’s Tensor Processing Unit (TPU).
Designing ASIC solution is usually costly (tape-outs, development costs) and takes a
long time (1-2 years) for product development. Therefore, it requires a large-scale
use case to justify the ROI. Google, for example, claims that its TPU solutions have
saved costs for building another 12 datacenters for AI workloads, but such benefits
may only accrue when demand reaches significant scale.

While the development cost for custom ASIC is much higher, some argue it could
provide the best performance with the most tailored structure. For instance, the
Matrix Multiplier Unit in Google’s TPU can host 65k Arithmetic Logic Unit (ALU),
which can significantly lift the number of operations per cycle.

FPGA is the most flexible silicon solution, and usually power efficient as well
One challenge for custom designs is that deep-learning algorithms are rapidly
evolving, at least in early stage of development; therefore, Field-Programmable Gate
Array (FPGA), which is an integrated circuit that allows users to program (and
reprogram) the hardware configuration, offers the most flexibility and eases the
concerns. This feature leaves much higher flexibility and room for customization to
fit the need of each specific machine learning model, which could in turn boost
processing speed and energy efficiency as well. We have seen MSFT widely used
FPGAs for its Catapult and Brainwave projects. Other cloud vendors such as
Facebook, Baidu are also using the FPGA solution. Xilinx and Intel Programmable
Solutions Group (PSG, formerly Altera) are the main FPGA suppliers. However,
FPGA has drawbacks in terms of cost and scalability, once the solution matures.

In the next few years, we believe that all of these options will co-exist for different
AI inference workloads and use cases. For purposes of estimating market size for AI
Inference in the cloud, we approximate all these solutions as accelerators and do not
differentiate between GPU, FPGA, ASICs and other forms of accelerators. What
looks quite obvious is that the accelerator adoption is likely to pick up meaningfully
for AI inference workloads in the datacenter.

Inference at the edge


While most inference workload is still performed in datacenters now, we believe the
trend will gradually turn and the computation will increasingly shift to the edge
going forward. This is due to the need of (1) a lower latency for better human and
machine interaction in many use cases (autonomous driving, for instance), and (2)
offline AI functionality even when connectivity is not available.

We believe inference chips will eventually make their way to most edge devices, but
high-end consumer devices and auto/industrial applications are likely to witness a
faster pickup for now, given the ability to absorb incremental costs.

31

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Embedded solutions likely to be common in consumer


devices
For consumer applications, we believe that most vendors are likely to integrate
neural engines for AI inference in their existing silicon processors.

In the case of smartphones, for example, Apple and HiSilicon have a neural
processing unit in their APs, while MediaTek will integrate Vision Processing Unit
(VPU) in its mobile SoCs. In such cases, the inference power of SoCs is unlikely to
be comparable to discrete solutions, but would be able to process low-level inference
workloads at the edge.

Embedding AI or neural engines in existing silicon is likely the most common


approach for many other consumer-centric AI inference solutions.

However, for advanced functionalities such as Level 3/4 ADAS functions in auto or
real-time surveillance in security cameras, discrete silicon may still be required to
handle the inference workloads. This market is still evolving and we see a slew of
new vendors attempting to develop tailored ‘xPU’ solutions for different workloads.

Market size and assumptions


Predicting the size of AI inference market at the edge is quite tricky, in our view,
given the numerous use cases and the fact that in several areas the AI silicon is likely
to be embedded in the SoC, along with other functionality.

In our analysis, we are looking at three key use cases at the edge – AI on the
Smartphone (only accounting for incremental silicon for AI), ADAS or assisted
driving and Surveillance Cameras. These are use cases for which precedence exists
and the adoption trends are clearer, in our view.

However, we accept that this is still a narrow subset of AI use cases – with multiple
areas such as computer vision, NLP and robotics all likely to see adoption in the next
3-5 years, which could lead to material increase in the AI inference market size.

Based on our assumptions, we expect AI-inference market at the edge to account for
$11bn by 2022, a 57% CAGR from 2017 to 2022. Smartphone AI application is
likely to be the bigger market initially, before ADAS and automotive related
applications pick up growth from 2019-2020 timeframe. Surveillance solutions are
likely to see rapid adoption and comprise around 22% of the market size by 2022.

32

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 28: AI inference market at the edge


US$bn, yoy growth (%)
14
11
12
9
10
7
8
6 5
4 2
2 1
0
-
2016 2017E 2018E 2019E 2020E 2021E 2022E
Smartphone ADAS Surveillance

Source: J.P. Morgan estimates.

Smartphone AI-Inference market


We expect Qualcomm/Mediatek/HiSilicon to launch AI inference chip integrated in
smartphone SoCs in 2018 and forecast the AI penetration rate in smartphone to reach
53% by 2022. We estimate 15%-20% ASP increase for mid-to-high end smartphone
SoCs driven by die increase for added AI function. Consequently, we forecast
incremental smartphone AI inference market to grow 42% CAGR from 2017 to 2022
and reach $3.8bn.

Table 11: Smartphone inference market


2016 2017E 2018E 2019E 2020E 2021E 2022E
Global smartphone shipments (million) 1,481 1,536 1,593 1,641 1,690 1,741 1,793
yoy growth (%) 3.7% 3.7% 3.0% 3.0% 3.0% 3.0%

iPhone shipment 217 219 239 264 264 264 264


AI penetration rate 0% 46% 87% 100% 100% 100% 100%

Android smartphone shipment 1,264 1,317 1,354 1,377 1,426 1,477 1,529
AI penetration rate 0% 6% 10% 20% 30% 38% 45%

Size of AI smartphone (units in millions) - 177 348 544 697 823 957
Percentage of Smartphone implementing AI 0% 12% 22% 33% 41% 47% 53%

ASP for smartphone AP 25 24.5 24.0 23.0 21.9 20.8 19.8


Price increase due to added AI function 15% 15% 15% 17% 18% 19% 20%

Incremental revenue from AI smartphone (US$ in mn) - 650 1,253 2,069 2,746 3,252 3,783
Source: J.P. Morgan estimates, Company data.

Smartphone inference trend


Smartphone players, especially high-end ones, have been active in empowering
mobile chipsets with AI capabilities, mostly for image processing and AR/VR
functions. It is worth noting that most players are currently designing their own
custom units for AI applications.

33

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

1. Apple
Apple is one of the most vocal smartphone makers on its plans to incorporate AI
processors in mobile devices. In its recently released iPhone 8/X, Apple introduced
A11 bionic chipset that features four efficiency cores, two performance cores, an in-
house designed three-core GPU, and a new Neural Processing Unit dedicated to AI
inference. This chip not only speeds up iPhones' computing performance, but also
enables the fulfilment of graphic-intensive functions, such as Face ID and AR/VR.
A11 bionic chipset is manufactured on TSMC’s 10nm process.

Figure 29: Apple's A11 Bionic chipset (1) Figure 30: Apple's A11 Bionic chipset (2)

Source: Apple.
Source: Apple.

Besides making advancement in hardware, Apple has also released a new software
tool (Metal 2) and framework (CoreML) to encourage developers in including more
sophisticated 3D and even AR graphics in their mobile applications.
2. Qualcomm
Qualcomm released its Snapdragon 835 processor with machine learning capabilities
in January 2017. The processor features ARM Cortex-based Kryo 280 CPU with four
performance cores and four efficiency cores, Adreno 540 GPU, Spectra 180 ISP
(image sensor processor) and a Hexagon 682 DSP (digital signal processor) that
supports deep learning framework.
The chipset is currently used in multiple flagship Android models, including the US
models of Samsung S8 and Note 8, Google’s Pixel 2 series, Sony XZ Premium, LG
V30+, HTC U11 and the recently launched Razer phone.

3. HiSilicon
Huawei has joined the race towards AI in mobile by introducing its HiSilicon Kirin
970 processor in September 2017, which is used in its flagship model, Huawei Mate
10 later released in October. It is also manufactured on TSMC’s 10nm process.
Similar to other AI mobile processors, Kirin 970 features 8-core CPU, GPU and ISP,
but on top of that, it includes a Neural Processing Unit (NPU) that is specialized for
AI applications. Huawei claims the new NPU would be able to deliver superior
performance in computer vision and speech recognition, significantly outperforming
that of CPU/GPU. According to Digitimes, Huawei’s NPU is leveraging the IP from
Cambricon Technologies, a China-based AI start-up.

34

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 31: Huawei Kirin 970 processor

Source: Company presentation.

4. MediaTek
MediaTek is also chipping into the AI market with its Visual Processing Unit (VPU),
a Tensilica DSP specifically engineered to work with ISP for image-related
processing, such as real-time Depth of Field. This not only accelerates the data-
intensive calculations for graphic processing, but also frees up CPU and GPU
resources to enhance overall compute performance.

While Helio P30 SoC is the first MediaTek product to feature VPU, its use is limited
to enhancing graphic processing. We expect MediaTek to launch P70 SoC with true
AI capabilities in 2Q18, which should empower devices for AR/VR applications,
image and facial recognition (2D/3D).

Figure 32: MediaTek's Helio P30 SoC

Source: Mediatek.

Automotive Inference market – ADAS key driver


We believe automotive could become one of the major segments in the AI market.
We have witnessed early progress in Level 2/3 ADAS application while the adoption
in Level 4/5 is slowly ongoing. In addition to Level 1-5 ADAS application, we also
expect some automotive to be equipped with full AI functions (integrating
autonomous driving with entertainment and communication functions).

We forecast automotive inference market to grow by 68% CAGR from 2017 to 2022
and reach $5.3bn.

35

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Table 12: Automotive inference market


2016 2017E 2018E 2019E 2020E 2021E 2022E
Global light vehicle production (k units) 91,557 93,515 95,841 99,504 101,493 103,066 104,874
yoy growth (%) 2.1% 2.5% 3.8% 2.0% 1.5% 1.8%

% Adoption
Level 2/3 0% 2% 4% 5% 7% 8% 10%
Level 4/5 0% 0% 0% 1% 1% 2% 2%
AI as an enabler / drive assist 0% 0% 0% 1% 2% 3% 4%

ASP for AI chip/ Silicon content (per car)


Level 2/3 225 214 203 193 183 174 165
Level 4/5 1,350 1,283 1,218 1,157 1,100 1,045 992
AI as an enabler / drive assist 500 475 451 429 407 387 368

Market Size for Silicon ($M)


Level 2/3 - 400 681 960 1,209 1,436 1,648
Level 4/5 - - - 576 1,116 1,615 2,081
AI as an enabler / drive assist - - - 427 827 1,196 1,542

Total Semis market from AI in Automotive Space (US$mn) - 400 681 1,962 3,152 4,247 5,271
Source: J.P. Morgan estimates, Company data.

ADAS trend is accelerating, with multiple silicon providers in the fray


While smartphone AI chip development remains in the hands of mobile AP
developers, auto AI chip presents a completely different landscape with players from
all fields. NVIDIA is currently the dominant solution provider with its GPU adopted
by most auto OEMs. However, specialized players such as Intel’s Mobileye and auto
semi manufacturers such as NXP are also catching up and eyeing a share of the
market. In the meantime, auto AI chips are notably more demanding than any other
applications, given the data complexity and safety requirements.

1. NVIDIA
NVIDIA is the leading provider of GPU-based autonomous driving solutions, with
OEM partners including Toyota and Tesla. Its offerings span across datacenter
training (DGX-1), software (DRIVE platform software) and edge hardware (DRIVE
PX series).

Figure 33: NVIDIA's autonomous driving offerings

Source: NVIDIA Company presentation.

36

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Announced in October 2017 and available from mid-2018, NVIDIA’s Drive PX


Pegasus is one of the most powerful autonomous driving chips currently available in
the market. With the ability to deliver 320 TOPS (trillion operations per second),
Pegasus has AI performance comparable to a 100-server data center, which makes it
capable of handling autonomous driving fully without any human intervention.

Table 13: NVIDIA's Drive PX edge hardware


Least advanced Most advanced
Parker AutoCruise (Drive PX2) Parker AutoChauffeur (Drive PX2) Xavier Pegasus
Spec Pascal GPU, 6-core CPU 2 Parker SoC, 2 Pascal GPU Volta GPU, 8-core CPU 2 Xavier SoC, 2 next-gen discrete GPU
TOPS Undisclosed Undisclosed 30 320
Function L3 (Highway auto driving) L3 (Point-to-point travel) L3 (Point-to-point travel) L4 (Fully autonomous driving)
Availability Now Now 1Q18 Mid-2018
Source: NVIDIA, J.P. Morgan.

While driving may sound like a single coherent action to a human, it requires a
delicate coordination of multiple fronts. To drive itself, the vehicle needs to be able
to (1) fuse different forms of sensor data collected from cameras, radar and Lidar, (2)
localize its position with very high accuracy, (3) track and predict the movement of
surroundings, and (4) plan the most optimal path by sieving through all the data.

All of these operations demand a significant amount of computing power available at


a very low latency, which makes the inference workload for auto AI chips much
higher than for other inference chipsets. For instance, an autonomous car may
generate up to 1GB per minute of data from maps, LIDAR and cameras etc.

Further to that, when advancing from L2/3 (partially autonomous) to L4 (fully


autonomous), redundancy is often necessary at multiple levels to comply with
stringent auto safety standards. This creates the huge performance gap between the
chips used in these two levels. For instance, a single Xavier SoC is sufficient for L3,
but Pegasus with 2 Xavier SoC and 2 next-gen GPUs is required for L4.

Figure 34: Transition from ADAS to fully autonomous

Source: NVIDIA.

37

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

2. Mobileye (acquired by Intel)


Mobileye, acquired by Intel in August 2017, is another active player in auto AI chips,
amid its EyeQ chips are more targeted at sensor data fusion.

Co-developed with STMicroelectronics, Mobileye’s latest product EyeQ5 is a


custom ASIC that features 8 CPU cores and 18 in-house designed accelerators,
including Vector Microcode Processors (VMP), Multithreaded Processing Cluster
(MPC) and Programmable Macro Array (PMA). Of note, EyeQ5 chip can deliver 24
TOPS while keeping power consumption as low as 10W, which bodes well for
energy and temperature-sensitive auto applications. The product would start
sampling by 1H18.

While EyeQ5 chip remains relatively distant to the mass market, Mobileye's EyeQ4
chip is already sampling. It has 4 CPU cores, with 14 accelerator cores including
VMP, MPC and PMA, which enables it to deliver 2.5 TOPS at 6W.

3. NXP
NXP also attempts to take a slice of the auto AI chip market with its BlueBox
solution, an open-sourced platform for developing autonomous driving solutions.

The BlueBox engine comes with two NXP’s in-house chips – an automotive vision
processor and an embedded compute processor.

Surveillance market
We expect surveillance cameras to adopt more AI functions (ex: facial recognition)
in the next few years given the rising requirements for security and the addition of
incident prevention and predictive functionality. We forecast AI penetration rate to
reach 22% by 2022 and incremental AI revenue for cameras to reach $2.1bn by 2022.

Table 14: Surveillance inference market


2016 2017E 2018E 2019E 2020E 2021E 2022E
IP camera (units in mn) 84.7 109.4 140.2 172.0 197.8 223.6 252.6
yoy growth (%) 29.2% 28.1% 22.7% 15.0% 13.0% 13.0%

AI function penetration rate 0% 1% 3% 8% 13% 18% 22%

Silicon ASP for smart surveillance systems ($) 117 126 82 59 38 38 38

AI revenue for AI camera (US$ in millions) 28 127 301 811 984 1,539 2,125
Source: J.P. Morgan estimates, Gartner.

Smart surveillance
For time-sensitive applications such as public security, it is crucial for smart
surveillance cameras to operate at low latency and high accuracy, which prompts the
need to deploy more computational power at the edge for preliminary processing.
GPU is by far the most dominant accelerator in the space. Chinese players are
particularly aggressive and leading in AI surveillance solutions, given a nationwide
deployment of public security cameras and strong government incentives.

38

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

HikVision
HikVision has launched a family of deep learning products from DeepinMind NVR
(Network Video Recorder) to DeepinView IP cameras.

Figure 35: HikVision's DeepinMind NVR Figure 36: HikVision's DeepinView IP camera

Source: HikVision. Source: HikVision.

Unlike previous NVR models that run on CPU, DeepinMind NVR uses NVIDIA
Jetson GPU to perform advanced graphic processing functions. For instance,
DeepinMind NVR is able to read through images and filter out false alarms that are
triggered by non-human objects, with accuracy as high as 90%.

HikVision’s DeepinView IP cameras also have embedded NVIDIA Jetson GPUs.


Besides executing pre-installed deep learning algorithms, DeepinView IP cameras
are capable of basic machine learning functionality, such as feature learning, which
can pre-process images and send only the useful data back to cloud platform for
further analysis. This can effectively reduce power consumption and latency time.

The enhanced capabilities of HikVision’s edge devices enable its solution to perform
more computer vision functions at a faster speed and higher accuracy, such as human
detection, facial recognition, people counting, and vehicle management.

Further to GPU deployment, HikVision is also in a strategic alliance with NVIDIA


and uses it Metropolis video analytics platform.

Figure 37: NVIDIA's Metropolis video analytics platform

Source: NVIDIA.

39

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Number of use cases likely to grow exponentially


In addition to the smartphone, ADAS and surveillance market, we also expect an
increasing number of IoT devices to adopt AI inference chips, even though visibility
into the adoption curve remains low currently.

Of note, we think the adoption of edge inference could accelerate in smart speakers
when natural language processing (NLP) gets mature. As a result, the NLP models
could be readily available for compression, and would be able to fit in smaller chips
that are available at lower cost.

What can AI do to the Semis landscape?


More new startups coming to the market …
According to NVIDIA, AI-related start-ups are set to receive $6.6bn funding in 2017,
which is 12x that of 2012. We think this not only reflects investors’ heightened
interest in AI investment, but also underpins a thriving and growing start-up
community.

While we acknowledge that most start-ups are taking on the software and algorithm
fronts given limited capital now, we also see a rising number of start-ups that target
silicon.

Most of these AI semiconductor startups are banking on the fact that even
GPU/FPGA solutions are not purpose-built for deep learning, which leaves the
opportunity open for creating tailor-made solutions for various AI and deep learning
work-loads. Some examples of these challengers are Adapteva, Cerebras Systems,
Deep Vision, Graphcore, and Wave Computing.

China has its own share of AI silicon startups as well, such as DeePhi, Horizon
Robotics, and Intellifusion, while even cryptocurrency mining silicon vendors such
as Bitmain are entering AI silicon market.

There are also vendors, who are recognizing that embedded silicon may be the way
to go in many inference applications and are hence developing AI-centric processor
cores (xPUs) that they could license to silicon makers (for instance, Cambricon
licensing its NPU to HiSilicon for its Kirin 970's NPU or CEVA – not a startup –
attempting to license computer vision based DSP cores).

… vs a well-established consolidation trend


However, now that horizontal consolidation is well-established in the semiconductor
space we have to see how many of the startups will continue to stay independent. We
have already seen significant M&A in this space (Intel buying Movidius, Mobileye
and Nervana).

40

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Table 15: List of AI Silicon Startups – Funding History


Base Product Offering Total funding Notable corporate investors
Cerebras Systems. U.S. Undisclosed $112mn -
Graphcore U.K. Intelligent Processing Unit - ML training/inference chip ~$110mn Samsung Catalyst Fund, Robert Bosch
Cambricon (寒武紀) China ML inference chips (IP used in HiSilicon Kirin 970) $100mn Alibaba, Lenovo, iFlytek
KnuEdge U.S. Datacenter neural chip ~$100mn -
Horizon Robotics (地平綫机器人) China Brain Processing Unit / ADAS system ~$100mn Intel Capital
Wave Computing U.S. Wave Compute Appliance - ML training chip $60mn Samsung Venture Investment
Bitmain China Cryptocurrency mining ASIC ~$50mn -
Unisound (云之声) China UniOne - IoT ML inference chip $45mn Qualcomm
DeePhi (深鑒科技) China FPGA and CNN accelerator $40mn Xilinx, Ant Financial, MediaTek
Mythic U.S. ML inference chip $15mn -
Novumind U.S. AI-Training and embedded ASIC ~$15mn -
Kneron (耐能) China On-device ML inference chips / Server FPGA >$10mn Alibaba, Himax, Qualcomm
IntelliFusion (云天励飞) China Computer vision chips Undisclosed -
ThinCI U.S. Vision processing chip Undisclosed Denso, Magna
Adapteva U.S. Epiphany-V chip - ML inference SoC $7.5mn Ericsson
Koniku U.S. Neuron-based co-processor ~$2mn -
Source: J.P. Morgan based on various sources.

Table 16: List of AI silicon related M&A


Target Product Offering Acquirer M&A Size Date of completion
Altera FPGA Intel $17bn December-15
Nervana Neural Network Processor - DL training chip Intel Undisclosed August-16
Movidius Myriad Vision Processing Unit - on-device machine vision chip Intel Undisclosed Septemeber-16
Mobileye EyeQ chip - ADAS sensor fusion chip Intel $15bn August-17
Source: Company data.

System vendors becoming silicon designers – trend to


accelerate
Apple started the broader trend of system vendors forward integrating into silicon
design with its Ax processors for iPhones and iPads. This has been a successful foray
for Apple, with complete control its ecosystem, from software to silicon.

As deep learning and AI become more widely adopted, we believe large Internet
players are likely to increase their in-house semiconductor design and development
efforts. Already, Google has demonstrated its in-house offerings like Google
TPU/TPU2 which are tailored solutions for Google’s AI workloads.

We expect this trend to proliferate among US and Chinese Internet vendors. Leading
ASIC designers are already seeing demand for multiple development projects coming
from for large Internet vendors tailored regarding AI/ deep learning. This is likely to
have some impact on merchant silicon market for datacenter semiconductors, just
like it diminished the TAM growth for mobile silicon in the smartphone era.

More demand at the bleeding edge of Moore’s Law


The potential death of Moore’s Law has been extensively discussed in the last few
years. One of the arguments has been that there is not enough market demand that
requires performance in the leading-edge node to drive Foundries to migrate to more
advanced nodes, at the higher capex. The slowing growth and commoditization in
smartphones also have been slowing down the process migration curve for mobile
processors, except for very-high-end players.

41

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

However, we believe AI could become the next volume driver for leading-edge
semiconductors, and the inference needs at edge devices also require high
performance and energy efficiency, which may be achieved by continued
semiconductor process migration.

Developments in the semiconductor equipment space are also conducive to extending


Moore’s Law for another few generations, in our view, with the widespread adoption
of EUV tools driving Moore’s law like cost curves for the next two process nodes
(7nm and likely 5nm).

For a deeper dive in EUV, please refer to EUV will prolong the life of Moore's Law
Sandeep Deshpande’s More of Moore- Our European analyst, Sandeep Deshpande, expects EUV to come to market in 2019
ASML reinstating Moore’s Law—a key AI
enabler (note). The text in this section is with improving throughput (ASML’s NXE3400B already>100wph). We believe
adopted and modified from the note. EUV deployment could reduce costs meaningfully by process simplification and
yield improve and keep Moore's Law alive in the next few years.

Figure 38: EUV tool throughput has crossed 100 wph above which tool can be used for HVM

Source: ASML

Table 17: Converting into a full EUV process would substantially reduce costs
28nm immersion 10nm immersion 7nm immersion 7nm EUV
litho only litho only litho only
Number of lithography steps 6 23 34 9
Critical alignment steps 7 36-40 59-65 12
Source: ASML.

42

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Implications for Logic Semis


Foundries
We believe the rising AI semis market could result in: (1) robust Foundry growth in
the post-smartphone era; (2) lower customer concentration with new Internet
customers for ASICs; (3) higher TAM due to heterogeneous computing; (4) and
incentives to migrate into leading edge nodes and market leaders able to maintain the
technology gap.

AI – the next earnings driver for Foundry post-smartphone era


Given the saturation in smartphone, Foundry revenue growth has slowed down in the
last few years. However, we expect AI to become the next driver for Foundry with its
high product ASP and potential volume upsides. We believe Foundries players are
already seeing increased demand for GPU/ FPGA for AI training and die size
increase for smartphone SoCs. We think the trend is likely to accelerate in the next
few years, especially after large Internet players start to launch in-house silicon
solutions.

TSMC has indicated that High Performance Computing (of which AI is an integral
part) will contribute ~25% of revenues in 2018, and HPC is becoming the primary
growth driver for the company, a year earlier than anticipated.

Lower customer concentration


Foundry vendors have seen increasing customer concentration in the last few years
due to rising M&A activity in semis and industry consolidation in consumer devices.
With likely a pick-up in ASIC solution for AI markets, we expect Foundry players to
see rising exposure to the new customers (such as Google’s TPU).

Higher TAM due to heterogeneous computing


The datacenter market has been dominated by Intel’s x86 CPU historically.
Nevertheless, we expect Foundries to enjoy a higher TAM through its customers’
expansion into the datacenter silicon market in the AI era. For example, NVIDIA’s
GPU servers are gaining client traction in the AI server training market and the pick-
up in GPU demand benefits TSMC. Xilinx’s FPGA is also seeing stronger market
demand while Internet vendors’ in-house silicon could become a new vertical for
Foundries.

Keep Moore’s Law alive – market leaders to maintain the technology lead
We believe inference at edge devices will take higher computing power and require
power efficiency, which could be achieved by node migration. The huge volume and
revenue potential also justify the heavy capex investment. Therefore, Foundry
technology leaders have incentives to invest in 7nm with EUV deployment and more
advanced technology to capture the potential market demand. In doing so, the current
market leaders could also retain the technology gap to the laggards. We believe that
among Foundries, only TSMC/SEC/GlobalFoundries are able to address the AI
demand with its 7nm solution.

43

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Table 18: AI revenue for foundry


US$mn
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI training market 19 179 328 646 920 1,154 1,849
Server 19 179 328 646 920 1,154 1,849
AI inference market 15 660 1,278 2,445 3,680 4,940 7,037
Server 8 33 86 307 604 1,013 1,946
Smartphone - 546 998 1,612 2,190 2,695 3,449
ADAS - 41 76 189 334 487 661
Surveillance 7 40 119 335 551 745 981
Total AI silicon market (US$mn) 34 839 1,606 3,090 4,599 6,094 8,886
As % of total foundry market size 0% 1% 3% 5% 7% 8% 11%
Source: J.P. Morgan estimates.

Figure 39: AI revenue exposure for TSMC


US$mn, %
8,000 15% 16%
7,000 14%
6,000 11% 12%
5,000 9% 10%
4,000 6% 8%
3,000 4% 6%
2,000 2% 4%
1,000 0% 2%
- 0%
2016 2017E 2018E 2019E 2020E 2021E 2022E
AI revenue to TSMC (US$mn) % of TSMC revenue

Source: Company data, J.P. Morgan estimates. Note: Assuming 7-8% revenue growth for TSMC from 2020 onwards.

OSAT
AI chipsets usually have larger die size and require integration between logic and
memory chips, which complicates the assembly processing. We believe both TSMC
(with its CoWoS) and major OSAT names (with WLP solutions, including interposer
solutions) could benefit from the higher value add for such packaging process.

The lines between Foundry and OSAT have been blurring


Over the past few years, Foundries have been trying to forward integrate into
advanced packaging through solutions like InFO and CoWoS. TSMC’s successful
entry into packaging for iPhones application processors through InFO (Integrated
Fan-Out) is the most notable example of blurred lines between front-end and back-
end vendors.

TSMC’s CoWoS/ InFO appear well-positioned to capture AI opportunities


TSMC’s CoWoS entered into the sixth year of production and has already seen
several design wins for high-end chipsets like GPUs and FPGAs. We see TSMC in a
favorable position to capture the rising demand for AI packing through its turnkey
solution (CoWoS/ InFO) given the low volumes and new designs for AI chips in the
early stage. Of note, TSMC management guided 30 tape-outs for CoWoS in the next
three years, which we believe is mostly driven by AI demand.

44

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI-related demand could flow to OSATs once the volumes pick up


We believe TSMC will dominate the HPC silicon packaging market through turnkey
solutions in the beginning. However, we expect the demand to flow to OSATs once
AI demand broadens (the number of customers increases), design matures, or volume
picks up. The demand shift from Foundry to OSATs could be mainly driven by
customers seeking a second source OSATs. TSMC also is unlikely to deal with a
variety of customers given the limited engineering resources, in our view.

However, only leading OSATs can enjoy the AI trend due to high capital
investment
Although OSATs are also able to ride the AI trend in the medium to longer term, we
believe the beneficiaries are restricted to industry leaders such as Amkor given the
high capital investment in the leading-edge technology. We believe most advanced
products could use 2.5D packaging technology while mainstream products are likely
to adopt flip-chip solution.

Implications for ASM Pacific Technology (ASMPT)


We believe ASMPT, as a leading back-end equipment supplier, will be the key
beneficiary of the rising adoption of advanced packaging, which has been
increasingly significant in further cost reduction and performance improvement
given the deceleration of Moore’s Law. We expect total revenue from advanced
packaging to reach 10% of total back-end revenue in 2018, from approximately 5%
in 2017.

 Investment in AI drives the demand of Thermal-Compression Bonder


Through Silicon Via (TSV) technology, like TSMC’s CoWoS, it has been widely
engaged in the packaging of AI chipsets and memory, to address the bottlenecks of
traditional structure in bandwidth and power consumption. TCB is a necessary process
in TSV to solve the die warpage issue during the traditional mass reflow process.
ASMPT is a pioneer in the development of TCB solutions, who has been working with
Intel to improve the throughput and yield rate of TCB since 2014. The company has
commenced the shipment of a new generation of TCB equipment in 2H17.

 Smartphone AI fuels the adoption of fan-out technology


With the introduction of AI functions into smartphones, we believe fan-out
technology will see more adoptions to provide higher I/O counts with smaller form
factors. ASMPT has developed comprehensive solutions in different fan-out
technologies, including both wafer-level and panel-level, with TSMC and SEMCO
as current key customers. The company also formed a consortium with JSAP (the
advanced packaging subsidiary of JCET, leading OSAT in China), Huawei,
Unimicron, Indium and Dow Chemical for further technical improvement, which we
believe could help ASMPT win more orders in the future from those potential
customers.

45

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Implications for the DRAM market


Multiple growth fronts for memory with AI
JJ Park AC AI servers typically employ the use of neural networking aligned with several
(82-2) 758-5717 complex use cases such as classification, clustering and prediction that help in
jj.park@jpmorgan.com carrying out image recognition, Natural Language Processing (NLP) and predicting
J.P. MorganSecurities (Far East) patterns/numerical data. Training an AI network is done when matrices of numbers
Limited, Seoul Branch are fed as input into the neural network along with the correct classification and then
using correlations to arrive at the right result.
All such operations are accompanied by complex statistical computations and a huge
number of matrix multiplication operations per second. This training and processing
in a cloud data center uses ~3.5x the workload of a conventional datacenter and
needs a simultaneous growth in the memory content. CPUs for servers that are
dedicated to AI feature high capacity of DRAM (256 GB to 512 GB) significantly
higher than traditional servers.
Tensor Processing units (TPU), which is an AI accelerator ASIC developed by
Google specifically for neural network machine learning, also necessitates the use of
higher memory content. Second-generation TPU needs a 16GB HBM for each TPU
which is significantly higher memory requirement compared to the first generation of
TPU that just needed 8GB DDR3.
Edge computing, which is gaining strength as we move toward AI, also brings along
increased workloads; for example, independent devices such as security cameras are
now not only just capturing images and videos, but also processing them. Such
increased workloads would need higher DRAM for processing.

Growing demand for high-density modules


Over the previous years, DRAM technology had struggled to improve cost
efficiencies while scaling up. For example, a 32 GB memory module costs 2.5x
times 16 GB module, and a 64 GB module costs 7x times. As a result, system
platforms would typically fill up with a lot of smaller and thus less expensive
modules. However, as the focus turns to space-power optimization, demand for
higher-density modules (on multi-node servers) has been on the rise. Leading
memory makers such as SEC and SK Hynix have recently echoed the view that most
datacenter demand is driven by increasing the capacity of a single-processing unit
instead of having several processing units.
Demand for Graphic memory (GDDR) and High Bandwidth Memory (HBM)
As machine learning requires large amounts of data processing, we expect a broader
adoption of High Bandwidth Memory (HBM) for machine learning – regardless of
the processing center (CPU, GPU, ASIC). DRAM, typically used for PC
applications, has a top system memory bandwidth of 136 GB/s. GPUs, due to their
multi-core structure, require GDDR (graphics double-data-rate DRAM) that can
deliver system bandwidth at up to 384 GB/s.
HBM, which is a specialized form of stacked DRAM (up to 8 DRAM dies in one
HBM cube), is integrated with processing units to increase speed while reducing
latency, power, and size. HBM2 can support 8 GB of memory per cube thereby
generating a 256GB/s throughput. This is necessary to improve system performance
and increase energy efficiency, enhancing the overall effectiveness of data-intensive,
high-volume applications that depend on machine learning, parallel computing and
graphics processing.

46

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

3D XPoint, under development at Intel and Micron may offer significantly denser
and less expensive alternatives to DRAM. However, they are not believed to be
commercially viable before 2020, and hence currently remain restricted to very niche
applications only.

Relatively inelastic demand


Server DRAM demand is entirely driven by the processing needs of new applications
and the platform cycles and since the buyers can typically distribute the cost of
compute over a very large base of customers so, what matters the most is the value
add and the additional performance it brings to the platform (more speed, real-time
analytics, better applications etc.). Hence demand is more inelastic than for other CE
applications. A point worth highlighting is that, compared to other commoditized
memory solutions for DRAM, for consumer electronics HBM DRAM is 2-2.5 times
more expensive.

Supply-side implications
SEC (mid-40%), SK hynix (mid-30%), and Micron (low-20%) account for almost
the entire supply-side for the server DRAM industry. In response to the high demand
from AI servers, development of HBM and GDDR solutions are at the forefront of
all three industry leaders.

Samsung recently announced the mass production of next-generation 8 GB HBM2,


known as the “Aquabolt”, which allows for a data-transfer speed of 2.4Gb/s. The
company also announced the development of 16Gb GDDR6 modules that support an
18 Gbps data transfer rate per pin and offer up to 72 GB/s of bandwidth per chip.
While SK hynix also joined the league with its 8Gb GDDR6 solutions that allow for
a 14Gbps data transfer rate per pin. The new generation solutions like GDDR6 even
help in achieving the power-efficiency, as desired by majority of data-center players.

Figure 40: DRAM demand breakdown – Growing server contribution

Source: J.P. Morgan estimates.

47

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Implications for US Semis and key


beneficiaries
Harlan SurAC While NVIDIA has garnered most of the attention from investors as being most
(1-415) 315-6700 levered to AI/deep learning trends and is well-positioned to maintain its leadership
harlan.sur@jpmorgan.com position in training and inference over the next few years, we believe several
J.P. Morgan Securities LLC companies in our coverage universe have opportunities to expand their presence in
both training and inference. New processor architectures have come to the forefront
that are particularly useful in addressing challenges in deep learning (including
vision processing), especially as deep learning moves from the cloud to edge devices.

While GPU technology, with parallel processing, is useful for training, inference,
with less parallelism, lends itself more toward CPU, DSP and application-specific
architectures. Moreover, ASICs (custom solutions such as Google TPU) and FPGAs
(with increased flexibility) are also being used for deep learning inference and other
acceleration applications. For both edge and cloud applications, there has been an
increasing trend of insourcing IP as witnessed by Apple with its A-series apps
processors and by Google (e.g. TPU, that we have discussed in prior research that
leverages third-party IP).

Intel has multiple approaches to address AI/deep learning applications


Largely through acquisition, Intel has rounded out its portfolio of processing
capabilities to address AI/deep learning applications. Over the past few years, Intel
has acquired Altera, Nervana, Movidius and Mobileye.

In October 2017, Intel announced its Programmable Compute Acceleration Card


with Arria 10 GX FPGA platform that is focused on acceleration in the data center
for compute, storage and networking applications where workloads are optimized for
performance and power consumption (important for total cost of ownership – TCO).
The flexible approach that FPGA-based acceleration (along with Xeon processors)
delivers and the fact that such accelerators can be reused and redeployed in a data
center are a few of the advantages of the approach. Intel’s FPGA-based acceleration
solution is behind Microsoft’s Project BrainWave, which is a scalable deep neural
network (DNN) real-time AI platform. Intel’s Programmable Acceleration Card with
Arria 10 GX is expected to be widely available in 1H18 and its co-packaged
Xeon/FPGA processor solution is also currently sampling and is planned for general
availability in 2H18. Intel has discussed various OEMs are planning to introduce
products that utilize Intel’s FPGA solutions and Intel is working with the super 7
cloud service providers and with 4 networking customers (NFV for internet backhaul
traffic) with its FPGA-based solutions.

Intel also announced in October 2017 its Intel Nervana Neural Network Processor
(NNP) that is purpose built architecture for deep learning with the goal of providing
flexibility for all deep learning applications while making core hardware components
more efficient. Unlike GPU technology that has been repurposed for AI/deep
learning, Intel’s NNP was purpose built for AI, prioritizing scalability and numerical
parallelism. Intel believes Nervana can allow for higher degrees of throughput while
reducing power per computation. Without providing details, Intel announced it is
working with Facebook on AI applications with the Nervana platform. Intel has also
discussed Nervana being applicable for healthcare, social media, automotive and
weather applications. Intel Nervana NNP was on track to ship before the end of 2017
with revenue likely in 2018.

48

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Addressing increased vision processing challenges in long-term growth opportunities


such as autonomous driving and IoT applications were key reasons for Intel to
acquire Mobileye and Movidius, in our view.

Don’t forget high-speed networking connectivity – a key building block for


AI/Deep learning clusters. A key technology enabler of AI/deep learning compute
clusters is the high-speed connectivity that connects servers to networking
equipment, servers to storage, and servers to servers. 100Gb/second-and-higher
connectivity speeds are critical to reduce latency and sustain performance. We
believe OW-rated Inphi will be a key driver as their 200Gb/second optical
semiconductor solutions (based on 50Gb/second PAM-4 Ethernet) are the key
connectivity building block for a leading cloud service provider's deep learning
compute clusters. N-rated Mellanox is also a beneficiary as their 100Gb/second EDR
Infiniband solution forms the connectivity networking within NVIDIA’s DGX
supercomputers and several other top-500 supercomputing clusters.

Semiconductor capital equipment companies KLAC, AMAT, and LRCX poised


to benefit from complexities associated with manufacturing high performance
AI/Deep learning chips and insatiable demand for memory and storage
In addition to aforementioned semiconductor companies under coverage that benefit
from AI/Deep learning, we believe US-based semicap companies, Applied Materials,
Lam Research and KLA-Tencor will also benefit from equipment demand to support
manufacturing of AI-related products (processors, memory and storage). We continue
to expect a more predictable, less cyclical technology-driven capital spending
environment that is well-aligned with stable semi industry unit growth rates, rising capital
intensity for advanced technologies amid a broad-based end-market demand environment
across compute, storage and networking. We believe such trends should drive margin
expansion, free cash flow improvements, and a continued focus on capital return to
shareholders.

Specific to AI processors, NVIDIA’s Volta “monster chip”, with over 21 billion


transistors fabricated on a 12nm design rule is representative of Moore's Law at work
and we expect smaller design rules to come to market in the coming years that will
be even more complex and difficult to manufacture. Such complexity is driving the
leading manufacturers such as Intel, TSMC and memory makers to leverage products
and services from market leaders such as AMAT and LRCX for materials-driven
solutions and KLAC for yield enhancement solutions.

As our colleague Sandeep Deshpande discusses below, EUV is poised to be used for
advanced manufacturing at 7nm and below design rules where AI/deep learning
chips will be manufactured on in the coming years. Within our coverage universe,
KLA-Tencor benefits the most from EUV adoption. KLAC is our top pick in
semicaps on strong product cycles, market share gains and SAM expansion, best-in-
class gross/operating margins and growing shareholder returns.

Overall, we believe innovation continues to flourish in the AI/deep learning


processor market which should benefit many of our semiconductor companies
under coverage including OW-rated Intel (AI compute and acceleration), OW-rated
Inphi (high-speed optical connectivity between AI compute clusters), and OW-rated
Micron with their advanced DRAM solutions (e.g. GDDR6, GDDR6N, 3D Xpoint
SCM). OW-rated semicap companies KLAC, AMAT and LRCX benefit from
demand for equipment for AI-related processing memory and storage. Additionally,
Neutral-rated AMD (compute), Mellanox (connectivity), NVIDIA (compute) and
Xilinx (acceleration) have exposure in the AI/Deep learning segment as well.

49

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Implications for Japan Semis and key


beneficiaries
Hisashi MoriyamaAC We see AI market growth potentially benefiting Japanese semiconductor/SPE
(81-3) 6736-8601 companies such as Tokyo Electron, Hitachi High-Technologies, Advantest, and
hisashi.moriyama@jpmorgan.com Screen Holdings.
JPMorganSecurities Japan Co., Ltd.

As AI/deep learning processors for NVIDIA and other companies are manufactured
by foundries such as TSMC, we can expect growth at SPE companies benefiting
from foundry-related capital investment to exceed overall capital investment growth
in the near/medium term.

As we forecast that production of chips for advanced smartphone application


processors using EUVL (extreme ultraviolet lithography) on top of 7nm technology,
combined with production of AI/deep learning processors using double/triple
exposure, will likely give rise to process divergence at foundries in response to
demand growth, we expect their capital spending to very likely remain brisk.

Our bottom-up base-case forecast of 0.7% growth for SPE capital spending breaks
down into logic +1.2% YoY, foundries +11.1% YoY, DRAM +14.1% YoY, and
NAND -16.5% YoY. Although we expect Samsung Electronics (covering analyst: JJ
Park) to limit 3D NAND and related spending following three years of growth, we
forecast double-digit growth for foundry-related capital investment.

Tokyo Electron, which ranks fourth globally in Wafer Fab Equipment by Gartner
(Figure 42), holds 100% share for coaters/developers for EUVL (extreme ultraviolet
lithography). Its broad range of other products for foundries includes etching
equipment, CVD (chemical vapor deposition) equipment, cleaning equipment, and
wafer probers. Hitachi High-Technologies is strong in CD-SEM technology for
measuring gate width, and aims to expand its market share for silicon etching
equipment as well. In addition to core memory test systems, Advantest is benefiting
from demand growth for logic test systems such as the T2000 and the V93000.
Screen Holdings’ core product is wafer cleaning equipment. On January 18 we
upgraded Hitachi High-Technologies to Overweight as a foundry-related play.

50

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Table 19: Bottom-up SPE capex estimates


CY 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017E 2018E
Logic
Intel 5,000 5,197 4,515 5,207 10,764 11,027 10,711 10,105 7,326 9,538 8,979 10,000
Samsung 613 455 783 2,597 4,515 6,479 4,660 2,848 3,108 2,487 6,195 5,310
Others 12,407 9,201 5,708 7,182 7,764 5,246 4,271 4,312 5,689 5,446 5,886 6,000
Total 18,020 14,853 11,007 14,986 23,043 22,752 19,642 17,266 16,124 17,470 21,060 21,310
YoY -18.4% -17.6% -25.9% 36.2% 53.8% -1.3% -13.7% -12.1% -6.6% 8.4% 20.5% 1.2%
Foundry
TSMC 2,559 1,888 2,674 5,938 7,284 8,322 9,690 9,522 8,123 10,200 10,800 11,600
Globalfoundries 758 576 500 2,700 5,400 3,800 4,000 3,500 2,500 1,500 2,000 3,000
UMC 861 366 534 1,948 1,814 1,765 1,109 1,426 1,913 2,842 1,350 1,280
SMIC 717 669 217 492 950 499 704 1,060 1,332 2,600 1,900 1,900
Others 1,582 1,493 839 1,154 1,251 986 963 954 950 950 950 1,100
Total 6,477 4,992 4,764 12,231 16,700 15,372 16,466 16,463 14,818 18,092 17,000 18,880
YoY 4.7% -22.9% -4.6% 156.8% 36.5% -8.0% 7.1% 0.0% -10.0% 22.1% -6.0% 11.1%
DRAM
Samsung 4,800 3,500 1,900 3,457 2,256 2,663 3,198 6,649 5,746 3,877 9,250 11,454
Micron Technology 1,100 1,650 400 600 720 700 700 2,300 2,000 2,000 3,800 3,100
SK Hynix 4,000 1,600 600 2,200 2,250 1,700 1,800 3,700 3,500 3,800 3,800 4,409
XMC and other Chinese - - - - - - - - - 300 800 1,800
Others 11,200 4,025 1,755 4,585 2,699 743 1,014 1,141 1,931 1,400 2,300 2,000
Total 21,100 10,775 4,655 10,842 7,926 5,806 6,711 13,790 13,176 11,377 19,950 22,763
YoY 36.3% -48.9% -56.8% 132.9% -26.9% -26.7% 15.6% 105.5% -4.4% -13.7% 75.4% 14.1%
NAND
Samsung 3,500 3,300 1,100 3,700 3,000 3,500 4,000 2,900 4,200 5,500 10,434 7,130
Toshiba 3,500 3,700 1,000 2,600 3,500 2,400 2,150 2,500 3,500 5,000 4,500 4,500
SK Hynix 950 500 150 800 750 2,000 1,100 1,100 1,400 1,600 4,673 4,409
Micron Technology 2,300 2,300 400 700 1,800 1,100 950 1,300 1,500 2,500 3,750 3,330
Intel - - - - - - - - - 1,600 2,500 2,000
XMC and other Chinese - - - - - - - - - 150 325 825
Total 10,400 9,900 2,680 7,800 9,050 9,000 8,200 7,800 10,600 16,850 26,582 22,194
YoY 26.4% -4.8% -72.9% 191.0% 16.0% -0.6% -8.9% -4.9% 35.9% 59.0% 57.8% -16.5%

Grand Total 55,997 40,519 23,105 45,859 56,718 52,929 51,019 55,318 54,718 63,789 84,592 85,147
YoY 7.7% -27.6% -43.0% 98.5% 23.7% -6.7% -3.6% 8.4% -1.1% 16.6% 32.6% 0.7%
Source: Company data and J.P. Morgan estimates

51

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 41: Semiconductor Production Process (Front-End)

Source: Gartner, Company data. Compiled by J.P. Morgan. Images used with permission

Figure 42: SPE Global Share Ranking (2016)


NuFlare Technology Ultratech US
Tokyo Seimitsu Japan Japan 0.4%
0.8% 0.7% Disco Japan
0.5%
Canon Japan
1.0% Others
SEMES Korea 8.5%
1.2% Applied Materials
Daifuku Japan Ebara Japan
1.3% 1.2% US
Murata Machinery Japan
1.3%
20.7%
ASM International Hong
Kong
1.3%
Hitachi Kokusai Electric
Japan Nikon Japan Lam Research US
1.4% 2.0% 13.9%

Hitachi High- KLA-Tencor


Technologies Japan US Tokyo ASML
2.6% Screen Semiconductor 6.4% Electron Netherlands
Solutions Japan
3.7%
Japan 13.6%
13.0%

Source: Gartner

52

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Implications for European Semis and key


beneficiaries
Sandeep DeshpandeAC Artificial Intelligence/Machine Learning (AI/ML) are key beneficiaries of the
(44-20) 7134-5276 semiconductor manufacturing transition to EUV. AI/ML are already being
sandeep.s.deshpande@jpmorgan.com implemented in the network core (the datacenter); in order to maximize consumer
J.P. Morgan Securities plc advantage they will also be implemented in the network edge (smartphone, IoT end
points, PCs etc.) To enable the implementation of AI/ML at the network edge,
substantial cost reduction/power efficiency is required and we note that only EUV
can make that possible. Thus, EUV is critical in our opinion to the implementation of
AI/ML in the network edge enabling game-changing software innovations ranging
from natural voice interface with devices, image recognition and the one of the most
complicated – self driving vehicles. In addition to the processing element, we believe
that EUV will engender wider adoption of new memory types such as Storage Class
Memory (to be deployed in high-end servers) and High Bandwidth Memory
(deployed alongside accelerators such as GPUs).
ASML
Of the companies we cover, ASML, the sole manufacturer of EUV tools, is the most
significant beneficiary, in our view. With the shift to EUV lithography from the current
leading edge immersion lithography, the lithography market transitions from a duopoly
of ASML and Nikon to an ASML monopoly for the foreseeable future because no
other company has invested in EUV lithography technology. We expect ASML will
benefit from the higher revenue from EUV tools (EUV tools will start at an ASP of €
115m versus the ASP of €60m of a leading edge immersion tool, i.e. ASP ~2x). At the
same time, EUV tools currently have gross margin well below company average gross
margins, meaning that EUV volumes need to grow and the company has to go down
the cost reduction curve to make EUV tools pay off for investors.
Infineon
Infineon is not exposed to the leading edge semiconductor market. However, if cost
reduction in leading-edge AI/ML chips does not take place using EUV, these chips
would consume a much larger part of the dollar content of an autonomous car, putting
price pressure on other component suppliers such as Infineon. If EUV does help bring
down the cost of AI/ML chips used in autonomous cars, Infineon will be an indirect
beneficiary of the process. At the same time we believe Infineon will need to protect
itself from commoditization through aggressive cost reduction (ongoing move to
300mm fab will make Infineon lowest cost producer of power semi chips) and
continuing consolidation of the power semi market and not depend on EUV to prevent
price pressure.
STMicroelectronics
STMicro has a strong position in the Internet of Things (IoT) market. We have
discussed that EUV is needed to make AI-based IoT ‘happen' at the edge of the
network. If STMicro intends to remain a major player in IoT in the long run, it will
need AI/ML capability either through licensing technology or having its own.
STMicro has historically been unsuccessful at creating ASSP products that require
significant software/firmware backup such as application processors and set-top box
chips and thus it is possibly better that STMicro enters into ASIC arrangement with
an AI/ML player. This is best illustrated in STMicro’s current arrangement with
autonomous car market leader Mobileye (now under Intel) and STMicro will benefit
from the volume ramp of Mobileye’s AI chips such as the EyeQ4 and EyeQ5 which
STMicro is building.

53

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI Basics
Artificial intelligence, or machine learning, can be imagined as a machine digesting
through a massive amount of data to figure out a model, which can be used to infer
the desired output when given similar parameters in other scenarios.

This is vastly different from traditional programming, where humans would instruct a
predefined set of algorithm and the role of computers is merely to process and
execute. In machine learning, computers would have to take one step further, to
“learn” from the given data and figure out the program themselves. As a result,
machine learning’s requirements for (1) the amount of data and (2) the computational
power are much higher.

Consequently, machine learning also demands more memory (to store the data) and
more efficient processors (to fulfil the need of computational power).

Figure 43: AI schematic – Process of machine learning

Source: J.P. Morgan.

What is the difference between training and inference?


In a given machine learning model, the training process is like receiving education in
school. The teachers (designers) would feed students (neural network) with a lot of
information (current data base). Once students formulate their logic thinking in
school (internal model), they have to try solving the puzzles outside school
(inference by external parameters), by using the previous model trained in school.

Technically, the designers would train the neural network by running a large set of
database. The neural network would digest through a massive amount of data to
figure out a model, which can be used to infer the desired output when given similar
parameters in other scenarios. For inference, there will be different stages of data
processing. Take image processing as an example, the first step for machine learning
could be depicting the frame of the subject, followed by recognizing specific pattern
in the picture which belongs to different categories, and then the color identification
etc. In the end of the process, the neural network would generate the results and
refine the processing flow if it turns out to be wrong.

 Training: During the neutral networking training process, a set of data is put into
a framework, which is trained to classify data and generate the desired results.
 Inference: The process of running a trained neural network to classify data with
labels or estimate some missing or future values is called inference.

54

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 44: Deep learning: difference between training and inference process

Source: Intel.

55

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI / Deep Learning Value Chain


Figure 45: Companies involved in different aspects of Machine Learning

Source: J.P. Morgan.

56

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

AI Glossary
AI-related terminology
 Artificial intelligence
Artificial intelligence (AI) can be thought of as machines simulating human
intelligence. Unlike traditional rule-based programming that requires human pre-
defined instructions, AI machines have the capability to learn and improve
themselves by sieving through datasets, akin to how humans learn. While AI is still
in the development stage, it has already made an impact in various verticals, with
applications such as facial recognition and speech analysis.

 AI as a service
The high entry barriers in technological expertise and capital investment to AI
development give rise to a marketplace where leading AI players offer AI
capabilities as rentable services. Sitting on a huge amount of compute resources and
leading-edge technology, ISPs easily emerge as some of the largest service providers
in the space. For instance, AWS and Google Cloud platforms both offer APIs for
intelligent functions such as image and speech analysis. While there are also some
specialized players such as API.AI and Clarifai, they are increasingly being
consolidated by the big players.

 Accelerated computing
Accelerated computing refers to the approach of using additional computational
hardware on top of CPU to speed up the processing. This is particularly important to
deep learning and big data analytics, as they often include compute-intensive
workload that can be better handled by specialized architectures such as GPU /
FPGA / custom ASIC. “Outsourcing” this workload frees up CPU capacity and lifts
the overall processing efficiency.

 Heterogeneous computing
As the name suggests, heterogeneous computing involves the use of two or more
processing cores, most commonly CPU and GPU. As the system includes specialized
processor(s) to handle specific tasks, it can enhance compute performance or attain
better energy efficiency.

 Cloud computing
Unlike conventional on-premise computing, cloud computing or public cloud
provide users with the option to purchase computing resources (including networks,
servers, storage, applications and services) on demand and pay per usage. This not
only gives users higher flexibility by renting instead of owning the capacity, but also
maximizes the utilization of computing resources. Some of the largest public cloud
players are Amazon (AWS), Microsoft (Azure), Alphabet (Google Cloud), Alibaba
and Tencent.

 Deep Neural Network/DNN


In a very simplified sense, Deep Neural Network (DNN) is a multi-layered network
of artificial neurons interconnected to each other, inspired by how neurons in human
brains work. Some of the commonly used DNN are Recurrent Neural Networks
(RNNs) for natural language processing and Convolutional Deep Neural Networks
(CNN) for computer vision.

57

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Figure 46: Illustration of deep neural networks

Source: Intel.

 TensorFlow
Originally developed by Google Brain Team, TensorFlow is an open-source software
library for numerical computation like machine learning. It can be imagined as a
framework to aid users in constructing their own machine learning model, which
helps to lessen the time in development and deployment.

AI applications
 Computer vision
There are two main hurdles for machines to adopt computer vision: (1) digitizing a
huge amount of analog signals in almost real-time; and (2) reading through the
dataset to identify the objects. While the first bottleneck has been resolved by the
advancement of digital cameras / smartphone cameras, the second obstacle has only
been recently resolved with developments in deep learning. The most well-known
breakthrough took place in 2012, when Google’s AI network learned how to identify
cats from videos. Since then, various companies have been active in advancing
computer vision and extended its usage to facial recognition.

 ADAS/autonomous driving
Simply put, autonomous driving refers to vehicles that can drive themselves with
little or even no human interactions. With regards to the level of human involvement,
National Highway Traffic Safety Administration in the U.S defined four stages from
assisted to full autonomous driving:

 Level 1: “Feet off” – Advanced Driver Assist Systems (ADAS). L1 vehicles


have certain automated functionalities with a primary aim to increase safety.
Features such as forward collision warning and automatic emergency braking fall
into this category.
 Level 2: “Hands off” – Combined Function Automation. L2 vehicles often
integrate two or more ADAS functionalities to free drivers from specific
functions. Some examples include automated steering and automated braking.
 Level 3: “Eyes off” – Limited Self-Driving Automation. L3 vehicles take a
further step from L2, and target to disengage the driver completely in certain
traffic or environmental condition. However, the driver is still expected to be
available for occasional control.
 Level 4: “Driver off” – Full Self-Driving Automation. L4 vehicles are expected
to be driver-free, where the vehicles should be capable of providing end-to-end
transport entirely by themselves without a driver monitoring.

58

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

 Natural Language Processing (NLP)


Siri and Alexa are both examples of natural language processing – as they process
and interact with our natural speech. Note that this is a significant leapfrog from the
previous approach of human-machine interaction, where human users needed to alter
their commands to pre-defined inputs or syntax that the machines could comprehend
(such as clicking certain buttons or using particular programming languages).

Hardware
 CPU (Central Processing Unit)
Central Processing Unit (CPU) can be thought of as the brain of a computer, as it
processes and executes computing instructions. Depending on the use case, it could
be integrated with other components such as memory to form System on Chip (SoC).
To further enhance the performance, two or more CPU cores (multi-cores) are
sometimes included on the same chip. However, it is important to note that this is
different from heterogeneous / accelerated computing, as the latter often involves the
use of two or more different architectures. Of note, Intel is the major CPU vendor
(vs. AMD) now.

 GPU (Graphics Processing Unit)


While Graphics Processing Unit is commonly used in rendering graphics, it has a
much wider use case given its parallel processing nature. Unlike CPU, which
contains only a relatively small number of powerful cores, GPU has thousands of
less powerful cores that run parallel at the same time, which enables it to handle a
large number of tasks simultaneously and bodes well for deep learning applications.
NVIDIA and AMD are leading GPU vendors.

 FPGA (Field-Programmable Gate Array)


Field-Programmable Gate Array (FPGA) is an integrated circuit that allows users to
program (and reprogram) its hardware configuration, which leaves high flexibility
and room for customization by users. This consequently allows users to tailor FPGA
for their specific use, in order to optimize the performance / energy efficiency. Xilinx
and Intel PSG (formerly Altera) are the main FPGA suppliers.

 ASIC (Application-specific integrated circuit)


Application-specific integrated circuit (ASIC) is a chip custom designed according to
user specification. Unlike FPGA, which has hardware architecture that can be
programmed or reprogrammed, ASIC framework is pretty much fixed when it is
manufactured and leaves no room for subsequent changes. However, its highly
customized nature allows it to fit specific use case in the most efficient manner, as all
the redundant features are eliminated with only the necessary left.

 TPU (Tensor Processing Unit)


Tensor Processing Unit (TPU) is an ASIC designed by Alphabet to address machine
learning. Its Matrix Multiplier Unit is tailored for the large amount of matrix
multiplications involved in DNN calculations, as the unit hosts a total of 65k
Arithmetic Logic Unit, which allows it to deliver 15x more throughput than
contemporary GPU.

 FLOPS (Floating point operations per second)


Floating point operations per second (FLOPS) is a commonly used performance
indicator of machine learning hardware, due to the prevalence of using floating point,
instead of integer, in deep learning (see our previous section on floating point).

59

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

 Moore’s Law
The term “Moore’s Law” originates from an observation of Gordon Moore, founder
of Intel – as he noted that the number of transistors on a chip usually doubles every
two years. This observation has profound implications to IC performance, energy
efficacy and cost – as shrunk transistor size can help to speed up electron movement,
reduce current leakage and translate into more die output per wafer. While the claim
seems to have held true over past many decades, discussions on its potential death
have emerged in recent years (see our previous section on “More demand at the
bleeding edge of Moore’s Law”).

60

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Companies Discussed in This Report (all prices in this report as of market close on 06 February 2018, unless otherwise
indicated)
ASM Pacific Technology Limited (0522.HK/HK$101.80[07 February 2018]/Overweight), Advantest (6857)
(6857.T/¥2123[07 February 2018]/Overweight), Applied Materials (AMAT/$50.25/Overweight), Hitachi High-
Technologies (8036) (8036.T/¥4815[07 February 2018]/Overweight), Inphi (IPHI/$32.09/Overweight), Intel
(INTC/$44.91/Overweight), KLA-Tencor (KLAC/$105.23/Overweight), Lam Research (LRCX/$178.34/Overweight),
Mellanox Technologies (MLNX/$61.90/Neutral), Micron Technology (MU/$43.88/Overweight), NVIDIA Corporation
(NVDA/$225.58/Neutral), SCREEN Holdings (7735) (7735.T/¥8400[07 February 2018]/Neutral), SK hynix
(000660.KS/W71100[07 February 2018]/Neutral), Samsung Electronics (005930.KS/W2290000[07 February
2018]/Overweight), TSMC (2330.TW/NT$240.0[07 February 2018]/Overweight), Tokyo Electron (8035)
(8035.T/¥18760[07 February 2018]/Neutral), Xilinx (XLNX/$68.99/Neutral)
Analyst Certification: The research analyst(s) denoted by an “AC” on the cover of this report certifies (or, where multiple research
analysts are primarily responsible for this report, the research analyst denoted by an “AC” on the cover or within the document
individually certifies, with respect to each security or issuer that the research analyst covers in this research) that: (1) all of the views
expressed in this report accurately reflect his or her personal views about any and all of the subject securities or issuers; and (2) no part of
any of the research analyst's compensation was, is, or will be directly or indirectly related to the specific recommendations or views
expressed by the research analyst(s) in this report. For all Korea-based research analysts listed on the front cover, they also certify, as per
KOFIA requirements, that their analysis was made in good faith and that the views reflect their own opinion, without undue influence or
intervention.
Research excerpts: This note includes excerpts from previously published research. For access to the full reports, including analyst
certification and important disclosures, investment thesis, valuation methodology, and risks to rating and price targets, please contact your
salesperson or the covering analyst’s team or visit www.jpmorganmarkets.com.
Important Disclosures

 Market Maker/ Liquidity Provider: J.P. Morgan Securities plc and/or an affiliate is a market maker and/or liquidity provider in
securities issued by Tokyo Electron (8035), Hitachi High-Technologies (8036), Advantest (6857), SCREEN Holdings (7735), Samsung
Electronics, SK hynix.
 Client: J.P. Morgan currently has, or had within the past 12 months, the following entity(ies) as clients: Tokyo Electron (8035),
Hitachi High-Technologies (8036), Advantest (6857), Samsung Electronics.
 Client/Investment Banking: J.P. Morgan currently has, or had within the past 12 months, the following entity(ies) as investment
banking clients: Hitachi High-Technologies (8036), Samsung Electronics.
 Client/Non-Investment Banking, Securities-Related: J.P. Morgan currently has, or had within the past 12 months, the following
entity(ies) as clients, and the services provided were non-investment-banking, securities-related: Tokyo Electron (8035), Hitachi High-
Technologies (8036), Advantest (6857), Samsung Electronics.
 Client/Non-Securities-Related: J.P. Morgan currently has, or had within the past 12 months, the following entity(ies) as clients, and
the services provided were non-securities-related: Tokyo Electron (8035), Hitachi High-Technologies (8036), Samsung Electronics.
 Investment Banking (past 12 months): J.P. Morgan received in the past 12 months compensation for investment banking services
from Hitachi High-Technologies (8036), Samsung Electronics.
 Investment Banking (next 3 months): J.P. Morgan expects to receive, or intends to seek, compensation for investment banking
services in the next three months from Hitachi High-Technologies (8036), Samsung Electronics.
 Non-Investment Banking Compensation: J.P. Morgan has received compensation in the past 12 months for products or services
other than investment banking from Tokyo Electron (8035), Hitachi High-Technologies (8036), Advantest (6857), Samsung Electronics.
 Other Significant Financial Interests: J.P. Morgan owns a position of 1 million USD or more in the debt securities of Tokyo
Electron (8035), Hitachi High-Technologies (8036), Advantest (6857), SCREEN Holdings (7735), Samsung Electronics, SK hynix.
 Gartner: All statements in this report attributable to Gartner represent J.P. Morgan's interpretation of data opinion or viewpoints
published as part of a syndicated subscription service by Gartner, Inc., and have not been reviewed by Gartner. Each Gartner publication
speaks as of its original publication date (and not as of the date of this report). The opinions expressed in Gartner publications are not
representations of fact, and are subject to change without notice.
Company-Specific Disclosures: Important disclosures, including price charts and credit opinion history tables, are available for
compendium reports and all J.P. Morgan–covered companies by visiting https://www.jpmm.com/research/disclosures, calling 1-800-477-
0406, or e-mailing research.disclosure.inquiries@jpmorgan.com with your request. J.P. Morgan’s Strategy, Technical, and Quantitative

61

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Research teams may screen companies not covered by J.P. Morgan. For important disclosures for these companies, please call 1-800-477-
0406 or e-mail research.disclosure.inquiries@jpmorgan.com.
Explanation of Equity Research Ratings, Designations and Analyst(s) Coverage Universe:
J.P. Morgan uses the following rating system: Overweight [Over the next six to twelve months, we expect this stock will outperform the
average total return of the stocks in the analyst’s (or the analyst’s team’s) coverage universe.] Neutral [Over the next six to twelve
months, we expect this stock will perform in line with the average total return of the stocks in the analyst’s (or the analyst’s team’s)
coverage universe.] Underweight [Over the next six to twelve months, we expect this stock will underperform the average total return of
the stocks in the analyst’s (or the analyst’s team’s) coverage universe.] Not Rated (NR): J.P. Morgan has removed the rating and, if
applicable, the price target, for this stock because of either a lack of a sufficient fundamental basis or for legal, regulatory or policy
reasons. The previous rating and, if applicable, the price target, no longer should be relied upon. An NR designation is not a
recommendation or a rating. In our Asia (ex-Australia and ex-India) and U.K. small- and mid-cap equity research, each stock’s expected
total return is compared to the expected total return of a benchmark country market index, not to those analysts’ coverage universe. If it
does not appear in the Important Disclosures section of this report, the certifying analyst’s coverage universe can be found on J.P.
Morgan’s research website, www.jpmorganmarkets.com.
Coverage Universe: Hariharan, Gokul: ASE (2311.TW), ASUSTek Computer (2357.TW), Compal Electronics, Inc. (2324.TW), Delta
Electronics, Inc. (2308.TW), GDS Holdings (GDS), Hangzhou HikVision Digital Technology Co., Ltd - A (002415.SZ), Hon Hai
Precision (2317.TW), Lenovo Group Limited (0992.HK), MediaTek Inc. (2454.TW), Pegatron Corp (4938.TW), Quanta Computer Inc.
(2382.TW), SMIC (0981.HK), SPIL (2325.TW), TSMC (2330.TW), UMC (2303.TW), Wistron Corporation (3231.TW), Zhejiang Dahua
Technology Co., Ltd - A (002236.SZ)
Park, JJ: LG Electronics (066570.KS), Panasonic (6752) (6752.T), SK hynix (000660.KS), Samsung Electronics (005930.KS), Sony
(6758) (6758.T)
Moriyama, Hisashi: Advantest (6857) (6857.T), Canon (7751) (7751.T), Disco (6146) (6146.T), FUJIFILM Holdings (4901) (4901.T),
Hitachi (6501) (6501.T), Hitachi High-Technologies (8036) (8036.T), Konica Minolta (4902) (4902.T), Mitsubishi Electric (6503)
(6503.T), Nikon (7731) (7731.T), Ricoh (7752) (7752.T), SCREEN Holdings (7735) (7735.T), Seiko Epson (6724) (6724.T), Tokyo
Electron (8035) (8035.T), Tokyo Seimitsu (7729) (7729.T), Toshiba (6502) (6502.T), ULVAC (6728) (6728.T)
Sur, Harlan: Advanced Micro Devices (AMD), Analog Devices (ADI), Applied Materials (AMAT), Broadcom Limited (AVGO),
Cavium Inc (CAVM), Cypress Semiconductor (CY), Inphi (IPHI), Integrated Device Technology (IDTI), Intel (INTC), KLA-Tencor
(KLAC), Lam Research (LRCX), MACOM (MTSI), Marvell Technology Group (MRVL), Maxim Integrated Products (MXIM),
Mellanox Technologies (MLNX), Microchip Technology (MCHP), Micron Technology (MU), NVIDIA Corporation (NVDA), NXP
Semiconductors (NXPI), ON Semiconductor Corporation (ON), Orbotech (ORBK), Texas Instruments (TXN), Vishay Intertechnology
(VSH), Xilinx (XLNX)
Deshpande, Sandeep S: ASM International (ASMI.AS), ASML (ASML.AS), ASML ADR (ASML), Dialog Semiconductor (DLGS.DE),
Ericsson (ERICb.ST), Ericsson ADR (ERIC), Gemalto (GTO.AS), Infineon Technologies (IFXGn.F), Ingenico (INGC.PA), Nets
(NETS.CO), Nokia (NOKIA.HE), Nokia ADR (NOK), OSRAM (OSRn.DE), STMicroelectronics (STM.PA), VAT (VACN.S), ams
(AMS.S)

J.P. Morgan Equity Research Ratings Distribution, as of January 02, 2018


Overweight Neutral Underweight
(buy) (hold) (sell)
J.P. Morgan Global Equity Research Coverage 45% 43% 12%
IB clients* 53% 50% 35%
JPMS Equity Research Coverage 44% 46% 10%
IB clients* 70% 66% 54%
*Percentage of investment banking clients in each rating category.
For purposes only of FINRA/NYSE ratings distribution rules, our Overweight rating falls into a buy rating category; our Neutral rating falls into a hold
rating category; and our Underweight rating falls into a sell rating category. Please note that stocks with an NR designation are not included in the table
above.

Equity Valuation and Risks: For valuation methodology and risks associated with covered companies or price targets for covered
companies, please see the most recent company-specific research report at http://www.jpmorganmarkets.com, contact the primary analyst
or your J.P. Morgan representative, or email research.disclosure.inquiries@jpmorgan.com. For material information about the proprietary
models used, please see the Summary of Financials in company-specific research reports and the Company Tearsheets, which are
available to download on the company pages of our client website, http://www.jpmorganmarkets.com. This report also sets out within it
the material underlying assumptions used.

62

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Equity Analysts' Compensation: The equity research analysts responsible for the preparation of this report receive compensation based
upon various factors, including the quality and accuracy of research, client feedback, competitive factors, and overall firm revenues.
Registration of non-US Analysts: Unless otherwise noted, the non-US analysts listed on the front of this report are employees of non-US
affiliates of JPMS, are not registered/qualified as research analysts under NASD/NYSE rules, may not be associated persons of JPMS,
and may not be subject to FINRA Rule 2241 restrictions on communications with covered companies, public appearances, and trading
securities held by a research analyst account.

Other Disclosures
J.P. Morgan ("JPM") is the global brand name for J.P. Morgan Securities LLC ("JPMS") and its affiliates worldwide. J.P. Morgan Cazenove is a marketing
name for the U.K. investment banking businesses and EMEA cash equities and equity research businesses of JPMorgan Chase & Co. and its subsidiaries.

All research reports made available to clients are simultaneously available on our client website, J.P. Morgan Markets. Not all research content is
redistributed, e-mailed or made available to third-party aggregators. For all research reports available on a particular stock, please contact your sales
representative.

Options related research: If the information contained herein regards options related research, such information is available only to persons who have
received the proper option risk disclosure documents. For a copy of the Option Clearing Corporation's Characteristics and Risks of Standardized Options,
please contact your J.P. Morgan Representative or visit the OCC's website at https://www.theocc.com/components/docs/riskstoc.pdf

Legal Entities Disclosures


U.S.: JPMS is a member of NYSE, FINRA, SIPC and the NFA. JPMorgan Chase Bank, N.A. is a member of FDIC. U.K.: JPMorgan Chase N.A., London
Branch, is authorised by the Prudential Regulation Authority and is subject to regulation by the Financial Conduct Authority and to limited regulation by
the Prudential Regulation Authority. Details about the extent of our regulation by the Prudential Regulation Authority are available from J.P. Morgan on
request. J.P. Morgan Securities plc (JPMS plc) is a member of the London Stock Exchange and is authorised by the Prudential Regulation Authority and
regulated by the Financial Conduct Authority and the Prudential Regulation Authority. Registered in England & Wales No. 2711006. Registered Office 25
Bank Street, London, E14 5JP. South Africa: J.P. Morgan Equities South Africa Proprietary Limited is a member of the Johannesburg Securities
Exchange and is regulated by the Financial Services Board. Hong Kong: J.P. Morgan Securities (Asia Pacific) Limited (CE number AAJ321) is regulated
by the Hong Kong Monetary Authority and the Securities and Futures Commission in Hong Kong and/or J.P. Morgan Broking (Hong Kong) Limited (CE
number AAB027) is regulated by the Securities and Futures Commission in Hong Kong. Korea: This material is issued and distributed in Korea by or
through J.P. Morgan Securities (Far East) Limited, Seoul Branch, which is a member of the Korea Exchange(KRX) and is regulated by the Financial
Services Commission (FSC) and the Financial Supervisory Service (FSS). Australia: J.P. Morgan Australia Limited (JPMAL) (ABN 52 002 888 011/AFS
Licence No: 238188) is regulated by ASIC and J.P. Morgan Securities Australia Limited (JPMSAL) (ABN 61 003 245 234/AFS Licence No: 238066) is
regulated by ASIC and is a Market, Clearing and Settlement Participant of ASX Limited and CHI-X. Taiwan: J.P. Morgan Securities (Taiwan) Limited is
a participant of the Taiwan Stock Exchange (company-type) and regulated by the Taiwan Securities and Futures Bureau. India: J.P. Morgan India Private
Limited (Corporate Identity Number - U67120MH1992FTC068724), having its registered office at J.P. Morgan Tower, Off. C.S.T. Road, Kalina,
Santacruz - East, Mumbai – 400098, is registered with Securities and Exchange Board of India (SEBI) as a ‘Research Analyst’ having registration number
INH000001873. J.P. Morgan India Private Limited is also registered with SEBI as a member of the National Stock Exchange of India Limited (SEBI
Registration Number - INB 230675231/INF 230675231/INE 230675231), the Bombay Stock Exchange Limited (SEBI Registration Number - INB
010675237/INF 010675237) and as a Merchant Banker (SEBI Registration Number - MB/INM000002970). Telephone: 91-22-6157 3000, Facsimile: 91-
22-6157 3990 and Website: www.jpmipl.com. For non local research reports, this material is not distributed in India by J.P. Morgan India Private Limited.
Thailand: This material is issued and distributed in Thailand by JPMorgan Securities (Thailand) Ltd., which is a member of the Stock Exchange of
Thailand and is regulated by the Ministry of Finance and the Securities and Exchange Commission and its registered address is 3rd Floor, 20 North Sathorn
Road, Silom, Bangrak, Bangkok 10500. Indonesia: PT J.P. Morgan Securities Indonesia is a member of the Indonesia Stock Exchange and is regulated by
the OJK a.k.a. BAPEPAM LK. Philippines: J.P. Morgan Securities Philippines Inc. is a Trading Participant of the Philippine Stock Exchange and a
member of the Securities Clearing Corporation of the Philippines and the Securities Investor Protection Fund. It is regulated by the Securities and
Exchange Commission. Brazil: Banco J.P. Morgan S.A. is regulated by the Comissao de Valores Mobiliarios (CVM) and by the Central Bank of Brazil.
Mexico: J.P. Morgan Casa de Bolsa, S.A. de C.V., J.P. Morgan Grupo Financiero is a member of the Mexican Stock Exchange and authorized to act as a
broker dealer by the National Banking and Securities Exchange Commission. Singapore: This material is issued and distributed in Singapore by or
through J.P. Morgan Securities Singapore Private Limited (JPMSS) [MCI (P) 202/03/2017 and Co. Reg. No.: 199405335R], which is a member of the
Singapore Exchange Securities Trading Limited and/or JPMorgan Chase Bank, N.A., Singapore branch (JPMCB Singapore) [MCI (P) 059/09/2017], both
of which are regulated by the Monetary Authority of Singapore. This material is issued and distributed in Singapore only to accredited investors, expert
investors and institutional investors, as defined in Section 4A of the Securities and Futures Act, Cap. 289 (SFA). This material is not intended to be issued
or distributed to any retail investors or any other investors that do not fall into the classes of “accredited investors,” “expert investors” or “institutional
investors,” as defined under Section 4A of the SFA. Recipients of this document are to contact JPMSS or JPMCB Singapore in respect of any matters
arising from, or in connection with, the document. Japan: JPMorgan Securities Japan Co., Ltd. and JPMorgan Chase Bank, N.A., Tokyo Branch are
regulated by the Financial Services Agency in Japan. Malaysia: This material is issued and distributed in Malaysia by JPMorgan Securities (Malaysia) Sdn
Bhd (18146-X) which is a Participating Organization of Bursa Malaysia Berhad and a holder of Capital Markets Services License issued by the Securities
Commission in Malaysia. Pakistan: J. P. Morgan Pakistan Broking (Pvt.) Ltd is a member of the Karachi Stock Exchange and regulated by the Securities
and Exchange Commission of Pakistan. Saudi Arabia: J.P. Morgan Saudi Arabia Ltd. is authorized by the Capital Market Authority of the Kingdom of
Saudi Arabia (CMA) to carry out dealing as an agent, arranging, advising and custody, with respect to securities business under licence number 35-07079
and its registered address is at 8th Floor, Al-Faisaliyah Tower, King Fahad Road, P.O. Box 51907, Riyadh 11553, Kingdom of Saudi Arabia. Dubai:
JPMorgan Chase Bank, N.A., Dubai Branch is regulated by the Dubai Financial Services Authority (DFSA) and its registered address is Dubai
International Financial Centre - Building 3, Level 7, PO Box 506551, Dubai, UAE.

Country and Region Specific Disclosures


U.K. and European Economic Area (EEA): Unless specified to the contrary, issued and approved for distribution in the U.K. and the EEA by JPMS plc.

63

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..
Gokul Hariharan Asia Pacific Equity Research
(852) 2800-8564 07 February 2018
gokul.hariharan@jpmorgan.com

Investment research issued by JPMS plc has been prepared in accordance with JPMS plc's policies for managing conflicts of interest arising as a result of
publication and distribution of investment research. Many European regulators require a firm to establish, implement and maintain such a policy. Further
information about J.P. Morgan's conflict of interest policy and a description of the effective internal organisations and administrative arrangements set up
for the prevention and avoidance of conflicts of interest is set out at the following link https://www.jpmorgan.com/jpmpdf/1320742677360.pdf. This report
has been issued in the U.K. only to persons of a kind described in Article 19 (5), 38, 47 and 49 of the Financial Services and Markets Act 2000 (Financial
Promotion) Order 2005 (all such persons being referred to as "relevant persons"). This document must not be acted on or relied on by persons who are not
relevant persons. Any investment or investment activity to which this document relates is only available to relevant persons and will be engaged in only
with relevant persons. In other EEA countries, the report has been issued to persons regarded as professional investors (or equivalent) in their home
jurisdiction. Australia: This material is issued and distributed by JPMSAL in Australia to "wholesale clients" only. This material does not take into
account the specific investment objectives, financial situation or particular needs of the recipient. The recipient of this material must not distribute it to any
third party or outside Australia without the prior written consent of JPMSAL. For the purposes of this paragraph the term "wholesale client" has the
meaning given in section 761G of the Corporations Act 2001. Germany: This material is distributed in Germany by J.P. Morgan Securities plc, Frankfurt
Branch which is regulated by the Bundesanstalt für Finanzdienstleistungsaufsicht. Hong Kong: The 1% ownership disclosure as of the previous month end
satisfies the requirements under Paragraph 16.5(a) of the Hong Kong Code of Conduct for Persons Licensed by or Registered with the Securities and
Futures Commission. (For research published within the first ten days of the month, the disclosure may be based on the month end data from two months
prior.) J.P. Morgan Broking (Hong Kong) Limited is the liquidity provider/market maker for derivative warrants, callable bull bear contracts and stock
options listed on the Stock Exchange of Hong Kong Limited. An updated list can be found on HKEx website: http://www.hkex.com.hk. Korea: This report
may have been edited or contributed to from time to time by affiliates of J.P. Morgan Securities (Far East) Limited, Seoul Branch. Singapore: As at the
date of this report, JPMSS is a designated market maker for certain structured warrants listed on the Singapore Exchange where the underlying securities
may be the securities discussed in this report. Arising from its role as designated market maker for such structured warrants, JPMSS may conduct hedging
activities in respect of such underlying securities and hold or have an interest in such underlying securities as a result. The updated list of structured
warrants for which JPMSS acts as designated market maker may be found on the website of the Singapore Exchange Limited: http://www.sgx.com. In
addition, JPMSS and/or its affiliates may also have an interest or holding in any of the securities discussed in this report – please see the Important
Disclosures section above. For securities where the holding is 1% or greater, the holding may be found in the Important Disclosures section above. For all
other securities mentioned in this report, JPMSS and/or its affiliates may have a holding of less than 1% in such securities and may trade them in ways
different from those discussed in this report. Employees of JPMSS and/or its affiliates not involved in the preparation of this report may have investments
in the securities (or derivatives of such securities) mentioned in this report and may trade them in ways different from those discussed in this report.
Taiwan: This material is issued and distributed in Taiwan by J.P. Morgan Securities (Taiwan) Limited. According to Paragraph 2, Article 7-1 of
Operational Regulations Governing Securities Firms Recommending Trades in Securities to Customers (as amended or supplemented) and/or other
applicable laws or regulations, please note that the recipient of this material is not permitted to engage in any activities in connection with the material
which may give rise to conflicts of interests, unless otherwise disclosed in the “Important Disclosures” in this material. India: For private circulation only,
not for sale. Pakistan: For private circulation only, not for sale. New Zealand: This material is issued and distributed by JPMSAL in New Zealand only to
persons whose principal business is the investment of money or who, in the course of and for the purposes of their business, habitually invest money.
JPMSAL does not issue or distribute this material to members of "the public" as determined in accordance with section 3 of the Securities Act 1978. The
recipient of this material must not distribute it to any third party or outside New Zealand without the prior written consent of JPMSAL. Canada: The
information contained herein is not, and under no circumstances is to be construed as, a prospectus, an advertisement, a public offering, an offer to sell
securities described herein, or solicitation of an offer to buy securities described herein, in Canada or any province or territory thereof. Any offer or sale of
the securities described herein in Canada will be made only under an exemption from the requirements to file a prospectus with the relevant Canadian
securities regulators and only by a dealer properly registered under applicable securities laws or, alternatively, pursuant to an exemption from the dealer
registration requirement in the relevant province or territory of Canada in which such offer or sale is made. The information contained herein is under no
circumstances to be construed as investment advice in any province or territory of Canada and is not tailored to the needs of the recipient. To the extent that
the information contained herein references securities of an issuer incorporated, formed or created under the laws of Canada or a province or territory of
Canada, any trades in such securities must be conducted through a dealer registered in Canada. No securities commission or similar regulatory authority in
Canada has reviewed or in any way passed judgment upon these materials, the information contained herein or the merits of the securities described herein,
and any representation to the contrary is an offence. Dubai: This report has been issued to persons regarded as professional clients as defined under the
DFSA rules. Brazil: Ombudsman J.P. Morgan: 0800-7700847 / ouvidoria.jp.morgan@jpmorgan.com.

General: Additional information is available upon request. Information has been obtained from sources believed to be reliable but JPMorgan Chase & Co.
or its affiliates and/or subsidiaries (collectively J.P. Morgan) do not warrant its completeness or accuracy except with respect to any disclosures relative to
JPMS and/or its affiliates and the analyst's involvement with the issuer that is the subject of the research. All pricing is indicative as of the close of market
for the securities discussed, unless otherwise stated. Opinions and estimates constitute our judgment as of the date of this material and are subject to change
without notice. Past performance is not indicative of future results. This material is not intended as an offer or solicitation for the purchase or sale of any
financial instrument. The opinions and recommendations herein do not take into account individual client circumstances, objectives, or needs and are not
intended as recommendations of particular securities, financial instruments or strategies to particular clients. The recipient of this report must make its own
independent decisions regarding any securities or financial instruments mentioned herein. JPMS distributes in the U.S. research published by non-U.S.
affiliates and accepts responsibility for its contents. Periodic updates may be provided on companies/industries based on company specific developments or
announcements, market conditions or any other publicly available information. Clients should contact analysts and execute transactions through a J.P.
Morgan subsidiary or affiliate in their home jurisdiction unless governing law permits otherwise.

"Other Disclosures" last revised January 01, 2018.


Copyright 2018 JPMorgan Chase & Co. All rights reserved. This report or any portion hereof may not be reprinted, sold or
redistributed without the written consent of J.P. Morgan. #$J&098$#*P

64

This document is being provided for the exclusive use of Steven Cock at ABN AMRO GROUP N.V..