Binary Decision Diagram: Introduction and construction
1. Introduction
As discussed in the ―Design‖ part of the course, digital VLSI design flow can be subdivided into two parts, namely frontend and backend. Frontend part starts with design specifications and generates gate level circuit implementation. Backend part starts with the gate level circuit and finally produces layout of the circuit in terms of transistors, power lines, I/O pads etc. which is used for fabrication; in this course we have not covered the backend part of the design flow. In case of both frontend and backend, we perform many transformations, however, it is mandatory that equivalence in terms of specifications are to be maintained across transformations. In other words, the final design should implement the intent provided in the specifications. So, to ensure that transformations do not change specifications, equivalence is to be established between two versions of a circuit, before and after transformation, e.g., gate level version is to be equivalent with the register transfer level version.
A circuit having n inputs as i _{1} ,i _{2} , i _{3} ,
....
i _{n} and m outputs as 0 _{1} ,0 _{2} , 0 _{3} ,
...
0
_{m} can be represented in many
ways which can be directly used for equivalence checking (with other versions). The simplest way is
comprises 
2 ^{n} 
rows 
starting 
from 

(each 
row 
corresponds 
to 
an 
input 
combination). Also output values of 0 _{1} ,0 _{2} , 0 _{3} ,
...
0 _{m} for the corresponding input combinations are stored.
Once we have truth tables of both the circuit versions, we just need to see that output values of both the truth tables are same for each corresponding row (i.e., combinations). Another technique to represent digital circuits is to use Binary Decision Trees (BDT) [2].
Corresponding to each output 0 _{1} ,0 _{2} , 0 _{3} ,
...
0 _{m} there is binary tree. There are 2 ^{n} leaf nodes of each tree,
and each leaf node (for the tree corresponding to 0 _{1} , say) represents a value of 0 _{1} for an input combination. Input combination for a leaf node is determined by the path from root to the leaf node under question, which comprises n nonleaf nodes, one for each input variable i _{1} ,i _{2} , i _{3} , _{n} . If the left (right) path is taken from the nonleaf node corresponding to an input i _{1} say, then the value for i _{1} is
....
i
0 (1). Similarly, conditions for all inputs i _{1} ,i _{2} , i _{3} , _{n} can be determined for a leaf node. Now, if two
....
i
circuit versions are to be equivalent, then all the binary decision trees for 0 _{1} ,0 _{2} , 0 _{3} , (exact image) for both the versions.
...
0 _{m} are to be same
It may be noted that once a truth table or binary decision tree is created, equivalence checking is very simple, involving a matter of checking exact match of the corresponding elements. However, the major problem is in creating and maintaining the binary decision tree of the truth table. A circuit having n inputs and m outputs has entries in the truth table; 2 ^{n} rows and m outputs for
each row. Similarity, for such a circuit the number of nodes in the BDT is
Any
practical VLSI circuit may easily contain 100s of inputs and outputs, thereby making construction of binary decision tree or truth table impossible within practical time lines.
It may be noted that although digital circuits can be represented efficiently using Boolean functions
[1], but they cannot be directly used for equivalence checking (which was the case in binary trees
and truth tables). For example, Boolean functions ―x+0‖ and ―x‖ (x is a Boolean variable) are
equivalent even if they look structurally different. To cater to the issue of high complexity in
generating binary decision tree or truth table, a new data structure called Ordered Binary Decision
Diagram (OBDD) was proposed by R.E. Bryant [3]. Broadly speaking an OBDD comprises much lower number of nodes compared to 2 ^{n} , (for a circuit having n inputs) and at the same time two equivalent circuits will generate the same OBDD (which can be directly used for comparison).
In this module, we will study in details about OBDDs, comprising basic introduction, construction algorithm, operations on OBDDs and representation of sequential circuits. In the first lecture we will start with an introduction to OBDDs.
2. Binary Decision Tree
Before we move to OBDDs a brief introduction to binary decision trees is given.
Binary decision tree (BDT) for a Boolean function is a tree such that

The internal nodes of a tree are labeled by variables of the function. 

The leaves of a tree are labeled by 0 and 1. 

Every internal node in a tree has exactly two children, the two arcs from node to the children are labeled by 0 (dashed line) and by 1 (solid line). The dashed line indicates that the value assigned to the variable is 0 and the solid line indicates that the value assigned to the variable is 1. 
As an example, consider the following Boolean function f on four variables a, b, c and d .
f(a,b,c,d)=ab+cd. The ANDOR circuit implementation for this function is given in Figure 1.
The above Boolean function contains 4 input variables a,b,c,d. If we represent this Boolean function by BDT then we will get 16 terminals (i.e.,2 ^{4} ) (leaves) and 15 non terminals (internal nodes). The BDT for this Boolean function is shown in Figure 2.
From the function it may be noted that if a=1, b=1, c=d=0 then the function evaluates to 0; this is represented by the path ―start from a, left edge to b, left edge to c, left edge to d and left edge to leaf node 0. Also, if then the function evaluates to 1; this is represented by the path ―start from a , right edge to b , right edge to c , left edge to d and left edge to leaf node 1.
As already mentioned, truth table as well as BDT representation of Boolean expressions are not of much benefit because of exponential growth of the table and the tree.
3. Binary Decision Diagrams
From the example illustrated in the last section, it may be noted that BDT cannot be generated within practical time lines for a reasonably complex circuit. The main reason is the exponential number of nodes in a BDT with respect to number of inputs. However, it may be noted that there
are many redundant nodes in the BDT; simply, in the leaf level we can have one node with ―0‖ and
the other with ―1‖ and redirect paths from the nodes of leaf level 1 accordingly. Similarly, this reduction is carried out at all layers till the root.
Broadly speaking, a Binary Decision Diagram (BDD) is a directed acyclic graph representation of the Boolean expression which cannot further be reduced my eliminating redundant nodes. In other words, just like BDT, BDD is an acyclic graph representation of a Boolean expression but unlike BDT, it does not comprise any redundant node either in the leaf or the nonleaf level. So BDD is called Reduced BDD (RBDD).
The reduction from BDT to RBDD is done using three rules.
R1: Removing of duplicate terminals (leaf nodes): If a BDD contains more than one terminal 0node, then we redirect all edges which point to such 0node to just one of them and other 0node can be removed. Similarly we do with 1node also. R2: Removal of duplicate non terminals (internal nodes): If two distinct nodes n and m in the RBDD are the roots of structurally identical subBDDs, then we eliminate one of them, say m , and redirect all its incoming edges to the other one (node n ) R3: Removal of Redundant test: If both outgoing edges of a node n point to the same node m , then we eliminate the node n , and point all its incoming edges to m .
After application of Rule R1, Rule R2 and Rule R3 repeatedly we get the reduced BDD (from BDT). A BDD is said to be reduced if none of the above rules can be applied further. (i.e., no more reduction is possible).
Now we illustrate application of the above three rules for the BDT of Figure 2.
Figure 3 illustrates the intermediate BDD when R1 is applied to the BDT of Figure 2. It may be noted that there is only one leaf node with ―0‖ and another one with ―1‖. From Figure 2 it may be observed that the path from root to leaf node corresponding a=b=c=d=0 reaches a leaf node with
―0‖. Also the path from corresponding to a=b=c=0; d=1reaches a leaf node with ―0‖. Now as there is a single node at leaf level with ―0‖ in the RBDD (Figure 3) both the paths corresponding toa=b=c=d=0 anda=b=c=0; d=1 has been redirected the single ―0‖ leaf node. Similarly, redirection
of all paths in Figure 3 can be explained.
Figure 3. Removal of Duplicate Terminals (Leaf Nodes)
Figure 4 illustrates the intermediate BDD when R2 is applied to the (intermediate) BDD of Figure 3. From Figure 5 it may be noted that the subBDDs enclosed by polygons are structurally identical. So we retain only one of them and redirect edges incoming to the eliminated subBDD to the one being retained; resulting intermediate BDD is shown in Figure 6. When R2 is applied to all structurally identical subBDDs of Figure 3 we obtain the BDD of Figure 4.
From Figure 4 it may be noted that there nodes n say, where both the outgoing edges point to the
same node m say ; R3 eliminates such a node n and points all its incoming edges to m . Nodes of such type in BDD of Figure 4 are marked and shown in Figure 7. Figure 8 illustrates the intermediate
BDD when R3 is applied to node ―b‖ (marked by an arrow) whose both the outgoing edges point to the same node ―c‖. When R3 is applied to all such nodes, the BDD obtained is shown in Figure 9.
Figure 7. Nodes (arrow marked) where both the outgoing edges point to the same node
RBDD using Shannon expansion
In the last section we demonstrated that a RBDD comprises much less number of nodes compared to its equivalent BDT. However, the construction started from a BDT and was finally transformed to a RBDD. As already discussed, time taken to generate a BDT is prohibitive for even a function with reasonable complexity. To obtain RBDD, it is not necessary to start with BDT at the first place. The discussion in the last section was only to illustrate that RBDD is a BDT without any redundancy and there are lots of redundant nodes in a BDT. Now we discuss how RBDD can be generated directly without use of a BDT.
RBDD is based on Shannon Expansion, according to which Boolean function can be represented by the sum of two subfunctions of the original. In particular, a function f(x) can be written as:
The basic or primitive BDDs to represent Boolean function are given below.
B _{0} : represents the Boolean constant 0.
B1: represents the Boolean constant 1.
B _{x} : represents the Boolean variable x .
These primitive BDDs are shown in Figure 11.
Figure 11. Primitive BDDs
Diagrammatically, a BDD of a function of variable a is rooted at a node representing variable a , and its children represent the two subfunctions whose sum results in the original expression. The child of the root with dotted line from parent represents f[0/a] and the one with solid line from parent represents f[1/a] . BDD of a function of variable a is shown in Figure 12.
Figure 12. BDD of a function of variable a
or instance, for the above considered example (i.e.,f(a)=ac+bc+ab) the initial diagram would be of the form shown in Figure 13.
Figure 13. Initial diagram of the function f(a)=ac+bc+ab)
Further expansion of the subfunctions would lead to the following expressions, which are to be found out till we find the leaf node of the diagram (that is binary 0 or 1):
Now the diagram for the expressionf(a) = ac+bc+ab is shown in Figure 14. The diagram obtained using Shannon Expansion can further be reduced using the reduction rules explained earlier. The
third rule ―Removal of duplicate terminals‖ is applied and the final RBDD for the expression is shown
in Figure 15. For the above case, no more reduction is possible.
Figure 14. Diagram of the function f(a) = ac+bc+ab with redundant nodes
Figure 15. Final diagram (RBDD) of the function f(a) = ac+bc+ab
for
the
Boolean
function
f(a,b,c)
=
ac+bc.
The diagram for the function built using Shannon's expansion is shown in Figure 16; the leaf level redundancies are eliminated using R1. In this case, it may be noted that there is another redundant node (encircled in Figure 16) and R2 can be applied. The final reduced BDD is shown in Figure 17.
Figure 16. Diagram of the function f(a,b,c) = ac+bc. after applying R1
Figure 17. Final diagram (RBDD) of the functionf(a,b,c) = ac + bc
5.Conclusions
In this lecture we discussed that equivalence checking of two Boolean expressions is best performed using BDT or truth tables. However, due to the exponential size of BDT or truth tables with respect to the number of inputs, use of BDTs or truth tables are not applicable to expressions even with reasonable complexity. To cater to this issue, RBDD which is BDT without any redundant nodes was proposed by R.E. Bryant. Using an example we illustrated the reduction in number of nodes in a RBBD compared to its BDT counter part. It may be noted that in all the examples there was an ordering of the variables namely, a<b<c . In other words in the RBDD, the root correspond variable ― a ‖, the nodes of level 2 correspond variable ― b ‖ and the nodes of level 3 correspond variable ― c ‖. Now a question arises, ―what will happen if we change the ordering of variables?‖, or ―there is no ordering?‖. The answer to first question is ―the number of nodes in a RBDD depends heavily on ordering‖. So to keep the size of RBDD minimal optimal ordering is to be determined; next lecture is related to Reduced Ordered Binary Decision Diagram (ROBDD). The answer to second question is— ―if we do not restrict the order of occurrence of variables from root to leaves, then along each path from top to bottom there may be variables which occur more than once and there would be redundant decisions; the problem discussed in the question and answer section of this lecture illustrates this fact.
Ordered Binary Decision Diagram
1. Introduction
In the previous lecture we have discussed how an RBDD represents a Boolean function, similar to truth table or Binary decision tree, however, the number of nodes do not grow exponentially with increase in number of inputs of the function. So RBDD is suitable for representing Boolean functions. It was also stated in the lecture that ordering of variables in the context of RBDD is important because

• Number of nodes for a given Boolean function depends on the ordering 

• There may be inconsistent paths in the BDD if there is no ordering. 
In this lecture we will discuss Ordered BDD (which also called Ordered Reduced BDD).
2. Ordered OBDD
An ordered BDD (OBDD) is a BDD which has an ordering for the variables of the Boolean function it
is representing. Let [x _{1} ........
,x
_{n} ] be an ordered list of variables without duplications and let B be a
BDD all of whose variables (of the corresponding Boolean function) occur somewhere in the list. We
say that B has the ordering [x _{1} ........
,x
_{n} ] if all variable labels of B occur in that list and, for every
occurrence of x ifollowed by x j along any path in B , we have i< j . In other words, BDD B has the
ordering [x _{1}
........
,x
_{n} ], if the root node corresponds to variable x _{1} , nodes of level 2 correspond to x _{2}
and so on, till the nodes of level leaf1 correspond to x _{a} .The BDD B1 of Figure 1 has the variable
ordering [X 1 , X 2 , X 3 , X 4 , X 5 ] and the BDD B2 of Figure 3 , X 2 , X 1 ].
2 has the variable ordering
[X 5 , X 4 , X
Figure 1. OBDD B1 with the
variable ordering [X 1 , X 2 , X 3 , X 4 , X 5 ]
Figure 2. OBDD B2 with the variable ordering [X 5 , X 4 , X 3 , X 2 , X 1 ]
The reduced OBDD representing a given function f is unique. In other words, let B1 and B 2 be two reduced OBDDs with similar variable orderings of a function f ,then B1 and B2 have identical structure. We therefore say that OBDDs have a canonical form. It may be noted that the fact ―RBDD contains much lower number of nodes compared to the corresponding BDT‖ alone does not make its importance in verification paradigm so high. Canonicity of RBDDs makes the impact, explained as follows. If we want to determine equivalence of two Boolean functions and generate RBDDs for them, the comparison will not be just checking if the RBDDs are exactly similar in structure (i.e., carbon copy), which is the case in BDT or truth table. However, if the RBDDs for both the functions under question are generated with same variable ordering (i.e., we generate the ROBDD) then equivalence checking is just matching the structures for exact similarity.
For example, consider the function f(a,b,c,d) = (a+c+d).(ab+bc) .(bc+ac) and variable orders as 01=[a,b,c,d], 02=[b,d,c,a]
For O1, the ORBDD can be gendered as follows
The various steps of obtaining the ROBDD are shown in Figure 3, Figure 4 and Figure 5.
Figure 3. OBDD for f(a,b,c,d) = (a+c+d).(ab+bc) .(bc+ac) with ordering 01=[a,b,c,d]
Figure 4. OBDD of Figure 3 after using rule ―Removal of Duplicate Non Terminal‖ to node ―b‖
Figure 5. OBDD of Figure 4 after using rule ―Removal of Redundant Test‖ to node ―a‖.
For O2, the ROBDD can be gendered as follows
The various steps of obtaining the ROBDD are shown in Figure 6 and Figure 7.
Figure 6. OBDD for f(a,b,c,d) = (a+c+d).(ab+bc) .(bc+ac) with ordering 02=[b,d,c,a]
Figure 7. OBDD of Figure 6 after using rule ―Removal of Duplicate Non Terminal‖ to node ―d‖
In the previous example, from Figure 5 and Figure 7, we have seen that the ROBDD structure is same for both the variable ordering 01=[a,b,c,d], 02=[b,d,c,a]. But this is not the general case. In this case, we are getting the same structure, because the given function f is independent of variable a and d , due to that the order O1 and O2 reduce to [b, c].
In general the size of ROBDD depends of the variable ordering. The chosen variable ordering makes a significant difference to the size of the ROBDD representing a given function. To show the effect of the ordering of variable, the most common function used in most of the literature of ROBDD is
f(x1,x2,x3,x4,x5,x6) = (x1+x2) .(x3+x4).(x5+x6) [1]. The ROBDD of function f with variable
ordering [x1,x2, x3, x4, x5, x6] is shown in Figure 8 and with variable ordering [x1,x2, x3, x4, x5, x6] is shown in Figure 9. So it may be noted that the size of ROBDD is sensible to the variable ordering. If the chosen variable ordering is a good one, then we get a very compact ROBDD representation for the given function, otherwise, the ROBDD representation is an expensive one.
Finding the optimal variable ordering of an OBDD is a computationally expensive problem, but there are several good heuristics which usually generate a fairly good ordering [2,3,4].
OBDD size is strongly influenced by the variable ordering and a good variable ordering always produces a compact OBDD. Optimal variable ordering is NPComplete problem. Many heuristics have been proposed to get a good variable ordering which leads to a compact representation of OBDD of a given function. There are two classes of heuristics – static variable ordering and dynamic variable ordering. In case of static variable ordering, order of the variable is identified before the construction of the variables and that ordering is maintained throughout the process. One such heuristics suggests that put the control variable at the top of the list whose decision is going to change the size of the OBDD. In case of dynamic variable ordering, we use the ordering heuristics during the construction or operation on OBDDs. In some BDD manipulation packages, dynamic variable ordering is used and intermittently it used the variable ordering methods to get a compact
representation of the existing OBDDs. This can be visualized as a garbage collection method, which stops the OBDD operations while it reorders.
Figure 8. ROBDD of function f with variable ordering [x1,x2, x3, x4, x5, x6]
Figure 9. ROBDD of function f with variable ordering [x1,x3,x5,x2,x4,x6]
2.1 reduce(OBDD) Algorithm
In the last lecture we discussed three rules R1–R3 which are used to reduce redundant nodes in BDDs to obtain RBDDs. In this subsection, we describe an algorithm reduce(OBDD) which does the reduction for ordered BDDs.
In the algorithm, we use two functions on a nonterminal node n , namely:
lo(n) : returns the node pointed to via the dashed line from n .
hi(n) : returns the node pointed to via the solid line from n .
The function id(n) on a node n, returns an integer (label) assigned to n ; this is called labeling.
There are 2 steps in reduce (OBDD) :
Step 1 :Labeling of nodes:
.............................Labeling
of leaf nodes:
............................
id(n)
is set to 0(1) if n is a leaf node having value 0(1)
............................Labeling
of all nonleaf nodes n :
............................
Before
labeling n all its children are to be labeled.
............................If
( id(lo( n )) = id(hi( n )) ) then set id( n ) to be id(lo( n )).
............................If
there is another node m where n and m have the same variable x i,
...........................and
...........................then
id(lo( n )) = .id(lo( m )) and id(hi( n )) = id(hi( m )), set id( n ) to be id( m ).
............................Otherwise,
set id(n ) to the next unused integer.
.......................Step
2 : Merging of nodes :
.......................Merge
all the nodes having same label and redirect edges accordingly.
Figure 10 and Figure 11 illusratereduce (OBDD) using an example. In Figure 10 it may be noted that all the leaf level nodes are assigned labels #0/#1 based on value they represent. The left most node of level leaf1 ―Z‖ is assigned label #2 (#1+1) because of the rule ―Otherwise, set id(n ) to the next unused integer‖. All other nodes of level leaf1 ― Z ‖ are assigned label #2 because of the rule ― If
there is another node m where n and m have the same variable x i, and id(lo( n )) = id(lo( m )) and id(hi( n )) = id(hi( m ))‖. Left child of root ― Y ‖ is assigned label #2 because of the rule ―If ( id(lo( n )) = id(hi( n )) ) ‖. Similarity, labeling of all the nodes of the tree can be explained. If we merge all nodes of same label then we obtain reduced OBDD as shown in Figure 11.
.Figure 10. Labelling of nodes in an OBDD
Figure 11. Merging nodes with same label to obtain ORBDD
3. Applications of ROBDD
It is observed that ROBDD represents the canonical form of given function for a particular variable ordering. If the chosen variable ordering is a good one, most likely we are going to get a compact representation of the function.
ROBDDs have several applications in circuit verification. In particular they can be used to test Equivalence of expressions, validity of Boolean expressions, Satisfiability of Boolean expressions and absence of redundant variable etc.
• Expression Equivalence : Instead of converting expressions to be compared to SOP, POS, truth table or DBT form to test equivalence, we can construct ROBDD for the expressions using a common order. If the ROBDD's obtained are same then expressions are equivalent.
• Validity of Boolean Expression: A Boolean expression is valid if it returns TRUE for all possible variable assignments. This can be tested by noticing occurrence of terminal node 0 in the ROBDD. If there is no 0 in the ROBDD then the expression is valid, else not.
• Satisfiability of Boolean Expression: A Boolean expression is satisfiable if it returns TRUE for some variable assignment. This can be tested by noticing occurrence of terminal node 1 in the ROBDD. If there is a 1 in the ROBDD then expression is satisfiable, else not.
• Absence of Redundant Variable: In case there is a redundant variable in the expression, it can be found out by constructing ROBDD of the expression. If the diagram does not have any occurrence of a particular variable, then the variable is redundant to the expression.
4.
Conclusions
In this lecture we discussed the importance of ordering of variables for applicability of ROBDD in the verification paradigm. Boolean functions are used to represent digital systems. During the design phase, we need to perform some operations like, complementation, AND, OR, etc. If we represent the Boolean functions with ROBDDs, we need methods to perform those operations. In next lecture, we will discuss about such operations on ROBDDs.
Operations on Ordered Binary Decision Diagram
1. Introduction
In the last two lectures we discussed that Reduced Ordered Binary Decision Diagrams (ROBDDs) are widely applied in verification because, they are canonical and for most of the Boolean functions they comprise much lower number of nodes compared to their DBT counterparts. Also we presented the construction of ROBDDs using Shannon's expansion. Another important property of ROBDDs is that all Boolean operations can be performed on them. For example, consider the AND gate shown in Figure 1 (a). The ROBDDs for the inputs ― a‖ and ― b ‖ are shown in Figure 1 (b). The ROBDD for the output of the AND gate is shown in Figure 1 (c), which is computed using AND operation on the ROBDDs of the two inputs. It may be noted that ROBDD for the AND gate (or any other circuit) can be constructed by first determining the Boolean function at output and then constructing the ROBDD using Shannon's expansion. However, construction of ROBDD using Shannon's expansion (of the output function) is more cumbersome compared to procedure of using Boolean operations on input ROBDDs. The reason is, determining Boolean function of a large circuit and then apply Shannon's expansion iteratively is a complex task. In this lecture we will discuss operations on ROBDDs.
Figure 1. ROBDD AND gate with inputs ―a ‖ and ― b ‖
2. Operations of ROBDDs
Let there be two ROBDDs and representing Boolean expressions f and g , respectively. It is known that all Boolean operations can be done on f and g and the result is another Boolean expression.
These operations can be performed on the ROBDDs and the resultant BDD ( may not be ordered and reduced, as explained shortly ) is the representation of the resultant Boolean expression.
Figure 2 shows the ROBDDs B _{f} and B _{g} of two functions f and g (internal nodes are not shown). Figure 3 represents the BDDs for the complement of f and g ; it is very simple to get the BDD for the complement of a function, as we just need to reverse the values of leaf nodes. It may be noted that complement operation on ROBDD would result in a BDD that is ordered and reduced. However, this may not hold for other operations explained as follows.
..............................
Figure 4 shows the BDDs for the function ( f + g ) and ( f . g ). The construction procedure is simple. In case of ―f + g ‖ if f is 1, then we need not evaluate g and if fis ―0‖ the final result depends only on g . This is reflected in the final BDD for ― f+ g ‖. Similarly, in case of ― f. g ‖ if f is 0, then we need not evaluate g and if fis ―1‖ the final result depends only on g . This is reflected in the final BDD for ―f .g ‖. The way we are constructing the BDDs for OR and AND operation, it is clear that the resultant BDDs are not ordered or reduced.
So, we need a method where the resultant BDD (after Boolean operations on ROBDDs) is also a ROBDD.
2.1 Binary Operations on ROBDD to procedue ROBBD
To perform the binary operation on two ROBDD's B _{f} andB _{g} ,corresponding to the functions f and g respectively, we use the algorithm apply( op, B _{f} , B _{g} ). The two ROBDDs B _{f} and B _{g} have compatible ordering.
Application of apply(op, B _{f} , B _{g} ) will give a OBDD. The ordering of the resultant BDD is same as B _{f} or B _{g} but it may not be the reduced one. After constructing the resultant BDD, we may apply the reduce algorithm to get the ROBDD.
The function apply is based on the Shannon's expansion for fand g :
From the Shannon's expansion of f and g :
This is used as a control structure of apply which proceeds from the roots of B _{f} and B _{g} downwards to construct nodes of the OBDD B _{f} op B _{g} . Let r f be the root node of B _{f} and r g be the root node of B _{g} .
apply(op, B _{f} , B _{g} ) Algorithm :
1. If both r _{f} andr _{g} are terminal nodes with labelsl _{f} and l _{g} , respectively
compute the value l _{f} op l _{g} and the resulting OBDD is B 0 if the value is 0 and B 1 otherwise.
In the remaining cases, at least one of the root nodes is a nonterminal.
2. If both nodes are x _{i} nodes (i.e., nonterminal of same order),
create an x _{i} node n (called r _{f} , r _{g} ) with a dashed line to apply ( op , lo( r _{f} ) , lo( r _{g} ) ) and a solid line
to apply ( op , hi( r _{f} ) , hi( r _{g} ) ).
3. If r f is an x _{i} node, but r _{g} is a terminal node or an x _{j} node with j >i,
create an x _{i} node n (called r _{f} , r _{g} ) with a dashed line to apply ( op , lo( r _{f} ) , r _{g} ) and a solid line to
apply (op , hi( r _{f} ) , r _{g} ).
4. The case in which r _{g} is a nonterminal node, but r _{f} is a terminal or an x _{j} node with
j >i, is handled symmetrically to case 3.
The example given in Figure 5 through Figure 7 illustrates the working of apply Algorithm. Figure 5 illustrates two ROBDDs which are ORed. Figure 6 illustrates the steps of the apply algorithm. Figure 7 illustrates the final OBDD after reduction; the result of apply(+, B _{f} , B _{g} ) may not be reduced one.
......................................Figure
5. OR of two ROBDD's with ordering [X _{1} ,X _{2} ,X _{3} ,X _{4} ]
Now we discuss construction of some of the nodes of the final OBDD shown in Figure 6 visavis steps of the apply algorithm. Construction of other nodes can be explained in a similar fashion.
•
x _{1} (R _{1} ,S _{1} ): According to Step2 on R _{1} and S _{1} create an x _{i} node n (called r _{f} , r _{g} =R _{1} ,S _{1} ).
• x _{2} (R _{2} ,S _{4} ): According to Step2 on x _{1} (R _{1} ,S _{1} )  If both nodes (R _{1} ,S _{1} in x _{1} ) are x _{i} nodes create
dashed line from x _{1} to apply ( op , lo( r _{f} ,S _{4} ), which is node x _{2} .
) , lo( r _{g} ) ) = apply ( op , lo( R _{1} ) , lo( S _{1} ) ) = apply (OR, R _{2}
x _{4} (R _{4} ,S _{4} ): According to Step3 on x _{2} (R _{2} ,S _{4} )  If r _{f} (R _{2} in x _{2} ) is an x _{i} node, but r _{g} (S _{4} in x _{2} ) is a terminal node or an x _{j} node with j >i, create an x inode n (called r _{f} , r _{g} =x _{2} ) with a dashed line to apply ( op , lo( r _{f} ) , r _{g} ) =(OR,R _{4} ,S _{4} ), which is node x _{4} .
•
•
Terminal node (R _{6} ,S _{4} ): According to Step3 on x 4 (R _{4} ,S _{4} ) If r _{f} (R _{4} in x _{4} ) is an x _{i} node, but
r _{g} (S _{4} in x _{4} ) is a terminal node or an x _{j} node with j >i, create an x _{i} node n (called r _{f} , r _{g} =x _{4} ) with a dashed line to apply ( op , lo( r _{f} ) , r _{g} ) =(OR,R _{6} ,S _{4} ), which is Terminal node (R _{6} ,S _{4} ) . The value of R _{6} ,S _{4} is 0; apply (OR, R _{6} =0,S _{4} =0)=0.
.....................Figure
6. Steps of the apply algorithm for the example of Figure 5
2.2 Restriction on ROBDD
The Boolean formula obtained by replacing all occurrences of x in f by 0 is denoted by f [0/ x ]. The formula f [1/ x ] is defined similarly. The expressions f [0/x] and f [1/ x ] are called restriction of f. Given an OBDD B _{f} for the function f , to get OBDD for restriction representing f [0/ x ] or f [1/ x ], using the same variable ordering as B _{f} , we need the algorithm restrict . Algorithm restrict is discussed below.
restrict(0/1, x, B _{f} )
iff [0/ x ] (i.e., restrict(0, x, B _{f} ))
• For each node n corresponding to x , remove n from OBDD and redirect incoming edges to lo(n)
iff [1/ x ] (i.e., restrict(1, x, B _{f} ))
• For each node n corresponding to x , remove n from OBDD and redirect incoming edges to hi(n)
Applying Reduce operation on the OBDD thus obtained to generate the ROBDD for the restrict function.
We will explain restrict algorithm for the Boolean function f = x1.y1 + x2.y3 + x3.y3 . After applying
restrict(0, x3 , B _{f} ), f becomes, f[0/x3] = x1.y1 + x2.y3. Figure 8 illustrates the ROBDD for f.
Figure 9 illustrates Step1 of restrict on ROBDD of Figure 8. Final ROBDD after restrict(0, x3 , B _{f} ) is shown in Figure 10.
Figure 8. ROBDD for f = x1.y1 + x2.y3 + x3.y3
Figure 9. Illustration of Step1 of restrict
After applying restrict (1, x3 , B _{f} ), f becomes, f [1/x3] = x1.y1 + x2.y3 + y3. The final ROBDD after restrict
(1,x3, B _{f} ) is shown in Figure 11.
Figure 11. ROBDD after restrict (1, x3 , B _{f} )
2.3
Exists on ORBDD
A Boolean function can be thought of as putting a constraint on the values of its argument variables. In other words, a Boolean function determines the possible values of the variables for which it is true. Sometimes we need to express relaxation of the constraint on a subset of variables. If we relax the constraint on some variable x of a Boolean function f , then f could be made true by putting x to 0 or to 1.
We write (∃xf ) for the Boolean function f with the constraint on x relaxed and it can be expressed as: ∃xf = f[0/x] + f[1/x] , i.e., there exists x on which the constraint is relaxed.
The exists algorithm can be implemented in terms of the algorithms apply and restrict as
∃xf=apply(+,restrict(0,x,B _{f} ),restrict(1,x,B _{f} )).
restrictoperation on an OBDD gives an OBDD. Similarly, apply operation also gives an OBDD as output. Thus, we obtain an OBDD as output after applying exists operation. We can get a reduced OBDD after applying Reduce operation on the thus obtained OBDD.
Now we illustrate exists algorithm on the OBDD f shown in Figure 8. Applying + over above two calculated restricts (Figure 10 and Figure 11), gives the OBDD for
∃x3f=apply(+,restrict(0,x3,B _{f} ),restrict(1,x3,B _{f} )).
Figure 12. ROBDD after apply(+,restrict(0,x3,B _{f} ),restrict(1,x3,B _{f} )).and reduction
Let is consider another function f1 = x1x2 + x1x3 + x1x4 + x2x4 ; the OBDD for f1 is shown in Figure
13. OBDD for restrict(0,x4, B _{f} ) and restrict(1,x4,B _{f} )) is shown in Figure 14.
Figure 13. ROBDD for f1 = x1x2 + x1x3 + x1x4 + x2x4
Figure 14. ROBDD for restrict(0,x4, B _{f} ) and restrict(1,x4,B _{f} )
The OBDD for ∃x4.f1(apply(+,restrict(0,x4, B _{f} ) and restrict(1, x4, B _{f} )) is shown in Figure 15.
......................................................................Figure
15. OBDD for ∃x4.f1
The OBDD for ∃x _{3} .x _{4} .f1 is also the same, because ∃.x _{4} .f1 is independent of x3 . The exists operation can be easily generalized to a sequence of exists operations ∃x1.∃x2 .................∃xn.f..
The Boolean quantifier ∀ is the dual of ∃,∀xf = f[0/x].f[1/x] .
3. Conclusions
In the lectures covered in this module till now we discussed ROBDDs with respect to Boolean functions. We know that Boolean functions can be directly represented using combinational digital circuits. So ROBDDs can be used for verification of combinational circuits. However most of the practical circuits are sequential ones. In the next lecture we will discuss ROBDDs for sequential circuits.