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Sarawak Campus

Assignment Cover Sheet


(for individual and group assignments)
This cover sheet is to be attached to all assignments, both hard copy and electronic format

ASSIGNMENT DETAILS
Unit Code EEE20001 Unit Title Digital Electronics Design
Tutorial/Lab Group Lab E2 Lecturer/Tutor Name Mr Joseph Liu
Assignment Title
Due date 04/08/2017 Date Received
DECLARATION
For both individual and group assignments, in the case of assignment submission on behalf of another student, it is assumed that permission has
been given. The University takes no responsibility for any loss, damage, theft, or alteration of the assignment.

To be completed if this is an individual assignment


I declare that this assignment is my individual work. I have not worked collaboratively, nor have I copied from any other student’s work or from any
other source/s, except where due acknowledgment is made explicitly in the text, nor has any part been written for me by another person.

Student Details Student ID Number Student Name Student Signature


Student 1
To be completed if this is a group assignment
We declare that this is a group assignment and that no part of this submission has been copied from any other student's work or from any other
source except where due acknowledgment is made explicitly in the text, nor has any part been written for us by another person.

Student Details Student ID Number(s) Student Name(s) Student Signature (s)


Student 1 4315707 Ngo Chun Hian
Student 2 100069496 Law Kim Yin
Student 3 100072818 Mohamed Ahmed Khaleel
Student 4
Student 5

MARKER’S COMMENTS

Total Mark Marker’s Signature Date


EXTENSION CERTIFICATE
This assignment has been given an extension by
Unit Convenor
Extended due Date Received
date

Version 4, 2 August 2016. Owner: The Academic Board, Sarawak.


This cover sheet is a live document available on the Swinburne Sarawak intranet; a print copy may not be the latest version
Swi nburne University of Technology
Faculty of Engineering, Computing and Sciences
EEE20001 Digital Electronics Design

Lab fi.Z - Basic Circuits


Lab Session Day Vlu y( ntq dta fime (a 3a . lL:20 y",^
1. Student Name: tl4 Student lD: +3t5107
2. Student Name: (71 I Student lD: lo" o [ 'l Lt al6
3. Student Name: Itl o ha me vt Al,*p ,tt khalt e 7
Student lD: t0oo 1z6l<
.ll,,l
To extend the student's understanding of basic digitai circuits by designing simple combination and
sequential circuits making use of MSI lCs.

This laboratory has a weighting of S% eif th* t*t*! subj*et marlcs. Assessment is based on
demonstration in the laboratory and correct completion of this lab sheet. The experiment is to be
completed in groups.

a.-,

The laboratory makes use of a prototyping board introduced in the previous lab. Please observe the
precautions outlined in the lab manual.

This laboratory uses 74HCAA,74HCA2,74HC74 & 74HC161 lCs, a photo-interrupter and 220R & 10K
resistors. A74HCL4 may be required for Part 1 extension. LC. Pin-outs are provided earlier in this
manual.

The lab is to be completed in one laboratory session so it is very important that preliminary work is
done before the laboratory. Faii*r* tc d* pr*lin:in*ry *u*rk moy nesq"*it l$ exe iclsi*n frs*v* ti:e
/
labctratary s*srisn ai'ld nm rn;lrkri

Read through the laboratory manual and ensure you are familiar with its contents.

Part 1: Fill in the expected values for the Q waveform. Design the circuit and draw the schematic
with Pin nqmbers.
Part 2: Fill in the expected waveform
Part 3: Design the required reload logic using the provided K-maps. Draw the circuit schematic WiJh
pin numbers. Design and wire up the counter circuit and confirm its operation.
Part 4: Compiete the Die table and K-maps. Draw the required circuit with pin numbers.

tlr*iinl $K

EEE20001 Digital Electronics Design Lab E2 Page 1 of 6


Swinburne University of Technology
Faculty of Engineering, Computing and Sciences
tEE20001 Digitat Electronics Design

Using two switches as inputs, investigate the operation of a 74HC74 D-type Flip-flop for the
following stimulus. To what logic ievel should the unused setfreset inputs (So, Ro) be tied so as to
not affeq! the circuit operation? J ; t ,!- {',t /t,

Nalt:
'ueg
5 'n,4"lL
C
+ a^,1
ri i2 + ?i,t I
l, t)ob &,1" &"r",tlgltl
tcqqt l,ilol
+o {u
teV -ft.9
il.eqel - ?i.t I
Schematic fbr Tamper Switch

A photo-interrupter circuit was introduced in the last laboratory. it is proposed to use this circuit as
a tamper detection circuit in a piece of equipment. Use this circuit and a D-type flip-flop to create a

circuit that will 'remernber' if the photo-interrupter has been disturbed i.e. it wiil be set by the
photo-interrupter and remain set until reset by a separate switch input. (Hint: it's a very simple
circuit!).

lf vou have time:

Borrow a second photo-interrupter from another group and wire two of them immediately next to
each other on the board so that the plastic strips available can go through both devices. The strips
with evenly spaced bands should be used.

Set up a dual channel DSO to simultaneously monitor the outputs from both photo-inlerrupters.

Move the strip left-to-right and then right-to-left and examine the relationship between the
waveforms from the two photo-interrupters. Use this information to design a circuit, using a sinele
D-FF, which will indicate the direction of travel of the strip on a LED i.e. on for one direction, off for
the other. (lt may be necessary to use a 74HClA.l

Demonstration0K
@rr^ oL l--a;ney(' t,. (
iE tY't 9oo"- e Aq a.v(rclartl yafi trn
vrho^ q- /t . /1. ie ynasc lt
rol,'^y l7
AtCo lo fht lafit^ sllo*n in /;a9*-,
purrnll y iL eLe95 il.a 7 - tl;p - 4lo p piqi rie .
vlx.* oL^J D int"? r,,44 P be I;,g ge< vt
bg el'clc Leh"t Jivi<3 ot.n o*lf.) 6."

EEE20001 Digital Electronics Design Lab E2 Page 2 of 6


tJ.]e'.
Swinburne University of Technology
Faculty of Engineering, Computing and Sciences
'iutr' hn,/l 'R!l- L'
a4 unnee *t"4
EEE20001 Digital Electronics Design ?i^ , q
+, t/c, , |er -fin
Ruet -Yin I

Draw the expected waveform for the circuit shown. What will be the frequency of the waveform at
xt L5 01, tt- I _ t/t,
Construct this circuit using a 74l1C74lC and confirm your predictions using an oscilloscope. q Vcc
1*G"l
l'l\ I - 4c
clk x
o \ , wtr*r
pr4
Set and reset connections not shown.

Dem0nstration OK Ynq th trt^re {nr- sbla; L"t/(


iq tt* '
$an L h1 'fu,t l*jeol t 4 ynau flo rv-,
anu( llA Pnqut",y iE t6o btt. $- fN oulp"L . ( .

... t: ,
,.,
,,.,,.,,

Parts 3 and 4 create an electronic Die that simulates the L to 6 roll of a conventional die. lt consists
of a modified counter that counts through the sequence 1 to 6 very quickiy while a button is
pressed. When the button is released the counter stops "rolling" at a number within the count
range. lf it is arranged for the eounter to count at a rate that is sufficiently fast, then the finalcount
on button release will be random^

The count from the counter is then decoded into suitable signals to drive 7 LEDs that have been
arranged in a Die pattern.

To ci:mple{e parts 3 and 4 it is necessary to design the circuit for the modified counter and the die
decoder.

c0
ooT
ss

EEE20001 Digital Electronics Design Lab E2 Page 3 of 6


Swinburne University of Tech nology
Faculty of Engineering, Computing and Sciences
8EE20001 Digital Electronics Design

Modify the sequence of a 74HC161 4-bit synchronous counter so that it counts up from L to 6. This
will require the use of the parallel load input to load a starting count of 1 (0001r) when the counter
reaches 6 (0110r). Note that the parallel load enable input is active low (PE*). lt is also synchronous
(happens on the same clock edge as the count) but is not controlled by the count enable inputs.
Which input(s) may be used to enable/disable the counting? Design the required combinatorial logic
circuit taking into account the manv don't-care situations.

I\.laie *"ii,:tin,r1 ihe ri*rk sigral iri nrt ,if t acc*pt*!-'1rl *p[irsfrcn,

Qo
QsQz
00 \\r
\Lo t
1
t, t; count 1-6

01 (4
I
l5 X, 0.
11 fr,, X. X,u Xo
10 r*
fr| e
YI
t/s f, Yl
/10

PE*= &,' + &, Block diagram.

=_ [s,.
S'*-;1
&")' (What other signals need to be connected? Check data
sheet.)

Construct ,*'.,r0.1,;fffi*k
for correct operation. Does your circuit produce a random number
covering the full range of 1--6? Does your circuit stop correctly at 6 when the run/stop* button is
low?
I

tlc, Jc. il"11: \


Qo10,r(",&, {t
>ek & {u als' ttnal clf I ]o LE ,.ror{*ft
'[c r/e I
Do conarcfl r{

0, A,
I , [&,,
P, 0l
gtu [&,0, ' ,'P
Ler A1
l0 Urt
,,,,1
h"i W, t. - trnr'rr,l t v[
t r! ,,

Schernatic fi /ith pin numbers

Do not dismantle this circuit, as it


Demonstration oK vAW
nr"-Ltn a^t will be required again for Part 5.
th*il0^ ["
kn', rkaSe o( t-t
&n,( qlr- f dA 6 tl.( n
EEE20001 Digital Electronics Design Lab E2 Page 4 of 6
ru^ (al"( bnll"^ is lo'
Swinburne U niversity of Technology
Faculty of Engineering, Computing and Sciences
88E20001. Digital Electronics Design

|'..ti .

you are provided with a Die Module having 7 LEDs arranged in a die pattern The table below
m
showshowthe4inputstothedieboard{A,B,CandD)controltheTLEDs. Fillintherestofthe
table with the required patterns to produce the usual 6 die rolls from combinations of the 4 patterns
available.

Design a decoder circuit that takes as 3-bit binary number as input and produces the 4-bit output to
drive the Die display, For example, the binary number 0112 shouid result in three LEDs being on as
shown in the table.

Binary Sie
l{umher CIisplay

4 possible light patterns available

Count
QzQrQ

1
tr
A

E]
B

0
r c

0
u
D

0
Die
Roll

a
00la
o
2
0 0 0 o
0102

o
3 a
0 0 I a
0112

4
t-
1002
0 0 I I lr--'
.J- oa
5 a
101r
I 0 I aa
5
tr.
L.
1102
0 I I loo

EEE20001 Digital Electronics Design Lab E2 Page 5 of 6


Swinburne University of Technology
Faculty of Engineering, Computing and Sciences
EEE20001 Digital Electronics Design

QzQt'
00

01

LL

1.0

0
s &r0. 0,' fr,
(ll
LED drive as described by the table. Draw the circuit with pin numbers. Construct the circuit and
check its operation using three switches as inputs.

8o q

u, t3

R,

rV ,D

Schernatic fwith nin numbers

Dema*sfration 0K hs , ltt ,
tiv noll pztfurn sbla; nt /l i I
+k- 1^, -, {|, tzfet*ou( oo( P, n

Part 5 An tln g nnn L


Combine the circuits of part 3 and 4 to produce an Electronic Die.

ha^ +n-fl" r-n fe"p


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