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The problem: Every parameter of a manufactured component or circuit has a t i it h TOLERANCE associated with it. Consider:
Customer specification Design Manufacture Test PASS Sell Profit
FAIL Scrap Rework
Is the yield acceptable? Could yield be improved? The design stage should include TOLERANCE g g ANALYSIS and SENSITIVITY ANALYSIS Example Design a potential divider with a voltage ratio of T = 0.1 ± 1% Design:
9 kΩ 1k Ω
Or i O using preferred values: f d l
8 .2 kΩ 820 Ω 1kΩ
1 = 0.0998... 10.02
Using standard metal-film resistors with ± 1% tolerance
1.01 Tmax = = 0.1016 1.01+ 8.118 + 0.8118 Tmin = 0.99 = 0.0980 0.99 + 8.282 + 0.8282
(+ 1.6%) (− 2.0%)
If a large number of these circuits is manufactured many will not satisfy the customer’s specification. ’ ifi i How many?
Possible distribution of manufactured circuits
% deviation from nominal
Total area corresponds to j t i it t reject circuits
% deviation from nominal
A number of circuits will fail - proportional to the total area arrowed. arrowed (Note that if the customer specification is ± 2% then all circuits should pass) The number of failures could be predicted, using integration, if the mathematical shape of the curve is known. Would it be better to choose R1 and /or R2 with 0.5% tolerance ? This would require more expensive components but fewer failures. TOLERANCE DESIGN i used to minimise is dt i i i the unwanted effects of component tolerances. •Is there some optimum choice of component tolerances which, though perhaps leading to which less than 100% yield, minimises the cost of acceptable circuits? •Is the yield particularly sensitive to the nominal Is value of any particular components? If so, 5 which ones?
PARAMETER SPACE A point in parameter space defines a unique circuit. If the values of the parameters p1 and p2 describing two components of a circuit are known, then the corresponding point C in parameter space with axes p1 and p2 represent the circuit. h i i
p2 Tolerance region RT C C represents a circuit p1
The tolerance region, RT, represents the bounds bo nds on all possible samples of a mass produced circuit.
REGION OF ACCEPTABILITY (RA) The customer s specification of a circuit customer’s performance transferred onto component parameter space defines a region of acceptability - RA.
Manufacturing yield corresponds to the overlap of RA and RT. If RT is not wholly within RA then yield is less than 100%. There are two obvious design improvements; 1. Use DESIGN CENTERING. Adjust the nominal values with fixed tolerances i l l ith fi d t l and / or 2. Use TOLERANCE ASSIGNMENT. Choose parameter tolerances to decrease the cost of pass circuits, or to achieve more pass circuits.
The practical problem is that we do not know in advance the exact locations of the points describing the manufactured circuits. This is because the component parameters are RANDOM VARIABLES. PARAMETER DISTRIBUTIONS Measured data produces HISTOGRAMS. p It is more convenient to analyse an infinite number of components with infinitesimally p small class intervals to produce a Probability Density Function (p.d.f) [Φ]
∫ Φ ( x )dx = 1
Manufacturing yield is usually dependent on the p.d.f.s of some or all components in a pdfs circuit.
Examples of p.d.f.s
φ(x) GAUSSIAN (NORMAL)
x φ(x) TRUNCATED GAUSSIAN
x φ(x) BIMODAL x
Worst case Worst-case analysis
Non-worst case analysis
Sampling methods Statistical
REGIONALIZATION / SIMPLICIAL APPROXIMATION
Worst-case analysis Try the extreme values of components within their tolerance range. h i l
Can be difficult to identify the worst-case component values
Example of worst-case analysis
Consider a parallel combination of 3 resistors R1 = 100Ω ± 1% R2 = 200Ω ± 2% R3 = 300Ω ± 5% Determine the nominal value of the equivalent , resistance, R. Use worst-case analysis to estimate the predicted tolerance in R. y yg Does worst-case analysis really give the worst-case?
R1R2 R3 = 54.5Ω R1 + R2 + R3
3 2 R2 R1 7
Nominal Node 1 Node 2 Node 3 Node 4 Node 5 Node 6 Node 7 Node 8
200 204 204 196 196 196 196 204 204
300 315 285 285 315 315 285 285 315
54.54 55.01 54.02 53.44 54.41 55.01 54.02 54.61 55.62
100 99 99 99 99 101 101 101 101
R = 54.5Ω ± 2% Note: 1. Worst-case response may not be at a vertex. 2. 2 Analysis is not expensive. expensive 3. Useful for circuit redesigns. 4. Useful for intermediate stages of design when it may not be possible to carry out tolerance t ay ot poss b e ca y to e a ce analysis for the entire circuit. 5. May be pessimistic if parameters are correlated.
Requires some knowledge of the statistical distribution of component values. Non-sampling method • METHOD OF MOMENTS • not uncommon - established technique • used in other engineering fields • based on a Taylor series representation of the performance functions • not valid for every circuit • suitable for evaluating the effect of component mismatch on performance variability i bili
Deterministic D t i i ti Sample points are selected in a regular method (a) Regionalization Perform a circuit analysis at points in RT. With this method it is easy to estimate yields for uncorrelated component parameter p.d.f.s eg
p2 RT p2 app o . approx. RA
- may be modified to account for non-uniform, correlated p.d.f.s - expensive in computer time since this increases with the power of the number of component parameters
(b) Simplicial approximation
- more successful than regionalization f l h i li i - involves approximation to the boundary of RA in the form of a polyhedron. Procedure: 1. Identify a pass circuit in RA 2. Search for the RA boundary by varying one parameter 3. Search for the RA boundary in the opposite direction 4. Search for the RA boundary from the initial pass circuit in the perpendicular direction by varying the other parameter parameter. The polygon (triangle) formed is the first approximation to RA. 5. Inscribe the largest possible circle in the polygon 6. Identify the longest side touching the circle this ill b th thi will be the poorest approximation to the t i ti t th boundary of RA 7. From the mid-point on this side and perpendicular to it in a direction away from the polygon interior a new search direction is defined to find another point on the boundary of RA
8. The original polygon approximation is now expanded (using spheres for multi-dimensions) Yield estimation: From a knowledge of Φ(p1) and Φ(p2) sample points are generated in RT (without performing any circuit analysis) [The polygon is called a SIMPLEX - hence “simplicial approximation”] Drawbacks: - RA must be convex - this method has limited value except for low-dimensional circuits. i i
(c) Statistical exploration The MONTE CARLO approach - The sample points in parameter space are generated in a pseudo-random manner t t di d d to simulate the actual manufacturing process - There is no need to approximate RA - This approach directly mimics the process of random component value selection (including correlations) by generating component values according to known p.d.f.s - Confidence in yields may be determined - Useful for medium / large circuits g - Produces a performance spread - Is dimensionally independent.
Monte Carlo statistical exploration of RT
o o o o o o o o o o o o o h hh h h h h
Say there are 20 “explorations” in RT (N) explorations giving 7 “pass” circuits (Np)
ˆ = Np The yield estimate is Y N
(assuming uniform p.d.f.s) and the RA boundary is not required. required For non-uniform p.d.f.s each sample is “weighted”. weighted .