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LED TV
SERVICE MANUAL
CHASSIS : LT55H

MODEL : 32LF550D 32LF550D-DA/ DD


CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL68606401 (1503-REV00) Printed in Korea


CONTENTS

CONTENTS ............................................................................................... 2

PRODUCT SAFETY .................................................................................. 3

SPECIFICATION........................................................................................ 6

ADJUSTMENT INSTRUCTION............................................................... 10

BLOCK DIAGRAM.................................................................................... 17

EXPLODED VIEW ................................................................................... 19

SCHEMATIC CIRCUIT DIAGRAM .............................................APPENDIX

TROUBLESHOOTING................................................................APPENDIX

Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed


metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.

Copyright © LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.

Fuse and Conventional Resistor


Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

Copyright © LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method


This spec sheet is applied all of the 32”, 39”, 42”, 47”, 50”, 55” 1) Performance: LGE TV test method followed
LED TV with LT55H chassis 2) Demanded other specification
- Safety : CE, IEC specification
- EMC: CE, IEC
2. Test condition
Each part is tested as below without special notice.

1) Temperature : 25 ºC ± 5 ºC, CST : 40 ºC±5 ºC


2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
Standard input voltage (100~240V@ 50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.

4. General Specification
No Item Specification Measurement Result Remark
1. Receiving System NTSC-M, PAL-M/N, DVB-T, DVB-T2 Colombia
(LF55/56/57/LF62 D/T)
NTSC-M, PAL-M/N DVB-T Taiwan / Panama
(LF55/56/620B,
LF55/56/57/6200
2. Available Channel LF55/56/62B, 1) VHF : 2~13 Paname / Taiwan
55/56/57/62 2) UHF : 14~69
(NTSC-M, PAL-M/N, 3) CATV : 1~125
DVB-T) 4) DTV : 2~69
LF55/56/57/62D/T 1) VHF : 2~13 Colombia
NTSC-M, PAL-M/N, 2) UHF : 14~69
DVB-T, DVB-T2 3) CATV : 1~125
Colombia only) 4) DTV : 2~69
3. Input Voltage 1) AC 100 ~ 240V 50/60Hz
4. Market Colombia / Panama / Taiwan
5. Screen Size 32 inch Wide (1366 × 768) 32LF550D/B-DA/DD
32LF565D/B-DE
32LF620D/B-DD
32 inch Wide (1920 × 1080) 32LF5600/565T-DE
39 inch Wide (1920 × 1080) 39LF5600/565T-DE
40 inch Wide (1920 × 1080) 40LF5700/570T-DA
42 inch Wide (1920 × 1080) 42LF6200/620T-DD
43 inch Wide (1920 × 1080) 43LF5700/570T-DA
43LF5400/540T-DA
49inch Wide (1920 × 1080) 49LF5500/550T-DD
49LF6200/620T-DD
49LF5400/540T-DA
50 inch Wide (1920 × 1080) 50LF5600/565T-DE
55 inch Wide (1920 × 1080) 55LF5600/565T-DE
55LF6200/620T-DD
60 inch Wide (1920*1080) 60LF5600/565T-DE

Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
No Item Specification Measurement Result Remark
6. Aspect Ratio 16:9
7. Tuning System FS
8. Module LC320DXE-MGA6 HD, 60Hz LGD 32LF550D/B-DA/DD
LC490DUE-MGA6 FHD, 60Hz LGD 49LF550T/5500-DD
LC320DXE-MGA4 HD, 60Hz LGD 32LF565D/B-DE
LC320DUE-MGA4 FHD, 60Hz LGD 32LF560T/5650-DE
LC550DUE-MGA4 FHD, 60Hz LGD 55LF560T/5650-DE
NC550DUE-VCCP2 CSOT
HC600DUF-VHHS4 FHD, 120Hz SHARP 60LF5600/565T-DE
HC400DUN-VCKN1 FHD, 60Hz INIX 40LF570T/5700-DA
LC430EUE-FHM1 FHD, 60Hz LGD 43LF570T/5700-DA
LC320DXE-MGP2 FHD, 120Hz LGD 32LF620D/B-DD
LC420DUE-MGP2 FHD, 60Hz LGD 42LF620T/6200-DD
LC490DUE-MGP2 FHD, 60Hz LGD 49LF620T/6200-DD
LC550DUE-MGP2 FHD, 60Hz LGD 55LF620T/6200-DD
NC430EUN-AACR1 FHD, 60Hz LGD 43LF540T/5400-DB
NC490EUN-AACR1 FHD, 60Hz LGD 49LF540T/5400-DB
LC500DUE-MGA4 FHD, 60Hz LGD 50LF5650-DE
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %

Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
5. External Input Support Format
5.1. Component input(Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
2. 720*480 15.73 60 13.5135 SDTV ,DVD 480I
3. 720*480 31.47 59.94 27.0 SDTV 480P
4. 720*480 31.50 60 27.027 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 28.125 50.00 74.250 HDTV 1080I
8. 1920*1080 33.75 60.00 74.25 HDTV 1080I
9. 1920*1080 33.72 59.94 74.176 HDTV 1080I
10. 1920*1080 56.250 50.00 148.50 HDTV 1080P
11. 1920*1080 67.500 60.00 148.50 HDTV 1080P
12. 1920*1080 67.432 59.939 148.352 HDTV 1080P
13. 1920*1080 27.000 24.000 74.25 HDTV 1080P
14. 1920*1080 26.97 23.976 74.176 HDTV 1080P
15. 1920*1080 33.75 30.000 74.25 HDTV 1080P
16. 1920*1080 33.71 29.97 74.176 HDTV 1080P

5.2. HDMI Input (PC/DTV)


*HDMI PC support only Rear HDMI Input
*If use DVI to HDMI cable for PC, you have to use external SPK for PC audio sound.

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed


PC DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80.00 VESA O
7 1360*768 47.712 60.015 85.50 VESA (WXGA) O
8 1280*1024(FHD Only) 63.981 60.02 108.00 VESA (SXGA) O
9 1920*1080(FHD Only) 67.5 60 148.5 HDTV 1080P O

Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
DTV
1 640 x 480 31.46 59.94 SDTV 480P
2 640 x 480 31.5 60.00 SDTV 480P
3 720*480 31.47 59.94 27.000 SDTV 480P
4 720*480 31.50 60.00 27.027 SDTV 480P
5 1280*720 37.50 50.00 74.25 HDTV 720P
6 1280*720 45.00 60.00 74.25 HDTV 720P
7 1280*720 44.96 59.94 74.176 HDTV 720P
8 1920*1080 28.12 50.00 74.25 HDTV 1080I
9 1920*1080 33.75 60.00 74.25 HDTV 1080I
10 1920*1080 33.72 59.94 74.176 HDTV 1080I
11 1920*1080 56.25 50.00 148.50 HDTV 1080P
12 1920*1080 67.5 60.00 148.50 HDTV 1080P
13 1920*1080 67.43 59.94 148.352 HDTV 1080P
14 1920*1080 27.00 24.00 74.25 HDTV 1080P
15 1920*1080 26.97 23.97 74.176 HDTV 1080P
16 1920*1080 33.75 30.00 74.25 HDTV 1080P
17 1920*1080 33.71 29.97 74.176 HDTV 1080P
※ HDMI Monitor Range Limits
Min Vertical Freq - 58 Hz
Max Vertical Freq - 62 Hz
Min Horiz. Freq - 30 kHz
Max Horiz. Freq - 83 kHz
Pixel Clock - 160 MHz

Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application 3. Main PCB check process
This spec sheet is applied all of the LED TV with LT55H * APC – After Manual-Insert, executing APC
chassis. * Boot file Download

(1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
2. Designation (2) Set as below, and then click “Auto Detect” and check “OK”
(1) T he adjustment is according to the order which is message.
designated and which must be followed, according to the I f “Error” is displayed, Check connection between

plan whic al Unit: Product Specification Standard. computer, jig, and set.
(2) Power adjustment : Free Voltage. (3) Click “Read” tab, and then load download file (XXXX.bin)
(3) Magnetic Field Condition: Nil. by clicking “Read”
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation: Above 5 Minutes (Heat Run). (1)
Temperature : at 25 ºC±5 ºC
Relative humidity : 65 ± 10%
Input voltage : 100~220V, 50/60Hz filexxx.bin
(6) A djustment equipments : Color Analyzer (CA-210 or
CA-110), SVC remote controller
(7) Push The “IN STOP KEY” – For memory initialization.

Case1 : Software version up


1) A fter downloading S/W by USB , TV set will reboot (4) C lick “Connect” tab. If “Can’t ” is displayed, Check
automatically connection between computer, jig, and set.
2) Push “In-stop” key
3) Push “Power on” key (2) (3)
4) Function inspection
5) After function inspection, Push “In-stop” key.

Case2 : Function check at the assembly line


1) When TV set is entering on the assembly line, Push
“In-stop” key at first.
2) Push “Power on” key for turning it on.
=> If you push “Power on” key, TV set will recover channel
information by itself.
3).After function inspection, Push “In-stop” key.

Please Check the Speed


To use speed between
from 200KHz to 400KHz

(5) Click “Auto” tab and set as below.


(6) Click “Run”.
(7) After downloading, check “OK” message.

(4)

filexxx.bin
(5)

(7)...........OK

(6)

Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
* USB DOWNLOAD(*.epk file download) * A fter downloading, have to adjust Tool
(1) Put the USB Stick to the USB socket. Option again.
(2) Automatically detecting update file in USB Stick. (1) Push "IN-START" key in service remote controller.
- If your downloaded program version in USB Stick is Low, (2) Select "Tool Option 1" and Push "OK" button.
it didn't work. But your downloaded version is High, USB (3) Punch in the number. (Each model has their number.)
data is automatically detecting (4) Completed selecting Tool option.
(3) Show the message "Copying files from memory"
Tool Tool Tool Tool Tool Tool
Model Module
option1 option2 option3 option4 option5 option6
43LF540T-DB LGD 462 1223 3904 36448 9218 273
49LF540T-DB LGD 460 1223 3904 36448 9218 273
32LF550D-DD LGD 32807 1126 4032 36448 13826 273
32LF565D-DE LGD 32775 3174 4032 36448 13826 273
55LF565T-DE LGD 32784
3174 4032 36448 13826 273
CSOT 39952
60LF565T-DE Sharp 11281 3174 4032 36448 12802 273
40LF570T-DA INX 34186 3174 4032 36448 12802 273
42LF620T-DD LGD 32875 3174 8128 52832 13826 353
(4) Updating is staring.
49LF620T-DD LGD 32878 3174 8128 52832 13826 353
55LF620T-DD LGD 32880 3174 8128 52832 13826 353
43LF5400-DA LGD 460 1223 3904 36384 9218 273
49LF5400-DA LGD 462 1223 3904 36384 9218 273
32LF565B-DE LGD 32775 3174 4032 36384 13826 273
50LF5650-DE LGD 32783 3174 4032 36384 13826 273
55LF5650-DE LGD 32784
3174 4032 36384 13826 273
CSOT 39952
60LF5650-DE Sharp 11281 3174 4032 36384 12802 273
40LF5700-DA INX 34186 3174 4032 36384 12802 273
43LF5700-DA LGD 33164 3174 3904 36384 13826 273

* RS-232C Connection Method


Connection : 
P CBA (USB Port) -> USB to Serial Adapter
(UC-232A) -> RS-232C cable -> PC(RS-232C port)
▪ Product name of USB to Serial Adapter is UC-232A.
※ Caution: LT55H chassis support only UC-232A driver. (only
use this one. )

(5) After updating is complete, The TV will restart automatically.


(6) If TV turns on, check your updated version and Tool option.
(refer to the next page about tool option)
* If downloading version is higher than your TV have, TV
can lost all channel data. In this case, you have to
channel recover. If all channel data is cleared, you didn't
have a DTV/ATV test on production line.

Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
4. Total Assembly line process ▪ Gumi Winter table(
January to February - Gumi production of prospective models all
4.1. Adjustment Preparation models except Cinema Screen
■ W/B Equipment condition Normal line (LF55/56/57/62)
CA210 : CH14, Test signal : Inner pattern (80IRE) – in case of
Cool Medium Warm
LED back light
■ Above 5 minutes H/run in the inner pattern. (“power on” key of H/R Time(Min) x y x x y x
adjust remote control) 271 270 286 289 313 329

► The spec of color temperature and coordinate 1 0-2 286 295 301 314 328 354

Model Mode Color Temp Color coordinate Remark 2 3-5 284 290 299 309 326 349

x = 0.271 (±0.002) 3 6-9 282 287 297 306 324 346


※ Test signal
Cool (C50) 13,000k
y = 0.270 (±0.002) - Inner pattern for W/B adjust 4 10-19 279 283 294 302 321 342
x = 0.286 (±0.002) - External white pattern 5 20-35 276 278 291 297 318 337
All Medium (0) 9,300k (80IRE, 204gray)
y = 0.289 (±0.002)
※ W/B luminance Spec 6 36-49 274 275 289 294 316 334
x = 0.313 (±0.002) Min 60↑
Warm (W50) 6,500k 7 50-79 273 272 288 291 315 331
y = 0.329 (±0.002) (Only 43/49LF54XX-XX)
8 80-119 272 271 287 290 314 330
► CA210 : CH 14, Test signal : Inner pattern (80IRE) 9 Over 120 271 270 286 289 313 329
- Standard color coordinate and temperature using CA-1000 (by
H/R time) ▪ INX, AUO, Sharp, CSOT (13000K Cool the SPEC)
cool med warm
▪ L15 LGD, INX Module
March to December & Global x y x y x y
Normal line (LF55/56/57/62) spec 271 270 286 289 313 329
Cool Medium Warm target 278 280 293 299 320 339
H/R Time(Min) x y x x y x
※ Connecting picture of the measuring instrument
271 270 286 289 313 329 (On Automatic control)
1 0-2 282 289 297 308 324 348 Inside PATTERN is used when W/B is controlled. Connect to
2 3-5 281 287 296 306 323 346 auto controller or push Adjustment R/C POWER-ON -> Enter
the mode of White-Balance, the pattern will come out.
3 6-9 279 284 294 303 321 343
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329

▪ Aging chamber line (LF55/56/57/62)


Cool Medium Warm
H/R Time(Min) x y x x y x
271 270 285 293 313 329
1 0-5 280 285 294 308 319 340
● Auto-control interface and directions
2 6-10 276 280 290 303 315 335 (1) Adjust in the place where the influx of light like floodlight
3 11-20 272 275 286 298 311 330 around is blocked. (Illumination is less than 10ux).
4 21-30 269 272 283 295 308 327
(2) Adhere closely the Color Analyzer ( CA210 ) to the module
less than 10cm distance, keep it with the surface of the
5 31-40 267 268 281 291 306 323 Module and Color Analyzer’s Prove vertically.(80~100°).
6 41-50 266 265 280 288 305 320 (3) Aging time
- After aging start, keep the power on (no suspension of
7 51-80 265 263 279 286 304 318
power supply) and heat-run over 5 minutes.
8 81-119 264 261 278 284 303 316 - Using ‘no signal’ or ‘full white pattern’ or the others, check
9 Over 120 264 260 278 283 303 315 the back light on.

Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
● Auto adjustment Map(RS-232C) (5) Adjust two modes (Medium / Warm) Fix the one of R/G/B gain
RS-232C COMMAND to 192 (default data) and decrease the others.
[ CMD ID DATA ] (6) A dj. is completed, Exit adjust mode using “EXIT” key on
Wb 00 00 White Balance Start Remote controller.
Wb 00 ff White Balance End
RS-232C COMMAND CENTER ▪ If internal pattern is not available, use RF input. In EZ Adj. menu
[CMD ID DATA] (DEFAULT) 8. White Balance, you can select one of 2 Test-pattern: ON,
MIN MAX
OFF. Default is inner (ON). By selecting OFF, you can adjust
Cool Mid Warm Cool Mid Warm using RF signal in 206 Gray pattern.
R Gain jg Ja jd 00 172 192 192 192
G Gain jh Jb je 00 172 192 192 192 ※ CASE Cool
First adjust the coordinate far away from the target value(x, y).
B Gain ji Jc jf 00 192 192 172 192 (1) x, y > target
R Cut 64 64 64 128 i) Decrease the R, G.
(2) x, y < target
G Cut 64 64 64 128
i) First decrease the B gain,
B Cut 64 64 64 128 ii) Decrease the one of the others.
(3) x > target , y< target
*Manual W/B process using adjusts Remote control.(TBD) i) First decrease B, so make y a little more than the target.
■ C olor analyzer(CA100+, CA210) should be used in the ii) Adjust x value by decreasing the R
calibrated ch by CS-1000 (4) x < target , y >target
■ Operate the zero-calibration of the CA100+ or CA-210, then i) First decrease B, so make x a little more than the target.
stick sensor to the module when adjusting. ii) Adjust x value by decreasing the G
■ After enter Service Mode by pushing “ADJ” key,
■Enter White Balance by pushing “►” key at “8. White Balance”. How to adjust
(1) If G gain is adjusted over 172 and R gain and B gain less
than 192 , Adjust is O.K.
(2) If G gain is less than 172 , increase G gain by up to 172,
and then increase R gain and B gain same amount of
increasing G gain.
(3) If R gain or B gain is over 255 , Readjust G gain less than
172, Conform to R gain is 255 or B gain is 255

※ CASE Medium / Warm


First adjust the coordinate far away from the target value(x, y).
(1) x, y > target
i) Decrease the R, G.
(2) x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
■ For manual adjustment, it is also possible by the following (3) x > target , y< target
sequence. i) First decrease B, so make y a little more than the target.
(1) Set TV in Adj. mode using POWER ON ii) Adjust x value by decreasing the R
(2) Zero Calibrate the probe of Color Analyzer, then place it on (4) x < target , y >target
the center of LCD module within 10cm of the surface i) First decrease B, so make x a little more than the target.
(3) P ress ADJ key -> EZ adjust using adj. R/C -> 8. White- ii) Adjust x value by decreasing the G
Balance then press the cursor to the right (KEY►). When
KEY(►) is pressed 206 Gray internal pattern will be ▪ After You finish all adjustments, Press “In-start” button and
displayed. compare Tool option and Area option value with its BOM, if it is
(4) Adjust Cool modes correctly same then unplug the AC cable. If it is not same, then
(i). F ix the one of R/G/B gain to 192 (default data) and correct it same with BOM and unplug AC cable. For correct it to
decrease the others the model’s module from factory JIG model.
(If G gain is adjusted over 172 and R and B gain less than
192, increase G gain to 192 and increase R gain and B gain ▪ P ush the “IN STOP KEY” after completing the function
same amount of increasing G gain.) inspection.
(ii). If G gain is less than 172,
Increase G gain by up to 172, and then increase R gain and
G gain same amount of increasing G gain.
(iii). If R gain or B gain is over 255,
Readjust G gain less than 172, Conform to R gain is 255 or
B gain is 255

Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
4.2. EDID DATA - HDMI1/2 (128)
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum

- Auto Download
■ After enter Service Mode by pushing “ADJ” key,
■ Enter EDID D/L mode. - HDMI1 (256)
■ Enter “START” by pushing “OK” key.

- HDMI2 (256)

※ Edid data and Model option download (RS232C)


NO Item CMD 1 CMD 2 Data 0 (2) FHD 2D EDID Data (LF55, LF56, LF57)
When transfer
Enter CheckSum(0xFF) Physical Address (0x1E)
Download the ‘Mode In’,
download A A 0 0 HDMI 1 40 / 25 10
‘Mode In’ Carry the com-
MODE
mand HDMI 2 40 / 15 20
Edid data Automatically
and Model download - HDMI1/2 (128)
Download A E 00 10
option (The use of a
download internal Data)

No. Item Condition Hex Data


1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03

● EDID DATA - HDMI1 (256)


(1) HD 2D EDID Data (LF54, LF550D/B, LF560D/B)
Before S/W version
CheckSum(0xFF) Physical Address (0x1E)
HDMI 1 74 / 5B 10
HDMI 2 74 / 4B 20

Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
- HDMI2 (256) - HDMI1 (256)

- HDMI2 (256)
(3) HD 3D DTS EDID Data (32LF62)
- Before S/W version 3.03.02
CheckSum(0xFF) Physical Address (0x1E)
HDMI 1 74 / 50 10
HDMI 2 74 / 40 20

- HDMI1/2 (128)

(5) FHD 2D 10Bit EDID Data (Only 60LF56)


CheckSum(0xFF) Physical Address (0x1E)
HDMI 1 40 / DE 10
HDMI 2 40 / CE 20

- HDMI1/2 (128)
- HDMI1 (256)

- HDMI1 (256)
- HDMI2 (256)

- HDMI2 (256)

(4) FHD 3D DTS EDID Data (42/49LF62)


CheckSum(0xFF) Physical Address (0x1E)
HDMI 1 40 / 1A 10
HDMI 2 40 / 0A 20
- HDMI1/2 (128)

Copyright © LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
4.5. Outgoing condition Configuration 5. 3D Function Test (Only LF62)
■ When pressing IN-STOP key by SVC remocon, Red LED (Pattern Generator MSHG-600, MSPG-6100 [SUPPORT
are blinked alternatively. And then automatically turn off. HDMI1.4])
(Must not AC power OFF during blinking) * HDMI mode NO. 872 , pattern No.83
1) Please input 3D test pattern like below (HDMI mode NO.
4.6. GND & Hi-pot test 872 , pattern No.83)
4.6.1. GND & HI-POT auto-check preparation
(1) Check the POWER CABLE and SIGNAL CABE insertion
condition

4.6.2. GND & HI-POT auto-check


(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto) 2) W hen 3D OSD appear automatically , then select OK
- If Test is failed, Buzzer operates. button.
- If Test is passed, GOOD Lamp on and move to next
process automatically.

4.6.3. Checkpoint
(1) Test voltage
① 3 Poles
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
② 2 Poles
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
① 3 Poles
- GND Test = POWER CORD GND and SIGNAL CABLE
GND.
- H i-pot Test = POWER CORD GND and LIVE &
NEUTRAL.
② 2 Poles 3) Don’t wear a 3D Glasses, Check the picture like below
- Hi-pot Test = Accessible Metal and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms

Copyright © LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
Copyright ©
IC1300
USB SIDE_USB_DM/DP SPI_SCK/SDI/SDO/CS
(JK700)
Serial Flash
USB1_OCP/CTL (8Mbit)
+5V_USB
TPS65282 AVDD5V_MHL,MHL_OCP IC104
SIDE 5V_HDMI_4 I2C_SCL/SDA
System EEPROM

Only for training and service purposes


CK+/-, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC (256Kbit)
HDMI2(MHL)
(JK801) MHL_CD_SENSE

Headphone HP_L/ROUT, SIDE_HP_MUTE


(JK3000)
NAND FLASH
IC102 (1Gbit) X-tal
H27U1G8F2CTR-BC 24M
PCM_A[0:7]

LG Electronics. Inc. All rights reserved.


TC74LCX244FT
Buffer Only for M1A-128MB

PCM_A[8:14] IC1201
PCM_DATA[0:7]
B-MDQL[0-7], B-MDQU[0-7],…

CI Slot(P1900)
TS_DATA[0:7] DDR3 SDRAM
Main SOC (1Gbit)
FE_TS_DATA[0:7] M1A -256MB

- 17 -
(IC101) AUD_MASTER_CLK,
LNB_TX
AUD_LRCH, SPK_L
LNB_OUT, DEMOD_RESET AUD_LRCK, AUD_SCK
TAS5733
DEMOD_SCL/SDA
AMP_SCL/SDA (IC5600)
IF_N/P
1. Lownd 60Hz Block Diagram(M1A, 10W@6Ω)

SPK_R
TU_SCL / SDA
F/NIM IF_AGC
BLOCK DIAGRAM

KEY1/2, LED_R, IR
Connector
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2 (P4600)
HDMI1
(JK800) DDC_SCL/SDA_2, HDMI_CEC
SPDIF(Optic) SPDIF_OUT (P1800 or P1100)
(P1801 or P1101)
(JK1001)
LAN EPHY RXA0+/-~RXA4+/-, RXACK+/-
(JK2100) RXB0+/-~RXB4+/-, RXBCK+/-
REAR
SC1/AV2_CVBS_IN, SC1_R+/G+/B+, COM1_Y+/Pb+/Pr+
F-SCART
(JK2801) DTV/MNT_OUT, DTV/MNT_L/R_OUT
OR AV2_CVBS_IN
AV2
AV2_L/R_IN
30P HD LVDS wafer

51P FHD LVDS wafer

COMPONENT COMP2_Y+/AV_CVBS_IN, COMP2_Pb+/Pr+


(JK2802)
COMP2_L/R_IN

LGE Internal Use Only


Copyright ©
IC1300
SIDE_USB_DM/DP SPI_SCK/SDI/SDO/CS Serial Flash
USB
(JK700) (8Mbit)
USB1_OCP/CTL
+5V_USB IC104
TPS65282
I2C_SCL/SDA
SIDE 5V_HDMI_4 System EEPROM
(256Kbit)

Only for training and service purposes


CK+/-, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC
HDMI2(MHL)
(JK801) MHL_CD_SENSE

Headphone HP_L/ROUT, SIDE_HP_MUTE


(JK3000)
X-tal
NAND FLASH
24M
IC102 (1Gbit)
H27U1G8F2CTR-BC
PCM_A[0:7]

LG Electronics. Inc. All rights reserved.


TC74LCX244FT
Only for M1A-128MB
Buffer
PCM_A[8:14] IC1201
PCM_DATA[0:7]
B-MDQL[0-7], B-MDQU[0-7],…

CI Slot(P1900)
TS_DATA[0:7] Main SOC DDR3 SDRAM
(1Gbit)
M1A -256MB
FE_TS_DATA[0:7]
(IC101) AUD_MASTER_CLK,

- 18 -
LNB_TX AUD_LRCH, SPK_L
AUD_LRCK, AUD_SCK
LNB_OUT, DEMOD_RESET TAS5733
DEMOD_SCL/SDA AMP_SCL/SDA (IC5600)
IF_N/P SPK_R
TU_SCL / SDA
F/NIM IF_AGC KEY1/2, LED_R, IR
Connector
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2 (P4600)
HDMI1
(JK800) DDC_SCL/SDA_2, HDMI_CEC (P1100)
SPDIF_OUT (P1101)
SPDIF(Optic) 120Hz : URSA8
(JK1001)
LAN EPHY
2. Lowend 120Hz Block Diagram(M1A+URSA8, 10W@6Ω)

REAR (JK2100)
RXA0+/-~RXA4+/-, RXACK+/-
SC1/AV2_CVBS_IN, SC1_R+/G+/B+, COM1_Y+/Pb+/Pr+ RXB0+/-~RXB4+/-, RXBCK+/- LGE7438
F-SCART
(IC6101)
(JK2801) DTV/MNT_OUT, DTV/MNT_L/R_OUT
OR URSA8
AV2_CVBS_IN
AV2
AV2_L/R_IN
30P HD LVDS wafer

51P FHD LVDS wafer

COMPONENT COMP2_Y+/AV_CVBS_IN, COMP2_Pb+/Pr+


(JK2802)
COMP2_L/R_IN

LGE Internal Use Only


EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

502
400
521

120
410

900
540
530
LV1

121

Set + Stand
A10
A2
200

Copyright © LG Electronics. Inc. All rights reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
TP for NON-EU models(except EU and China)

TP for CI slot TP for SCART TP for Headphone


/PCM_REG PCM_D[0] PCM_A[8] CI_TS_CLK SCART1_MUTE HP_LOUT

/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT

/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE

/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] HP_DET

/PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT

/PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout

/PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout

/PCM_CD PCM_D[7] CI_TS_DATA[4]

/PCM_WAIT CI_TS_DATA[5] SC1_R+/COMP1_Pr+


TP for L15
PCM_RST CI_TS_DATA[6] SC1_G+/COMP1_Y+ /VBUS_EN

PCM_5V_CTL CI_TS_DATA[7] SC1_B+/COMP1_Pb+ RGB_DDC_SCL

/CI_DET SC1/COMP1_DET RGB_DDC_SDA

SC1/COMP1_L_IN TU_GND_A

SC1/COMP1_R_IN

TP for S2 TP for FE_TS_DATA

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L15_M1A 140702
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TP_NON_EU 3

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
POWER

FROM POWER B/D 13.2V +13.2V POWER_DET +13.2V to PANEL_VCC +3.5V_ST to +3.3V_Normal
FET_AOS
TR_KEC R435 Q406-*1
+13.2V +3.5V_ST +13.2V PANEL_VCC
Q401-*1 100K AO3435
2N3906S-RTK

D
+3.5V_ST RESET_IC_KEC OPT
E

TR_NXP R430 IC401 R438


Q401 14K KIC7529M2 4.7K L408
1% +3.5V_ST +3.3V_Normal
MMBT3906(NXP) UBW2012-121F Q405

G
B

R454 SSM3J332R
100 120OHM
VCC 3 2 OUT

D
POWER_DET

S
1 3 OPT FET_TOSHIBA
TR_KEC C415 R431 1 OPT NON_60_SHARP Q406
R412 5.6K C422 R445 C427 R451 R452 L410
Q400-*1 R406 2 33K 0.1uF 1% GND 0.1uF C425 5.6K 5.6K SSM3J332R
33K 0.22uF BLM18PG121SN1D

G
2N3904S 10K 25V 16V 0.1uF
25V

D
+3.5V_ST C 25V

S
R404
B 4.7K POWER_DET_RESET 60_SHARP
R446 C427-*1
OPT C428 C429 C430

G
IC401-*1 120K 0.1uF R443 R447 ZD402
R400 TR_NXP 2.2uF 0.1uF 22uF
10K E C Q400 50V 10K 22K 5V
R402 RESET_IC_DIODES 10V 16V 10V
10K B MMBT3904(NXP) APX803E29 R442 C C TVS_SEMTECH
TR_NXP TR_KEC
RL_ON P401 10K B Q403
SMAW200-H12S5K(BK)(LTR) VCC 3 2 RESET PANEL_CTL B Q403-*1
PWM1 MMBT3904(NXP)
R401 OPT 2N3904S
E
10K R467 +13.2V A13.2V 1 R441 R448 TVS_KEC
E E
1K GND 10K 2.2K ZD402-*1
PWR_ON 1 2 PDIM#2
+3.3V_Normal TVS_SEMTECH GND 3 4 D13.2V C
L403 C
ZD404 D13.2V D13.2V MLB-201209-0120P-N2 R444 TR_NXP TR_KEC
5V 5 6 10K B Q404
+3.5V_ST A13.2V A13.2V OPT POWER_ON/OFF_1 B Q404-*1
R420 7 8 C402 MMBT3904(NXP) 2N3904S
GND GND OPT 0.1uF C433
1K R419 9 10 4.7uF
100 L414 25V E E
R426 DRV_ON 11 12 PDIM#1 50V
L415
10K R425 C TVS_KEC MLB-201209-0120P-N2
10K TR_NXP
INV_CTL B Q402 ZD404-*1 13
PWM_DIM C446
MMBT3904(NXP) 0.1uF
TR_KEC E R424 25V
Q402-*1 3.9K
2N3904S
C
B

+13.2V to +3.5V_STANDBY +3.5V_Normal to +1.5V_DDR

+13.2V +3.5V_ST
+3.3V_Normal +1.5V_DDR +5V_Normal & +1.10V_VDDC
L409 IC404 L411
AZ1117EH-ADJTRG1 CB2012PK501T
BLM18PG121SN1D
L412
BLM18PG121SN1D IN OUT
ADJ/GND
C426 R449 R453 ZD403 OPT
10uF 1K R1 0 2.5V ZD406
10V 1/16W
C438 C439 1% 5.1v
10uF 0.1uF C431
10uF
25V 25V
IC405 TVS_SEMTECH
ZD405
1.3A R450
200 R2
10V
Vout=0.6(R1/R2)+0.6
1/16W
BD9D321EFJ [EP] 5V 1%
+1.10V_VDDC
R1 R470 +13.2V
10K L405
R468
6.8K
R469
68K
EN
1 8
VIN
C443 TVS_KEC
Vout=1.25*(1+R2/R1)+Iadj*R2 4.7uH
THERMAL

1/16W 1/16W 0.1uF


16V ZD405-*1
1% 1% FB BOOT R1 OPT
9

0.047uF
2 7 OPT
C411 OPT C412 C413 C414

25V
L404 R411
L413 82pF ZD407 ZD401 10uF 22uF 22uF

C410
C440 4.7K 5.1v
2uH CB2012PK501T 50V 2.5V 6.3V 10V 10V
100pF VREG SW 1%
50V 3 6
C405 C406 R2
C444 C445 C407
SS GND 10uF 10uF 1uF

R471
R2
C441 C442
4
3A 5 22uF
10V
22uF
10V
25V 25V

OPT
10V R413
5.1K
1%
22K 1uF 2200pF

PGND1
1/16W 10V 50V C408 C416
+3.3V_Normal

[EP]

VIN1

BST1
+3.3V_Normal 22pF

SS1

V7V

LX1
1% 2200pF 50V
50V
C417
OPT

24

23

22

21

20

19
R414 3300pF
R403 R405 SS2 COMP1 10K 50V R415
Vout=0.765*(1+R1/R2) 10K 10K C409
2200pF
1
THERMAL
18 0
5%
50V EN1 25
FB1
2 17
EN2 AGND R416
5.1K
R2
R409 3 IC400 16 R422
91K ROSC/SYNC RSET 15K 1%
OPT OPT OPT OPT SNXXXXX
C403 R473 C404 R474 4 15
4700pF 30K 4700pF 30K +3.3V_Normal SW_EN FB2
5 14 C419
50V 50V OPT 22pF
R407 NFAULT COMP2 50V
R417
4.7K 6 13 C418
39K

10

11

12
C420 47pF
1%

9
R418 3300pF 50V
USB1_CTL 20K 50V
+5V_Normal

SW_OUT

SW_IN

VIN2

PGND2

LX2

BST2
USB1_CTL_Pull_Down R1 +5V_Normal
R472
Check the pull down 3.3K
R408 C421 L406
when AC Power On with HDD 0.047uF 4.7uH
100K 25V
USB1_OCD
C423 C424
22uF 22uF
+5V_Normal 16V 16V

+5V_USB

C432
1uF
16V
Vout=0.6(R1/R2)+0.6

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA 140826
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 4

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
HDMI (REAR 1 / SIDE 1 MHL)
HDMI_1 HDMI_2 MHL
5V_HDMI_4 5V_DET_HDMI_4
HDMI-2
5V_HDMI_2 5V_DET_HDMI_2 R814
33
R808 HPD4
10K
ESD_HDMI2 ESD_HDMI2
C VA805
TR_KEC VA808
GND
SHIELD R803
1K Q800-*1 B GND
C 2N3904S R809 HDMI-2
20 TR_NXP
10K R815 100
Q800 B E 20 DDC_SDA_4
HP_DET MMBT3904(NXP) HPD2
R802 19 HP_DET R816 100
19 DDC_SCL_4
5V 1.8K ESD_HDMI1 E R810 100 HDMI-2
DDC_SDA_2 5V
18 VA802 18 ESD_HDMI2 ESD_HDMI2
GND R805 R811 100 HDMI-2 VA809 VA810
DDC_SCL_2 GND HDMI-2
17 3.3K 17 R812
DDC_DATA VA800 ESD_HDMI1 ESD_HDMI1 1.8K R813
VA803 VA804 16 DDC_DATA 3.3K
16 ESD_HDMI1_VARISTOR
DDC_CLK
15 DDC_CLK HDMI_CEC
15
NC
HDMI_ARC 14 NC ESD_HDMI2
14
CE_REMOTE HDMI_CEC VA811
13 CE_REMOTE
13
EAG59023302

EAG62611204
CK-
AR801 D803 12 CK-
12
5.1 1 10 D805 AR804
CK_GND CK-_HDMI2
11 CK_GND 1 10 5.1
11 CK-_HDMI4
CK+ 2 9
10 CK+_HDMI2
10
CK+ 2 9
CK+_HDMI4
D0- 3 8
9
9
D0- 3 8
D0_GND 4 7
8 D0-_HDMI2
8
D0_GND 4 7
D0-_HDMI4
D0+ 5 6
7 D0+_HDMI2
7
D0+ 5 6
D1- D0+_HDMI4
6 AR802 ESD_HDMI1_TMDS D1-
6 ESD_HDMI2_TMDS
D1_GND 5.1 IP4294CZ10-TBR
5 D1_GND IP4294CZ10-TBR
5
D1+ D804
4 D1+ D806
1 10 D1-_HDMI2 4
3
D2-
D2-
1 10 AR803
2 9 D1+_HDMI2 3 5.1
D1-_HDMI4
2
D2_GND
D2_GND
2 9
3 8 2 D1+_HDMI4
1
D2+
D2+
3 8
4 7 D2-_HDMI2 1
ESD_HDMI1_VARISTOR 4 7
VA801 5 6 D2+_HDMI2 HDMI-2
D2-_HDMI4
ESD_HDMI2 5 6
JK800 D2+_HDMI4
JK801 VA806
ESD_HDMI1_CAP ESD_HDMI1_TMDS
VA800-*1 ESD_HDMI2_TMDS
1uF IP4294CZ10-TBR BODY_SHIELD

HDMI-2_MHL
10V R818 IP4294CZ10-TBR
20
0
19

ESD_HDMI1_CAP 18
HOT_PLUG_DETECT
MHL_CD_SENSE
This GND Pattern should be very narrow VA801-*1 17
VDD[+5V]

DDC/CEC_GND

HDMI jack burnt problem improvement 16


SDA
This GND Pattern should be very narrow HDMI-2_MHL HDMI-2_MHL
1uF 15

HDMI jack burnt problem improvement OPT C800


14
SCL
HDMI-2_MHL_Non R817
10V 13
RESERVED

CEC
VA807 R819 0.047uF
12
TMDS_CLK-
5.6V 25V 300K
11
TMDS_CLK_SHIELD 0
10

9
TMDS_CLK+

TMDS_DATA0-
MHL Spec
8
TMDS_DATA0_SHIELD
7
TMDS_DATA0+
6

5
TMDS_DATA1-

TMDS_DATA1_SHIELD
HDMI-2_MHL_Non
4
TMDS_DATA1+ R817-*1
3

2
TMDS_DATA2- 3.3K
TMDS_DATA2_SHIELD
1
TMDS_DATA2+

JK801-*1
DAADR019A

HDMI-2_EMI_FOOSUNG

CEC R804
100
HDMI_CEC CEC_REMOTE_S7

HDMI_DIODE_SUZHOU HDMI_DIODE_SUZHOU HDMI_DIODE_SUZHOU


D800-*1 D801-*1 D802-*1
MMBD6100 MMBD6100 MMBD6100
A1

A2

A1

A2

A1

A2
C

5V_HDMI_4 +5V_Normal
5V_HDMI_2 +5V_Normal +3.5V_ST
A1

A2

A1

A2

HDMI_DIODE_KEC
A1

A2

HDMI_DIODE_KEC HDMI_DIODE_KEC
KDS184 KDS184
KDS184 D801 D802
D800
C

C
C

R800 R801 R806 R807


2.7K 2.7K
2.7K 2.7K
DDC_SDA_2 DDC_SDA_4

DDC_SCL_2 DDC_SCL_4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L15_M1A 140813
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
HDMI_R1S1 8
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
SPDIF
SPDIF_OPTIC
+3.3V_Normal JK1001
JST1223-001
1

Fiber Optic
GND
2

VCC
3

SPDIF_OUT
VINPUT
4

SPDIF_OPTIC
OPT C1002
C1001 18pF FIX_POLE
1uF 50V
10V

ESD Ready

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 2014/06/02
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SPDIF 10

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
+1.5V_DDR +1.5V_DDR +1.5V_DDR +1.5V_DDR
CLose to DDR3 CLose to MAIN IC Option : Ripple Check !!!
DDR_EXT DDR_EXT
R1201 R1204
1K 1K
1% 1%
A-MVREFDQ A-MVREFCA

DDR_EXT DDR_EXT DDR_EXT DDR_EXT DDR_EXT DDR_EXT OPT OPT OPT OPT OPT OPT OPT OPT OPT
R1202 C1201 C1202 R1205 C1213 C1214 C1216 C1217 C1218 C1219 C1220 C1221 C1222 C1223 C1224
1K 0.1uF 1000pF 1K 0.1uF 1000pF 10uF 0.1uF 0.1uF 1uF 1uF 1uF 1uF 1uF 0.1uF
1% 1% 10V

DDR_1600_1G_SS M1A_256M_UO4
IC1201 IC101 M1A_128M_UO4
IC101-*1
K4B1G1646G-BCK0 LGE2134(256M) LGE2133(128M)

EAN61836301 E11
B_DDR3_A[0]
M8 N3 E11 F12
A-MVREFCA VREFCA A0 A-MA0 A-MA0 B_DDR3_A[0] D10
B_DDR3_A[1]
DDR_1600_1G_NAN DDR_1600_2G_SS DDR_1600_2G_SK P7 F12 B_DDR3_A[2]
A1 A-MA1 A-MA1 B_DDR3_A[1] B10
IC1201-*1 IC1201-*2 IC1201-*3 P3 D10 E15
B_DDR3_A[3]
A2 A-MA2 A-MA2 B_DDR3_A[2] B_DDR3_A[4]
NT5CB64M16FP-DH K4B2G1646Q-BCK0 H5TQ2G63FFR-PBC H1 N2 B10 B11
B_DDR3_A[5]
EAN61859502 EAN61848803 EAN61829204
A-MVREFDQ VREFDQ A3 A-MA3 A-MA3 B_DDR3_A[3] F14
DDR_EXT P8 E15 C11
B_DDR3_A[6]
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8
A4 A-MA4 A-MA4 B_DDR3_A[4] B_DDR3_A[7]
P7
A1
P7
A1
P7
A1 R1203 P2 B11 D14
A-MA5 A-MA5 B_DDR3_A[8]
P3
A2
P3
A2
P3
A2 240 1% A5 B_DDR3_A[5] A12
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1
+1.5V_DDR L8 R8 F14 F16
B_DDR3_A[9]
P8
A4
P8
A4
P8
A4 ZQ A6 A-MA6 A-MA6 B_DDR3_A[6] B_DDR3_A[10]
P2
A5
P2
A5
P2
A5 R2 C11 D13
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8
A7 A-MA7 A-MA7 B_DDR3_A[7] D15
B_DDR3_A[11]
R2
A7
R2
A7
R2
A7 T8 D14 B_DDR3_A[12]
T8
A8
T8
A8
T8
A8 A8 A-MA8 A-MA8 B_DDR3_A[8] C12
R3 B2 R3 B2 R3 B2 B2 R3 A12 B_DDR3_A[13]
A9 VDD_1 A9 VDD_1 A9 VDD_1 E13
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9
VDD_1 A9 A-MA9 A-MA9 B_DDR3_A[9] B_DDR3_A[14]
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7
DDR_EXT C1203 10uF 10V D9 L7 F16
N7
A12 VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2
VDD_2 A10/AP A-MA10 A-MA10 B_DDR3_A[10] A9
T3
NC_6 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8
DDR_EXT C1204 0.1uF G7 R7 D13 D16
B_DDR3_BA[0]
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_3 A11 A-MA11 A-MA11 B_DDR3_A[11] B_DDR3_BA[1]
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9
DDR_EXT C1205 0.1uF K2 N7 D15 A10
A-MA12 A-MA12 B_DDR3_BA[2]
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_4 A12/BC B_DDR3_A[12]
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9
DDR_EXT C1206 0.1uF K8 T3 C12 C13
N8
BA1
N8
BA1
N8
BA1 VDD_5 A13 A-MA13 A-MA13 B_DDR3_A[13] B_DDR3_MCLK
M3
BA2
M3
BA2
M3
BA2 DDR_EXT C1207 0.1uF N1 E13 B13
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDD_6 A-MA14 B_DDR3_A[14] E17
B_DDR3_MCLKZ
J7 A8 J7 A8 J7 A8
C1208 0.1uF N9 M7 B_DDR3_MCLKE
K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1 DDR_EXT VDD_7 NC_5
CK VDDQ_3 CK VDDQ_3 CK VDDQ_3
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9
DDR_EXT C1209 0.1uF R1 A9 B8
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDD_8 A-MBA0 B_DDR3_BA[0] B_DDR3_ODT
L2 E9 L2 E9 L2 E9 R9 M2 D16 C8
CS VDDQ_6 CS VDDQ_6 CS VDDQ_6
DDR_EXT C1210 0.1uF A-MBA0 A-MBA1 B_DDR3_RASZ
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1
VDD_9 BA0 A-MCK B_DDR3_BA[1] B9
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2
DDR_EXT C1211 0.1uF N8 DDR_EXT A10 D11
B_DDR3_CASZ
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9
BA1 A-MBA1 DDR_EXT A-MBA2 B_DDR3_BA[2] B_DDR3_WEZ
L3
WE
L3
WE
L3
WE
DDR_EXT C1212 0.1uF M3 R1207 C1215
NC_1
J1
NC_1
J1
NC_1
J1
BA2 A-MBA2 0.01uF F10
T2
RESET NC_2
J9 T2
RESET NC_2
J9 T2
RESET NC_2
J9 A1 56 C13 B_RESET
NC_3
L1
NC_3
L1
NC_3
L1
VDDQ_1 1% 50V A-MCK B_DDR3_MCLK
NC_4
L9
NC_4
L9
NC_4
L9 A8 J7 B13 D12
F3
DQSL NC_7
T7 F3
DQSL NC_6
T7 F3
DQSL NC_6
T7
VDDQ_2 CK A-MCKB B_DDR3_MCLKZ B_DDR3_CS0
G3
DQSL
G3
DQSL
G3
DQSL C1 K7 DDR_EXT E17
VDDQ_3 CK R1208 A-MCKE B_DDR3_MCLKE A19
C7 A9 C7 A9 C7 A9 C9 K9 B_DDR3_DQSL
DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 B18
B7
DQSU VSS_2
B3 B7
DQSU VSS_2
B3 B7
DQSU VSS_2
B3
VDDQ_4 CKE A-MCKE 56 B_DDR3_DQSU
VSS_3
E1
VSS_3
E1
VSS_3
E1 D2 1% B8
E7
DML VSS_4
G8 E7
DML VSS_4
G8 E7
DML VSS_4
G8
VDDQ_5 A-MCKB A-MODT B_DDR3_ODT C16
D3
DMU VSS_5
J2 D3
DMU VSS_5
J2 D3
DMU VSS_5
J2 E9 L2 C8 D21
B_DDR3_DQML
VSS_6
J8
VSS_6
J8
VSS_6
J8
VDDQ_6 CS A/B_DDR3_CS A-MRASB B_DDR3_RASZ B_DDR3_DQMU
E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 F1 K1 B9
F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9
VDDQ_7 ODT A-MODT +1.5V_DDR A-MCASB B_DDR3_CASZ C18
F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 H2 J3 D11 B_DDR3_DQSBL
A-MRASB A-MWEB C17
F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9
VDDQ_8 RAS B_DDR3_WEZ B_DDR3_DQSBU
H3 T1 H3 T1 H3 T1 H9 K3
H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9
VDDQ_9 CAS A-MCASB DDR_EXT
DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 A20
G2
DQL6
G2
DQL6
G2
DQL6
L3 R1206 F10 B_DDR3_DQL[0]
H7
DQL7
H7
DQL7
H7
DQL7 WE A-MWEB 10K A-MRESETB B_RESET A16
B1 B1 B1 J1 B_DDR3_DQL[1]
VSSQ_1 VSSQ_1 VSSQ_1 C19
D7 B9 D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 NC_1 C15
B_DDR3_DQL[2]
C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 J9 T2 D12 B_DDR3_DQL[3]
C8
DQU2 VSSQ_4
D8 C8
DQU2 VSSQ_4
D8 C8
DQU2 VSSQ_4
D8
NC_2 RESET A-MRESETB A/B_DDR3_CS B_DDR3_CS0 C20
C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2 L1 C14
B_DDR3_DQL[4]
A7 E8 A7 E8 A7 E8
DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 NC_3 B_DDR3_DQL[5]
A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 L9 A19 B21
A-MDQSL B_DDR3_DQL[6]
B8
DQU6 VSSQ_8
G1 B8
DQU6 VSSQ_8
G1 B8
DQU6 VSSQ_8
G1
NC_4 B_DDR3_DQSL B15
A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 T7 F3 B18 B_DDR3_DQL[7]
A-MA14 A-MDQSL A-MDQSU F18
NC_6 DQSL B_DDR3_DQSU B_DDR3_DQU[0]
G3 D19
DQSL A-MDQSLB D17
B_DDR3_DQU[1]
C16 B_DDR3_DQU[2]
A-MDML B_DDR3_DQML E21
A9 C7 D21 B_DDR3_DQU[3]
E19
VSS_1 DQSU A-MDQSU A-MDMU B_DDR3_DQMU B_DDR3_DQU[4]
B3 B7 D20
B_DDR3_DQU[5]
VSS_2 DQSU A-MDQSUB D18
E1 C18 F20
B_DDR3_DQU[6]
VSS_3 A-MDQSLB B_DDR3_DQSBL B_DDR3_DQU[7]
G8 E7 C17
VSS_4 DML A-MDML A-MDQSUB B_DDR3_DQSBU E9
J2 D3 ZQ
VSS_5 DMU A-MDMU
J8 A20
VSS_6 A-MDQL0 B_DDR3_DQL[0]
M1 E3 A16
VSS_7 DQL0 A-MDQL0 A-MDQL1 B_DDR3_DQL[1]
M9 F7 C19
VSS_8 DQL1 A-MDQL1 A-MDQL2 B_DDR3_DQL[2]
P1 F2 C15
VSS_9 DQL2 A-MDQL2 A-MDQL3 B_DDR3_DQL[3]
P9 F8 C20
VSS_10 DQL3 A-MDQL3 A-MDQL4 B_DDR3_DQL[4]
T1 H3 C14
VSS_11 DQL4 A-MDQL4 A-MDQL5 B_DDR3_DQL[5]
T9 H8 B21
VSS_12 DQL5 A-MDQL5 A-MDQL6 B_DDR3_DQL[6]
G2 B15
DQL6 A-MDQL6 A-MDQL7 B_DDR3_DQL[7]
H7 F18
DQL7 A-MDQL7 A-MDQU0 B_DDR3_DQU[0]
B1 D19
VSSQ_1 A-MDQU1 B_DDR3_DQU[1]
B9 D7 D17
VSSQ_2 DQU0 A-MDQU0 A-MDQU2 B_DDR3_DQU[2]
D1 C3 E21
VSSQ_3 DQU1 A-MDQU1 A-MDQU3 B_DDR3_DQU[3]
D8 C8 E19
VSSQ_4 DQU2 A-MDQU2 A-MDQU4 B_DDR3_DQU[4]
E2 C2 D20
VSSQ_5 DQU3 A-MDQU3 A-MDQU5 B_DDR3_DQU[5]
E8 A7 D18
VSSQ_6 DQU4 A-MDQU4 A-MDQU6 B_DDR3_DQU[6]
F9 A2 F20
VSSQ_7 DQU5 A-MDQU5 A-MDQU7 B_DDR3_DQU[7]
G1 B8
VSSQ_8 DQU6 A-MDQU6
G9 A3 E9
VSSQ_9 DQU7 A-MDQU7 ZQ
R1209
240
1%

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 2014/06/13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR 12

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
Serial Flash for SPI boot

+3.5V_ST +3.5V_ST

SPI_FLASH_MACRONIX
OPT IC1300
R1301 MX25L8035EM2I-10G
4.7K C1300
+3.5V_ST 0.1uF
CS# VCC 16V
/SPI_CS 1 8

OPT SO/SIO1 NC/SIO3


R1300 SPI_SDO 2 7
10K

WP#/SIO2 SCLK
/FLASH_WP 3 6 SPI_SCK
R1302
GND SI/SIO0 33
4 5 SPI_SDI

SPI_FLASH_WINBOND
IC1300-*1
W25Q80DVSSIG

CS VCC
1 8

DO[IO1] HOLD[IO3]
2 7

WP[IO2] CLK
3 6

GND DI[IO0]
4 5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 140721
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. S_FLASH 13

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
Central and South Americatuner block

TU1400 TU1401
TDJK-T301F TDJM-K301F
+3.3V_TU
NON_DVB_T2 DVB_T2
+3.3V +3.3V L1401
UBW2012-121F
1 1
C1405 C1408 +3.3V_TU
NC NC_1 100pF 0.1uF
16V
2 2 50V

HALF_NIM/EU_NON_T2 should be guarded by ground


DIF_AGC NC_2 R1405
100
3 3 C1404 IF_AGC_MAIN R1427
1K
R1428
1K
0.1uF
16V
SCL_RF SCL_RF HALF_NIM/EU_NON_T2
R1411
4 4 33
TU_SCL

SDA_RF SDA_RF Close to Tuner R1425


5 5 33
TU_SDA
HALF_NIM/EU_NON_T2
DIF[P] NC_3 R1403
10
C1412
18pF
C1414
18pF
6 6 IF_P_MSTAR 50V 50V

DIF[N] NC_4 HALF_NIM/EU_NON_T2


7 7 IF_N_MSTAR
Close to Tuner R1404
SIF SIF C1400 10 OPT
R1418
8 8 0
0.1uF 16V
CVBS CVBS
9 9 +3.3V_TU
NC_5 +3.3V_TU
10 TU_BUFFER
R1420 TU_BUFFER
470 R1421
82
A1 B1 +3.3V_RF TU_SIF
A1 B1 11
OPT OPT E
Q1400
47 ERROR C1406
5pF
C1407
5pF MMBT3906(NXP)
12 50V 50V R1419
B
TU_BUFFER
C
4.7K
GND_1 TU_BUFFER
SHIELD 13
MCLK
14
TU_GND_A

TU_GND_B

DVB_T2
SYNC AR1400 47 +3.3V_TU
15 FE_TS_ERR
FE_TS_CLK
VAILD FE_TS_SYNC
16 FE_TS_VAL
TU_BUFFER
R1424
TU_BUFFER
R1430
DVB_T2 220 220
D0 AR1401 47
FE_TS_DATA[0]
FE_TS_DATA[0-7]

17 FE_TS_DATA[1]
OPT
R1422
0
FE_TS_DATA[2]
D1 FE_TS_DATA[3]
TU_CVBS
18 TU_BUFFER
R1429 E
0 Q1401
D2 B
MMBT3906(NXP)
19 OPT
R1423
TU_BUFFER
C
1K
D3
20
DVB_T2 ERROR & VALID PIN
D4 AR1402 47
FE_TS_DATA[4] DVB_T2
21 FE_TS_DATA[5] FE_TS_VAL
R1415
0
FE_TS_DATA[6] FE_TS_VAL_ERR
D5 FE_TS_DATA[7] FE_TS_ERR
22 GPIO must be added.

D6
23
D7
24 +3.3V_TU +3.3V_Normal
DVB_T2
RESET_DEMOD R1400
25 10
DEMOD_RESET +3.3V_TU L1400
DVB_T2 0.1uF UBW2012-121F
C1401 16V DVB_T2
+3.3V_DEMOD L1402
UBW2012-121F
26 DVB_T2 DVB_T2
C1418
22uF
C1419
0.1uF
C1420
22uF
C1422
0.1uF
C1409 C1411 10V 16V 10V 16V
SCL_DEMOD DVB_T2 100pF 0.1uF
27 DVB_T2
R1401 22
DEMOD_SCL
50V 16V
20pF DVB_T2
C1402 +1.2V_DEMOD
+1.2V_DEMOD 50V L1403
UBW2012-121F
28
DVB_T2 DVB_T2
C1410 C1413
NC_6 100pF
50V
0.1uF
16V
29 +3.3V_TU +1.2V_DEMOD
IC1400
SDA_DEMOD DVB_T2
R1402 22
AP7361-Y-13
30 DEMOD_SDA DVB_T2
R1412
DVB_T2 C1403
20pF 3.3K EN OUT
50V 1 DVB_T2 5
C1417 DVB_T2
1uF GND R1416
10V 2
A1 B1 DVB_T2
DVB_T2
R1413
1

A1 B1 ADJ/NC IN 12K
3 4 1%
47 R1
DVB_T2 DVB_T2_10uF_X5R
C1421 C1423
0.1uF 10uF
16V 10V
SHIELD DVB_T2
R1414
22K
1%
R2
TU_GND_A

TU_GND_B

Vo=0.8*(1+R1/R2)=1.2364

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 2014.08.11
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_CSA 14

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
COMPONENT & AV1(COMMON), AV2
COMP_AV1/2_YG
JK1701
PPJ248-21

6C [RD3]E-LUG R1716
10K
AV2_R_IN
AV2
VA1706
5.6V R1700 C1701 R1718
AV2_LR_ZENER 470K 330pF 12K

5C [RD3]O-SPRING AV2 50V


OPT
AV2

4C [RD3]CONTACT R1717
10K
AV2_L_IN
AV2

VA1704 R1701 C1702 R1719


5.6V 470K 330pF 12K
AV2 5B [WH2]O-SPRING AV2_LR_ZENER AV2 50V
OPT
AV2

+3.3V_Normal

R1708
10K

4A [YL]CONTACT AV2

R1711 1K
AV2_CVBS_DET
AV2
VA1705
5.6V
OPT

5A [YL]O-SPRING
SC1/AV2_CVBS_IN
ZD1706-*1
COMP_AV1_YG ZD1706
AV2_CVBS_ZENER_ROHM
AV2
R1725 C1703
47pF
AV2_CVBS_ZENER_KEC
75
ZD1707-*1
JK1702 6A [YL]E-LUG ZD1707
AV2_CVBS_ZENER_ROHM
3216
1%
50V
AV2 AV2_CVBS_ZENER_KEC
1/4W
PPJ245N2-01

6E [RD2]E-LUG 6H [RD2]E-LUG R1714


10K
COMP2_R_IN

VA1700
5.6V C1704 R1720
COMP_LR_ZENER R1703 330pF

5E [RD2]O-SPRING 5H [RD2]O-SPRING 470K 50V


OPT
12K

R1715
10K
COMP2_L_IN

4E [RD2]CONTACT 4H [RD2]CONTACT VA1701


5.6V C1705 R1721
COMP_LR_ZENER R1704 330pF
470K 50V 12K
OPT
+3.3V_Normal

5D [WH]O-SPRING 5G [WH1]O-SPRING R1709


10K

COMP2_DET

4C [RD1]CONTACT 4F [RD1]CONTACT VA1702


R1712
1K
5.6V
OPT

COMPONENT 5C [RD1]O-SPRING 5F [RD1]O-SPRING


COMP2_Pr+
& ZD1700
COMP_Pr_ZENER_ROHM
ZD1700-*1
COMP_Pr_ZENER_KEC
AV1 7C [RD1]E-LUG-S 7F [RD1]E-LUG-S ZD1701
COMP_Pr_ZENER_ROHM
R1705
75 ZD1701-*1
COMP_Pr_ZENER_KEC

5B [BL]O-SPRING 5E [BL]O-SPRING
COMP2_Pb+
ZD1702 ZD1702-*1
COMP_Pb_ZENER_ROHM COMP_Pb_ZENER_KEC
R1706

4A [GN/YL]CONTACT 4D [YL/GN]CONTACT ZD1703


COMP_Pb_ZENER_ROHM
75 ZD1703-*1
COMP_Pb_ZENER_KEC
+3.3V_Normal

R1710

5A [GN/YL]O-SPRING 5D [YL/GN]O-SPRING 10K

AV_CVBS_DET
R1713
1K
VA1703
5.6V

6A [GN/YL]E-LUG 6D [YL/GN]E-LUG OPT

COMP2_Y+/AV_CVBS_IN
ZD1704 ZD1704-*1
R1722
COMP_Y_ZENER_ROHM 75 COMP_Y_ZENER_KEC
ZD1705 3216 ZD1705-*1
1%
COMP_Y_ZENER_ROHM 1/4W COMP_Y_ZENER_KEC

CVBS_OUT_TEST
R1724
0
DTV/MNT_VOUT

CVBS_OUT_TEST
R1723
75

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 2014/05/29
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_JACK_NON_EU 17

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
LVDS

FOR FHD REVERSE(10bit)


[51Pin LVDS Connector] [30Pin LVDS Connector]
(For FHD 60Hz) Change in S7LR
(For HD 60Hz_Normal)
MO_FHD MIRROR Pol-change
P1800
SP14-11592-01-51Pin RXA4+ RXA0+ RXA0- MO_HD
RXA4- RXA0- RXA0+ P1801
10031HR-30
RXA3+ RXA1+ RXA1-
1
RXA3- RXA1- RXA1+
2
LVDS_SEL 1
RXACK+ RXA2+ RXA2-
3
2
+3.3V_Normal RXACK- RXA2- RXA2+
4 VCOM_SDA 3 VCOM_SDA
RXA2+ RXACK+ RXACK-
5 VCOM_SCL Cell_CSOT_55inch 4 VCOM_SCL
R1806 RXA2- RXACK- RXACK+
6
1K 5
RXA1+ RXA3+ RXA3-
7
6 RXA3+
OPT RXA1- RXA3- RXA3+
8 R1807 7 RXA3-
10K RXA0+ RXA4+ RXA4-
9
8
RXA0- RXA4- RXA4+
10
9 RXACK+
11
10 RXACK-
12 RXA4+ RXB4+ RXB0+ RXB0-
11
13 RXA4- RXB4- RXB0- RXB0+
12 RXA2+
14 RXA3+ RXB3+ RXB1+ RXB1-
13 RXA2-
15 RXA3- RXB3- RXB1- RXB1+
14
16 RXACK+ RXBCK+ RXB2+ RXB2-
15 RXA1+
17 RXACK- RXBCK- RXB2- RXB2+
16 RXA1-
18 RXB2+ RXBCK+ RXBCK-
17
19 RXA2+ RXB2- RXBCK- RXBCK+ LVDS_SEL
18 RXA0+
20 RXA2- RXB1+ RXB3+ RXB3- +3.3V_Normal
19 RXA0-
21 RXB1- RXB3- RXB3+
20
OPT
22 RXA1+ RXB0+ RXB4+ RXB4- R1808
21 3.3K
23 RXA1- RXB0- RXB4- RXB4+
22
24 RXA0+ OPT
23 R1809
MO_FHD_non_55CSOT
25 RXA0- R1801 10K
24
0
26
25
0 PANEL_VCC
27

28 RXB4+
R1812 FOR FHD REVERSE(8bit) 26

Cell_INX_FHD 27
29 RXB4- Change in S7LR 28
30 RXB3+ 29
31 RXB3-
MIRROR Pol-change Shift
30
RXA4+ RXA4+ RXA4- RXA0-
32 RXBCK+
RXA4- RXA4- RXA4+ RXA0+ 31
33 RXBCK-
RXA3+ RXA0+ RXA0- RXA1-
34
RXA3- RXA0- RXA0+ RXA1+
35 RXB2+
RXACK+ RXA1+ RXA1- RXA2-
36 RXB2-
RXACK- RXA1- RXA1+ RXA2+
37
RXA2+ RXA2+ RXA2- RXACK-
38 RXB1+
RXA2- RXA2- RXA2+ RXACK+
39 RXB1-
RXA1+ RXACK+ RXACK- RXA3-
40 RXB0+
MO_FHD_non_55CSOT RXA1- RXACK- RXACK+ RXA3+
41 RXB0- AR1800
0
1/16W RXA0+ RXA3+ RXA3- RXA4-
EU pin assign is different from NON EU.
42
RXA0- RXA3- RXA3+ RXA4+
Because of position of HD wafer.
43

44

45 RXB4+ RXB4+ RXB4- RXB0-


V-COM I2C
46 PANEL_VCC RXB4- RXB4- RXB4+ RXB0+
URSA/VCOM_SCL +3.3V_Normal
47 RXB3+ RXB0+ RXB0- RXB1-

48 RXB3- RXB0- RXB0+ RXB1+ URSA/VCOM_SDA

49 RXBCK+ RXB1+ RXB1- RXB2-


VCOM_I2C_PULL_UP VCOM_I2C_PULL_UP
50 RXBCK- RXB1- RXB1+ RXB2+ R1810 R1811
2K 2K
51 RXB2+ RXB2+ RXB2- RXBCK-
MO_FHD_VCC_CAP VCOM_I2C
C1800 C1801 RXB2- RXB2- RXB2+ RXBCK+ R1804
52 0.1uF 10uF 0
25V 25V RXB1+ RXBCK+ RXBCK- RXB3- VCOM_SCL URSA/VCOM_SCL

RXB1- RXBCK- RXBCK+ RXB3+ VCOM_I2C


R1805
0
RXB0+ RXB3+ RXB3- RXB4- VCOM_SDA URSA/VCOM_SDA

RXB0- RXB3- RXB3+ RXB4+

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 140613
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS 18

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
RS-232C 4PIN

RS-232C 4PIN

RS232C_DEBUG_4P
+3.5V_ST P4000
12507WS-04L

VCC
1

AR4000 PM_RXD
2
PM_RXD 100
1/16W
GND
3

RM_TXD
4
PM_TXD

GND

MSTAR DEBUG 4PIN


JP_GND1

JP_GND2

JP_GND3

JP_GND4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 2014/05/22
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_MSTAR_DEBUG_4P 40

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
IR + LED + Digital Eye + Control Key

+3.5V_ST

R4603 R4604
10K 10K
1% 1% IR_10p
R4601 IR_8p
100 P4600
KEY1 12507WR-10L P4601
12507WR-08L
C4602
0.1uF
R4602 16V 1
100 1
KEY2
+3.5V_ST 2
C4603
0.1uF 2
16V
L4600 For EMI 3
BLM18PG121SN1D 3

4
C4600 C4601 4
0.1uF 1000pF
50V 5
5
R4606
1.8K
LED_R/BUZZ 6
6
+3.5V_ST OPT
VA4600 7
5.6V 7
R4600
3.3K 8
8
IR
9 9
C4604 OPT
100pF ZD4601
+3.3V_Normal 50V 5V
10

11
IR_Eye_Sensor IR_Eye_Sensor
R4605 R4607 IR_Eye_Sensor
1K 1K R4608
100
SENSOR_SCL IR_Eye_Sensor
IR_Eye_Sensor C4605
R4609 18pF
100 50V
SENSOR_SDA
IR_Eye_Sensor
C4606
18pF
50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 2014/06/02
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR_EYE_SENSOR 46

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
IC102
H27U1G8F2CTR-BC
NAND FLASH MEMORY +3.3V_Normal +3.3V_Normal <CHIP Config>
NC_1 NC_29
(SPI_SDI, PM_LED, PWM_PM) M1A_256M
1 48 LG-NonOS SB51_ExtSPI 3’b000 51boot from SPI IC101
NAND_FLASH_1G_HYNIX
NC_2 NC_28 LG-OS HEMCU_ExtSPI 3’b001 MIPS boot from SPI
2 EAN35669103 47 LGE2134(256M)
NC_3 NC_27 PCM_A[0-7]
3 46 EEPROM CI_TS_CLK
22 +3.5V_ST (IC104)
NC_4 NC_26 CI_TS_DATA[0-7]
4 45 AR101 Y1 V10
TUNER_RESET GPIO78 TS0CLK/GPIO92 CI_TS_DATA[0]
R106 R110 NC_5 I/O7 PCM_A[7] R123 W4 T14 CI_TS_SYNC
1K 3.9K 5 44 AUD_MASTER_CLK 56 5V_DET_HDMI_4 GPIO79 TS0DATA[0]/GPIO82 CI_TS_DATA[1] CI_TS_VAL
T13
NC_6 I/O6 PCM_A[6] AUD_MASTER_CLK_0 TS0DATA[1]/GPIO83 CI_TS_DATA[2]
AR103 6 43 R129 22 K17 U13
22
OPT
I2C_SCL I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84 CI_TS_DATA[3] from CI SLOT
R/B I/O5 PCM_A[5] R128 22 J15 V15
7 42 C112 I2C_SDA I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85 CI_TS_DATA[4]
OPT OPT U8 U12
RE I/O4 PCM_A[4] R115 R117 R121 100pF URSA/VCOM_SDA SDAM2/GPIO55
/F_RB TS0DATA[4]/GPIO86 CI_TS_DATA[5]
8 41 4.7K 4.7K 2.7K 50V T7 V13
/PF_OE URSA/VCOM_SCL SCKM2/GPIO56 TS0DATA[5]/GPIO87 CI_TS_DATA[6]
CE NC_25 U7 U14
9 40 DEMOD_SCL SENSOR_SCL SENSOR_SCL SCKM0/GPIO58 TS0DATA[6]/GPIO88
/PF_CE0 V7 T11 CI_TS_DATA[7]
NC_7 NC_24 DEMOD_SDA SENSOR_SDA
C102 SENSOR_SDA SDAM0/GPIO59 TS0DATA[7]/GPIO89
10 39 R126 22 DVB_T2 F6 T12
OPT 10uF DEMOD_SCL I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91 FE_TS_CLK
NC_8 NC_23 10V R127 22 DVB_T2 G6 V12
+3.3V_Normal R107 C101 11 38 DEMOD_SDA I2S_IN_SD/GPIO160 TS0VALID/GPIO90 FE_TS_DATA[0-7]
1K LED_R/BUZZ AA4 Y14
0.1uF VCC_1 VCC_2 AMP_SCL TU_SCL I2C_SCKM1/GPIO80 TS1CLK/GPIO103 FE_TS_SYNC
12 37 Y4 Y16 FE_TS_DATA[0]
OPT FE_TS_VAL_ERR
C103 PM_LED AMP_SDA TU_SDA I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93 FE_TS_DATA[1]
R104 VSS_1 VSS_2 AA15
13 36 0.1uF
1K
SPI_SDI J6
TS1DATA[1]/GPIO94
Y13 FE_TS_DATA[2] Internal demod out
NC_9 NC_22 AV_CVBS_DET ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95 FE_TS_DATA[3]
14 35 K6 AA16
AV2_CVBS_DET AV2_CVBS_DET EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96 FE_TS_DATA[4] FE_TS_DATA[0]
NC_10 NC_21 OPT W12
15 34 R116 R118 R122 TS1DATA[4]/GPIO97 FE_TS_DATA[0]
G7 AA13 FE_TS_DATA[5]
CLE NC_20 4.7K 4.7K 2.7K COMP2_DET I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
16 33 W14 FE_TS_DATA[6]
AR102 TS1DATA[6]/GPIO99 FE_TS_DATA[7]
/PF_CE1 ALE I/O3 PCM_A[3] J4 W13
17 32 DEMOD_RESET DEMOD_RESET ET_COL/GPIO60 TS1DATA[7]/GPIO100
PF_ALE J5 Y15
WE I/O2 PCM_A[2] MODEL_OPT_0 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
/PF_WE 18 31 W15
MODEL_OPT_1 TS1VALID/GPIO101
/PF_WP WP I/O1 PCM_A[1] H19
19 30
MODEL_OPT_2 LCK/GPIO194
G20 B3 R133 33
AR104 NC_11 I/O0 PCM_A[0] LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13 /SPI_CS
22 R105 20 29 /MHL_OCP_DET G19 A3R134 33
R101 1K LHSYNC/GPIO196 PM_SPI_SCK/GPIO1 SPI_SCK
NC_12 NC_19 22 G21 A4
3.3K 21 28 FRC_RESET FRC_RESET LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0 SIDE_HP_MUTE
33 R125 C3
NC_13 NC_18 PM_SPI_SDI/GPIO2 SPI_SDI
22 27 J17 A2 R135 33
HP_DET UART2_RX/GPIO69 PM_SPI_SDO/GPIO3 SPI_SDO
NC_14 NC_17 J16
23 26 SC1/COMP1_DET UART2_TX/GPIO70 for SERIAL FLASH
E8 B1
NC_15 NC_16 MHL_OCP_EN UART3_TX/GPIO52 RP EPHY_RP EPHY_RP
24 25 D7 C2
AMP_RESET UART3_RX/GPIO53 TN EPHY_TN EPHY_TN
U6 C1
MODEL_OPT_4 GPIO46[CTS] TP EPHY_TP EPHY_TP
V6 B2
RF_SWITCH_CTL GPIO47[RTS] RN EPHY_RN EPHY_RN
/CI_CD1 33 R124 K15
/CI_CD1 UART1_TX/GPIO48
L16 D2
/CI_CD2 /CI_CD2 UART1_RX/GPIO49 SPDIF_IN/GPIO161 5V_DET_HDMI_2
D1
R132 100 SPDIF_OUT
SPDIF_OUT/GPIO162 SPDIF_OUT
H5 SPDIF_OPTIC
USB1_CTL ET_TX_EN/GPIO63
K5 D8 5V_DET_HDMI_2
MODEL_OPT_5 ET_RXD[0]/GPIO65 HWRESET SOC_RESET
NAND_FLASH_1G_TOSHIBA NAND_FLASH_2G_TOSHIBA NAND_FLASH_1G_SS NAND_FLASH_4G_HYNIX K4 E5
MODEL_OPT_6 ET_MDC/GPIO66 IRIN/GPIO5 IR
EAN61508002 EAN60991002 EAN61857001 EAN61950603 H6 G4
USB1_OCD ET_MDIO/GPIO67 DDCA_CK/UART0_RX RGB_DDC_SCL
IC102-*3 IC102-*4 IC102-*5 IC102-*6 L5 G5
NAND_FLASH_2G_HYNIX_OLD
EAN60708702 TC58NVG0S3HTA00 TC58NVG1S3HTA00 K9F1G08U0D-SCB0 H27U4G8F2ETR-BC /CI_DET ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX RGB_DDC_SDA
IC102-*1 PCM_A[0-14]
H27U2G8F2CTR
PCM_A[0] U17 J18
NC_1
1 48
NC_29
PCM_A[1] PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71 PWM0
NC_2 NC_28
R18 K18
NC_3
2 47
NC_27
NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 PCM_A[2] PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72 PWM1
3 46 1 48 1 48 1 48 1 48 V17 K16
NC_4
4 45
NC_26
PCM_A[3] PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73 PWM2
NC_5
5 44
I/O7 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 R16 L18
NC_6
6 43
I/O6 2 47 2 47 2 47 2 47 PCM_A[4] PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74 PWM3
R/B I/O5
U16 L17
RE
7 42
I/O4
NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 PCM_A[5] PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75 PCM_5V_CTL
8 41 3 46 3 46 3 46 3 46 T17
CE
9 40
NC_25
PCM_A[6] PCMADR[5]/NF_AD[5]/GPIO106
NC_7 NC_24 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 W18 T8
10 39
4 45 4 45 4 45 4 45 PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146 PF_ALE +3.3V_Normal
NC_8
11 38
NC_23
PCM_A[7] U20 T9
VCC_1 VCC_2

VSS_1
12 37
VSS_2
NC_5 I/O8 NC_5 I/O8 NC_5 I/O7 NC_5 I/O7 PCM_A[8] PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142 /PF_CE0 L101
13 36 5 44 5 44 5 44 5 44 Y19 U9 BLM18PG121SN1D
NC_9
14 35
NC_22
PCM_A[9] PCMADR[8]/GPIO113 NF_CLE/GPIO141 /PF_CE1 HALF_NIM/EU_NON_T2
NC_10
15 34
NC_21 NC_6 I/O7 NC_6 I/O7 NC_6 I/O6 NC_6 I/O6 AA19 U11
CLE
16 33
NC_20 6 43 6 43 6 43 6 43 PCM_A[10] PCMADR[9]/GPIO115 NF_RBZ/GPIO147 /F_RB
ALE I/O3
AA20 V9
WE
17 32
I/O2
RY/BY I/O6 RY/BY I/O6 R/B I/O5 R/B I/O5 PCM_A[11] PCMADR[10]/GPIO119 NF_REZ/GPIO144 /PF_OE HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2
18 31 7 42 7 42 7 42 7 42 W21 U10 C119
WP
19 30
I/O1
PCM_A[12] PCMADR[11]/GPIO117 NF_WEZ/GPIO145 /PF_WE R137 0.1uF
NC_11
20 29
I/O0 RE I/O5 RE I/O5 RE I/O4 RE I/O4 V20 T10 10K
NC_12
21 28
NC_19 8 41 8 41 8 41 8 41 PCM_A[13] PCMADR[12]/GPIO109 NF_WPZ/GPIO199 /PF_WP
NC_13 NC_18
Y17 HALF_NIM/EU_NON_T2
NC_14
22 27
NC_17
CE NC_25 CE NC_25 CE NC_25 CE NC_25 PCM_A[14] PCMADR[13]/GPIO112 R140
23 26 9 40 9 40 9 40 9 40 /PCM_CD V18 W2
NC_15
24 25
NC_16
/PCM_CE PCMADR[14]/GPIO111 IF_AGC IF_AGC_MAIN
NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 V19 W1 0
10 39 10 39 10 39 10 39 PCM_D[0-7] PCMCD_N/GPIO135 SIFM
W19 W3 C120
NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 PCMCE_N/GPIO120 SIFP 0.047uF
11 38 11 38 11 38 11 38 PCM_D[0] U18 V2
PCMDATA[0]/GPIO131 IM 25V Analog SIF
VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 PCM_D[1] V16 V1 HALF_NIM/EU_NON_T2
12 37 12 37 12 37 12 37 M1A_128M PCMDATA[1]/GPIO132 IP Close to MSTAR
IC101-*1
PCM_D[2] W17
VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 LGE2133(128M) PCMDATA[2]/GPIO133 TU_BUFFER
13 36 13 36 13 36 13 36 PCM_D[3] Y20 AA2 TU_BUFFER C125 R144
PCMDATA[3]/GPIO125 XIN
NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 PCM_D[4] R15 Y2 TUNER_IF_100_ohm
14 35 14 35 14 35 14 35 Y1
GPIO78 TS0CLK/GPIO92
V10
PCMDATA[4]/GPIO124 XOUT R138-*1 0.1uF 47 OPT
NAND_FLASH_2G_HYNIX_NEW
W4
GPIO79 TS0DATA[0]/GPIO82
T14 PCM_D[5] AA18 TU_BUFFER C127
EAN60708703 NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 T13
PCMDATA[5]/GPIO123 100
IC102-*2
H27U2G8F2DTR-BD 15 34 15 34 15 34 15 34 K17
TS0DATA[1]/GPIO83
U13 T15 TU_BUFFER R145 1000pF
J15
I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84
V15 PCM_D[6] TU_SIF
I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85 PCMDATA[6]/GPIO122
NC_1 NC_29 CLE NC_20 CLE NC_20 CLE NC_20 CLE NC_20 U8 U12
PCM_D[7] Y21 C126 47
1 48
16 33 16 33 16 33 16 33 T7
SDAM2/GPIO55 TS0DATA[4]/GPIO86
V13
PCMDATA[7]/GPIO121 TUNER_IF_100_ohm
NC_2
2 47
NC_28
U7
SCKM2/GPIO56 TS0DATA[5]/GPIO87
U14 W20 R139-*1 0.1uF
NC_3 NC_27 SCKM0/GPIO58 TS0DATA[6]/GPIO88
3 46 ALE I/O4 ALE I/O4 ALE I/O3 ALE I/O3 V7
SDAM0/GPIO59 TS0DATA[7]/GPIO89
T11
/PCM_IORD PCMIORD_N/GPIO116 100
NC_4
4 45
NC_26
17 32 17 32 17 32 17 32 F6
I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91
T12 V21
NC_5
5 44
I/O7 G6
I2S_IN_SD/GPIO160 TS0VALID/GPIO90
V12
/PCM_IOWR PCMIOWR_N/GPIO114
NC_6
6 43
I/O6 WE I/O3 WE I/O3 WE I/O2 WE I/O2 AA4
I2C_SCKM1/GPIO80 TS1CLK/GPIO103
Y14 Y18
R/B I/O5
18 31 18 31 18 31 18 31 Y4
I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93
Y16
/PCM_IRQA PCMIRQA_N/GPIO110 Close to MSTAR
RE
7 42
I/O4 TS1DATA[1]/GPIO94
AA15 T16
8 41 WP I/O2 WP I/O2 WP I/O1 WP I/O1 J6
ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95
Y13
/PCM_OE PCMOE_N/GPIO118 TUNER_IF_0_ohm HALF_NIM/EU_NON_T2
CE
9 40
NC_25
19 30 19 30 19 30 19 30 K6
EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96
AA16 R17 IF_N_MSTAR
NC_7
10 39
NC_24
TS1DATA[4]/GPIO97
W12
/PCM_REG PCMREG_N/GPIO128 0 0.1uF C121
NC_8 NC_23 NC_11 I/O1 NC_11 I/O1 NC_11 I/O0 NC_11 I/O0 G7 AA13 T18 R138 C117
11 38
20 29 20 29 20 29 20 29
I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
OPT
VCC_1
12 37
VCC_2
J4
TS1DATA[6]/GPIO99
W14
W13
PCM_RST
W16
PCM_RESET/GPIO134
100pF DTV_IF
VSS_1 VSS_2 ET_COL/GPIO60 TS1DATA[7]/GPIO100
13 36 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 J5
ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
Y15
/PCM_WAIT PCMWAIT_N/GPIO105
NC_9
14 35
NC_22
21 28 21 28 21 28 21 28 TS1VALID/GPIO101
W15 U15 TUNER_IF_0_ohm HALF_NIM/EU_NON_T2
NC_10
15 34
NC_21 H19
LCK/GPIO194 /PCM_WE PCMWE_N/GPIO198 IF_P_MSTAR
CLE
16 33
NC_20 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 G20
LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13
B3 0 0.1uF IF_FILTER_AJ/CSA
ALE I/O3
22 27 22 27 22 27 22 27 G19
LHSYNC/GPIO196 PM_SPI_SCK/GPIO1
A3
R139 C118 C122
WE
17 32
I/O2
G21
LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0
A4
33pF IF_FILTER_AJ/CSA
18 31 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 PM_SPI_SDI/GPIO2
C3 C124
WP
19 30
I/O1
23 26 23 26 23 26 23 26 J17
UART2_RX/GPIO69 PM_SPI_SDO/GPIO3
A2 33pF
NC_11 I/O0 J16
20 29 UART2_TX/GPIO70
NC_12
21 28
NC_19 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 E8
UART3_TX/GPIO52 RP
B1

NC_13 NC_18
24 25 24 25 24 25 24 25 D7
UART3_RX/GPIO53 TN
C2 XTAL_LOAD_15pF
22 27 U6 C1
NC_14
23 26
NC_17 V6
GPIO46[CTS] TP
B2 C113 15pF
GPIO47[RTS] RN
NC_15 NC_16 K15
24 25 UART1_TX/GPIO48
L16 D2

R136
UART1_RX/GPIO49 SPDIF_IN/GPIO161
D1 X101

1M
SPDIF_OUT/GPIO162
H5
ET_TX_EN/GPIO63 24MHz C114 15pF
K5 D8
ET_RXD[0]/GPIO65 HWRESET
K4 E5
ET_MDC/GPIO66 IRIN/GPIO5
H6 G4
ET_MDIO/GPIO67 DDCA_CK/UART0_RX
L5
ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX
G5 XTAL_LOAD_15pF

I2C
U17 J18
XTAL_LOAD_18pF XTAL_LOAD_22pF XTAL_LOAD_24pF XTAL_LOAD_27pFXTAL_LOAD_30pF
PM MODEL OPTION PM_MODEL_OPT_0 R18
V17
PCMADR[0]/NF_AD[0]/GPIO130
PCMADR[1]/NF_AD[1]/GPIO129
PWM0/GPIO71
PWM1/GPIO72
K18
K16 C113-*1 18pF C113-*2 22pF C113-*5 24pF C113-*3 27pF C113-*4 30pF
DIMMING - HIGH : LCD R16
U16
PCMADR[2]/NF_AD[2]/GPIO127
PCMADR[3]/NF_AD[3]/GPIO126
PWM2/GPIO73
PWM3/GPIO74
L18
L17
+3.5V_ST PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75
+3.3V_Normal - LOW :: PDP T17
PCMADR[5]/NF_AD[5]/GPIO106
XTAL_LOAD_18pF XTAL_LOAD_22pF XTAL_LOAD_24pF XTAL_LOAD_27pF XTAL_LOAD_30pF
W18
U20
PCMADR[6]/NF_AD[6]/GPIO107
PCMADR[7]/NF_AD[7]/GPIO108
NF_ALE/GPIO146
NF_CEZ/GPIO142
T8
T9 M1A_256M C114-*1 18pF C114-*2 22pF C114-*5 24pF C114-*3 27pF C114-*4 30pF

R103
Y19
AA19
PCMADR[8]/GPIO113
PCMADR[9]/GPIO115
NF_CLE/GPIO141
NF_RBZ/GPIO147
U9
U11 IC101
100
AA20
W21
PCMADR[10]/GPIO119
PCMADR[11]/GPIO117
NF_REZ/GPIO144
NF_WEZ/GPIO145
V9
U10 LGE2134(256M)
PWM_DIM PWM2 V20
PCMADR[12]/GPIO109 NF_WPZ/GPIO199
T10
LCD Y17
PCMADR[13]/GPIO112
R102 R119 V18
PCMADR[14]/GPIO111 IF_AGC
W2
10K 10K V19
PCMCD_N/GPIO135 SIFM
W1

PWM0 R111 R112 R113 R114 W19


PCMCE_N/GPIO120 SIFP
W3
U19 D5
1K 1K 2.2K 2.2K U18 V2
RXA4+
PM_MODEL_OPT_0 V16
PCMDATA[0]/GPIO131 IM
V1 LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35 KEY1
R143 W17
PCMDATA[1]/GPIO132 IP T20 F8
10K Y20
PCMDATA[2]/GPIO133
AA2 RXA4- LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36 KEY2
PWM3 R15
PCMDATA[3]/GPIO125 XIN
Y2 T21 E7
AA18
PCMDATA[4]/GPIO124 XOUT RXA3+ LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37 PM_MODEL_OPT_0
AMP_SDA T15
PCMDATA[5]/GPIO123 T19 E6
Y21
PCMDATA[6]/GPIO122 RXA3- LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38 PANEL_CTL
AMP_SCL PDP W20
PCMDATA[7]/GPIO121 R21 D6
R120 V21
PCMIORD_N/GPIO116 RXACK+ LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39 SCART1_MUTE
10K Y18
PCMIOWR_N/GPIO114 R20
I2C_SDA T16
PCMIRQA_N/GPIO110 RXACK- LVACKM/TTL_B[5]/GCLK/GPIO175
R17
PCMOE_N/GPIO118 R19 W10
I2C_SCL T18
PCMREG_N/GPIO128 RXA2+ LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20 MHL_CD_SENSE
W16
PCM_RESET/GPIO134 P20 Y10
U15
PCMWAIT_N/GPIO105 RXA2- LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21 /VBUS_EN
PCMWE_N/GPIO198 P3
PM_LED/GPIO4 PM_LED IC101-*1
P19 Y3 LGE2133(128M)
RXA1+ LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7 POWER_DET
N20 Y5 M1A_128M
RXA1- LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17 AMP_MUTE U19 D5
N21 W11 T20
LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35
F8
RXA0+ LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22 INV_CTL T21
LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36
E7
N19 D3 T19
LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37
E6
RXA0- LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11 POWER_ON/OFF_1 R21
LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38
D6
EEPROM M21 AA3 R20
LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39

+3.3V_Normal RXB4+ LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14 RL_ON R19


LVACKM/TTL_B[5]/GCLK/GPIO175
W10
M20 W5 P20
LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20
Y10
RXB4- LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15 /FLASH_WP LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21
P3
M19 D4 P19
PM_LED/GPIO4
Y3
RXB3+ LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200 LED_R/BUZZ N20
LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7
Y5
L20 L15 N21
LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17
W11
RXB3- LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8 PM_TXD N19
LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22
D3
Y11 M21
LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11
AA3
NVRAM_ST NVRAM_RENESAS NVRAM_ATMEL NVRAM_ROHM L19
PM_UART_RX/GPIO_PM[5]/GPIO12 PM_RXD M20
LVB4P/TTL_G[4]/EPI2+/GPIO182
LVB4M/TTL_G[5]/EPI2-/GPIO183
GPIO_PM[7]/GPIO14
GPIO_PM[8]/GPIO15
W5
C105 M19 D4
IC104 IC104-*1 RXBCK+ LVBCKP/TTL_R[0]/EPI4+/GPIO186 L20
LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200
L15
0.1uF IC104-*2 IC104-*3 K20 LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
M24256-BRMN6TP RXBCK- LVBCKM/TTL_R[1]/EPI4-/GPIO187 PM_UART_RX/GPIO_PM[5]/GPIO12
Y11

R1EX24256BSAS0A AT24C256C-SSHL-T BR24G256FJ-3 K21


L19
K20
LVBCKP/TTL_R[0]/EPI4+/GPIO186
RXB2+ LVB2P/TTL_R[2]/EPI5+/GPIO188 K21
LVBCKM/TTL_R[1]/EPI4-/GPIO187
K19 K19
LVB2P/TTL_R[2]/EPI5+/GPIO188
E0 VCC RXB2- LVB2M/TTL_R[3]/EPI5-/GPIO189 LVB2M/TTL_R[3]/EPI5-/GPIO189
1 8 J21
A0 VCC A0 VCC A0 VCC J21 LVB1P/TTL_R[4]/EPI6+/GPIO190
1 8 1 8 1 8 J20
RXB1+ LVB1P/TTL_R[4]/EPI6+/GPIO190 J19
LVB1M/TTL_R[5]/EPI6-/GPIO191
J20 H20
LVB0P/TTL_R[6]/EPI7+/GPIO192
E1 WC RXB1- LVB1M/TTL_R[5]/EPI6-/GPIO191 LVB0M/TTL_R[7]/EPI7-/GPIO193
2 7 A1 WP A1 WP A1 WP J19
2 7 2 7 2 7 RXB0+
A0’h H20
LVB0P/TTL_R[6]/EPI7+/GPIO192
E2 SCL RXB0- LVB0M/TTL_R[7]/EPI7-/GPIO193
3 6 R108 22 I2C_SCL A2 SCL A2 SCL A2 SCL
3 6 3 6 3 6

VSS SDA
4 5 R109 22 VSS SDA GND SDA GND SDA
I2C_SDA 4 5 4 5 4 5
C104 C106
8pF 8pF
EAN61548301 OPT OPT
EAN62389501 EAN61133501 EAN62389502

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_CA_M1A 2014/05/29
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1_NON_EU 51

Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
MODEL OPTION ("MO")
+3.3V_Normal PIN NAME PIN NO. LOW HIGH +1.10V_VDDC
MODEL OPTION
VDDC 1.05V +1.10V_VDDC
MO_DVB_T2/C/S2
MODEL_OPT_0 J5 MO_FHD MO_HD Normal 2.5V VDDC : 2026mA
MO_DUALSTREAM

MO_S/W_EU/AJ
DDR_EXT:256

DDR_EXT:128
1K

1K

1K

1K

1K

1K

1K
1K

MO_S/W_AJ MODEL_OPT_1 H19 MO_S/W_AJ

0.1uF
MO_S/W_NON_AJ
MO_M120

฀ 2.5V embedded


MO_HD

10V

10V
M1A

1uF

1uF
MODEL_OPT_2 G20 MO_DVB_T/C MO_DVB_T2/C/S2

C237
R212

R214

R216

R218

R219

R221

R224

C235
R210

G19

10uF

10uF
MODEL_OPT_3 MO_M120_NON MO_M120

C240

C244

C247
IF_AGC_SEL
R205 OPT 100
MODEL_OPT_0
MODEL_OPT_4 U6 DDR_EXT:256 or NON DDR_EXT : 128
R206 OPT100
MODEL_OPT_1
R207 OPT100 MODEL_OPT_5 K5 MO_S/W_TW MO_S/W_EU/AJ
MODEL_OPT_2
AUD_LRCH MODEL_OPT_6 K4 DDR_EXT:128 or NON
R201 OPT 100 DDR_EXT : 256
MODEL_OPT_4
R202 OPT 100 MODEL_OPT_5 MODEL_OPT_7 L5 MO_DUALSTREAM_NON MO_DUALSTREAM
R203 OPT 100 MODEL_OPT_6
Normal Power 3.3V
DDR_EXT:128 or NON

DDR_EXT:256 or NON

AUD_LRCK * Dual Stream is only Korea 3D spec


M1A_256M
MO_DUALSTREAM_NON

+3.3V_Normal VDD33
MO_S/W_NON_AJ

IC101
1K
MO_M120_NON
1K
1K

1K

1K

1K

1K

1K
MO_DVB_T/C

Memory OPTION
MO_S/W_TW

L204
LGE2134(256M)
MO_FHD

BLM18PG121SN1D
R222

0.1uF
0.1uF

0.1uF
Memory

0.1uF
Auto

0.1uF
R211
R209

R213

R215

R217

R220

10uF
R223

MODEL_OPT_4 MODEL_OPT_6

C236 10uF
R4 U3

10V

10V
INT+EXT Det AVDD_AU33 AVDD_AU33 AUVRM AUVRM
L11 A6
AVDD_DDR0_CLK GND_1
L13 A13

C233
128M Only 0 0 0

C241
C238

C245
AVDD_DDR1_CLK GND_2

C231

C232
M11 A15
AVDD_DDR0_CMD GND_3
K13 A18
AVDD_DDR1_CMD GND_4
256M Only 1 0 0 +1.5V_DDR C5 B12
AVDD_DDR0_D_1 GND_5
K12 B14
AVDD_DDR0_D_2 GND_6
0 1 L12 B16
128M+128M 0 AVDD_DDR0_D_3 GND_7
C6 B17
AVDD_DDR1_D_1 GND_8
K14 B19
128M+256M 0 0 1
DDR3 1.5V L14
AVDD_DDR1_D_2
AVDD_DDR1_D_3
GND_9
GND_10
B20
B5 C9
256M+256M 1 0 1 AVDD_DRAM_1 GND_11
B6 C10
AVDD_DRAM_2 GND_12
R8 C21
AVDD_NODIE AVDD_DVI_USB_MPLL_1 GND_13
R9 D9
AVDD_DVI_USB_MPLL_2 GND_14
AVDD_DDR0:55mA L7 E20
+1.5V_DDR VDD33 AVDD_MOD_1 GND_15
L8 F9
AVDD_MOD_2 GND_16
P8 F11
AVDD_NODIE AVDD_NODIE GND_17
K9 F13
VDD33 AVDD_PLL GND_18
R5 F15
AVDD_DMPLL AVDD3P3_DMPLL GND_19
+1.10V_VDDC P11 F17
AVDDL_MOD GND_20

0.1uF

0.1uF
C7 F19

10uF 10V

C239

C242

C246
0.1uF

1uF
+1.10V_VDDC DVDD_DDR_1 GND_21

C230
M13 F21
GND_22

C234
1uFC250 DVDD_DDR_2
R6 G8
DVDD_NODIE GND_23
A7 G9
DVDD_RX_1_1 GND_24
M12 G10
DVDD_RX_1_2 GND_25
AVDD_DDR1:55mA B7 G11
DVDD_RX_2_1 GND_26
M14 G12
DVDD_RX_2_2 GND_27
N11 G13
+1.10V_VDDC VDDC_1 GND_28
N12 G14
VDDC_2 GND_29
N13 G15
VDDC_3 GND_30
N14 G16
VDDC_4 GND_31
N15 G17
VDDC_5 GND_32
P12 G18
VDDC_6 GND_33
P13 H7
VDDC_7 GND_34
P14 H8
VDDC_8 GND_35
L9 H9
VDD33 VDDP GND_36
H10
GND_37
AA10 H11
AVDD5V_MHL AVDD5V_MHL GND_38
H12
GND_39
H13
GND_40
H14
IC101-*1 GND_41
LGE2133(128M) H15
GND_42
H16
M1A_128M GND_43
IC101-*1 U3
AUVRM AVDD_AU33
R4 H17
A6 L11
GND_1 AVDD_DDR0_CLK GND_44
LGE2133(128M) A13
GND_2 AVDD_DDR1_CLK
L13 H18
A15 M11
GND_3 AVDD_DDR0_CMD GND_45
A18
GND_4 AVDD_DDR1_CMD
K13 J7
B12 C5
GND_5 AVDD_DDR0_D_1 GND_46
B14
GND_6 AVDD_DDR0_D_2
K12 J8
M1A_128M B16
B17
GND_7
GND_8
AVDD_DDR0_D_3
AVDD_DDR1_D_1
L12
C6
GND_47
J9
M4 T6 B19
GND_9 AVDD_DDR1_D_2
K14
GND_48
ARC0 CVBSOUT1 B20
GND_10 AVDD_DDR1_D_3
L14 J10
W7 V5 C9
GND_11 AVDD_DRAM_1
B5
GND_49
RXC0N CVBS0 C10
GND_12 AVDD_DRAM_2
B6 J11
Y8 U5 C21
GND_13 AVDD_DVI_USB_MPLL_1
R8
GND_50
RXC0P CVBS1 D9
GND_14 AVDD_DVI_USB_MPLL_2
R9 J12
W8 T5 E20
GND_15 AVDD_MOD_1
L7
GND_51
RXC1N CVBS2 F9
GND_16 AVDD_MOD_2
L8 J13
Y9 V4 F11
GND_17 AVDD_NODIE
P8
GND_52
RXC1P VCOM F13
GND_18 AVDD_PLL
K9 J14
AA9 F15
GND_19 AVDD3P3_DMPLL
R5
GND_53
RXC2N F17
GND_20 AVDDL_MOD
P11 K8
W9 E4 F19
GND_21 DVDD_DDR_1
C7
GND_54
RXC2P I2S_OUT_BCK/GPIO165 F21
GND_22 DVDD_DDR_2
M13 K10
AA7 F4 G8
GND_23 DVDD_NODIE
R6
GND_55
RXCCKN I2S_OUT_MCK/GPIO163 G9
GND_24 DVDD_RX_1_1
A7 K11
Y7 F7 G10
GND_25 DVDD_RX_1_2
M12
GND_56
RXCCKP I2S_OUT_SD/GPIO166 G11
GND_26 DVDD_RX_2_1
B7 L10
N2 F5 G12 M14
GND_57
M1A_256M E3
CEC/GPIO6 I2S_OUT_WS/GPIO164 G13
G14
GND_27
GND_28
GND_29
DVDD_RX_2_2
VDDC_1
VDDC_2
N11
N12
GND_58
M5
DDCDA_CK/GPIO27 G15
GND_30 VDDC_3
N13 M7
IC101 E2
W6
DDCDA_DA/GPIO28 USB0_DM
C4
Y12
G16
G17
G18
GND_31
GND_32
GND_33
VDDC_4
VDDC_5
VDDC_6
N14
N15
P12
GND_59
GND_60
M8

LGE2134(256M) AA6
DDCDC_CK/GPIO31
DDCDC_DA/GPIO32
USB1_DM
USB0_DP
B4
H7
H8
H9
GND_34
GND_35
GND_36
VDDC_7
VDDC_8
VDDP
P13
P14
L9
GND_61
M9
M10
L4 AA12 H10
GND_62
HDMI HOTPLUGA/GPIO23 USB1_DP H11
GND_37
GND_38 AVDD5V_MHL
AA10 N4
Y6 H12
GND_39 GND_63
C205 HOTPLUGC/GPIO25 H13
GND_40 N5
HDMI1_ARC HDMI1_ARC M4 T6 F1 J2 H14
GND_64
TU_BUFFER TU_BUFFER RXA0N BIN0M H15
GND_41
N6
HDMI_ARC ARC0 CVBSOUT1 DTV/MNT_VOUT G3 J3 H16
GND_42

1uF 0 R227 W7 V50.047uF C262 33 R251 GND_43 GND_65


RXC0N CVBS0 AV2_OR_SCART TU_CVBS RXA0P BIN0P H17
GND_44 N7
D0-_HDMI4 G1 K3 H18
GND_66
10 R225 Y8 U50.047uF C226 33 R241 AV2_OR_SCART GND_45
N8
D0+_HDMI4 RXC0P CVBS1 SC1/AV2_CVBS_IN RXA1N GIN0M J7
GND_46
10 R226 W8 T50.047uF C227 33 R242 G2 J1 J8
GND_47 GND_67
RXC1N CVBS2 COMP2_Y+/AV_CVBS_IN RXA1P GIN0P J9
GND_48 N9
D1-_HDMI4 Y9 V4 0.047uF C228 R243 +3.3V_Normal H3 K2 J10
GND_49 GND_68
RXC1P VCOM RXA2N RIN0M J11
GND_50 N10
D1+_HDMI4 AA9 Close to MSTAR H2 K1 J12
GND_51 GND_69
68 RXA2P RIN0P J13 P4
D2-_HDMI4
W9
RXC2N
E4 I2S_I/F F3 M6 J14
GND_52
GND_53 GND_70
RXC2P I2S_OUT_BCK/GPIO165 RXACKN HSYNC0 K8
GND_54 P5
D2+_HDMI4
R244

R246

F2 L6 K10
GND_71
10K

AA7 F4
10K

GND_55
P6
OPT

OPT

CK-_HDMI4 RXCCKN I2S_OUT_MCK/GPIO163 RXACKP VSYNC0 K11


L10
GND_56
Y7 F7 GND_57 GND_72
RXCCKP I2S_OUT_SD/GPIO166