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S3 Semiconductor
mm National

MM National



The purpose of this handbook is to provide a fully indexed The temperature range of linear devices is indicated by ei-
and cross-referenced collection of linear integrated circuit ther the first digit in the part number, or a letter following the
applications using both monolithic and hybrid circuits from base part number.
National Semiconductor.
Specified Temperature
Individual application notes are normally written to explain Grade Part Number
the operation and use of one particular device or to detail
Military -55°C ^TA ^ +125°C LMIXXorLMXXXM
various methods of accomplishing a given function. The or-
ganization of this handbook takes advantage of this innate
Extended* -40°C <; TA ^ +125°C LMXXXE
coherence by keeping each application note intact, arrang- Industrial* -25°C ^ TA ^ +85°C LM2XX or LMXXXI
ing them in numerical order, and providing a detailed Sub- Commercial 0°C ^ TA <: +70°C LM3XX or LMXXXC
ject Index.
*Some range devices may be rated
industrial temperature
Many schematics call out the generic fam-
of the application for the extended (also known as automotive) temperature
ily, by either the military temperature range version
identified range. Other extended temperature range devices may not
or commercial temperature range version of the device. include a temperature range designation in their part num-
Generally, any device in the generic family will work in the ber. Check the device datasheet for the specified tempera-
circuit. For example, an amplifier indicated as an LM108 ture range(s).
refers to the generic "108" family, and does not imply that
Because commercial parts are less expensive than military
only military-grade devices will work in the application. Mili-
or industrial, these points should be kept in mind when try-
tary (or industrial) and prime electrical ("A") grade devices
ing to determine the most cost-effective approach to a given
need only be considered when their tighter electrical limits
or wider temperature range warrants their use.

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PORATION. As used herein:
1 . Lifesupport devices or systems are devices or systems 2. A critical component is any component of a life support
which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be reason-
or (b) support or sustain and whose failure to per-
life, ably expected to cause the failure of the life support de-
form, when properly used accordance with instructions
in vice or system, or to affect its safety or effectiveness.
foruse provided in the labeling, can be reasonably ex-
pected to result in a significant injury to the user.

National Semiconductor Corporation 2900 Semiconductor Drive P.O. Box 58090, Santa Clara, California 95052-8090 1-800-272-9959
TWX (910) 339-9240
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied, and National reserves the right, at any time
without notice, to change said circuitry or specifications.
HH National
SlM Semiconductor

Linear Applications Numerical List

Application Notes
Date Date Page
AN-3 Drift Compensation Techniques for Integrated DC Amplifiers 11 /67 6/86 1

AN-4 Monolithic Op-Amp —The Universal Linear Component 4/68 6/86 6

AN-13 Application of theLH0002 Current Amplifier 9/68 6/86 16
AN-20 An Application Guide for Op Amps 8/80 8/90 19
AN-23 The LM1 05—An Improved Positive Regulator 1/69 — 31
AN-24 A Simplified Test Set for Op Amp Characterization 1 /86 6/86 39
AN-29 IC Op Amp Beats FETs on Input Current 1 2/69 3/91 49
AN-30 Log Converters 1 1/69 3/91 66
AN-31 Op Amp Circuit Collection 2/78 3/91 70
AN-32 FET Circuit Applications 2/70 6/86 94
AN-41 Precision IC Comparator Runs from + 5V Logic Supply 1 0/70 8/90 107
AN-42 IC Provides On-Card Regulation for Logic Circuits 2/71 — 113
AN-46 The Phase Locked Loop IC as a Communications System Building Block 6/71 8/90 119
AN-48 Applications for a New Ultra-High Speed Buffer 8/71 — 133
AN-49 Pin Diode Drivers /75 — 140
AN-56 1.2V Reference 12/71 — 146
AN-69 LM380 Power Audio Amplifier 12/72 — 150
AN-71 Micropower LM4250 Programmable Op Amp
Circuits Using the 7/72 — 157
AN-72 The LM3900—A New Current-Differencing Quad + Input Amplifiers 9/72 6/86 166
AN-74 LM1 39/LM239/LM339—A Quad of Independently Functioning Comparators 1/73 — 211
AN-79 IC Pre-Amp Challenges Choppers on Drift 2/73 — 227
AN-82 LM125/LM126 Precision Dual-Tracking Regulators 8/80 6/86 235
AN-87 Comparing the High Speed Comparators 6/73 8/90 251
AN-88 CMOS Linear Applications 7/73 6/86 257
AN-97 Versatile Timer Operates from Microseconds to Hours 12/73 10/90 260
AN-103 LM340 Series Three Terminal Positive Regulators 8/80 — 272
AN-104 Noise Specs Confusing? 5/74 8/90 284
AN-1 10 Fast IC Power Transistor with Thermal Protection 5/74 — 291
AN-1 16 Use the LM1 58/258/358 Dual, Single Supply Op Amp 8/80 3/91 298
AN-127 LM143 Monolithic High Voltage Operation Amplifier Applications 4/76 — 302
AN-1 46 FM Remote Speaker System 6/75 8/90 314
AN-1 54 1 .3V IC Flasher, Oscillator, Trigger or Alarm 12/75 3/91 318
AN-156 Specifying A/D and D/A Converters 2/76 6/86 333
AN-161 IC Voltage Reference Has 1 ppm per Degree Drift 6/76 — 339
AN-162 LM2907 Tachometer/Speed Switch Building Block Applications 6/76 8/90 345
AN-173 IC Zener Eases Reference Design 11 /76 — 362
AN-178 Applications for an Adjustable IC Power Regulator 1 /77 — 365
AN-181 3-Terminal Regulator is Adjustable 3/77 — 369
AN-182 Improving Power Supply Reliability with IC Power Regulators 4/77 — 375
AN-184 References for A/D Converters 7/77 — 378
AN-193 Single Chip Data Acquisition System Simplifies Analog to Digital Conversion 7/77 — 382
AN-200 CMOS A/D Converter Chips Easily Interface to 8080A Microprocessor System 3/78 — 385
AN-202 A Digital Multimeter Using ADD3501 7/80 6/86 395
AN-210 New Phase-Locked Loops Have Advantage as Frequency to Voltage Converters
(and more) 4/7g 8/90 399
AN-211 New Op Amps Ideas 12/78 3/91 407
AN-222 Super Matched Bipolar Transistor Pair Sets New Standard for Drift and Noise 7/79 8/90 433
Linear Applications Numerical List (continued)

Application Notes _ .

Date Page
AN-225 IC Temperature Sensor Provides Thermocouple Cold-Junction Compensation 4/79 — 443
AN-227 Applications of Wideband Buffers 10/79 3/91 449
AN-233 The A/D Easily Allows Many Unusual Applications 1 /80 — 465
AN-236 An Introduction to Sampling Theorem 1 /80 6/86 469
AN-237 Convolution: Digital Signal Processing 1 /80 6/86 481
AN-240 Wide-Range Current-to-Frequency Converters 5/80 8/90 489
AN-241 Working with High Impedance Op Amps 2/80 3/91 495
AN-242 Applying a New Precision Op Amp 4/80 10/90 501
AN-245 Application of the ADC-1 210 CMOS A/D Converter — 6/86 523
AN-247 Using the ADC0808/ADC0809 8-Bit juP Compatible A/D Converters with 8-Channel
Analog Multiplexer 9/80 6/86 531
AN-253 LH0024 and LH0032 High Speed Op Amp Applications /80 — 547
AN-255 Power Spectrum Estimation 11 /80 — 558
AN-256 Circuitry for Inexpensive Relative Humidity Measurement 8/81 — 586
AN-258 Data Acquisition Using the ADC081 6 and ADC081 7 8-Bit A/D Converter with On-Chip
1 6 Channel Multiplexer 1/81 6/86 590
AN-260 A 20-Bit (1 ppm) Linear Slope-Integrating A/D Converter 1/81 — 612
AN-261 Low Distortion Wideband Power Op Amp 7/81 8/90 618
AN-262 Applying Dual and Quad FET Op Amps 5/81 6/86 627
AN-263 Sine Wave Generation Techniques 3/81 3/91 634
AN-265 An Electronic Watt-Watt Hour Meter 2/84 6/86 646
AN-266 Circuit Applications of Sample-Hold Amplifiers 1/81 6/86 651

AN-269 Circuit Applications of Multiplying CMOS A/D Converters 9/81 6/86 659
AN-271 Applying the New CMOS MICRO-DAC 9/81 6/86 664
AN-272 Op Amp Booster Designs 9/81 6/86 674
AN-274 CMOS A/D Converter Interfaces Easily with Many Microprocessors 7/81 6/86 681

AN-275 CMOS D/A Converters Match Most Microprocessors 7/81 — 685

AN-276 A New Low-Cost Sampled Data 1 0-Bit CMOS A/D Converter 7/81 — 690
AN-277 The New MICRO-DAC Product Line for Microprocessor Systems 7/81 6/86 695
AN-278 Designing with a New Super Fast Dual Norton Amplifier 9/81 6/86 701

AN-280 A/D Converters Easily Interface with 70 Series Microprocessors 11/81 — 709
AN-281 Data Acquisition Using INS8048 1 1/81 6/86 715
AN-284 Single-Supply Applications of CMOS MICRO-DACs 9/81 3/91 720
AN-285 An Acoustic Transformer Powered Super-High Isolation Amplifier 10/81 6/86 724
AN-286 Applications of the LM392 Comparator Op Amp IC 9/81 6/86 728
AN-288 System-Oriented DC-DC Conversion Techniques 4/82 6/86 734
AN-292 Applications of the LM3524 Pulse-Width Modulator 8/82 6/86 739
AN-293 Control Applications of CMOS DACs 3/82 6/86 744
AN-294 Special Sample and Hold Techniques 4/82 6/86 750
AN-295 A High Performance Industrial Weighing System 3/82 6/86 754
AN-298 Isolation Techniques for Signal Conditioning 5/82 6/86 758
AN-299 Audio Applications of Linear Integrated Circuits 4/82 8/90 765
AN-300 Simple Circuit Detects Loss of 4 mA-20 mA Signal 5/82 — 770
AN-301 Signal Conditioning for Sophisticated Transducers 1/82 — 774
AN-307 Introducing the MF 10: A Versatile Monolithic Active Filter Building Block 8/82 8/90 786
AN-31 Theory and Applications of Logarithmic Amplifiers 7/82 4/91 797
AN-336 Understanding Integrated Circuit Package Power Capabilities 3/83 — 802
AN-343 LH1605 Switching Regulator 9/83 6/86 807
AN-344 LF1 3006/LF1 3007 Precision Digital Gain Set Applications 3/84 6/86 817
AN-346 High-Performance Audio Applications of the LM833 8/85 8/90 822
AN-384 Audio Noise Reduction and Masking 3/85 — 831

AN-386 A Non-Complementary Audio Noise Reduction System 3/85 — 837

AN-390 DNR® Applications of the LM1894 3/85 — 847

AN-391 The LM1 823: A High Quality TV Video I.F. Amplifier and Synchronous Detector
3/85 856
for Cable Receivers

Linear Applications Numerical List (continued)

Application Notes
Date Date Page
AN-402 LM2889 R.F. Modulator 6/85 6/86 872
AN-435 LMC835 Digital Controlled Graphic Equalizer 3/86 883
AN-446 A 1 50W IC Op Amp Simplifies Design of Power Circuits 4/86 891
AN-447 Schemes for BIFET Amplifiers and Switches
Protection 4/86 8/90 905
AN-460 LM34/LM35 Precision Monolithic Temperature Sensors 6/86 11/90 908
AN-656 Understanding the Operation of CRT Monitor 11/89 917
AN-693 LM628 Programming Guide 4/90 4/91 923
AN-694 A DMOS 3A, 55V H-Bridge: The LMD18200 6/90 943
AN-706 LM628/LM629 User Guide 8/90 952
AN-71 LM78S40 Switching Voltage Regulator Applications 1 1 /90 974
AN-715 LM385 Feedback Provides Regulator Isolation 11/90 989
AN-769 Dynamic Specifications for Sampling A/D Converters 5/91 990
AN-775 Specifications and Architectures of Sample-and-Hold Amplifiers 7/92 9/93 996
AN-776 20W Simple Switcher Forward Converter 6/91 1002
AN-777 LM2577 Three Output, Isolated Flyback Regulator 6/91 1006
AN-779 A Basic Introduction to Filters—Active, Passive, and Switched-Capacitor 4/91 1008
AN-813 Topics on Using the LM6181—A New Current Feedback Amplifier 3/92 1030
AN-828 Speed Torque of Bipolar Stepper Motors
Increasing the High 5/93 1040
AN-840 Development of an Extensive SPICE Macromodel for "Current Feedback" Amplifiers ... 11/93 1049
AN-856 A SPICE Compatible Macromodel for CMOS Operational Amplifiers 11/93 1063
AN-861 Guide to CRT Design 1/93 1067
AN-867 Designing the Video Section of 1 600 x 1 280-Pixel CRTs 1 2/93 1082
AN-898 Audio Amplifiers Utilizing: SPIKEtm Protection 1 0/93 1093
AN-906 Interfacing the LM1 2454/8 Data Acquisition System Chips to Microprocessors
and Microcontrollers 1 0/93 1102
AB-7 Multivibrator Timer CAD 3/86 8/90 1132
AB-10 Fluid Level Control System 11/83 1134
AB-1 1 High-Efficiency Regulator Has Low Drop-Out Voltage 9/83 6/86 1136
AB-12 Wide Adjustable Range PNP Voltage Regulator 2/84 1137
AB-24 Bench Testing LM3900 and LM359 Input Parameters 1 2/85 8/90 1138
AB-25 Dithering DisplayExpands Bar Graph's Resolution 8/81 1140
AB-30 RS-232 Line Driver Power Supply 6/86 8/90 1142
LB-1 Instrumentation Amplifier 3/69 1144
LB-2 Feedforward Compensation Speeds Op Amps 3/69 1146
LB-4 Fast Compensation Extends Power Bandwidth 4/69 1148
LB-5 High Q Notch Filter 3/69 1149
LB-6 Fast Voltage Comparators with Low Input Current 5/69 1150
LB-8 Precision AC/DC Converters 8/69 1153
LB-9 Universal Balancing Techniques 8/69 1155
LB-1 1 The LM1 10—An Improved IC Voltage Follower 3/70 1157
LB- 12 An IC Voltage Comparator for High Impedance Circuitry 1 /70 1160
LB-14 Speed Up the LM108 with Feedforward Compensation 1 1/70 1162
LB-15 High Stability Regulators 1/71 1164
LB-16 EasilyTuned Sine Wave Oscillators 3/71 1166
LB-17 LM1 18 Op Amp Slews 70V/ju,s 9/71 1168
LB-18 + 5V to - 1 5V Converter 7/72 1170
LB-19 Predicting Op Amp Slew Rate Limited Response 8/72 1172
LB-20 A Fully Differential Input Voltage Amplifier 1 2/72 1174
LB-21 Instrumentational Amplifier 6/73 8/90 1176
LB-22 Low Drift Amplifier 3/86 1178
LB-23 Precise Tri-Wave Generation 6/73 1179
LB-24 Pre-Amp Makes Thermocouple Amplifier with Cold Junction
Versatile IC
Compensation 6/73 — 1180
LB-25 True rms Detector 6/73 — 1182
LB-26 Specifying Selected Op Amps and Comparators 1 0/73 — 1184
LB-27 Micropower Thermometer 1 /74 — 1186
Linear Applications Numerical List (continued)

Application Notes
D t Date Page
LB-28 General Purpose Power Supply 6/74 — 1188
LB-32 Microvolt Comparator 6/76 — 1190
LB-34 A Micropower Voltage Reference 6/76 — 1192
LB-35 Adjustable 3-Terminal Regulator for Low-Cost Battery Charging Systems 8/76 — 1193
LB-38 Wide Range Timer 2/77 — 1195
LB-39 Circuit Techniques for Avoiding Oscillations in Comparator Applications 1 /78
— 1196
LB-41 Precision Reference Uses Only Ten Microamperes 6/78 — 1198
LB-42 Get Fast Stable Response from Improved Unity-Gain Followers 8/78 — 1200
LB-44 Get More Power Out of Dual or Quad Op Amps 4/79 — 1202
LB-45 Frequency-to-Voltage Converter Uses Sample-and-Hold to Improve Response
and Ripple 4/79 1204
LB-46 A New Production Technique for Trimming Voltage Regulators 7/79 6/86 1206
LB-47 High Voltage Adjustable Power Supplies 3/80 — 1208
LB-48 Simple Voltmeter Monitors TTL Supplies 2/80 — 1210
LB-49 Programmable Power Regulators Help Check Out Computer System Operating
Margins 1 /85 1212
LB-51 Add Kelvin Sensing and Parallel Capability to 3-Terminal Regulators 3/81 — 1214
LB-52 A Low Noise Precision Op Amp 12/80 — 1216
LB-53 /xP Interface for A/D Allows Asynchronous Reads
a Free Running 7/81 6/86 1218
Appendix A The Monolithic Operational Amplifier: A Tutorial Study 1 2/84 6/86 1220
Appendix C V/F Converter IC's Handle Frequency-to-Voltage Needs 8/80 6/86 1241
Appendix D Versatile Monolithic V/F's Can Compute as well as Convert with High Accuracy — 8/80

Appendix H Standard Resistance Values
gH National
MM Semiconductor

Device/ Application Literature Cross-Reference

Device Number Application Literature

ADC80 AN-360
ADC0801 AN-233, AN-271, AN-274, AN-280, AN-281, AN-294, LB-53
ADC0802 AN-233, AN-274, AN-280, AN-281 LB-53,

ADC0803 AN-233, AN-274, AN-280, AN-281 LB-53,

ADC08031 AN-460
ADC0804 AN-233, AN-274, AN-276, AN-280, AN-281, AN-301, AN-460, LB-53
ADC0805 AN-233, AN-274, AN-280, AN-281 LB-53,

ADC0808 AN-247, AN-280, AN-281

ADC0809 AN-247, AN-280
ADC0816 AN-193, AN-247, AN-258, AN-280
ADC0817 AN-247, AN-258, AN-280
ADC0820 AN-237
ADC0831 AN-280, AN-281
ADC0832 AN-280, AN-281
ADC0833 AN-280, AN-281
ADC0834 AN-280, AN-281
ADC0838 AN-280, AN-281
ADC1001 AN-276, AN-280, AN-281
ADC1005 AN-280
ADC10461 AN-769
ADC10462 AN-769
ADC10464 AN-769
ADC10662 AN-769
ADC10664 AN-769
ADC1210 AN-245
ADC12441 AN-769
ADC12451 AN-769
ADC3501 AN-200, AN-202
ADC351 1 AN-200
ADC3701 AN-200
ADC371 1 AN-200
CD4016 AB-10
DAC0800 AN-693
DAC0830 AN-284
DAC0831 AN-271, AN-284
DAC0832 AN-271 AN-284

DAC1000 AN-271, AN-275, AN-277, AN-284

DAC1001 AN-271, AN-275, AN-277, AN-284
DAC1002 AN-271 AN-275, AN-277, AN-284

DAC1006 AN-271, AN-275, AN-277, AN-284

DAC1007 AN-271, AN-275, AN-277, AN-284

Device/Application Literature Cross-Reference (continued)

Device Number Application Literature

DAC1008 AN-271, AN-275, AN-277, AN-284

DAC1020 AN-263, AN-269, AN-2293, AN-294, AN-299
DAC1021 AN-269
DAC1022 AN-269
DAC1208 AN-271, AN-284
DAC1209 AN-271, AN-284
DAC1210 AN-271, AN-284
DAC1218 AN-293
DAC1219 AN-693
DAC1220 AN-253, AN-269
DAC1221 AN-269
DAC1222 AN-269
DAC1230 AN-284
DAC1 231 AN-271 AN-284

DAC1232 AN-271, AN-284

DAC1280 AN-261, AN-263
DH0034 AN-253
DH0035 AN-49
INS8070 AN-260
LF1 1 LB-39
LF155 AN-263, AN-447
LF198 AN-245, AN-294
LF31 1 AN-301
LF347 AN-256, AN-262, AN-263, AN-265, AN-266, AN-301 AN-344, AN-447, LB-44

LF351 AN-242, AN-263, AN-266, AN-271 AN-275, AN-293, AN-447, Appendix

, C
LF351A AN-240
LF351B Appendix D
LF353 AN-256, AN-258, AN-262, AN-263, AN-266, AN-271, AN-285, AN-293, AN-447, LB-44, Appendix D
LF356 AN-253, AN-258, AN-260, AN-263, AN-266, AN-271, AN-272,
AN-275, AN-293, AN-294, AN-295, AN-301 AN-447, AN-693

LF357 AN-263, AN-447, LB-42

LF398 AN-247, AN-258, AN-266, AN-294, AN-298, LB-45
LF41 AN-294, AN-301 AN-344, AN-447

LF412 AN-272, AN-299, AN-301, AN-344, AN-447

LF441 AN-301, AN-447
LF13006 AN-344
LF13007 AN-344
LF1 3331 AN-294, AN-447
LH0002 AN-13, AN-227, AN-263, AN-272, AN-301
LH0024 AN-253
LH0032 AN-242, AN-253
LH0033 AN-48, AN-227, AN-253
LH0063 AN-227
LH0070 AN-301
LH0071 AN-245
LH0094 AN-301
LH0101 AN-261
LH1605 AN-343
LH2424 AN-867
LM10 AN-21 1, AN-247, AN-258, AN-271, AN-288, AN-299, AN-300, AN-460, AN-693
LM 1 AN-241 AN-242, AN-260, AN-266, AN-271
91 A
A 5

Device/Application Literature Cross-Reference (continued)

Device Number Application Literature

LM12 AN-446, AN-693, AN-706

LM101 AN-4, AN-13, AN-20, AN-24, LB-42, Appendix A
LM101 AN-29, AN-30, AN-31, AN-79, AN-241 AN-711, LB-1, LB-2, LB-4, LB-8, LB-14, LB-16, LB-19, LB-28
LM102 AN-4, AN-13, AN-30, LB-1, LB-5, LB-6, LB-1
LM103 AN-1 10, LB-41
LM1 05 AN-23, AN-110, LB-3
LM106 AN-41, LB-6, LB-12
LM107 AN-20, AN-31, LB-1, LB-12, LB-19, Appendix A
LM108 AN-29, AN-30, AN-31, AN-79, AN-21 1, AN-241, LB-14, LB-15, LB-21
LM108A AN-260, LB-15, LB-19
LM109 AN-42, LB-15
LM1 09A LB-1
LM1 10 LB-1 1 , LB-42
LM1 1 AN-41, AN-103, LB-12, LB-16, LB-32, LB-39
LM112 LB-19
LM113 AN-56, AN-110, LB-21, LB-24, LB-28, LB-37
LM117 AN-178, AN-181, AN-182, LB-46, LB-47
LM117HV LB-46, LB-47
LM118 LB-17, LB-19, LB-21, LB-23, Appendix A
LM1 1 LB-23
LM120 AN-182
LM121 AN-79, AN-104, AN-184, AN-260, LB-22
LM121 LB-32
LM122 AN-97, LB-38
LM125 AN-82
LM126 AN-82
LM129 AN-1 73, AN-178, AN-262, AN-266
LM131 AN-210, AN-460, Appendix D
LM131A AN-210
LM134 LB-41, AN-460
LM135 AN-225, AN-262, AN-292, AN-298, AN-460
LM1 37 LB-46
LM137HV LB-46
LM138 LB-46
LM139 AN-74
LM143 AN-127, AN-271
LM148 AN-260
LM150 LB-46
LM158 AN-1 16
LM160 AN-87
LM161 AN-87, AN-266
LM163 AN-295
LM194 AN-222, LB-21
LM195 AN-110
LM199 AN-161, AN-260
LM199A AN-161
LM21 1 LB-39
LM231 AN-210
LM231A AN-210
LM235 AN-225
LM239 AN . 74

Device/Application Literature Cross-Reference (continued)

Device Number Application Literature

LM258 AN-1 16
LM260 AN-87
LM261 AN-87
LM34 AN-460
LM35 AN-460
LM301A AN-178, AN-181, AN-222
LM308 AN-88, AN-184, AN-272, LB-22, LB-28, Appendix D
LM308A AN-225, LB-24
LM309 AN-178, AN-182
LM31 AN-41 AN-1 03, AN-260, AN-263, AN-288, AN-294, AN-295, AN-307, LB-12, LB-16, LB-18, LB-39

LM313 AN-263
LM31 AN-258
LM317 AN-178, LB-35, LB-46
LM31 7H LB-47
LM318 AN-299, LB-21
LM319 AN-828, AN-271, AN-293
LM320 AN-288
LM321 LB-24
LM324 AN-88, AN-258, AN-274, AN-284, AN-301, LB-44, AB-25, Appendix C
LM329 AN-256, AN-263, AN-284, AN-295, AN-301
LM329B AN-225
LM330 AN-301
LM331 AN-21 0, AN-240, AN-265, AN-278, AN-285, AN-31 1 LB-45, Appendix C, Appendix D

LM331A AN-210, Appendix C

LM334 AN-242, AN-256, AN-284
LM335 AN-225, AN-263, AN-295
LM336 AN-202, AN-247, AN-258
LM337 LB-46
LM338 LB-49, LB-51

LM339 AN-74, AN-245, AN-274

LM340 AN-103, AN-182
LM340L AN-256
LM342 AN-288
LM346 AN-202, LB-54
LM348 AN-202, LB-42
LM349 LB-42

LM358 AN-1 1 6, AN-247, AN-271 AN-274, AN-284, AN-298, Appendix C


LM358A Appendix D
LM359 AN-278, AB-24
LM360 AN-87
LM361 AN-87, AN-294
LM363 AN-271
LM380 AN-69, AN-146
LM382 AN-147
LM385 AN-242, AN-256, AN-301 AN-344, AN-460, AN-693, AN-777

LM386 LB-54
LM391 AN-272
LM392 AN-274, AN-286

l_ M 393 AN-271, AN-274, AN-293, AN-694

LM394 AN-262, AN-263, AN-271 AN-293, AN-299, AN-31

, 1, LB-52

LM395 AN-178, AN-181, AN-262, AN-263, AN-266, AN-301 AN-460, LB-28

Device/ Application Literature Cross-Reference (continued)

Device Number Application Literature

LM399 A N-1 84
LM555 AN-694, AB-7
LM556 AB-7
LM 565 AN-46, AN-146
LM566 AN-146
LM6(>4 AN-460
LM628 AN-693, AN-706
LM629 AN-693, AN-694, AN-706
LM709 AN-24, AN-30
LM710 AN-41, LB-12
LM725 LB-22
LM741 AN-79, LB-19, LB-22
LM832 AN-386, AN-390
LM833 AN-346
LM1036 AN-390
LM1202 AN-867
LM1203 AN-861
LM1458 AN-116
LM1524 AN-272, AN-288, AN-292, AN-293
LM1 558 AN-1 16
LM1578A AB-30
LM1823 AN-391
LM1830 AB-10
LM1865 AN-390
LM1886 AN-402
LM1889 AN-402
LM1894 AN-384, AN-386, AN-390
LM2419 AN-861
LM2577 AN-776, AN-777
LM2889 AN-391, AN-402
LM2907 AN-162
LM2917 AN-162
LM2931 AB-12
LM2931CT AB-11
LM3045 AN-286
LM3046 AN-146, AN-299
LM3089 AN-147
LM3524 AN-272, AN-288, AN-292, AN-293
LM3525A AN-694
LM3578A AB-30
LM3876 AN-898
LM3900 AN-72, AN-263, AN-274, AN-278, LB-20, AB-24
LM3909 AN-1 54
LM3911 LB-27, AN-460
LM391 AN-460, LB-48, AB-25
LM3915 AN-386
LM3999 AN-161
LM4250 AN-88, LB-34
LM6181 AN-813, AN-840
LM7800 AN-178
LM12454/8 AN-906
LM18293 AN-706

Device/ Application Literature Cross-Reference (continued)

Device Number Application Literature

LM78L12 AN-146
LM78S40 AN-711

LMC555 AN-460, AN-828

LMC660 AN-856
LMC835 AN 435

LMC6044 AN 856

LMC6062 AN-856
LMC6082 AN-856
LMC6484 AN-856
LMD18200 AN-694, AN-828

LMF40 AN-779
LMF60 AN-779
LMF90 AN-779
LMF100 AN-779
LMF120 AN-779
LMF380 AN-779
LMF390 AN-779
LP324 AN-284
LP395 AN-460
LPC660 AN-856
MF4 AN-779
MF5 AN-779
MF6 AN-779
MF8 AN-779
MF10 AN-307, AN-779

MM2716 LB " 54
MM54104 AN-252, AN-287, LB-54

MM571 10 AN-382
MM74C00 AN-88
MM74C02 AN-88
MM74C04 AN-88
MM74C948 AN-193
MM74HC86 AN-861 AN-867

MM74LS138 LB " 54
MM53200 AN-290
2N4339 AN-32

23 Semiconductor
Subject Index

A/D (See Analog-to-Digital) Current Amplifier: AN-4, AN-13, AN-227

ABSOLUTE VALUE AMPLIFIER: AN-31 Current Feedback Amplifier: AN-813, AN-840
AC AMPLIFIER: AN-31, AN-48, AN-72 Difference: AN-20, AN-29, AN-31, AN-72
AC TO DC CONVERTER: AN-31, LB-8 Differential Input: LB-20
ACTIVE FILTER (See Filter) Differentiator: AN-20, AN-31, AN-72
AGC Digitally Controlled: AN-269
DC: AN-72 Drift Testing: AN-79
Methods: AN-72 Dual Op Amp with Single Supply: AN-1 16
Television Signal: AN-391 FET Input: AN-4, AN-29, AN-32, AN-227,
ALARM AN-253, AN-447
Inexpensive IC: AN-154 Fiber Optic Link: AN-253
AM-FM: Follower (See Voltage Follower)

Demodulators and Detectors: AN-46 Frequency Compensation: AN-79

AMMETER High Current Buffer: AN-4, AN-13, AN-29,

AN-31, AN-48, AN-227
AN-71, AN-242
High Input Impedance: AN-29, AN-31, AN-32, AN-48,
AN-72, AN-227, AN-241, AN-253, LB-1
150 Watt Op Amp, LM12: AN-446
High Resolution (Video): AN-867, AN-813, AN-861
AC: AN-31, AN-48, AN-72
High Speed: AN-227, AN-253, LB-42, AN-813, AN-840,
Absolute Value: AN-31
AN-861, AN-867
AGC: AN-391 High Speed Peak Detector: AN-227
Anti-Log Generator: AN-30, AN-31
High Speed Sample and Hold: AN-253
Audio: AN-32, AN-69, AN-72, AN-898 High Voltage: AN-72, AN- 127
Battery Powered: AN-71, AN-211 Improved DC Characteristics: AN-79
Bias Current: AN-242
Input Guarding: AN-29, AN-447
Bridge: AN-29, AN-31 Instrumentation: AN-29, AN-31, AN-71, AN-79,
Bridged: AN-69 AN-1 27, AN-222, AN-242, LB-1, LB-21
Buffered: AN-253 Instrumentation Shield/Line Driver: AN-48
Buffered High Current Output: AN-4, AN-13, Integrator: AN-20, AN-29, AN-31, AN-72, AN-88
AN-29, AN-31, AN-48, AN-253, AN-261 AN-272
Integrator, JFET AC Coupled: AN-32
Cascode, FET: AN-32
Inverting: AN-20, AN-31, AN-71, AN-72, LB-17
Cascode, RF: AN-32 Level Shifting: AN-4, AN-13, AN-32, AN-41, AN-48
Circuit Description LH0002: AN-4, AN-13, AN-227 Line Receiver: AN-72
Circuit Description LH0024: AN-253 Logarithmic Converter: AN-29, AN-30, AN-31
Circuit Description LH0032: AN-253 Low Drift: AN-79, AN-222, LB-22, LB-24
Circuit Description LH0033: AN-48, AN-227
Low Frequency: AN-74
Circuit Description LH0063: AN-227
Low Noise: AN-222, AN-346
Circuit Description LM108/LM208/LM308: AN-29 Low Offset: AN-242
Circuit Description LM118/LM218/LM318 LB-17 Meter: AN-71
Circuit Description LM3900: AN-72 Micropower: AN-71
LM4250 Micropower
Circuit Description
Microphone: AN-346
Programmable Amp: AN-71
Nano-Watt: AN-71
Clamping: AN-31, LB-8
Noise: AN-241
CMOS as Linear Amp: AN-88
Compensation: AN-242, AN-253, AN-813, AN-861
CRT (Cathode Ray Tube): AN-861
1 1 3

Subject Index (Continued)

Noise Specifications: AN-104, LB-26 Current Source: AN-202
Non-Inverting Amplifier: AN-20, AN-31, AN-72 Dielectric Absorption: AN-260
Non-Linear: AN-4, AN-31 Differential Analog Input: AN-233
Norton: AN-72, AN-278 Dual Slope Converter: AN-260
Operational: AN-4, AN-20, AN-29, AN-31, Errors: AN-1 56
AN-63, AN-211, AN-241, AN-446, Appendix A FET Switched Multiplexer: AN-260
Output Resistance: AN-29 Free-Running Interface: LB-53
Paralleling: LB-44 Grounding Considerations: AN-274
Photocell: AN-20 Integrating Converters: AN-260
Photodiode: AN-20, AN-29, AN-31, LB-12 Integrating 10-Bit: AN-262
Photoresistor Bridge: AN-29 Integrator Comparator: AN-260
Piezoelectric Transducer: AN-29, AN-31 Linearity Error Specifications: AN-1 56
Power: AN-69, AN-72, AN-110, AN-125, AN-127, Logarithmic: AN-274
AN-446, AN-898, LB-44
Microprocessor Compatible: AN-284
(See also Buffer, High Current)
Microprocessor Controlled Offset Adjust: AN-274
Preamp: AN-79, AN-346, LB-24
Microprocessor Interfacing: AN-274
Pulse: AN-13
Offset Adjust: AN-274
Rejection, Power Supply: AN-29
Ramp Generator: AN-260
Reset Stabilized: AN-20
Ratiometric Conversion: AN-247
RF (See RF Amplifier)
References: AN-1 84
RGB: AN-861
Resolution: AN-1 56, AN-276
Sample and Hold: AN-4, AN-29, AN-31, AN-32, AN-48,
AN-72, AN-245, LB-1 Sampled Data Comparator: AN-276

Single Supply: AN-72, AN-21 Sampled Data Comparator Input: AN-274

Solar Cell: AN-4 Single Slope Converter: AN-260

Specifying Selected Parameters: LB-26

Single Supply: AN-245, AN-284

Squaring: AN-72 Span Adjustment: AN-233, AN-274

Strain Gauge: AN-222 Specifications: AN-1 56, AN-769

Summing: AN-20, AN-31 Successive Approximation Register: AN-1 93

Temperature Probe: AN-31 AN-56 ,

Testing: AN-1 79, AN-233

Transmission Line Driver: AN-4, AN-1 Voltage Comparator: AN-276

A Voltage Mode: AN-284

Tutorial Study of Op Amps: Appendix
Variable Gain: AN-31, AN-32, AN-299, AN-346,
Z-80 Interface: AN-247
LB-1 (See also AGC) 10-Bit Data Formats: AN-277
Very High Current Booster with High 12-Bit Serial Output: AN-245
Compliance: AN-127 15-Bit Single Slope Integrating Converter: AN-295
Video: AN-813, AN-861 6800 ju,P Interface: AN-247
Wide Band Buffer: AN-227 8080 ixP Interface: AN-247
100 mA Current Booster: AN-127
90 Watt Audio: AN-127
As a Divider: AN-233
As a Voltage Comparator: AN-233
High Speed: AN-237



Absolute Conversion: AN-247

Digital: AN-284 (See also AGC)
Accuracy: AN-1 56, AN-276
Analog Input Consideration: AN-247
AN-346, AN-898
Auto Gain Ranging Converter: AN-245
Bridge Amplifier: AN-69
Binary Codes: AN-1 56
Intercom: AN-69
Converters: AN-87, AN-1 56, AN-1 62, AN-1 93, AN-233,
Phono: AN-346
AN-245, AN-247, AN-258, AN-260, AN-274, AN-276,
AN-281, LB-6, Appendix C, Appendix D Power Amplifier: AN-69

Subject Index (Continued)

Tone Control: AN-69 Digitally Controlled: AN-271
Voltage-Controlled: AN-299 Programmable: AN-344 a
1A Class AB Current Booster: AN-127 CAPACITIVE TRANSDUCER: AN-1 62 X
100 mA Current Booster: AN-127 CAPACITORS
(See also FM Stereo, Amplifiers) Bypass: AN-4, AN-428, LB-2, LB-15
Flat: AN-346 (See also Frequency Compensation)
Phono: AN-346 Dielectric Polarization: AN-29
AUDIO MIXER: AN-72 Electrolytic as Timing Capacitor: AN-97
AUTO ERROR CORRECTION: AN-360 Filter, Power Supply: AN-23
AUTO GAIN RANGING: AN-360 Multiplier, Capacitance: AN-29, AN-31
Anti-Skid Circuit: AN-1 62 CASCODE AMPLIFIER: AN-32
Tachometer: AN-1 62 CHARGER: LB-35
LB-14.LB-19, AN-813
LH0002 Current Amplifier: AN-1
Charger: LB-35
LH0033 Buffer Amplifier: AN-48
LM34/LM35 Temperature Sensor: AN-460
LM105/LM205/LM305 Positive Voltage
BI-QUAD FILTER: AN-72 Regulator: AN-23
BIAS CURRENT (See Drift Compensation) LM108/LM208/LM308 Operational Amplifier: AN-29
Compensation: AN-3 LM109/LM209/LM309 Three Terminal
Drift Compensation: AN-3 Regulator: AN-42
BIAS CURRENT TEST SET: AN-24 LM110/LM210/LM310 Voltage Follower: LB-11

BLINKER LM111/LM211/LM311 Voltage

Lamp: AN-1 10 Comparator: AN-41, LB-12

Low Voltage IC: AN-1 54 LM113 1.2 Volt Reference Diode: AN-56
Two Wire: AN-1 54 LM118/LM218/LM318 High Slew Rate Op Amp: LB-17
BOARD LAYOUT: AN-29, AN-813, AN-861 LM565 Phase Locked Loop: AN-46

COMPENSATION: AN-29 LM4250 Micropower Programmable Op Amp: AN-71

BRIDGE AMPLIFIER: AN-29, AN-31 Back Porch: AN-861
BUFFERS: AN-49, AN-227 Grid (CRT): AN-867
High Current: AN-4, AN-1 3, AN-29, AN-31, Precision: AN-31 LB-8


Using CMOS Amplifiers: AN-88 CMOS LINEAR AMPLIFIERS (See Amplifiers, CMOS)
(See also Voltage Followers)
AN-253, LB-2, LB-15
COMPARATORS (See Voltage Comparators)
COMPENSATION, DRIFT (See Drift Compensation)
Oscilloscope Square Wave: AN-1 54
(See Frequency Compensation)
(See Drift Compensation)
Subject Index (Continued)
COMPONENT NOISE (See Noise, Component) High Current: AN-42
CONVERTER Programmable: AN-344
100 MHz: AN-32 Two Terminal: AN-1 10

AC to DC: AN-31, LB-8 200 mA: AN-1 03

Analog-to-Digital: (See Analog-to-Digital) CURRENT-TO-FREQUENCY CONVERTER: AN-240
Current-to-Voltage: AN-20, AN-31 DATA ACQUISITION SYSTEM: AN-906
DC-to-DC: LB-18 (See also Switching Regulator) D-TO-A CONVERTER: (See Digital-to-Analog)
Digitally Programmable Band Pass Filter: AN-299 DC SERVO-MOTOR CONTROLLERS: AN-460
Digitally Programmable Panner Attenuator: AN-299 DC-TO-AC CONVERTER: LB-18
Frequency to Voltage: AN-97, AN-210, LB-45, DELAY SWITCH: AN-110
Appendix C, Appendix D Two Terminal: AN-97 (See also Timers)
Logarithmic: AN-29, AN-30, AN-31 DEMODULATORS: AN-49
Phono Preamp: AN-299 AM-FM: AN-46
Voltage Controlled Amplifier: AN-299 Frequency Shift Keying: AN-46
Voltage-to-Frequency: AN-286, AN-299, Appendix D IRIG Channel: AN-46
COUNTER, PULSE: AN-72 Weather Satellite Picture: AN-46
CRT MONITOR: AN-656 Peak: AN-87, AN-386
CROSSOVERS Pulse Width: (See Pulse Width Detectors)
Active: AN-346 Synchronous: AN-391
CRYSTAL OSCILLATOR: AN-32, AN-41, AN-74, AN-402 True RMS: LB-25
CUBE GENERATOR: AN-30, AN-31 Zero Cross: AN-74
CURRENT AMPLIFIER (See also Demodulators)
High Output: AN-227, AN-262 DIELECTRIC ABSORPTION: AN-260
Adjustable: AN-21 AN-72
External: AN-21 AN-29, AN-227
Foldback: AN-82 (See Foldback Current Limiting) DIFFERENTIATOR: AN-20, AN-31, AN-72
Output Short Circuit: AN-72, AN-227 DIGITAL DIVIDER
Variable Ratio: AN-286
Sense Voltage Reduction: AN-21 AN-31 AN-32 , ,


Switchback (See Foldback Current Limiting)
Switching Regulator: AN-21
Two Terminal Current Limiter: AN-110
1A, 65V Power Supply with Variable Current
Limit: AN-127
CURRENT LOOP: AN-300 Amplifier Gain Control: AN-271 AN-284

CURRENT MEASUREMENT: AN-300 Composite Low Offset Fast Amplifier: AN-271

CURRENT MIRROR: AN-72 Digitally Controlled AC Attenuator: AN-284

CURRENT MOTOR: AN-31, AN-32, AN-300 Digitally Controlled Capacitance Amplifier: AN-271
(See also Current-to-Voltage Converter) Digitally Controlled Current Sink: AN-271

CURRENT NOISE (See Noise, Current) Digitally Controlled Function Generator: AN-271

CURRENT SINK High Voltage Output: AN-271, AN-293

Digitally Controlled: AN-271 Output Range Level Shifting: AN-271
Fixed: AN-72 Plate Driving Deflection Amplifier: AN-293
Precision: AN-20, AN-31, AN-32 Processor Controlled Shaker Table Driver: AN-293
CURRENT SOURCE Scanner Control: AN-293
Bilateral: AN-29, AN-31
High Compliance: AN-127
Subject Index (continued)
Single Supply Voltage Mode: AN-271 DUAL TRACKING REGULATORS o

Temperature Limit Controller: AN-293 (See Regulators, Dual Tracking) 5*

Used as a Digitally Programmable DIGITAL VOLT METER (DVM): AN-200 Q.
Potentiometer: AN-271 DWELL METER: AN-162 X
Vernier Adjustment: AN-271 DYNAMIC SPECIFICATIONS: AN-769
4-Quadrant Multiplexing: AN-271 ECL (See Emitter Coupled Logic)
4 to 20 mA Current Loop: AN-271 ELECTRONIC SHUTDOWN: AN-82, AN-103
Catch: AN-22 EMI (Electromagnetic Interference): AN-861
Precision: AN-31, AN-173, LB-8 INTERFACING: AN-87
Protective: AN-21 AN-861
Reference: AN-56, AN-110 ERRORS
Zener: AN-56 Low Error Amplifiers: LB-21

Zenered Transistor Base-Emitter Junction: AN-71 Reducing Comparator Errors for 1 jaV Sensitivity: LB-32



DIVIDER, AN-4, AN-30, AN-31, AN-222 Amplifier: AN-32
DNRtm Operational Amplifier Input: AN-4, AN-29, AN-32,
Applications: AN-390 AN-447
Calibration: AN-390 Switches: AN-32, AN-447
Cascading: AN-390 Volt Meter, FET VM: AN-32
Circuit Design: AN-386 FILTER: AN-307

Operating Principles: AN-384 Adjustable Q: AN-31, LB-5

DOUBLE ENDED LIMIT DETECTOR: AN-31 Bandpass: AN-72, AN-71 2, AN-779, LB-11 (See also
Filter, Notch)
Bessel: AN-779
Bi-Quad: AN-72
Butterworth: AN-779
Minimizing in Amplifiers: LB-22, LB-32, AN-242
Chebeyshev: AN-779
Digitally Programmable Gain: AN-269
Bias Current: AN-3, AN-20, AN-29, AN-31
Elliptic: AN-779
Board Layout: AN-29
Full Wave Rectifying and Averaging: AN-20, AN-31
Gain, Transistor: AN-56
High Pass Active AN-31, AN-72, AN-227,
Guarding Inputs: AN-29
AN-346, LB-11, AN-779
Integrator, Low Drift: AN-31
Infrasound: AN-346
Non-Linear Amplifiers: AN-4, AN-31
Low Pass Filter: AN-20, AN-31 AN-72,
Active ,

Offset Voltage: AN-3, AN-20, AN-31, AN-242 AN-286, AN-346, AN-779

Reset Stabilized Amplifier: AN-20 Low Distortion: AN-346, AN-386
Sample and Hold: AN-4, AN-29 Low Pass Adjustable: AN-384, AN-386
Transistor Gain: AN-56 Notch: AN-31, AN-48, AN-227, AN-71 2, AN-779, LB-5,
Voltage Regulator: AN-21, AN-23, AN-42, LB-15 LB-11
DRIFT, VOLTAGE AND CURRENT: AN-29 Notch, Adjustable Q: AN-31, AN-779, LB-5
(See also Drift Compensation) PID: AN-693, AN-706
DRIVERS Power Supply: AN-23, LB-10
Cable: AN-813 Programmable: AN-344
Chopper: AN-828 Sallen Key: AN-779
L/R: AN-828 Sensitivity Functions: AN-72
MOS Clock Driver: AN-74 Surface Acoustic Wave: AN-391
Zero Crossing Detector and Line Driver: AN-162 Switched Capacitor: AN-779
(See also Voltage Followers, Buffers, Amplifiers)
Tone Control: AN-32
Ultrasound: AN-346
Vestigial Side Band: AN-402

Subject Index (Continued)

FLASHER Pulse Generator: AN-74
Inexpensive IC: AN-154 Sine Wave: AN-115
Lamp: AN-110 Square Wave: AN-74, AN-88, AN-154, LB-23
Two Wire: AN-154 Staircase: AN-88, AN-162
FLIP-FLOP, TRIGGER: AN-72 Time Delay: AN- 14
FLUID LEVEL CONTROL: AB-10 Triangle Wave: LB-23 (See also Oscillator)


FM Digitally Controlled: AN-435
Blend: AN-390 GUARD DRIVER: AN-48, AN-227
Calibration Modulation Level: AN-402 GUARDING AMPLIFIER INPUTS: AN-29
FM STEREO GYRATOR (See Inductor, Simulated)
Remote Speaker: AN- 146 H-BRIDGE: AN-693, AN-694
Negative Voltage Regulator: AN-21, LB-3 HARMONIC DISTORTION: AN-769
Positive Voltage Regulator: AN-23, LB-3 HIGH FREQUENCY: AN-227, AN-253, AN-391
Power Dissipation Curve: AN-23 HIGH PASS ACTIVE FILTER: AN-31, AN-72, AN-307,
Temperature Sensitivity: AN-23 AN-346, AN-779, LB-1
(See also Current Limiting, Foldback) HIGH PASS FILTER: AN-227, AN-307, AN-346
Bandwidth, Extended: AN-29, LB-2, LB-4, LB-14, HIGH SPEED PEAK DETECTOR: AN-227
Bootstrapped Shunt: AN-29 HIGH VOLTAGE
Capacitance, Stray: AN-4, AN-31, AN-428 Driver: AN-49
Capacitive Loads: AN-4, AN-447, LB-14, LB-42 Flasher: AN-154
Differentiator: AN-20 Op Amp: AN-127
Feedforward: LB-2, LB-14, LB-17 Regulator: AN-103
Hints: AN-4, AN-20, AN-23, AN-41, AN-447, INDICATOR
LB-2, LB-4, LB-42
Applications: AN-154
Multiplier: AN-21
Multivibrator: AN-4
Oscillation, Involuntary: AN-4, AN-20, AN-29
Core, Switching Regulator: AN-21
Ferrite Bead: AN-23
Simulated: AN-31, AN-435, AN-712
(See also Frequency Compensation)
Voltage-Controlled: AN-712
(See Amplifiers, Instrumentation)
AN-162, AN-21
INTEGRATOR: AN-20, AN-29, AN-31, AN-32,
Digital: AN-269
Voltage Controlled: AN-299 (See also AGC)
Fiber Optic: AN-266
Digitally Controlled: AN-435 AMPLIFIER: AN-266
Multiple Function: AN-115, LB-23 ISOLATION AMPLIFIER: AN-266, AN-285
Programmable: AN-344
1 1 1

Subject Index (Continued)
Transformer: AN-266, AN-285 AN-402 Q.
LAMP DRIVER Pulse Width: AN-31

Ground Referenced: AN-72 MOISTURE DETECTOR: AB-10, AN-1 54

Voltage Comparator: AN-4, AN-72, LB-12 MONOSTABLE MULTIVIBRATORS (See Multivibrator)


LED (See Light Emitting Diode) MOS DIFFERENTIAL SWITCH: AN-49
AN-32, AN-41, AN-48 MOTOR CONTROL: AN-693, AN-694
1.5V LED Flasher: AN-1 54 MOTOR TORQUE CONTROLLER: AN-693, AN-828
LINE DRIVER: AN-13, AN-48 Analog: AN-4, AN-20, AN-30, AN-31 AN-222 ,

LINE RECEIVER AMPLIFIER: AN-72 Capacitance: AN-29, AN-31

FOR: AN-87 Resistance: AN-29
LM12 150- WATT OP AMP: AN-446 AN-71, AN-72, AN-74
AN-31, AN-211 (See Symmetrical Voltage Regulators)
DAC Controlled Scale Factor: AN-269 NEGATIVE REGULATOR
Digitally Programmable: AN-269 (See Negative Voltage Regulators)

AN-307, AN-346, AN-779 Circuit Description LM104/LM204/LM304: AN-21
LOW DRIFT AMPLIFIERS (See Amplifiers, Low Drift) Compensation

LVDT (See Drift Compensation, Voltage Regulator)

Position Sensor: AN-30 Foldback Current Limiting: AN-21, LB-3

MACROMODELS (See Models, Spice) High Current: AN-21

MAGNETIC High Voltage: AN-21

Variable Reluctance Pickup Buffer: AN-1 62 Hints: LB-15

MAGNETIC FIELD SENSOR: AN-301 Line Regulation Improvement: AN-21

MAGNETIC TAPE: AN-390 Low Dropout Voltage: AN-21

MAGNETIC TRANSDUCER AMPLIFIER: AN-74 Overvoltage Protection: AN-21

METER AMPLIFIER: AN-71, AN-222, AN-265 Power Dissipation: AN-21

MICROPHONE PREAMPLIFIER: AN-299, AN-346 Precision, Stable: LB-15
MICROPOWER Programmable: AN-20, AN-31

Amplifier: AN-71, AN-211 Protective Diodes: AN-21

Circuit Description LM4250 Programmable Remote Sensing: AN-21
Op Amp: AN-71 Ripple: AN-21
Voltage Comparator: AN-71 Switching: AN-21
MIXER Three Terminal: AN-1 82
Audio: AN-72 Transient Response: AN-21
Low Frequency: AN-72 NIXIE DRIVER: AN-32
Spice: AN-813, AN-840, AN-856
Subject Index (Continued)
NOISE: L/C: AN-402
Component: AN-104 Morse Code: AN-1 54
Figure: AN-104, AN-222, AN-391 AN-4, AN-24, AN-31, AN-41,

Filtering in Microvolt Comparators: LB-32 AN-71, AN-72

Generator, "Buzz Box": AN-154 One Shot: AN-88
l/F: AN-104 Piezoelectric Driver: AN-72
Measurement: AN-180 Programmable "Unijunction": AN-72
Television Receiver: AN-391 Pulse: AN-97
Thermal: AN-104 Pulse Output: AN-71, AN-72

Theory: AN-222 Quadrature Output: AN-31, LB-16

Voltage: AN-104 RF: AN-402

Weighting: AN-384 RF JFET: AN-32


Audio: AN-384, AN-386 Sine Wave: AN-20, AN-29, AN-31, AN-32,

AN-72, AN-1 15, AN-264, AN-712, LB-16
Comparison of Types: AN-384
Square Wave: AN-88
Complementary: AN-384
Staircase: AN-72
FM: AN-390
Television: AN-402
Masking: AN-384, AN-386
Triangle Wave: AN-20, AN-24, AN-31, AN-72
Single-Ended: AN-384, AN-386, AN-390
Tunable Frequency: LB-16
Tape: AN-390
Vestigial Side Band: AN-402
Television Audio: AN-390
Video: AN-402
VTR: AN-390
Voltage-Controlled: AN-24, AN-72, AN-81,
AN-1 46, AN-1 62, AN-391, Appendix C
Wien Bridge: AN-20, AN-31, AN-32
NOTCH FILTER: AN-31, AN-48, AN-307, AN-779, LB-5,
(See Frequency-to-Voltage)
Ajusting Offset and Drift to Almost
Zero: AN-79, LB-32, AN-242
PEAK DETECTOR: AN-4, AN-31, AN-72, AN-74,
AN-87, AN-227, AN-386
Drift Compensation: AN-3
Voltage Compensation: AN-3
Phase Shift Oscillator: AN-88
PLL Range Extender: AN-1 62
Wide Range Phase Shifter: AN-391
(See Drift Compensation)
Advantages as Voltage-to-Frequency
ONE SHOT: AN-72, AN-88
Converter: AN-210
Circuit Description LM565: AN-46
(See Amplifiers, Operational)
Damping: AN-46
Locking: AN-46
REFERENCE: AN-288 Loop Filter: AN-46
(See Switches, Optically Isolated) Noise Performance: AN-46
OR GATE: AN-72, AN-74 Phase Comparator: AN-72
Regulator: AN-103 Theory: AN-46
(See Frequency Compensation) PHASE SHIFT OSCILLATOR: AN-88
Crystal: AN-41, AN-74, AN-402 PHONO PREAMPLIFIER: AN-32, AN-222, AN-346
Fiber Optic: AN-266
Inexpensive IC: AN-154
Subject Index (Continued)
Amplifier: AN-20, AN-29, AN-31, AN-244, LB-12 General Purpose: LB-28
Level Detector: AN-41, AN-244 Monitor: LB-48 a
PHOTORESISTOR AMPLIFIER: AN-29 Programmable: LB-49 (See also Regulators) X
PID CONTROLLER: AN-693, AN-706 Split: AN-69, AN-71
POLARITY SWITCHER: AN-344 Phono: AN-32, AN-222, AN-346
POSITION SENSOR: AN-162 Stereo: AN-346
LVDT: AN-301 Video: AN-861
(See Symmetrical Voltage Regulators) PRECISION REFERENCE: AN-161, AN-173
Adjustable Output: AN-42, AN-178, AN-181, OSCILLATOR: AN-72
Bootstrapped Regulator: AN-21 AN-20, AN-31
Circuit Description LM105/LM205/LM305: AN-23, PULSE AMPLIFIER: AN-13, AN-813
Circuit Description LM109/LM209/LM309: AN-42 PULSE GENERATOR: AN-71, AN-72, AN-74
Current Limit: AN-72, AN-21 Proportional: AN-266
(See Drift Compensation, Voltage Regulator)
Failure Mechanisms: AN-23 AN-31, AN-74, LB-18
Filtering, Power Supply: AN-23 PULSE WIDTH MULTIVIBRATOR: AN-292
Fixed Output: AN-42 PYROELECTRIC
Foldback Current Limiting: AN-23 Accelerometer: AN-301
Heat Dissipation: AN-23 Detector Amplifier: AN-301
High-Current: AN-23, AN-72 Resonator Temperature Sensor: AN-301
High Voltage: AN-72, AN-21 1 , LB-47 QUAD AMPLIFIER: AN-71, AN-72
Hints: AN-23, LB-15 QUAD COMPARATOR: AN-74
Low Voltage: AN-56, AN-21 QUADRATURE OSCILLATOR: AN-31, AN-307, LB-16
Micropower Quiescent Power Drain: AN-71, AN-21 RATE GYRO: AN-301
NPN Pass Transistors: AN-72 RECEIVER
Power Limitations: AN-23 FM Remote Speaker: AN-146
Precision: AN-42, LB-15 Infared: AN-290
Programmable Low Power: AN-20, AN-31 Television: AN-391
Protection: AN-23, AN-72 VHF: AN-290
Ripple Induced Failures: AN-23 Ultrasonic: AN-290
Switching Regulator (See Switching Regulator) RECTIFIER, FAST HALF-WAVE: AN-31, LB-8
Temperature Compensation: AN-42, LB-15 RECTIFIER, FULL-WAVE: AN-20, LB-8
Three Terminal: AN-103, AN-178, AN-182, LB-35 REFERENCE
Trimming Output Voltage: LB-46 Low Drift Precision 6.9V: AN-161, AN-173, AN-184
(See also Voltage Regulators)
Micropower: AN-222, LB-34, LB-41
POWER AMPLIFIER (See Buffer, High Current) Precision: AN-79, AN-161, LB-41
REGULATORS (See Voltage Regulators)
Subject Index (Continued)
Infared: AN-290 AN-269, AN-307


AN-32, AN-72, AN-263, LB-1
Ultrasonic: AN-290
Crystal: AN-263
Digital: AN-263
High Current Negative Regulator: AN-21
High Voltage: AN-263
High Negative Voltage: AN-21
Phase Shift: AN-263
Sine Wave Voltage Reference: AN-262
Tuning Fork: AN-263
Voltage-Controlled: AN-262
Wien Bridge: AN-263
Choice of Resistors for Op Amps: AN-79
Tester for Low Values of Resistance: LB-32
RF: AN-391
SLEW RATE: LB-1 7, LB-19, LB-42
(See also Frequency Compensation, Feedforward)
Cascode: AN-32, AN-813
RF OSCILLATOR (See Oscillator, RF)
S/N RATIO (See Signal-to-Noise Ratio)
AN-299, AN-346
Peak: AN-384
RMS Pressure: AN-384
True RMS Detector: LB-25
Sound Effects Oscillator: AN-154
SPEED SENSOR (See Sensor, Speed)
RTD CONTROLLER: AN-292 SPEED SWITCH (See Frequency-to-Voltage Converter)
SPICE (See Models)
SAMPLE AND HOLD: AN-4, AN-29, AN-31, AN-32,
AN-72, AN-266, AN-294, LB-1 1 LB-45 ,

AN-154, AN-222, LB-23

Circuit: AN-286
Extended HOLD Time: AN-245, AN-294
High Speed: AN-253, AN-294
HOLD Step: AN-294 (See also Generator, Staircase)
Infinite HOLD Time: AN-245, AN-294 STEP RESPONSE: LB-19
Reduction of HOLD Step: AN-245, AN-294 STEPPER MOTOR: AN-828
Terms: AN-266 STEREO (See FM Stereo)
SCHMITT TRIGGER: AN-32, AN-72 SUBTRACTOR (See Difference Amplifier)
Mass Velocity: AN-162 SWITCHES
Rotational Velocity: AN-162 Optically Isolated: AN-110
SERVO PREAMPLIFIER: AN-4, AN-31 Two Terminal Time Delay: AN-97
SIGNAL-TO-NOISE RATIO: AN-104, AN-769 (See Foldback Current Limiting)
1 1 1 ,

Subject Index (Continued)

Buck Converter: AN-343, AN-71 THERMAL CAPABILITIES, DEVICE: AN-336
Boost (Step-Up) Converters: AN-711 THERMAL FEEDBACK REDUCTION IN
Circuit Description LH1605: AN-343 MICROVOLT COMPARATORS: LB-32
Circuit Description LM78S40: AN-711 THERMAL NOISE (See Noise, Thermal)
Current Limiting: AN-2, AN-21 THERMAL SHUTDOWN: AN-82, AN- 103
DC Motor Speed Regulation: AN-343 THERMOCOUPLE: AN-225
Dissipation: AN-21 Amplifier with Cold Junction Compensation: AN-21 1

Driver: AN-2, AN-21 AN-222, AN-225, LB-24

Dual-Output: AB-30 Comparator: LB-32

Efficiency: AN-21 Effects on IC's: AN-79, LB-22, LB-32

Forward Converter: AN-776 THERMOMETER: AN-262
High Negative Current: AN-21 Electronic: AN-225, AN-233
Hint: AN-21 Micropower: LB-27, AN-21

Inductor Core Selection: AN-21 , AN-71 Temperature Controller: AN-97

Inverting (DC Plus to DC Minus) Thermocouple: LB-24
Converter: AN-711, LB-18 Using Platinum Sensor: AN-286
Isolated Flyback: AN-777 THERMOMETER, ELECTRONIC: AN-31, AN-56
Line Regulation: AN-21 THRESHOLD DETECTOR: AN-20, AN-31
Overload Shutdown: AN-21 TIME, INTERVAL: AN-31
Polarity Conversion: LB-18 TIMER CIRCUITS: AB-7, AN-97, AN-110
Theory: AN-711, LB-18 TIMERS
Tracking Regulator: AN-20 Cycle Interrupt: AN-97
SYNCHRONOUS Dual Supply Operation: AN-97
Video Detector: AN-391 Electrolytic Timing Capacitors: AN-97
TACHOMETER: AN-72, AN-97 Eliminating Timing Cycle upon Initial
TAPE READER Application of Power: AN-97
Magnetic: AN-74 Linearizing Charging Sweep: AN-97
TAPE COMPENSATION Negative Pulse Triggering: AN-97
Weighing System: AN-271 Noise Immunity: AN-97
TELEVISION: AN-402 One Hour: AN-97
TEMPERATURE: AN-292 Time Delay Circuit: AN-1 10
Centigrade Sensors: AN-460 Time Out, Power Up: AN-97
Controller: AN-293 Wide Range Timer: LB-38
Farenheit Sensors: AN-460 Zero Power Dissipation between
Oven Timing Intervals: AN-97
Controller: AN-262
Platinum RTD High Temperature: AN-262
5V Logic Supply Driving 28V Relay: AN-97
Timer Used as Controller: AN-97 30V Supply Interfacing with 5V Logic: AN-97
Transducer: AN-225, AN-460 TIMING ERROR: AN-97
Transducer, Micropower: LB-27 TONE CONTROL: AN-32, AN-435



TEMPERATURE CONTROL: AN-262, AN-293 Amplifier: LB-24
Precision: AN-266 Signal Conditioners: AN-301

High Efficiency: AN-266 Temperature: LB-27

1 : 1 1

Subject Index (Continued)

Low Noise: AN-222 AN-74, AN-81, AN-146, AN-162, AN-391
(See also Voltage-to-Frequency Converter)
Optically Isolated: AN-110
Power, Protected: AN-110
Bias Current: AN-20
Circuit Description LH0033: AN-48
FM Remote Speaker: AN-146
Circuit Description LM110/LM210/LM310: LB-11
Infared: AN-290
Comparison: LB-11
Two Wire: AN-21
Frequency Compensation: LB-42
VHF: AN-290
Hints, Operating: AN-20
Ultrasonic: AN-290
Offset Adjustment: AN-31, LB-9
Single Supply: AN-72
Voltage Reference: AN-20, AN-31, AN-56
AN-31, AN-72


(See also Regulators, Voltage; Positive, Negative,
TV (See Television)
or Switching Voltage Regulator)
UNITY-GAIN BUFFER: AN-20 Adjustables: AN-178, AN-181, AN-21 AB-11,
VCO (See Voltage-Controlled Oscillator) AB-12, LB-46
VELOCITY SENSOR (See Sensor, Velocity) Automotive: AB-12
VIDEO: AN-391, AN-656 Battery Charging: AB-11, AB-12
VOLTAGE COMPARATOR: AN-41, AN-74, Current: AN-103, AN-110, AN-127
AN-103, AN-288, LB-39
Dual Tracking: AN-82, AN-103
A-to-D Converter Circuit: LB-6
High Current: AN-103, AN-110
AC Coupled: LB-6
High Current Dual Tracking: AN-82
Avoiding Oscillations: LB-39
High Current Regulators: AB-1
Buffered Output: AN-29
High Input Voltage: AN-103, AN-21
Circuit Description LM1 1 1 /LM21 1 /LM31 1 Improving Reliability: AN-182
AN-41, LB-12
Low Dropout: AB-11, AB-12
Comparison: AN-87, LB-12
PNP: AB-11, AB-12
DTL Driver: AN-4, AN-29, AN-31, LB-12
Trimming: LB-46
Dual Limit, High Speed: AN-48
1A, 65V with Variable Current Limit: AN-127
Fast: LB-6
± 32.5V Dual Tracking: AN-127
High Current: AN-71
High Speed Differential: AN-87 AN-240, LB-45, Appendix C, Appendix D
Hints: AN-41 (See also Analog-to-Digital Converters and
Inverting and Non-Inverting with Hysteresis: AN-74 Voltage-Controlled Oscillators)

Lamp Driver: AN-4, AN-72, LB-12 VOLT METER: AN-32, AN-71, LB-45
Microvolt: LB-32 Precision: AN-295
AN-32, AN-263
Op Amp Voltage Comparator: AN-4, AN-71, AN-72
Quad Array: AN-74
Specifying Selected Parameters: LB-26
IC: AN-56
Timers Used as: AN-97
Transistor Base-Emitter Junction: AN-71
TTL Driver: AN-4, AN-29, AN-31, AN-41, LB-12
ZENERS (See Reference)
Zero Crossing: AN-31, AN-41, LB-6, LB-12

Comparators Suitable for "Two Shot": AN-87, AN-162

National Semiconductor
Drift Application Note 3
Techniques for Integrated
DC Amplifiers
Robert J. Widlar
Apartado Postal 541
Puerto Vallarta, Jalisco
With DC amplifiers, it is usually possible to substantially im-
prove drift performance by using additional circuitry along
with some form of adjustment. In fact, one of the reasons
that discrete-component operational amplifiers have better
input current specifications than monolithic amplifiers is that
current compensation is used. Monolithic circuits cannot in-
corporate these techniques because it is not possible to
select components or make adjustments. These adjust-
ments can, however, be made external to the amplifier. This
article will discuss a number of compensation methods
which can substantially reduce the input currents of mono-
lithic amplifiers, especially in limited-temperature-range ap-

Bias current compensation reduces offset and drift when

the amplifier operated from high source resistances. With

low source resistances, such as a thermocouple, the drift

contribution due to bias current can be made quite small. In Figure 1. Summing amplifier with bias-current compen-
this case, the offset voltage drift becomes important. sation for fixed source resistances
A technique is presented here by which offset voltage drifts Figure 2 shows a similar circuit for a non-inverting amplifier.
better than 0.5 jaVVC can be realized. The compensation The produced across the DC resistance of
offset voltage
technique involves only a single room-temperature balance the source due to the input current is cancelled by the drop
adjustment. Therefore, chopper-stabilized performance can across R3. For proper adjustment range, R3 should have a
be realized, with low source resistances, in a fairly-simple maximum value about three times the source resistance
amplifier without tedious cut-and-try compensation and the equivalent parallel resistance of R1 and R2 should
methods. be less than one-third the input source resistance.
bias current compensation This has the same advantages as that in Figure 1,

The simplest and most effective way however, can only be used when the input source has a
compensating for
fixed DC resistance. In many applications, such as long-in-
bias currents is shown in Figure 1. Here, the offset produced
terval integrators, sample-and-hold circuits, switched-gain
by the bias current on the inverting input is cancelled by the
amplifiers or voltage followers operating from unknown
offset voltage produced across the variable resistor, R3.
The main advantage of this scheme, besides its simplicity, is source, the source impedance is not defined. In these cases
other compensation schemes must be used.
that the bias currents of the two input transistors tend to
track well over temperature so that low drift is also Figure 3 gives a compensation technique which does not
achieved. The disadvantage of the method is that a given depend upon having a source resistance. A current is
compensation setting works only with fixed feedback resis- injected into the input terminal from thebase of a PNP tran-
tors, and the compensation must be readjusted if the equiv- sistor. Since NPN input transistors are used on the integrat-

alent parallel resistance of R1 and R2 is changed. ed amplifier,* the base current of the PNP balances out the
•This is true for all monolithic operational amplifiers presently available.

Figure 2. Non-inverting amplifier with bias-current compensation for fixed source resistances
impedance (to about 1 50 Mil) because the current supplied
by the PNP will vary with the input voltage level.

If this characteristic is objectionable, the more-complicated

circuit shown in Figure 4 can be used.

The emitter of the PNP transistor is fed from a current

source so that the compensating current does not vary with
input-voltage level. The design of the current source is such
as to give it about the same characteristics as those on the
input stage of the better monolithic amplifiers! to give clos-
er compensation with changes in temperature and supply
voltage. The circuit makes use of the emitter base voltage
differential between two transistors operated at different
collector currents. 1 2 Although
> it is recommended in the ref-
Select for zero input current
erences that these transistors be well matched, it is not
really necessary since the devices are operated at much
different collector currents.
Figure 3. Summing amplifier with bias-current compen-
Figure 5 shows another compensation scheme for the volt-
age follower connection. This circuit is much simpler than
that shown in Figure 4, but the temperature compensation is
not quite as good. The compensating current is obtained
through a resistor connected across a diode which is boot-
strapped to the output. The diode acts as a regulator so that
the compensating current does not change appreciably with
signal level, giving input impedances about 1 000 MH. The
negative temperature coefficient of the diode voltage also
provides some temperature compensation.

•Select for zero input current

Figure 5. Voltage follower with bias-current compensa-


All the circuits discussed thus far have been tailored for
•Select for zero input current particular applications. Figure 6 shows a completely-general
scheme wherein both inputs are current compensated over
the full common mode range as well as against power sup-
Figure 4. Bias-current compensation for non-inverting ply and temperature variations. This circuit is suitable for
amplifier operated over large common mode use either as a summing amplifier or as a non-inverting am-
range plifier. It is not required that the DC impedance seen by both

base current of the NPN. Further, since a silicon-planar PNP inputs be equal, although lower drift can be expected if they

transistor has approximately the same current-gain versus are.

temperature characteristic as the integrated transistors, an As was mentioned earlier, all the bias compensation circuits
improvement in temperature drift will also be realized.'*' require adjustment. With the circuits in Figures 1 and 2, this

However, perfect compensation should not be expected be- ismerely a matter of adjusting the potentiometer for zero
cause of unit-to-unit variations in the temperature character- output with zero input. It is not so simple with the other
istics of both the PNP transistor and the integrated circuit. circuits, however. For one, it is difficult to use potentiome-

Although the circuit in3 works well for the summing

Figure ters because a very wide range of resistance values are

amplifier connection, does have limitations in other appli-

required to accommodate expected unit-to-unit variations.

cations. It could, for example, be used for the voltage follow- Resistor selection must therefore be used. Test circuits for
selecting bias compensation resistors are given in Figure 7.
er configuration by connecting the base of the PNP to the
non-inverting input. However, this would reduce the input rrhe709andtheLM101.
t|f the operational amplifier uses a Darlington input stage, however, the drift

compensation will not be nearly as good.

It is worthwhile noting here that these expressions make no

assumptions about the current gain of the transistors. It is

shown in References 5 and 6 that the emitter-base voltage
is a function of collector current, not emitter current. There-

fore, the balance will not be upset by base current (except

for interaction with the DC source resistance).

rf The first term in Equation

transistors for equal collector currents.
this offset voltage is directly
(1) is the offset voltage of the two
It can be seen that
proportional to the absolute
temperature-a fact which is substantiated by experiment. 4
•Select for zero input current on
The second term is the change of offset voltage which aris-
non-inverting input es from operating the transistors at unequal collector cur-
"Select for zero input current on rents. For a fixed ratio of collector currents, this is also pro-
inverting input portional to absolute temperature. Hence, if the collector
currents are unbalanced in a fixed ratio to give a zero emit-
ter-base voltage differential, the temperature drift will also
be zero.
Experiment indicates that this is indeed true. Thermal drifts
less than1 00 juV over the - 55°C to + 1 25°C temperature

range have been realized consistently. In order to obtain

these low drifts, however, it is almost necessary to use a
monolithic transistor pair, since a 0.05°C temperature differ-
ential will give a 100 With a monolithic pair, the
ju,V drift.

physical proximity of the devices as well as the high thermal

conductivity of silicon holds this differential to an absolute
TL/H/6925-6 minimum.
Figure 6. Bias-current compensation for differential in- For low drift, the transistors must operate from a low
puts enough source resistance that the voltage drop across the
offset voltage compensation source due to base current (or base current differential if
both bases see the same resistance) is insignificant. Fur-
The highly predictable behavior of the emitter-base voltage
thermore, the transistors must be operated at a low enough
of transistors has suggested a unique drift compensation
collector current that the emitter-contact and base-spread-
method; it is shownin Reference 3 that the offset voltage
ing resistances are negligible, since Equation (1) assumes
drift of a differential transistor pair can be reduced by about
that they are zero.
an order of magnitude by unbalancing the collector currents
such that the initial offset voltage is zero. The basis for this A complete amplifier using this principle is shown in Figure
8. A monolithic transistor pair is used as a preamplifier for a
comes from the equation for the emitter-base voltage differ-
ential of two transistors operating at the same temperature:
conventional operational amplifier. A null potentiometer,
which is set for zero output for zero input, unbalances the
AV BE = —
log e

S2 —
log e

(D collector load resistors of the transistor pair such that the
q 'si q 'ci collector currents are unbalanced for zero offset. This gives
where k is Boltzmann's constant, T is the absolute tempera- minimum drift. An interesting feature of the circuit is that the
ture, q is the charge of an electron, Is is a constant which performance is relatively unaffected by supply voltage varia-
depends only on how the transistor is made and Iq is the tions: a 1 V change in either supply causes an offset voltage
collector current. This equation is derived in Reference 2. change of about 1 juV. This happens because neither term
in Equation (1) is affected by the magnitude of the collector


\ S

" II
30 pF
JL 100 pF

Figure 7. Test circuits for selecting bias-compensation resistors



i—VW— 1%


Figure 8. Example of a DC amplifier using the drift-compensation technique

In order to get low drift, it is necessary that the gain of the With the circuit shown in Figure 8, Equation (8) gives a 25
preamplifier be high enough so that the drift of the opera- jaV input-referred drift for every 1 mV of offset voltage drift
tional amplifier does not degrade performance. The gain or for every 100 nA of offset current drift. It is obvious from
this that the offset current most important if an opera-
can be determined from the expression for the transcon- drift is

ductance of the input transistors: tional amplifier with bipolar input transistors is used.

ale qjc Another important consideration the matching of the col-

= (2)
lector load resistors on the preamplifier stage. A 0.1 -percent
3V BE kT
imbalance in the load resistors due to thermal mismatches
The voltage gain is
or any other cause will produce a 25 /xV shift in offset. This
9VOUT includes the balancing potentiometer which can introduce
AV = (3)
3V| N an error that will depend on how far it is set off midpoint if it
sic has a different temperature coefficient than the resistors.
RL (4)
The most obvious use of this type of low drift amplifier is
with thermocouples, magnetometers, current shunts, wire
where Rl is the average value of the two collector load
strain gauges or sources where very low drift
similar signal
resistors on the input stage and lc is the average of the two
is required and the source resistanceis low enough that the
collector currents.
bias currents do not cause a problem. The 0.5 to 1 liV/°C
Substituting Equation (2), this becomes drift* realized with this relatively simple amplifier over a

QIcRl -55°C to +125°C temperature range compares favorably

with the drift figures achieved with chopper amplifiers: 0.4
ju,V/°C formechanical choppers, 0.5 ju.V/°C with photoelec-
_ qVRL (6) tricchoppers over a 0°C to 55°C temperature range and 2
fiV/°C with field-effect-transistor choppers over a -55°C to
The input referred drift is then + 1 25°C temperature range. In order to give some apprecia-
AVqs + Rl AIqs tion of the level of performance, it is interesting to note that
AV, N = (7)
no substantial improvement in performance would be real-
ized by operating the amplifier in a temperature-controlled
where AVos is the offset voltage drive of the operational
oven. Any improvement would be masked by various ther-
amplifier and Alos is ite offset current drift.
mo-electric effects not directly associated with the amplifier
Using Equation (7), unless extreme care were taken in the choice of input lead
kT (AV s + RlAIqs) •Drifts of 0.05 jliV/°C over a 0-50°C temperature range were reported in
AV| N = (8)
Reference 3 using matched discrete transistors in one can.
material, the method of making connections and the balanc- references
ing of thermal paths. These factors are, in fact, important 1 R. J. Widlar, "A Unique Circuit Design for a High Perform-
when making oven tests to verify the drift of the amplifier ance Operational Amplifier Especially Suited to Monolith-
since thermoelectric effects can easily produce drift volt-
ic Construction," Proa of NEC, Vol. XXI, pp. 85-89, Octo-
ages larger than those of the amplifier if they are not proper- ber, 1965.
ly handled.
2. R. J. Widlar, "Some Circuit Design Techniques for Linear
summary Integrated Circuits," IEEE Trans, on Circuit Theory, Vol.

A number of compensation circuits designed to increase the XII, pp. 586-590, December, 1965.
DC resolution of monolithic operational amplifiers have 3. A. H. Hoffait and R. D. Thorton, "Limitations of Transistor
been presented. Both current compensation techniques for DC Amplifiers," IEEE Proc, Vol. 52, pp. 179-184, Febru-
high impedance levels as well as methods of achieving ary, 1964.
chopper-stabilized drift performance at low impedance lev- 4. A. Tuszynski, "Correlation Between the Base-Emitter
els have been covered. Voltage and Its Temperature Coefficient," Solid State De-
Fairly-simple current compensation which requires that the sign, pp. 32-35, July, 1962.
impedance levels be fixed have been described along with 5. C. T. Sah, "Effect of Surface Recombination
and Channel
compensation which is effective in cases where the source on P-N Junction and Transistor Characteristics," IRE
impedance is not well defined. This latter category includes Trans, on Electron Devices, Vol. ED-9, pp. 94-108, Janu-
long-interval integrators, sample-and-hold circuits, ary, 1962.
switched-gain amplifiers or voltage followers which operate
6. J. E. Iwersen, A. R. Bray, and J. J. Kleimack, "Low-Cur-
from an unknown source. The application of these schemes
rent Alpha in IRE
Trans, on Electron
Silicon Transistors,"
is generally limited to integrated amplifiers since modular
Devices, Vol. ED-9, pp. 474-478, November, 1962.
amplifiers almost always incorporate current compensation.

The drift-reduction techniques provide stabilities better than

0.5 ju,V/°C for low impedance sources, such as thermocou-
ples, current shunts or strain gauges. With a properly de-
signed circuit, compensation depends only on a single room
temperature adjustment, so excellent performance can be
obtained from a fairly-simple amplifier.

Monolithic Op Amp —The National Semiconductor

Application Note 4

Universal Linear
Robert J. Widlar
Apartado Postal 541
Puerto Vallarta, Jalisco

Operational amplifiers are undoubtedly the easiest and best
way of performing a wide range of linear functions from sim-
ple amplification to complex analog computation. The cost
of monolithic amplifiers is now less than $2.00, in large

quantities, which makes it attractive to design them into cir-

cuits where they would not otherwise be considered. Yet
low cost is not the only attraction of monolithic amplifiers.
Since all components are simultaneously fabricated on one
chip, much higher circuit complexities than can be used with
discrete amplifiers are economical. This can be used to give
improved performance. Further, there are no insurmount-
able technical difficulties to temperature stabilizing the am-
plifier chip, giving chopper-stabilized performance with little

added cost.
Chosen for oscillation at 100 Hz.
Operational amplifiers are designed for high gain, low offset
voltage and low input current. As a result, dc biasing is con- TL/H/7357-1
siderably simplified in most and they can be
applications; Figure 1. Free-running multivibrator
used with fairly simple design rules because many potential Another advantage of the circuit is that it will always self
error terms can be neglected. This article will give examples
start and cannot hang up since there is more dc negative
demonstrating the range of usefulness of operational ampli-
feedback than positive feedback. This can be a problem
fiers in linear circuit The examples are certainly not
with many "textbook" multivibrators.
all-inclusive, and hoped that they will stimulate even
it is
Since the operational amplifier is used open loop, the usual
more ideas from others. A few practical hints on preventing
frequency compensation components are not required
oscillations in operational amplifiers will also be given since
since they will only slow it down. But even without the 30 pF
probably the largest single problem that
this is many engi-
capacitor, the LM101 does have speed limitations which re-
neers have with these devices.
strict the use of this circuit to frequencies below about 2
Although the designs presented use the LM101 operational kHz.
amplifier and the LM102 voltage follower produced by Na-
The large input voltage range of the LM101 (both differential
tionalSemiconductor, most are generally applicable to all
and single ended) permits large voltage swings on the input
monolithic devices if the manufacturer's recommended fre-
so that several time constants of the timing capacitor, C1,
quency compensation used and differences in maximum
can be used. With most other amplifiers, R2 must be re-
ratings are taken into account. A complete description of
duced to keep from exceeding these ratings, which requires
the LM101 is given elsewhere; 1 but, briefly, it differs from
that C1 be increased. Nonetheless, even when large values
most other monolithic amplifiers, such as the LM709 2 in
are needed for C1, smaller polarized capacitors may be
that it has a ± 30V differential input voltage range, a + 1 5V,
- 1 2V common mode range with + 1 5V supplies and it can used by returning them to the positive supply voltage in-
stead of ground.
be compensated with a single 30 pF capacitor. The
LM 102,3 which is also used here, is designed specifically as level shifting amplifier
a voltage follower and features a maximum input current of it is necessary
Frequently, in the design of linear equipment,
10 nA and a 10 Wjas slew rate. to takea voltage which is referred to some dc level and
operational-amplifier oscillator produce an amplified output which is referred to ground.
The most straight-forward way of doing this is to use a dif-
The free-running multivibrator shown in Figure 1 is an excel-
shown in Figure 2a. This
ferential amplifier similar to that
lent example an application where one does not normally
however, has the disadvantages that the signal
consider using an operational amplifier. However, this circuit
source is loaded by current from the input divider, R3 and
operates at low frequencies with relatively small capacitors
R4, and that the feedback resistors must be very well
because it can use a longer portion of the capacitor time
matched to prevent erroneous outputs from the common
constant since the threshold point of the operational amplifi-
mode input signal.
er is well determined. In addition, it has a completely-sym-
metrical output waveform along with a buffered output, al-
though the symmetry can be varied by returning R2 to some
voltage other than ground.
A circuit which does not have these problems is shown in which makes the output signal directly compatible with DTL
Figure 2b. Here, an FET transistor on the output of the oper- or TTL An LM103 breakdown diode
integrated circuits.
ational amplifier produces a voltage drop across the feed- clamps the output at 0V or 4V in the low or high states,
back resistor, R1, which is equal to the input voltage. The respectively. This particular diode was chosen because it

voltage across R2 will then be equal to the input voltage has a sharp breakdown and low equivalent capacitance.
multiplied by the ratio, R2/R1 and the common mode rejec-
; When working as a comparator, the amplifier operates open
tion will be as good as the basic rejection of the amplifier, loop so normally no frequency compensation is needed.
independent of the resistor tolerances. This voltage is buff- Nonetheless, the stray capacitance between Pins 5 and 6 of
ered by an LM102 voltage follower to give a low impedance the amplifier should be minimized to prevent low level oscil-
output. lations when the comparator is in the active region. If this
An advantage of the LM101 in this circuit is that it work
will becomes a problem a 3 pF capacitor on the normal com-
with input voltages up to its positive supply voltages as long pensation terminals will eliminate it.

as the supplies are less than ± 1 5V. Figure 3b shows the connection of the LM101 as a compar-
ator and lamp driver. Q1 switches the lamp, with R2 limiting
voltage comparators
the current surge resulting from turning on a cold lamp. R1
The LM101 is well suited to comparator applications for two determines the base drive to Q1 while D1 keeps the amplifi-
reasons: first, it has a large differential input voltage range er from putting excessive reverse bias on the emitter-base
and, second, the output is easily clamped to make com-
junction of Q1 when it turns off.
patible with various driver and logic circuits. It is true that it
doesn't have the speed of the LM710 4 (10 fis versus 40 ns, more output current swing
under equivalent conditions); however, in many linear appli- Because almost all monolithic amplifiers use class-B output
cations speed is not a problem and the lower input currents stages, they have good loaded output voltage swings, deliv-
along with higher voltage capability of the LM101 is a tre- ering ± 10V at 5 mA with ± 15V supplies. Demanding much
mendous benefit. more current from the integrated circuit would require, for
Two comparator circuits using the LM101 are shown in Fig- one, that the output transistors be made considerably larg-
ure 3. The one in Figure 3a shows a clamping scheme



a. standard differential amplifier

b. level-isolation amplifier
Figure 2. Level-shifting amplifiers


a. comparator for driving DTL and b. comparator and lamp driver

TTL integrated circuits

Figure 3. Voltage comparator circuits

Such a circuit is illustrated in Figure 5. A matched FET pair,

connected as source followers, is put in front of an integrat-

ed operational amplifier. The composite circuit has roughly
the same gain as the integrated circuit by itself and is com-
pensated for unity gain with a 30 pF capacitor as shown.
Although it works well as a summing amplifier, the circuit
leaves something to be desired in applications requiring
high common mode rejection. This happens both because
resistors are used for current sources and because the
FET's by themself do not have good common mode rejec-


Figure 4. High current output buffer
er. In addition, the increased dissipation could give rise to OUTPUT
troublesome thermal gradients on the chip as well as exces-
sive package heating in high-temperature applications. It is

therefore advisable to use an external buffer when large

output currents are needed.
A simple way of accomplishing this is shown in Figure 4. A
pair of complementary transistors are used on the output of
the LM101 to get the increased current swing. Although this
circuit does have a dead zone, it can be neglected at fre-
quencies below 100 Hz because of the high gain of the
amplifier. R1 is included to eliminate parasitic oscillations
from the output transistors. In addition, adequate bypassing Figure 5. FET operational amplifier
should be used on the collectors of the output transistors to storage circuits
insure that the output signal is not coupled back into the
A sample-and-hold circuit which combines the low input cur-
amplifier. This circuit does not have current limiting, but it
rent of FET's with the low offset voltage of monolithic ampli-
can be added by putting 50H resistors in series with the
fiers is shown in Figure 6. The circuit is a unity gain amplifier
collectors of Q1 and Q2.
employing an operational amplifier and an FET source fol-

an f et amplifier lower. In operation, when

the sample switch, Q2, is turned
on, it closes the feedback loop to make the output equal to
For ambient temperatures less than about 70°C, junction
can give exceptionally low input cur- the input, differing only by the offset voltage of the LM101.
field effect transistors
rents when they are used on the input stage of an opera-
When the switch is opened, the charge stored on C2 holds
However, monolithic FET amplifiers are not the output at a level equal to the last value of the input
tional amplifier.
now available sinceit is no simple matter to diffuse high

quality FET's on the same chip as the amplifier. Nonethe- Some care must be taken in the selection of the holding
less, it is possible to make a good FET amplifier using a capacitor. Certain types, including paper and mylar, exhibit a

discrete FET pair in conjunction with a monolithic circuit. polarization phenomenon which causes the sampled volt-


0.1 //F

•Polycarbonate-dielectric capacitor

Figure 6. Low drift sample and hold
age 50 mV, and then stabilize, when the
to drop off by about Further, gain can also be provided by feeding back to the
capacitor exercised over a 5V range during the sample
is inverting input of the LM101 through a resistive divider in-
interval. This drop off has a time constant in the order of stead of directly.
seconds. The effect, however, can be minimized by using
The peak detector in Figure 7 is similar in many respects to
capacitors with teflon, polyethylene, glass or polycarbonate
the sample-and-hold circuit. A diode is used in place of the
sampling switch. Connected as shown, it will conduct when-
Although does not have a particularly low output
this circuit ever the input is greater than the output, so the output will
resistance, fixed loads do not upset the accuracy since the be equal to the peak value of the input voltage. In this case,
loading is automatically compensated for during the sample an LM102 is used as a buffer for the storage capacitor,
interval. However, if the load is expected to change after giving low drift along with a low output resistance.
sampling, a buffer such as the LM102 must be added be-
As with the sample and hold, the differential input voltage
tween the FET and the output. range of the LM101 permits differences between the input
A second pole is introduced into the loop response of the and output voltages when the circuit is holding.
amplifier by the switch resistance and the holding capacitor,
non-linear amplifiers
C2. This can cause problems with overshoot or oscillation if
it is not compensated for by adding a resistor, R1, in series When a non-linear transfer function is needed from an oper-
with the LM101 compensation capacitor such that the ational amplifier, many methods of obtaining it present
breakpoint of the R1C1 combination is roughly equal to that themself. However, they usually require diodes and are
of the switch and the holding capacitor. therefore difficult to temperature compensate for accurate

possible to use an MOS transistor for Q1 breakpoints. One way around this is to make the
of getting
It is without worry-
output swing so large that the diode threshold is negligible
ing about the threshold stability. The threshold voltage is
by comparison, but this is not always practical.
balanced out during every sample interval so only the short-
term threshold stability is important. When MOS transistors A method producing very sharp, temperature-stable
are used along with mechanical switches, drift rates less breakpoints the transfer function of an operational amplifi-

than 10 mV/min can be realized. er is shown in Figure 8. For small input signals, the gain is
determined by R1 and R2. Both Q2 and Q3 are conducting
Additional features of the circuit are that the amplifier acts
as a buffer so that the
to some degree, but they do not affect the gain because
circuit does not load the input signal.
their current gain is high and they do not feed any apprecia-
ble current back summing mode. When the output
into the
voltage rises to 2V (determined by R3, R4 and V~), Q3
draws enough current to saturate, connecting R4 in parallel
with R2. This cuts the gain in half. Similarly, when
the output
voltage rises to 4V, Q2 will saturate, again halving the gain.

Temperature compensation is achieved in this circuit by in-

cluding Q1 and Q4. Q4 compensates the emitter-base volt-
age of Q2 and Q3 to keep the voltage across the feedback
resistors,R4 and R6, very nearly equal to the output voltage
while Q1 compensates for the emitter base voltage of these
transistors as they go into saturation, making the voltage
across R3 and R5 equal to the negative supply voltage. A
• C2
0.01 nf detrimental effect of Q4 is that it causes the output resist-
ance of the amplifier to increase at high output levels. It may
therefore be necessary to use an output buffer if the circuit
must drive an appreciable load.

servo preamplifier
In certain servo systems, it is desirable to get the rate signal
some sort of electrical, lead
required for loop stability from
TL/H/7357-! network. This can, for example, be accomplished with reac-
Figure 7. Positive peak detector with buffered output tive elements in the feedback network of the servo pream-
R5 Q2
187.5K 2N2605

V -=-15V


Figure 8. Nonlinear operational amplifier with temperature-compensated breakpoints

Many saturating servo amplifiers operate over an extremely nal willstill be developed because current is being fed back

wide dynamic range. For example, the maximum error signal into the rate network (R1, R2 and C1) just as it would if the
could easily be 1000 times the signal required to saturate amplifier had remained in the linear operating region. In fact,
the system. Cases like this create problems with electrical the amplifier will not actually saturate until the error current
rate networks because they cannot be placed in any part of reaches 6 mA, which would be the same as having a linear

the system which saturates. If the signal into the rate net- amplifier with a ± 600V output swing.
work saturates, a rate signal will only be developed over a
computing circuits
narrow range of system operation; and instability will result
In analog computation it is a relatively simple matter to per-
when the error becomes large. Attempts to place the rate
networks in front of the error amplifier or make the error form such operations as addition, subtraction, integration
amplifier linear over the entire range of error signals fre-
and differentiation by incorporating the proper resistors and
capacitors in the feedback circuit of an amplifier. Many of
quently gives rise to excessive dc error from signal attenua-
these circuits are described in reference 5. Multiplication
and division, however, are a bit more difficult. These opera-
These problems can be largely overcome using the kind of
tions are usually performed by taking the logarithms of the
circuit shown in Figure 9. This amplifier operates in the lin-
quantities, adding or subtracting as required and then taking
ear mode the output voltage reaches approximately 3V
the antilog.
with 30 juA output current from the solar cell sensors. At this
At first glance, it might appear that obtaining the log of a
point the breakdown diodes in the feedback loop begin to
voltage is difficult; but it has been shown 6 that the emitter-
conduct, drastically reducing the gain. However, a rate sig-
base voltage of a silicon transistor follows the log of its col-
lector current over as many as nine decades. This means
that common transistors can be used to perform the log and
antilog operations.

A which performs both multiplication and division in

this fashion isshown in Figure 10. It gives an output which is
proportional to the product of two inputs divided by a third,
and it is about the same complexity as a divider alone.
The circuit consists of three log converters and an antilog
generator. Log converters similar to these have been de-
scribed elsewhere, 7 but a brief description follows. Taking
amplifier A1 a logging transistor, Q1 is inserted in the feed-
, ,

back loop such that its collector current is equal to the input
voltage divided by the input resistor, R1. Hence, the emitter-
base voltage of Q1 will vary as the log of the input voltage
A2 is a similar amplifier operating with logging transistor,
30 pF
Q2. The emitter-base junctions of Q1 and Q2 are connected
TL/H/7357-11 in series, adding the log voltages. The third log converter

Figure 9. Saturating servo preamplifier with rate feed- produces the log of E3. This is series-connected with the
back antilog transistor, Q4; and the combination is hooked in par-



E,E 2

30 pF


*tLM394 TL/H/7357-12
Figure 10. Analog multiplier/divider

allel with the output of the other two log convenors. There- between cans appear as inaccuracies in scale factor (0.3-
fore, the emitter-base of Q4 will see the log of E3 subtracted percent/°C) rather than a balance error (8-percent/°C). R12
from the sum of the logs of E1 and E2. Since the collector is a balance potentiometer which nulls out the offset volt-
current of a transistor varies as the exponent of the emitter- ages of all the logging transistors. It is adjusted by setting all
base voltage, the collector current of Q4 will be proportional input voltages equal to 2V and adjusting for a 2V output
to the product of E1 and E2 divided by E3. This current is voltage.
fed to the summing amplifier, A4, giving the desired output.
The logging transistors provide a gain which is dependent
This circuit can give -percent accuracy for input voltages
1 on their operating level, which complicates frequency com-
from 500 mV to 50V. To get this precision at lower input pensation. Resistors (R3, R6 and R7) are put in the amplifier
voltages, the offset of the amplifiers handling them must be output to limit the maximum loop gain, and the compensa-
individually balanced out. The zener diode, 04, increases tion capacitor is chosen to correspond with this gain. As a
the the collector-base voltage across the logging transistors result, the amplifiers are not especially designed for speed,
to improve high current operation. It is not needed, and is in but techniques for optimizing this parameter are given in
fact undesirable, when these transistors are running at cur- reference 6.
rents less than 0.3 mA. At currents above 0.3 mA, the lead
Finally, clamp diodes D1 through D3, prevent exceeding the
resistances of the transistors can become important (0.25ft
maximum reverse emitter-base voltage of the logging tran-
is 1 -percent at 1 mA) so the transistors should be installed
sistors with negative inputs.
with short leads and no sockets.
root extractor*
An important feature of this circuit is that its operation is

independent of temperature because the scale factor Taking the root of a number using log converters is a fairly
change in the log converter with temperature is compensat- simple matter. All that is needed is to take the log of a
ed by an equal change in the scale factor of the antilog voltage, divide it by, say 1/2 for the square root, and then
generator. It is only required that Q1, Q2, Q3 and Q4 be at 'The "extraction" used here doubtless has origin in the dental operation
the same temperature. Dual transistors should be used and most of us would fear less than having to find even a square root without
tables or other aids.
arranged as shown in the figure so that thermal mismatches

10 100 IK 10K 100K 1M 10M

a. measuring loop gain b. typical response
Figure 12. Illustrating loop gain

take the antilog. A circuit which accomplishes this is shown and capacitive loading, or the circuit can even oscillate with
in Figure A1 and Q1 form the log converter for the input
1 1. worst-case units.
signal. This feeds Q2 which produces a level shift to give
The basic requirement for frequency compensatinga feed-
zero voltage into the R4, R5 divider for a 1V input. This back amplifier keep the frequency roll-off of the loop
is to
divider reduces the log voltage by the ratio for the root de-
gain from exceeding 12 dB/octave when it goes through
sired and drives the buffer amplifier, A2. A2 has a second
unity gain. Figure 12a shows what is meant by loop gain.
level shifting diode, Q3, its feedback network which gives
The feedback loop is broken at the output, and the input
the output voltage needed to get a 1V output from the anti-
sources are replaced by their equivalent impedance. Then
log generator, consisting of A3 and Q4, with a unity input.
the response is measured such that the feedback network
The offset voltages of the transistors are nulled out by im- is included.
balancing R6 and R8 to give 1V output for 1 V input, since
Figure 12b gives typical responses for both uncompensated
any root of one is one.
and compensated amplifiers. An uncompensated amplifier
Q2 and Q3 are connected as diodes in order to simplify the generally rolls off at 6 dB/octave, then 12 dB/octave and
circuitry. This doesn't introduce problems because both op-
even 18 dB/octave as various frequency-limiting effects
erate over a very limited current range, and it is really only
come into play. If a loop with this kind of
within the amplifier
required that they match. R7 is a gain-compensating resis- response were closed, it would oscillate. Frequency com-
tor which keeps the currents in Q2 and Q3 equal with pensation causes the gain to roll off at a uniform 6 dB/oc-
changes in signal level.
tave right down through unity gain. This allows some margin
As with the multiplier/divider, the circuit is insensitive to for excess rolloff in the external circuitry.
temperature as long as all the transistors are at the same Some of the external influences which can affect the stabili-
temperature. Using transistor pairs and matching them as ty ofan operational amplifier are shown in Figure 13. One is
shown minimizes the effects of gradients. the load capacitance which can come from wiring, cables or
The circuit has 1 -percent accuracy for input voltages be- an actual capacitor on the output. This capacitance works
tween 0.5 and 50V. For lower input voltages, A1 and A3 against the output impedance of the amplifier to attenuate
must have their offsets balanced out individually. high frequencies. added rolloff occurs before the loop
If this
gain goes through zero, it can cause instability. It should be
frequency compensation hints
remembered that this single rolloff point can give more than
The ease of designing with operational amplifiers some- 6 dB/octave rolloff since the output impedance of the ampli-
times obscures some of the rules which must be followed fier can be increasing with frequency.
with any feedback amplifier to keep it from oscillating. In
general, these problems stem from stray capacitance, ex-
cessive capacitive loading, inadequate supply bypassing or
improper frequency compensation.
In frequency compensating an operational amplifier, it is

best to follow the manufacturer's recommendations. How-

ever, if operating speed and frequency response is not a
consideration, a greater stability margin can usually be ob-
tained by increasing the size of the compensation capaci-
tors. For example, replacing the 30 pF compensation ca-
pacitor on the LM101 with a 300 pF capacitor will make it
ten times less susceptible to oscillation problems in the uni-
ty-gain connection. Similarly, on the LM709, using 0.05 ju,F,
1.5 kfi, 2000 pF and 51 to components instead of 5000 pF,
1.5 kft, 200 pF and 51 fl will give 20 dB more stability mar- TL/H/7357-16
gin. Capacitor values less than those specified by the manu- Figure 13. External capacitances that affect stability
facturer for a particular gain connection should not be used
since they will make the amplifier more sensitive to strays

A second source of excess rolloff is stray capacitance on cause instability. To use this circuit, the amplifier must be
the inverting input. This becomes extremely important with compensated for unity gain, regardless of the closed loop
large feedback resistors as might be used with an FET-input dc gain. The value of C1 is not too important, but at a mini-
amplifier. A relatively simple method of compensating for mum its capacitive reactance should be one-tenth the re-
this straycapacitance is shown in Figure 14: a lead capaci- sistance of R2 at the unity-gain crossover frequency of the
tor,C1, put across the feedback resistor. Ideally, the ratio of amplifier.
the stray capacitance to the lead capacitor should be equal When an operated open loop, it
operational amplifier is
to the closed-loop gain of the amplifier. However, the lead might appear at first needs no frequency com-
glance that it

capacitor can be made larger as long as the amplifier is

pensation. However, this is not always the case because
compensated for unity gain. The only disadvantage of doing the external compensation is sometimes required to stabi-
this is that it will reduce the bandwidth of the amplifier. Os-
lize internal feedback loops.
cillations can also result if there is a large resistance on the
The LM101 will not oscillate when operated open loop, al-
non-inverting input of the amplifier. The differential input im-
though there may be problems if the capacitance between
pedance of the amplifier falls off at high frequencies (espe-
the balance terminal on pin 5 and the output is not held to
so this resistor can pro-
cially with bipolar input transistors)
an absolute minimum. Feedback between these two points
duce troublesome rolloff if it is much greater than 1 0K, with
is regenerative if it is not balanced out with a larger feed-
most amplifiers. This is easily corrected by bypassing the
back capacitance across the compensation terminals. Usu-
resistor to ground.
ally a 3 pF compensation capacitor will completely eliminate
When the capacitive load on an integrated amplifier is much the problem. The LM709 will oscillate when operated open
greater than 100 pF, some consideration must be given to loop unless a 1 pF capacitor is connected across the input
its effect on Even though the amplifier does not
stability. compensation terminals and a 3 pF capacitor is connected
oscillate readily, there may be a worst-case set of condi- on the output compensation terminals.
tions under which it will. However, the amplifier can be stabi-
Problems encountered with supply bypassing are insidious
lized for any value of capacitive loading using the circuit
in that they will hardly ever show up in a Nyquist plot. This
problem has not really been thoroughly investigated, proba-
bly because one sure cure is known: bypass the positive
and negative supply terminals of each amplifier to ground
with at least a 0.01 ju.F capacitor.

For example, a LM101 can take over 1 mH inductance in

either supply lead without oscillation. This should not sug-

gest that they should be run without bypass capacitors. It

has been established that 100 LM101's on a single printed

circuit board with common supply busses will oscillate if the
supplies are not bypassed about every fifth device. This
happens even though the inputs and outputs are completely

The LM709, on the other hand, will oscillate under many

load conditions with as as 18 inches of wire between


the negative supply lead and a bypass capacitor. Therefore,

it is almost essential to have a set of bypass capacitors for
every device.
Figure 14. Compensating stray input capacitance
Operational amplifiers are specified for power supply rejec-
shown in Figure 15. The capacitive load is isolated from the
tion at frequencies less than the first break frequency of the
output of the amplifier with R4 which has a value of 50ft to
open loop gain. At higher frequencies, the rejection can be
10011 for both the LM101 and the LM709. At high frequen-
reduced depending on how the amplifier is frequency com-
cies, thefeedback path is through the lead capacitor, C1 so ,

pensated. For both the LM101 and LM709, the rejection of

that the lag produced by the load capacitance does not
high frequency signals on the positive supply is excellent.
However, the situation is different for the negative supplies.
These two amplifiers have compensation capacitors from
the output down to a signal point which is referred to the
negative supply, causing the high frequency rejection for the
negative supply to be much reduced. It is therefore impor-
tant to have sufficient bypassing on the negative supply to
ElN"""^^^ remove transients if they can cause trouble appearing on
the output. One fairly large (22 ju,F) tantalum capacitor on
the negative power lead for each printed-circuit card is usu-
ally enough to solve potential problems.

When high-current buffers are used in conjunction with op-

erational amplifiers, supply bypassingand decoupling are
even more important since they can feed a considerable
amount of signal back into the supply lines. For reference,
TL/H/7357-18 bypass capacitors of at least 0.1 ju.F are required for a
50 mA buffer.
Figure 15. Compensating for very large capacitive loads
When emitter followers are used to drive long cables, addi-
tional precautions are required. An emitter follower by it-

self—which is not containeda feedback loop will fre-
in — monolithic amplifiers, it is almost foolish to design dc ampli-
quently oscillate when connectedto a long length of cable. fiers without integrated circuits. Moreover, the price makes it

When an emitter follower is connected to the output of an practical to take advantage of operational-amplifier perform-
operational amplifier, it can produce oscillations that will ance in a variety of circuits where they are not normally
persist no matter how the loop gain is compensated. An used.
analysis of why this happens is not very enlightening, so
Many of the potential oscillation problems that can be en-
suffice it to say that these oscillations can usually be elimi- both discrete and integrated operational ampli-
countered in
nated by putting a ferrite bead 8 between the emitter follower fiers were described, and some conservative solutions to
and the cable. these problems were presented. The areas discussed in-
Considering the loop gain of an amplifier is a valuable tool in cluded stray capacitance, capacitive loading and supply by-
understanding the influence of various factors on the stabili- passing. Finally, a simplified method of quickly testing the
ty of feedback amplifiers. But it is not too helpful in deter- stability of amplifier circuits over a wide range of operating
mining if indeed stable. The reason is that
the amplifier is conditions was suggested.
most problems in a well-designed system are caused by The frequency-domain characteristics can be determined from the impulse

secondary effects which occur only under certain condi- response of a network and this is directly relatable to the step response

tions of output voltage, load current, capacitive loading, through the convolution integral.

temperature, etc. Making frequency-phase plots under all references

these conditions would require unreasonable amounts of
1. R. J. Widlar, "Monolithic Op Amp with Simplified Frequen-
time, so it is invariably not done.
cy Compensation", EEE, Vol. 15, No. 7, pp. 58-63, July,
A bettercheck on stability is the small-signal transient re- 1967.
sponse. It can be shown mathematically that the transient
2. R. J. Widlar, "A Unique Circuit Design for a High Perform-
response of a network has a one-for-one correspondence
ance Operational Amplifier Especially Suited to Monolith-
with the frequency domain response, t The advantage of
ic Construction", Proc. of NEC, Vol. XXI, pp. 85-89, Octo-
transient response tests is that they are displayed instanta-
ber, 1965.
neously on an oscilloscope, so it is reasonable to test a
circuit under a wide range of conditions. 3. R. J. Widlar, "A Fast Integrated Voltage Follower with
Low Input Current", National Semiconductor AN-5,
Exact methods of analysis using transient response will not
March, 1968.
be presented here. This is not because these methods are
difficult, although they are. Instead, it is because it is very
4. R. J. Widlar, "The Operation and Use of a Fast Integrated
easy to determine which conditions are unfavorable from Circuit Comparator", Fairchild Semiconductor APP- 11 6,
the overshoot and ringing on the step response. The stabili- February, 1966.

ty margin can be determined much more easily by how 5. "Handbook of Operational Amplifier Applications", Burr-
much greater the aggravating conditions can be made be- Brown Research Corporation, Tucson, Arizona.
fore the circuit oscillates than by analysis of the response 6. J. F. Gibbons and H. S. Horn, "A Circuit with Logarithmic
under given conditions. A little practice with this technique Transfer Response over Nine Decades", IEEE Trans, on
can quickly yield much better results than classical methods Circuit Theory, Vol. CT-11, pp. 378-384, September,
even for the inexperienced engineer. 1964.

summary 7. R. J. Widlar and J. N. Giles, "Avoid Over-Integration",

Electronic Design, Vol. 14, No. 3, pp. 56-62, Feb. 1. 1966.
A number of circuits using operational amplifiers have been
proposed to show their versatility in circuit design. These 8. Leslie Solomon, "Ferrite Beads", Electronics World, pp.
have ranged from low frequency oscillators through circuits 42-43, October, 1966.
for complex analog computation. Because of the low cost of

Application of the LH0002
Current Amplifier

The LH0002 Current Amplifier integrated building block pro-
National Semiconductor
Application Note 13

vides a wide band unity gain amplifier capable of providing
peak currents of up to ± 200 mA into a 50ft load.
The circuit uses thick film technology to integrate 2 NPN
and 2 PNP complementary matched silicon transistors with
4 cermet resistors on a single alumina ceramic substrate. A
circuit schematic is shown in Figure 1. The negative thermal
feedback provided by the close proximity of the compo-
nents on a single substrate eliminates any thermal runaway
problem that could occur if this circuit were constructed us-
ing discrete components.

A typical circuit features a dynamic input impedance of INPUT 8-

200 kft,an output impedance of 6ft, DC to 50 MHz band-
width, and an output voltage swing that approaches supply
voltage. A complete list of the guaranteed and typical values
for the electrical characteristics under the stated conditions
is given in Table These features make the LH0002 ideal

for integration with an operational amplifier inside a closed

loop configuration to increase its current output. The sym-
metrical class AB output portion of the circuit also provides
a constant low output impedance for both the positive and
negative slopes of output pulses.

The majority of circuit applications will use symmetrical pow-
er supplies, with equal positive voltage being applied to pins
1 and 2, and equal negative voltage applied to pins 6 and 7. FIGURE 1. Circuit Schematic

TABLE I. Electrical characteristics, specification applies for Ta = 2S°C

with + 12.0V on pins 1 and 2; - 12.0V on pins 6 and 7.

Parameters Conditions Min Typ Max Units

Voltage Gain R s = 10 kft, R L = 1.0 kft

V| N = 3.0 V f = 1.0 kHz 0.95 0.97
pp ,

TA = 55°Cto125°C
Input Impedance R s = 200kft,V, N = 1.0V rms ,

180 200 kft
f = 1 .0 kHz, R L = 1 .0 kft
Output Impedance V| N = 10V rms ,f = 1.0 kHz — 6 10 ft
RL = 50ft, R s = 10 kft

Output Voltage Swing RL = 1.0 kft, f = 1.0 kHz ±10 ±11 — V

DC Input Offset Voltage R s = 10 kft, R L = 1-0 kft
— ±40 ±100 mV
TA = -SS-Cto^-C
DC Input Offset Current R S = 10 kft, R L = 1.0 kft
— ±6.0 ±10 fiA
TA = -55°Cto125°C
Harmonic Distortion V| N = 5.0V rms ,f = 1.0 kHz — 0.1 — %
Bandwidth V| N= 1.0 V rms ,R L = 50ft —
30 50 MHz
R S = 100ft
Positive Supply Current R s = 10 kft, R L = 1 kft — + 6.0 + 10.0 mA
Negative Supply Current R s = 10 kft, RL = 1 kft — -6.0 -10.0 mA

The reason that pin 2 and pin 6 are not connected internally
to pin 1 and pin 7, respectively, is to increase the versatility -40
1.0 1 1

of circuit operation by allowing a decreased voltage to be VOLTAGE GAIN

applied to pins 2 and 6 to minimize the power dissipation in
Q3 and Q4. The larger voltage applied to the input stage 0.8 -32

also provides increased current drive as required to the out-

OR -?4
V| N - 1 .OV rms. R L = 50 ohms. V, = ± 1 2.0V
The operation can be understood by consider-
of the circuit
ing that the input pin 8 is at V|n- The emitter of Q1 will be
approximately 0.6V more positive than V N at 25°C, and the 0.4 -16

converse is true for Q2. This 0.6V will provide a forward bias
on Q3 to cancel out the Q1 base to emitter drop which in _PHASI -8
turn would provide Vin at the output if all junctions, resistors,
power supplies, etc., were electrically identical. The greatest
error is introduced because the forward drops in the base-
emitter junctions for the NPN and PNP devices are slightly 1.0 2.0 S.0 10.0 20.0 50.0 100
different. For example, the Vbe of the NPN will be typically FREQUENCY (MHz)
0.6V and the Vbe of the PNP will be typically 0.64V under TL/K/7315-3
the same conditions of lc = 2.4 mA at Vce = 12.0V at FIGURE 3. Frequency Response
25°C. These are the approximate input stage circuit condi-
tions for Q1 and Q2 for plus and minus 1 2V supplies. Fortu- APPLICATIONS
nately, this error in both input and output offset voltage is Figure 4 shows the LH0002 integrated with the LM101 in a
almost always negligible when it is used inside the closed booster follower configuration. The configuration is stable
loop of a high gain operational amplifier. without the requirement for any external compensation;
A plot of input impedance vs frequency is shown however, it would behoove the designer to be conservative
in Figure 2.
Inspection of this plot shows that the input impedance can and bypass both the negative and positive power supplies
be closely approximated to that of a simple first order linear with at least a 0.01 ju.f capacitor to cancel out any power

network with a 45° phase lag at 0.6 MHz and a 90° phase supply lead inductance. A 100ft damping resistor, located
lag at approximately one decade higher in frequency. This right at the input of the LH0002, might also be required be-

information is very useful for designers who have to inte- tween the operational amplifier and the booster amplifier.
grate circuits which have large source impedances over a The physical layout will determine the requirement for this

wide frequency range. The output impedance of the amplifi- type of oscillation suppression. Current limiting can be add-
er is very low, 6ft typically, and in conjunction with a voltage ed by incorporating series resistors from pins 2 and 6 to
bandwidth of approximately 50 MHz can be considered to power supplies. The exact value would be a
their respective

be insignificant for most applications for this type of device. function of power supply voltage and required operating
A plot of the voltage bandwidth is shown in Figure 3. Inspec-
tion of this plot shows that phase information as well as gain A breadboard of this configuration was assembled to empiri-
information was included to assist users of this device. For callycheck the increase in offset voltage due to the addition
example, at 10 MHz, less than an 8° phase lag would be of the LH0002. The offset voltage was measured with and
subtracted from the phase margin of an operational amplifi- without an LH0002 inside the loop with a voltage gain of
er when it is integrated with this device. The open loop gain 100, at -55°C, 25°C and 125°C. The additional offset volt-
of the operational amplifier would be decreased by less than age was less than 0.3% for all three temperature conditions
10% at 10 MHz and therefore can be considered to be in- even though the offset voltage of the LH0002 is much high-
significant for most applications. er than that of the LM101. The high open loop gain of the
LM101 divides out this source of circuit error. The integra-
device also allows higher closed loop circuit gain
tion of this
without excessive cross-over distortion than would be ob-

«,-10Kitat.T»-2PC tainable with the simple booster amplifier shown in Figure 5.
-to Figure 6 shows LH0002 being used as a level shifter
e /'phase
with a high pass filter on the input in order to reference the
output to zero quiescent volts. The purpose of the 10 kft
100 -80 f resistor is to provide current bias to the circuit's input tran-
a cs
UJ 3 sistors to reduce the output offset voltage. Figure 3, Input
I -40 uj Impedance vs Frequency, provides a useful design aid in
< order to determine the value of the capacitor for the particu-
3 a.
a. lar application. The 10 kfi resistor, of course, has to be
S 1 -20
considered as being in parallel with the circuit's input imped-
For a pulse input signal, the output impedance of the circuit
0.1 0.2 0.5 1 2 S 10
remains low for both the positive and negative portions of
FREQUENCY (MHz) the output pulse. This circuit provides both fast rise and fall
TL/K/7315-2 times for pulse signals, even with capacitive loading. The
FIGURE 2. Input Impedance vs Frequency LH0002 data sheet shows typical rise and fall times for both
positive and negative pulses into a 50ft load.


V S = ±5VT0 ±15V

INPUT' -vw-U

V,N© «v

FIGURE 4. LM101-LH0002 Booster Amplifier Integration

FIGURE 5. Simple Booster Amplifier

pedance level of the pulse, the polarity of the pulses, or,

with the aid of a center-tapped winding, positive and nega-
tive pulses simultaneously.
The LH0002 can also be used to drive long transmission
lines. Figure 8 shows a circuit configuration to match the

output impedance of the amplifier to the load and coaxial

cable for proper line termination to minimize reflections. A
capacitor can be added to empirically adjust the time re-
sponse of the waveform.
FIGURE 6. Level Shifter Select capacitor to adjust time response of pulse.

Figure 7 shows the LH0002 being used to drive a pulse-

transformer. The low output offset voltage allows the pulse
transformer to be directly coupled to the amplifier without
using a coupling capacitor to prevent saturation. The pulse
transformer can be used to change the amplitude and im-
I- son LOAD

LH0002 ^
^S >
a O Vqut
FIGURE 8. Transmission Line Driver

The multitude of different applications suggested in this arti-

TL/K/7315-8 cle shows the versatility of the LH0002. The applications

FIGURE 7. Driver for a Pulse-Transformer specially covered were for a differential input-output opera-
tional amplifier, booster amplifier, level shifter, driver for a
pulse-transformer, and transmission line driver.

National Semiconductor
An Applications Guide for Application Note 20
Op Amps
The general utility of the operational amplifier is derived sated so frequency stabilization components are not shown;
from the fact that it is intended for use in a feedback loop however, other amplifiers may be used to achieve greater
whose feedback properties determine the feed-forward operating speed in many circuits as will be shown in the text.
characteristics of the amplifier and loop combination. To suit Amplifier parameter definitions are contained in Appendix I.

it for this usage, the ideal operational amplifier would have

infinite input impedance, zero output impedance, infinite

gain and an open-loop 3 dB point at infinite frequency rolling The basic operational amplifier circuit is shown in Figure 1.

off at 6 dB per octave. Unfortunately, the unit cost-in quan- This circuit gives closed-loop gain of R2/R1 when this ratio
tity-would also be infinite. is small compared with the amplifier open-loop gain and, as

Intensive development of the operational amplifier, particu-

the name implies, is an inverting circuit. The input imped-
ance equal to R1. The closed-loop bandwidth is equal to
larly in integrated form, has yielded circuits which are quite
the unity-gain frequency divided by one plus the closed-loop
good engineering approximations of the ideal for finite cost.
Quantity prices for the best contemporary integrated amplifi-
ers are low compared with transistor prices of five years The only cautions to be observed are that R3 should be
ago. The low cost and high quality of these amplifiers allows chosen to be equal to the parallel combination of R1 and R2
the implementation of equipment and systems functions im- to minimize the offset voltage error due to bias current and
practical with discrete components. An example is the low that there will be an offset voltage at the amplifier output
frequency function generator which may use 15 to 20 opera- equal to closed-loop gain times the offset voltage at the
tional amplifiers in generation, wave shaping, triggering and amplifier input.
The availability of the low-cost integrated amplifier makes it

mandatory that systems and equipments engineers be fa-

miliar with operational amplifier applications. This paper will
present amplifier usages ranging from the simple unity-gain
buffer to relatively complex generator and wave shaping cir-
cuits. The general theory of operational amplifiers is not
within the scope paper and many excellent refer-
of this
ences are available in the literature. 1 2 .3. 4 The approach will
. v OUT = ST V IN
be shaded toward the practical, amplifier parameters will be >R3 R1

discussed as they affect circuit performance, and applica-

< R3 = R1 | R2
I For minimum error due
tion restrictions will be outlined.
^T to input bias current
The applications discussed will be arranged in order of in- TL/H/6822-1
creasing complexity in five categories: simple amplifiers, op- FIGURE 1. Inverting Amplifier
erational circuits, transducer amplifiers, wave shapers and
generators, and power supplies. The integrated amplifiers Offset voltage at the input of an operational amplifier is

shown in the figures are for the most part internally compen- comprised of two components, these components are iden-
tified in specifying the amplifier as input offset voltage and

input bias current. The input offset voltage is fixed for a

particular amplifier, however the contribution due to input

bias current is dependent on the circuit configuration used. THE NON-INVERTING AMPLIFIER
For minimum offset voltage at the amplifier input without Figure 2 shows a high input impedance non-inverting circuit.
circuit adjustment the source resistance for both inputs This circuit gives a closed-loop gain equal to the ratio of the
should be equal. In this case the maximum offset voltage sum of R1 and R2 to R1 and a closed-loop 3 dB bandwidth
would be the algebraic sum of amplifier offset voltage and equal to the amplifier unity-gain frequency divided by the
the voltage drop across the source resistance due to offset closed-loop gain.
current. Amplifier offset voltage is the predominant error
The primary differences between this connection and the
term for low source resistances and offset current causes not inverted and that
inverting circuit are that the output is
the main error for high source resistances.
the input impedance is very high and is equal to the differen-
In high source resistance applications, offset voltage at the tial input impedance by loop gain. (Open loop
amplifier output may be adjusted by adjusting the value of gain/Closed loop gain.) In DC coupled applications, input
R3 and using the variation in voltage drop across it as an impedance is not as important as input current and its volt-
input offset voltage trim. age drop across the source resistance.
Offset voltage at the amplifier outputis not as important in Applications cautions are the same for this amplifier as for
AC coupled applications. Here the only consideration is that the inverting amplifier with one exception. The amplifier out-
any offset voltage at the output reduces the peak to peak put will go into saturation if the input is allowed to float. This
linear output swing of the amplifier. may be the amplifier must be switched from
important if

The gain-frequency characteristic of the amplifier and its source to source. The compensation trade off discussed for
feedback network must be such that oscillation does not the inverting amplifier is also valid for this connection.
occur. To meet this condition, the phase shift through ampli-
fier and feedback network must never exceed 180° for any

frequency where the gain of the amplifier and its feedback

network is greater than unity. In practical applications, the
phase should not approach 1 80° since this is the situa-
tion of conditional stability. Obviously the most critical case
occurs when the attenuation of the feedback network is
R2 _ R1 R2.
Amplifiers which are not internally compensated may be VOUT - ' :
V| N
used to achieve increased performance in circuits where
R1 R2 = RsoURCE
feedback network attenuation is high. As an example, the

For minimum error due

LM101 may be operated at unity gain in the inverting amplifi-
to input bias current
er circuit with a 15 pF compensating capacitor, since the
feedback network has an attenuation of 6 dB, while it re-
quires 30 pF in the non-inverting unity gain connection
FIGURE 2. Non-Inverting Amplifier
where the feedback network has zero attenuation. Since
amplifier slew rate is dependent on compensation, the
LM101 slew rate in the inverting unity gain connection will The unity-gain buffer is shown in Figure 3. The circuit gives
be twice that for the non-inverting connection and the in- the highest input impedance of any operational amplifier cir-

verting gain of ten connection eleven times the

will yield cuit. Input impedance is equal to the differential input imped-
slew rate of the non-inverting unity gain connection. The ance multiplied by the open-loop gain, in parallel with com-
compensation trade-off for a particular connection is stabili- mon mode input impedance. The gain error of this circuit is

ty versus bandwidth, larger values of compensation capaci- equal to the reciprocal of the amplifier open-loop gain or to
tor yield greater stability and lower bandwidth and vice the common mode rejection, whichever is less.

The preceding discussion of offset voltage, bias current and
stability is applicable to most amplifier applications and will
be referenced in later sections. A more complete treatment
is contained in Reference 4. VOUT = V IN
R1 = Rsource
For minimum error due
to input bias current

FIGURE 3. Unity Gain Buffer

Input impedance is a misleading concept in a DC coupled
unity-gain buffer. Bias current for the amplifier will be sup-
plied by the source resistance and will cause an error at the
amplifier input due to its voltage drop across the source
resistance. Since this is the case, a low bias current amplifi-
er such as the LH102 6 should be chosen as a unity-gain
R1_+_R2\R4 _R2
buffer when working from high source resistances. Bias cur- 2 1
R3 + R4/ R1 R1
rent compensation techniques are discussed in Reference
For R1 = R3 and R2 = R4
The cautions be observed in applying this circuit are
to V UT= -j-(V2 Vi)
three: the amplifier must be compensated for unity gain op-
R1 ||
R2 = R3 ||
eration, the output swing of the amplifier may be limited by TL/H/6822-5
For minimum offset error
the amplifier common mode range, and some amplifiers ex- due to input bias current
hibit a latch-up mode when the amplifier common mode

range is exceeded. The LM107 may be used in this circuit

with none of these problems; or, for faster operation, the FIGURE 5. Difference Amplifier
LM102 may be chosen.
Circuit bandwidth may be in the same manner as
for the inverting amplifier, but inputimpedance is somewhat
more complicated. Input impedance for the two inputs is not
necessarily equal; inverting input impedance is the same as
for the inverting amplifier of Figure 1 and the non-inverting
input impedance is the sum of R3 and R4. Gain for either
input is the ratio of R1 to R2 for the special case of a differ-
ential input single-ended output where R1 = R3 and R2 =
R4. The general expression for gain is given in the figure.
Compensation should be chosen on the basis of amplifier
R5 = R1 R2 R3 R4
|| || || Care must be exercised in applying this circuit since input
For minimum offset error due
impedances are not equal for minimum bias current error.
to input bias current

FIGURE 4. Summing Amplifier The differentiator isshown in Figure 6 and, as the name
implies, isused to perform the mathematical operation of
SUMMING AMPLIFIER differentiation. The form shown is not the practical form, it is

The summing amplifier, a special case of the inverting am- a true differentiator and is extremely susceptible to high fre-
plifier, is shown in Figure 4. The circuit gives an inverted quency noise since AC gain increases at the rate of 6 dB
output which is equal to the weighted algebraic sum of all per octave. In addition, the feedback network of the differ-
three inputs. The gain of any input of this circuit is equal to entiator, R1C1, is an RC low pass filter which contributes

the ratio of the appropriate input resistor to the feedback 90° phase shift to the loop and may cause stability problems
resistor, R4. Amplifier bandwidth may be calculated as in even with an amplifier which is compensated for unity gain.
the inverting amplifier shown
Figure 1 by assuming the

input resistor to be the

combination of R1, R2, and
R3. Application cautions are the same as for the inverting
amplifier. If an uncompensated amplifier is used, compensa-
tion is calculated on the basis of this bandwidth as is dis-
cussed in the section describing the simple inverting amplifi-

The advantage of this circuit is that there is no interaction V 0U T= -R1C1-(V, N )

between inputs and operations such as summing and

weighted averaging are implemented very easily. R1 = R2
For minimum offset error
THE DIFFERENCE AMPLIFIER ^T due to input bias current

The difference amplifier is the complement of the summing TL/H/6822-6

amplifierand allows the subtraction of two voltages or, as a FIGURE 6. Differentiator
special case, the cancellation of a signal common to the
two inputs. This circuit is shown in Figure 5 and is useful as
a computational amplifier, in making a differential to single-
ended conversion or in rejecting a common mode signal.

a low-pass filter with a frequency response decreasing at
6 dB per octave. An amplitude-frequency plot is shown in
Figure 10.

',«-A/VSr— |—oW
LMIOI^ # v out

< 30 pF

2irR1C1 2ttR2C2 _
fc < fh < f U nltygain
FIGURE 7. Practical Differentiator I 10f 1001 10001 100001
A shown in Figure 7. Here both the
practical differentiator is
stability and noise problems are corrected by addition of two
FIGURE 10. Integrator Frequency Response
additional components, R1 and C2. R2 and C2 form a 6 dB
per octave high frequency roll-off in the feedback network The circuit must be provided with an external method of
and R1C1 form a 6 dB per octave roll-off network in the establishing initial conditions. This is shown in the figure as

input network for a total high frequency roll-off of 12 dB per Si . When Si is in position 1 the amplifier is connected in

octave to reduce the effect of high frequency input and am- unity-gain and capacitor C1 is discharged, setting an initial
plifier noise. In addition R1C1 and R2C2 form lead networks condition of zero volts. When Si is in position 2, the amplifi-
in the feedback loop which, if placed below the amplifier er connected as an integrator and its output will change in
unity gain frequency, provide 90° phase lead to compensate accordance with a constant times the time integral of the
the 90° phase lag of R2C1 and prevent loop instability. A input voltage.
gain frequency plot is shown in Figure 8 for clarity.
The cautions to be observed with this circuit are two: the
amplifierused should generally be stabilized for unity-gain
operation and R2 must equal R1 for minimum error due to
bias current.


The simple low-pass filter is shown in Figure 1 1. This circuit
has a 6 dB per octave roll-off after a closed-loop 3 dB point
defined by f c Gain below this corner frequency is defined by

the ratio of R3 to R1. The circuit may be considered as an

AC integrator at frequencies well above fc however, the

I 1<M 10W 1000f 19000) time domain response is that of a single RC rather than an
FIGURE 8. Differentiator Frequency Response

The integrator is shown in Figure 9 and performs the mathe-
matical operation of integration. This circuit is essentially
r- — — — — — — —1 S,„

R1 TL/H/6822-11
FIGURE 11. Simple Low Pass Filter
R2 should be chosen equal to the parallel combination of
R1 and R3 to minimize errors due to bias current. The ampli-
should be compensated for unity-gain or an internally

compensated amplifier can be used.

R1 = R2
For minimum offset error
due to input bias current

FIGURE 9. Integrator

= 100 O


f lOf INf 10001 100001

FIGURE 14. Amplifier for Photoconductive Cell
FIGURE 12. Low Pass Filter Response
A gain frequency plot of circuit response is shown in Figure PHOTOCELL AMPLIFIERS
12 to illustrate the difference between this circuit and the Amplifiers for photoconductive, photodiode and photovolta-
true integrator. ic cells are shown in Figures 14, 15 and 16 respectively.

THE CURRENT-TO-VOLTAGE CONVERTER Allphotogenerators display some voltage dependence of

both speed and linearity. It is obvious that the current
Current may be measured in two ways with an operational
rhough a photoconductive cell will not display strict propor-
amplifier. The current may be converted into a voltage with
tionality to incident light if the cell terminal voltage is allowed
a resistor and then amplified or the current may be injected
to vary with cell conductance. Somewhat less obvious is the
a summing node. Converting into voltage is un-
directly into
fact that photodiode leakage and photovoltaic cell internal
desirable for two reasons: first, an impedance is inserted
losses are also functions of terminal voltage. The current-to-
into the measuring line causing an error; second, amplifier
voltage converter neatly sidesteps gross linearity problems
offset voltage is also amplified with a subsequent loss of
by fixing a constant terminal voltage, zero in the case of
accuracy. The use of a current-to-voltage transducer avoids
photovoltaic cells and a fixed bias voltage in the case of
both of these problems.
photoconductors or photodiodes.
The current-to-voltage transducer shown in Figure 13.

The input current is fed directly into the summing node and
the amplifier output voltage changes to extract the same
current from the summing node through R1. The scale fac-
tor of this circuit is R1 volts per amp. The only conversion
error in this circuit is Ibjas which is summed algebraically with


Vout = R1 Id


VOUT = l|N R1 FIGURE 15. Photodiode Amplifier

Tl/H/6822-13 Photodetector speed is optimized by operating into a fixed

FIGURE 13. Current to Voltage Converter low load impedance. Currently available photovoltaic detec-
tors show response times in the microsecond range at zero
This basic circuit is useful for many applications other than load impedance and photoconductors, even though slow,
current measurement. It is shown as a photocell amplifier in are materially faster at low load resistances.
the following section.
The only design constraints are that scale factors must be
chosen to minimize errors due to bias current and since
voltage gain and source impedance are often indeterminate
(as with photocells) the amplifier must be compensated for
unity-gain operation. Valuable techniques for bias current
compensation are contained in Reference 5.

v OUT = 'CELL R1

FIGURE 16. Photovoltaic Cell Amplifier

The feedback resistance, R1, is dependent on cell sensitivi- The amplifiers used must be compensated for unity-gain
ty and should be chosen for either maximum dynamic range and additional compensation may be required depending on
or for a desired scale factor. R2 is elective: in the case of load reactance and external transistor parameters.
photovoltaic cells or of photodiodes, it is not required in the
case of photoconductive cells, it should be chosen to mini-
mize bias current error over the operating range.


The precision current source is shown in Figures 17 and 18.
The configurations shown will sink or source conventional
current respectively.

FIGURE 19a. Positive Voltage Reference


Adjustable voltage reference circuits are shown in Figures
19 and 20. The two circuits shown have different areas of
applicability. The basic difference between the two is that
Figure 19 illustrates a voltage source which provides a volt-
age greater than the reference diode while Figure 20 illus-
trates a voltage source which provides a voltage lower than
FIGURE 17. Precision Current Sink the reference diode. The figures show both positive and
Caution must be exercised in applying these circuits. The negative voltage sources.
voltage compliance of the source extends from BVqer of
the external transistor to approximately 1 volt more negative
than Vin- The compliance of the current sink is the same in

the positive direction.

The impedance of these current generators is essentially
infinite for small currents and they are accurate so long as
Vin is much greater than Vos and lo s ' much greater than

The source and sink illustrated in Figures 17 and 18 use an

FET to drive a bipolar output transistor. It is possible to use
a Darlington connection in place of the FET-bipolar combi-
nation in cases where the output current is high and the
base current of the Darlington input would not cause a sig-
nificant error.

FIGURE 19b. Negative Voltage Reference

High precision extended temperature applications of the cir-

cuit ofFigure 19 require that the range of adjustment of
Vout be restricted. When this is done, R1 may be chosen to
provide optimum zener current for minimum zener T.C.
Since lz is not a function of V+ reference T.C. will be inde-

pendent of V+.


FIGURE 18. Precision Current Source


FIGURE 20a. Positive Voltage Reference TL/H/6822-23
FIGURE 21. Reset Stabilized Amplifier

The connection is useful in eliminating errors due to offset

voltage and bias current. The output of this circuit
a pulse is

whose amplitude equal to Vin. Operation may be under-


stood by considering the two conditions corresponding to

the position of S-|. When S-| is in position 2, the amplifier is

connected in the unity gain connection and the voltage at

the output will be equal to the sum of the input offset volt-

age and the drop across R2 due to input bias current. The
voltage at the inverting input will be equal to input offset
voltage. Capacitor C1 will charge to the sum of input offset
voltage and Vin through R1. When C1 is charged, no cur-
rent flows through the source resistance and R1 so there is
no error due to input resistance. Si is then changed to posi-
tion 1. The voltage stored on C1 is inserted between the
output and inverting input of the amplifier and the output of
the amplifier changes by Vin to maintain the amplifier input
TL/H/6822-22 at the input offset voltage. The output then changes from

FIGURE 20b. Negative Voltage Reference (Vos + 'bias R2 ) to (V| N + lbias R2 ) as S 1 is changed from
position 2 to position 1. Amplifier bias current is supplied
The circuit of Figure 20 is suited for high precision extended through R2 from the output of the amplifier or from C2 when
temperature service if V+ is reasonably constant since lz is Si is in position 2 and position 1 respectively. R3 serves to
dependent on V+. R1, R2, R3, and R4 are chosen to pro- reduce the offset at the amplifier output if the amplifier must
vide the proper lz for minimum T.C. and to minimize errors have maximum linear range or if it is desired to DC couple
due to b ias-
the amplifier.
The circuits shown should both be compensated for unity- An additionaladvantage of this connection is that input re-
gain operation or, if large capacitive loads are expected, sistance approaches infinity as the capacitor C1 ap-
should be overcompensated. Output noise may be reduced proaches full charge, eliminating errors due to loading of the
in both circuits by bypassing the amplifier input. source resistance. The time spent in position 2 should be
The circuits shown employ a single power supply, this re- long with respect to the charging time of C1 for maximum
quires that common mode range be considered in choosing accuracy.
an amplifier for these applications. If the common mode The amplifierused must be compensated for unity gain op-
range requirements are in excess of the capability of the eration and may be necessary to overcompensate be-

amplifier, two power supplies may be used. The LH101 may cause of the phase shift across R2 due to C1 and the ampli-
be used with a single power supply since the common mode fier input capacity. Since this connection is usually used at
range is from V+ to within approximately 2 volts of V~. very low switching speeds, slew rate is not normally a practi-
cal consideration and overcompensation does not reduce
The reset stabilized amplifier is a form of chopper-stabilized
amplifier and is shown in Figure 21. As shown, the amplifier
is operated closed-loop with a gain of one.

. .

v, v- v?
FIGURE 22. Analog Multiplier

THE ANALOG MULTIPLIER mount the cells in holes in an aluminum block and to mount
A simple embodiment of the analog multiplier is shown in the lamp midway between them. This mounting method pro-
Figure 22. This circuit circumvents many of the problems vides controlled spacing and also provides a thermal bridge
associated with the log-antilog circuit and provides three between the two cells to reduce differences in cell tempera-
quadrant analog multiplication which is relatively tempera- ture. This technique may be extended to the use of FET's or

ture insensitive and which is not subject to the bias current other devices to meet special resistance or environment re-

errors which plague most multipliers. quirements.

Circuit operation may be understood by considering A2 as a The circuit as shown gives an inverting output whose magni-
controlled gain amplifier, amplifying V2, whose gain is de- tude is equal to one-tenth the product of the two analog
pendent on the ratio of the resistance of PC2 to R5 and by inputs. Input V1 is restricted to positive values, but V2 may
considering A1 as a control amplifier which establishes the assume both positive and negative values. This circuit is
resistance of PC2 as a function of V-|. In this way it is seen restricted to low frequency operation by the lamp time con-
a function of both V1 and V2. stant.
that Vout is

A1, the control amplifier, provides drive for the lamp, L1. R2 and R4 are chosen to minimize errors due to input offset

When an input voltage, V1 , is present, L1 is driven by A1 current as outlined in the section describing the photocell
until the current to the summing junction from the negative amplifier. R3 is included to reduce in-rush current when first

supply through PC1 equal to the current to the summing

turning on the lamp, L1
junction from V1 through R1. Since the negative supply volt-
age is fixed, this forces the resistance of PC1 to a value AND AVERAGING FILTER
proportional to R1 and to the ratio of V1 to V L1 also .

The circuit shown in Figure 23 is the heart of an average

PC2 and,
illuminates if the photoconductors are matched,
reading, rms calibrated AC voltmeter. As shown,
it is a recti-
causes PC2 to have a resistance equal to PC1
fierand averaging filter. Deletion of C2 removes the averag-
A2, the controlled gain amplifier, acts as an inverting amplifi- ing function and provides a precision full-wave rectifier, and
er gain is equal to the ratio of the resistance of PC2
whose deletion of C1 provides an absolute value generator.
to R5. R5 is chosen equal to the product of R1 and V~,
Circuit operation may be understood by following the signal
then Vout becomes simply the product of V-j and V2. R5
path for negative and then for positive inputs. For negative
may be scaled in powers of ten to provide any required
signals, the output of amplifierA1 is clamped to + 0.7V by
output scale factor.
D1 and disconnected from the summing point of A2 by D2.
PC1 and PC2 should be matched for best tracking over tem- A2 then functions as a simple unity-gain inverter with input
perature since the T.C. of resistance is related to resistance resistor, R1, and feedback resistor, R2, giving a positive go-
match for cells of the same geometry. Small mismatches ing output.
may be compensated by varying the value of R5 as a scale
For positive inputs, A1 operates as a normal amplifier con-
factor adjustment. The photoconductive cells should re-
nected to the A2 summing point through resistor, R5. Ampli-
ceive equal illumination from L1 a convenient method
, is to
fier A1 then acts as a simple unity-gain inverter with input


FIGURE 23. Full-Wave Rectifier and Averaging Filter

resistor, R3, and feedback resistor, R5. A1 gain accuracy is with decreasing frequency. When this network the Wien —
not affected by D2 since it is inside the feedback loop. Posi- Bridge — used as a positive feedback element around an

enters the A2 summing point through resistor,

tive current amplifier, oscillation occurs at the frequency at which the
R1, and negative current is drawn from the A2 summing phase shift is zero. Additional negative feedback is provided
point through resistor, R5. Since the voltages across R1 and to set loop gain to unity at the oscillation frequency, to stabi-
R5 are equal and opposite, and R5 is one-half the value of lize the frequency of oscillation, and to reduce harmonic
R1 the net input current at the A2 summing point is equal to
, distortion.
and opposite from the current through R1 and amplifier A2
operates as a summing inverter with unity gain, again giving
a positive output.
The circuit becomes an averaging filter when C2 is connect-
ed across R2. Operation of A2 then is similar to the Simple
Low Pass Filter previously described. The time constant
R2C2 should be chosen to be much larger than the maxi- V OUT = 16 5 v PP
mum period of the input voltage which is to be averaged. 10

Capacitor C1 may be deleted if the circuit is to be used as

an absolute value generator. When this is done, the circuit
output will be the positive absolute value of the input volt-
The amplifiers chosen must be compensated for unity-gain
operation and R6 and R7 must be chosen to minimize out-
put errors due to input offset current.


An amplitude-stabilized sine-wave oscillator is shown in Fig-
ure 24. This provides high purity sine-wave output
down to low frequencies with minimum circuit complexity.
An important advantage of this circuit is that the traditional
tungsten filament lamp amplitude regulator is eliminated
along with its time constant and linearity problems.
In addition, the reliability problems associated with a lamp
are eliminated.
FIGURE 24. Wien Bridge Sine Wave Oscillator
The Wien Bridge oscillator is widely used and takes advan- The circuit presented here differs from the classic usage
tage of the fact that the phase of the voltage across the only in the form of the negative feedback stabilization
parallel branch of a series and a parallel RC network con- scheme. Circuit operation is as follows: negative peaks in
nected in series, is the same as the phase of the applied excess of -8.25V cause D1 and D2 to conduct, charging
voltage across the two networks at one particular frequency
and that the phase lags with increasing frequency and leads

C4. The charge stored in C4 provides bias to Q1, which The integrator then generates a negative-going ramp with a
determines amplifier gain. C3 is a low frequency roll-off ca- rate of I
+ /C1 volts per second until its output equals the
pacitor in the feedback network and prevents offset voltage negative trip point of the threshold detector. The threshold
and offset current errors from being multiplied by amplifier detector then changes to the negative output state and sup-
at the integrator summing point.
gain. pliesa negative current, I ,

Distortion determined by amplifier open-loop gain and by

The now generates a positive-going ramp with a

the response time of the negative feedback loop filter, R5 rate of l~/C1 volts per second until its output equals the

and C4. A trade-off is necessary in determining amplitude positive trip point of the threshold detector where the detec-
constant and oscillator distortion. R4 is
stabilization time tor again changes output state and the cycle repeats.
chosen to adjust the negative feedback loop so that the Triangular-wave frequency is determined by R3, R4 and C1

FET operated at a small negative gate bias. The circuit

is and the positive and negative saturation voltages of the am-
shown provides optimum values for a general purpose oscil- plifier A1 Amplitude is determined by the ratio of R5 to the

lator. combination of R1 and R2 and the threshold detector satu-

ration voltages. Positive and negative ramp rates are equal
and positive and negative peaks are equal if the detector
A constant amplitude triangular-wave generator is shown in
has equal positive and negative saturation voltages. The
Figure 25. This provides a variable frequency triangu-
circuit output waveform may be offset with respect to ground if the
lar wave whose amplitude is independent of frequency. inverting input of the threshold detector, A1 is offset with ,

respect to ground.
The generator may be made independent of temperature
and supply voltage if the detector is clamped with matched
zener diodes as shown in Figure 26.
The integrator should be compensated for unity-gain and
the detector may be compensated if power supply imped-

ance causes oscillation during its transition time. The cur-

be large with respect to Ibias
rent into the integrator should
for maximum symmetry, and offset voltage should be small
with respect to Vqut peak.


FIGURE 25. Triangular-Wave Generator
The generator embodies an integrator as a ramp generator
and a threshold detector with hysterisis as a reset circuit.
The integrator has been described in a previous section and
requires no further explanation. The threshold detector is
similar to a Schmitt Trigger in that it is a latch circuit with a FROM INTEGRATOR
large dead zone. This function is implemented by using pos- OUTPUT
itive feedback around an operational amplifier. When the
amplifier output is in either the positive or negative saturated TL/H/6822-28
state, the positive feedback network provides a voltage at FIGURE 26. Threshold Detector with Regulated Output
the non-inverting input which is determined by the attenua-
tion of the feed-back loop and the saturation voltage of the TRACKING REGULATED POWER SUPPLY
amplifier. To cause the amplifier to change states, the volt-
A tracking regulated power supply is shown in Figure 27.
age at the input of the amplifier must be caused to change This supply is very suitable for powering an operational am-
polarity by an amount in excess of the amplifier input offset
plifier system since positive and negative voltages track,
voltage. When this is done the amplifier saturates in the
eliminating common mode signals originating in the supply
opposite direction and remains in that state until the voltage
voltage. In addition, only one voltage reference and a mini-
at its input again reverses. The complete circuit operation
mum number of passive components are required.
may be understood by examining the operation with the out-
put of the threshold detector in the positive state. The de-
tector positive saturation voltage is applied to the integrator
summing junction through the combination R3 and R4 caus-
ing a current + to flow.

The complete power supply shown in Figure 28 is a pro-
grammable positive and negative power supply. The regula-
tor section of the supply comprises two voltage followers
whose input is provided by the voltage drop across a refer-
*V 0UT <REG) ence resistor of a precision current source.

I/1SASLO8L0 50 jif


Output voltage is variable from ± 5V to

' Negative output tracks positive output to
within the ratio of R6 to R7.
FIGURE 27. Tracking Power Supply

Power supply operation may be understood by considering Wr-O-i

the positive regulator. The positive regulator compares

the voltage at the wiper of R4 to the voltage reference, D2.

The difference between these two voltages is the input volt-
age for the amplifier and since R3, R4, and R5 form a nega-
tive feedback loop, the amplifier output voltage changes in
such a way as to minimize this difference. The voltage refer-
ence current is supplied from the amplifier output to in-
crease power supply line regulation. This allows the regula-
tor to operate from supplies with large ripple voltages. Reg-
ulating the reference current in thisway requires a separate
source of current for supply start-up. Resistor R1 and diode
D1 provide this start-up current. D1 decouples the reference
string from the amplifier output during start-up and R1 sup-
plies the start-up current from the unregulated positive sup-
ply. After start-up, the low amplifier output impedance re-
duces reference current variations due to the current
through R1.
The negative regulator is simply a unity-gain inverter with
input resistor, R6, and feedback resistor, R7.

The amplifiers must be compensated for unity-gain opera-


The power supply may be modulated by injecting current

'WNr-O— -i

into the wiper of R4. In this case, the output voltage varia- R12
tions be equal and opposite at the positive and negative

outputs. The power supply voltage may be controlled by

replacing D1, D2, R1 and R2 with a variable voltage refer-

FIGURE 28. Low-Power Supply for

Integrated Circuit Testing


Programming sensitivity of the positive and negative supply Input Resistance: The ratio of the change in input voltage
is1V7 1000ft of resistors R6 and R12 respectively. The out- to the change in input current on either input with the other
put voltage of the positive regulator may be varied from ap- grounded.
proximately + 2V to + 38V with respect to ground and the Supply Current: The current required from the power sup-
negative regulator output voltage may be varied from -38V ply to operate the amplifier with no load and the output at
to 0V with respect to ground. Since LM107 amplifiers are zero.
used, the supplies are inherently short circuit proof. This
Output Voltage Swing: The peak output voltage swing, re-
current limiting feature also serves to protect a test circuit if
ferred to zero, that can be obtained without clipping.
this supply is used in integrated circuit testing.
Large-Signal Voltage Gain: The ratio of the output voltage
Internally compensated amplifiers may be used in this appli-
swing to the change in input voltage required to drive the
cation if the expected capacitive loading is small. If large
output from zero to this voltage.
capacitive loads are expected, an externally compensated
Power Supply Rejection: The ratio of the change in input
be used and the amplifier should be over-
amplifier should
offset voltage to change in power supply voltage producing
compensated for additional stability. Power supply noise
may be reduced by bypassing the amplifier inputs to ground
with capacitors in the 0.1 to 1.0 ju.F range. Slew Rate: The internally-limited rate of change in output
voltage with a large-amplitude step function applied to the
The foregoing circuits are illustrative of the versatility of the
integrated operational amplifier and provide a guide to a
number of useful applications. The cautions noted in each 1 D.C. Amplifier Stabilized for Zero and Gain; Williams, Tap-
section will show the more common pitfalls encountered in ley, and Clark; AIEE Transactions, Vol. 67, 1948.

amplifier usage. 2. Active Network Synthesis; K. L. Su, McGraw-Hill Book

Co., Inc., New York, New York.

3. Analog Computation; A. S. Jackson, McGraw-Hill Book

DEFINITION OF TERMS Co., Inc., New York, New York.
Input Offset Voltage: That voltage which must be applied 4. A Palimpsest on the Electronic Analog Art; H. M. Paynter,
between the input terminals through two equal resistances Editor. Published by George A. Philbrick Researches,
to obtain zero output voltage. Inc., Boston, Mass.
Input Offset Current: The difference in the currents into
5. Drift Compensation Techniques for Integrated D.C. Am-
the two input terminals when the output is at zero. plifiers; R. J. Widlar, EDN, June 10, 1968.
Input Bias Current: The average of the two input currents. 6. A Fast Integrated Voltage Follower With Low Input Cur-
Input Voltage Range: The range of voltages on the input rent; R. J. Widlar, Microelectronics, Vol. 1 No. 7, June
terminals for which the amplifier operates within specifica- 1968.

Common Mode Rejection Ratio: The ratio of the input

voltage range to the peak-to-peak change in input offset
voltage over this range.

National Semiconductor
The LM105-An Improved Application Note 23
Positive Regulator
Robert J. Widlar
Apartado Postal 541
Puerto Vallarta, Jalisco

IC voltage regulators are seeing rapidly increasing usage.
The LM100, one of the first, has already been widely ac-
>V v
cepted. Designed for versatility, this circuit can be used as a P -0.2 '

< LM100 1
linear regulator, a switching regulator, a shunt regulator, or >
even a current regulator. The output voltage can be set be- °
tween 2V and 30V with a pair of external resistors, and it
works with unregulated input voltages down to 7V. Dissipa-

tion limitations of the IC package restrict the output current > CU RRENT
to less than 20 mA, but external transistors can be added to L>
obtain output currents in excess of 5A. The LM100 and an 3 Rsc = 10"
extensive description of its use in many practical circuits are
V *b"C

described in References 1 -3. 10 20 30

One complaint about the LM100 has been that it does not
have good enough regulation for certain applications. In ad-
dition, it becomes prove that the load regulation is
difficult to
satisfactory under worst-case design conditions. These
a. Ti = 25°C
problems prompted development of the LM105, which is
LM100 except that a gain stage has
nearly identical to the
been added improved regulation. In the great majority of
applications, the LM105 is a plug-in replacement for the
_ LM1 0(1 \ 1l

the improved regulator

o -0.4 Zi
The load regulation of the LM100 is about 0.1 %, no load to
full load, without current limiting. When SHORT CIRCUIT
short circuit protec- 5 -0.6 h

added, the regulation begins to degrade as the output o
tion is
current becomes greater than about half the limiting current.
This is illustrated in Figure The LM105, on the other hand,
"R SC = 10SZ] ^
gives 0.1%

regulation up to currents closely approaching ° -1.0

"V 1i i 1

the short circuit current. As shown in Figure 1b, this is partic- 10 20

ularly significant at high temperatures.
The current limiting characteristics of a regulator are impor-
tant for two reasons: First, it is almost mandatory that a
b.Tj = 125°C
regulator be short-circuit protected because the output is
distributed to enough places that the probability of it becom- Figure 1. Comparison between the load regulation of
ing shorted is quite high, Secondly, the
sharpness of the the LM100 and LM105 for equal short circuit
limiting characteristics is not improved by the addition of currents
external booster transistors. External transistors can in-
circuit current. Thus, it can be seen that the LM1 05 provides
crease the maximum output current, but they do not im-
more than ten times better load regulation in practical power
prove the load regulation at currents approaching the short
supply designs.

Figure 2 shows that the LM105 also provides better line
regulation than the LM100. These curves give the percent-
age change in output voltage for an incremental change in
the unregulated input voltage. They show that the line regu- BOOSTER OUTPUT

lation is worst for small differences between the input and

output voltages. The LM105 provides about three times bet-
ter regulation under worst case conditions. Bypassing the
internal reference of the regulator makes the ripple rejection
of the LM105 almost a factor of ten better than the LM100
over the entire operating range, as shown in the figure. This
bypass capacitor also eliminates noise generated in the in-
ternal reference zener of the IC. SHUTOOWN

EVou T 10V :

JM no

-LM 105*"

I f >12 ot I
Figure 4. Schematic diagram of the LM105 regulator
Q4, divided down by R1 and R2 and connected in series
with a diode-connected transistor, Q7. The negative temper-
Figure 2. Comparison between the line regulation char- ature coefficient of Q7 cancels out the positive coefficient of
acteristics of the LM100 and LM105 the voltage across R2, producing a temperature-compen-
sated 1.8V on the base of Q8. This point is also brought
The LM105 has also benefited from the use of new IC com-
outside the circuit so that an external capacitor can be add-
ponents developed after the LM100 was designed. These
ed to bypass any noise from the zener diode.
have reduced the internal power consumption so that the
LM105 can be specified for input voltages up to 50V and Transistors Q8 and Q9 make up the error amplifier of the
output voltages to 40V. The minimum preload current re- circuit. A gain of 2000 is obtained from this single stage by
quired by the LM100 is not needed on the LM105. using a current source, another collector on Q2, as a collec-
tor load.The output of the amplifier is buffered by Q1 1 and
circuit description
used to drive the series-pass transistor, Q12. The collector
The differences between the LM105 can be
LM100 and the of Q12 is brought out so that an external PNP transistor, or
seen by comparing the schematic diagrams in Figures 3 and PNP— NPN combination, can be added for increased output
4. Q4 and Q5 have been added to the LM105 to form a current.
common-collector, common-base, common-emitter amplifi- Current limiting is provided by Q10. When the voltage
er, rather than the single common-emitter differential ampli- across an external resistor connected between Pins 1 and 8
fier of the LM 100. becomes high enough to turn on Q10, it removes the base
In the LM100, generation of the reference voltage starts drive from Q1 1 so the regulator exhibits a constant-current
with zener diode, D1 which is supplied with a fixed current
, characteristic. Prebiasing the current limit transistor with a
from one of the collectors of Q2. This regulated voltage, portion of the emitter-base voltage of Q12 from R6 and R7
which has a positive temperature coefficient, is buffered by reduces the current limit sense voltage. This increases the


Figure 3. Schematic diagram of the LM100 regulator

when foldback current
efficiency of the regulator, especially power limitations
used. With foldback limiting, the voltage dropped
limiting is
Although it is desirous to put as much of the regulator as
across the current sense resistor is about four times larger
possible on the IC chip, there are certain basic limitations.
than the sense voltage.
For one, it is not a good idea to put the series pass transis-

As for the remaining details, the collector of the amplifier, tor on the chip. The power that must be dissipated in the
Q9, is brought out so that external collector-base capaci- pass transistor is too much for practical IC packages. Fur-
tance can be added to frequency-stabilize the circuit when it ther, IC's must be rated at a lower maximum operating tem-
is used as a linear regulator. This terminal can also be perature than power transistors. This means that even with
grounded to shut the regulator off. R9 and R4 are used to a power package, a more massive heat sink would be re-
start up the regulator, while the rest of the circuitry estab- quired if the pass transistor was included in the IC.
lishes the proper operating levels for the current source
Assuming that these problems could be solved, it is still not
transistor, Q2. advisable to put the pass transistor on the same chip with
The reference circuitry of the LM105 is the same, except the reference and control circuitry: changes in the unregu-
that the current through the reference divider, R2, R3 and lated input voltage or load current produce gross variations
R4, has been reduced by a factor of two on the LM105 for in chip temperature. These variations worsen load and line
reduced power consumption. In the LM105, Q2 and Q3 form regulation due to temperature interaction with the control
an emitter coupled amplifier, with Q3 being the emitter-fol- and reference circuitry.
lower input and Q2 the common-base output amplifier. R6 is
To elaborate, it is reasonable to neglect the package prob-
the collector load for this stage, which has a voltage gain of
lem since it is potentially solvable. The lower, maximum op-
about 20. The second stage is a differential amplifier, using
erating temperatures of IC's, however, present a more basic
Q4 and Q5. Q5 actually provides the gain. Since it has a problem. The control circuitry in an IC regulator runs at fairly
current source as a collector load, one of the collectors of
low currents. As a result, it is more sensitive to leakage
Q12, the gain is quite high: about 1500. This gives a total currents and other phenomena which degrades the per-
gain in the error amplifier of about 30,000 which is ten times formance of semiconductors at high temperatures. Hence,
higher than the LM100.
the maximum operating temperature is limited to 150"C in
It is not obvious from the schematic, but the first stage (Q2 military temperature range applications. On the other hand,
and Q3) and second stage (Q4 and Q5) of the error amplifi- a power transistor operating at high currents may be run at
er are closely balanced when the circuit is operating. This temperatures up to 200°C, because even a 1 mA leakage
will be true regardless of the absolute value of components current would not affect its operation in a properly designed
and over the operating temperature range. The only thing circuit. Even if the pass transistor developed a permanent
affecting balance is component matching, which is good in a 1 mA leakage from channeling, operating under these con-
monolithic integrated circuit, so the error amplifier has good ditions of high stress, it would not affect circuit operation.
drift characteristics over a wide temperature range. These conditions would not trouble the pass transistor, but
Frequency compensation is accomplished with an external they would most certainly cause complete failure of the con-
around the error amplifier, as with the
integrating capacitor trol circuitry.

LM100. This scheme makes the stability insensitive to load- These problems are not eliminated in applications with a
ing conditions — resistive or reactive —while giving good lower maximum operating temperature. Integrated circuits
transient response. However, an internal capacitor, C1, is are sold for limited temperature range applications at con-
added to prevent minor-loop oscillations due to the in- siderably lower cost. This is mainly based on a lower maxi-
creased gain. mum junction temperature. They may be rated so that they
Additional differences between the LM100 and LM105 are do not blow up at higher temperatures, but they are not
thata field-effect transistor, Q1 8, connected as a current guaranteed to operate within specifications at these temper-
source starts the regulator when power is first applied. atures. Therefore, in applications with a lower maximum am-
Since this current source is connected to ground, rather bient temperature, it is necessary to purchase an expensive
than the output, the minimum load current before the regula- full temperature range part in order to take advantage of the

tor drops out of operation with large input-output voltage theoretical maximum operating temperatures of the IC.
differentials is greatly reduced. This also minimizes power Figure 5 makes the point about dissipation limitations more
dissipation in the integrated circuit when the difference be- strongly. It gives the maximum short circuit output current
tween the input and output voltage is at the worst-case val- for an IC regulator in a TO-5 package, assuming a 25°C
ue. With the LM105 circuit configuration, was also neces-
it temperature rise between the chip and ambient and a quies-
sary to add Q17 to eliminate a latch-up mechanism which cent current of 2 mA. Dual-in-line or flat packages give re-
could exist with lower output-voltage settings. Without Q1 7, sults which are, at best, slightly better, but are usually
this could occur when Q3 saturated and cut off the second worse. If the short circuit current is not of prime concern,
stage amplifiers, Q4 and Q5, causing the output to latch at a Figure 5 can also be used to give the maximum output cur-
voltage nearly equal to the unregulated input. rent as a function of input-output voltage differential, How-
ever, the increased dissipation due to the quiescent current
flowing at the maximum input voltage must be taken into
account. In addition, the input-output differential must be
measured with the maximum expected input voltages.

This would happen if an NPN transistor was used in a com-
n I'
pound emitter follower connection with the NPN output tran-
TO 5 li
sistor of the IC. A single-diffused, wide base transistor like

the 2N3740 is recommended because it causes fewer oscil-

lation problems than double-diffused, planar devices. In ad-
cs \sw K-SOOmW
? 30 dition, it seems to be less prone to failure under overload

o conditions; and low cost devices are available in power

packages like the TO-66 or even TO-3.
1 167 mW When the maximum dissipation in the pass transistor is less
than about 0.5W, a 2N2905 may be used as a pass transis-

AT = 25° C tor. However, it is generally necessary to carefully observe

= 2 mA thermal deratings and provide some sort of heat sink.

1.0 10 100 In the circuit of Figure the output voltage is determined by


R1 and R2. The resistor values are selected based on a

feedback voltage of 1.8V to Pin 6 of the LM105. To keep
thermal drift of the output voltage within specifications, the
Figure 5. Dissipation limited short circuit output current parallel combination of R1 and R2 should be approximately
for an IC regulator in a TO-5 package 2K. However, this resistance is not critical. Variations of
The 25°C temperature rise assumed in arriving at Figure 5 is ±30% will not cause an appreciable degradation of temper-
not at all unreasonable. With military temperature range ature drift.

parts, this is valid for a maximum junction temperature of The 1 ju.F output capacitor, C2,is required to suppress oscil-

150°C with a 125°C ambient. For low cost parts, marketed lations in the feedback loop involving the external booster
for limited temperature range applications, this maximum transistor, Q1, and the output transistor of the LM105. C1
differential appropriately derates the maximum junction tem- compensates the internal regulator circuitry to make the sta-
perature. bility independent for all loading conditions. C3 is not nor-
In practical designs, the maximum permissible dissipation mally required if the lead length between the regulator and
willalways be to the left of the curve shown for an infinite the output filter of the rectifier is short.

heat sink in Figure 5. This curve is realized with the package Current limiting provided by R3. The current limit resistor
immersed in circulating acetone, freon or mineral oil. Most should be selected so that the maximum voltage drop
heat sinks are not quite as good. across it, at full load current, is equal to the voltage given in
To summarize, power transistors can be run with a tempera- Figure 7 at the maximum junction temperature of the IC.
ture differential, junction to ambient, 3 to 5 times as great as This assures a no load to full load regulation better than
an integrated circuit. This means that they can dissipate 0.1% under worst-case conditions.
much more power, even with a smaller heat sink. This, cou-
pled with the fact that low cost, multilead power packages
are not available and that there can be thermal interactions o< 2r nA
between the control circuitry and the pass transistor, strong-
ly suggests that the pass transistors be kept separate from

the integrated circuit.

using booster transistors

Figure 6 shows how an external pass transistor is added to
the LM105. The addition of an external PNP transistor does
not increase the minimum input output voltage differential.
v OUT = sv

20 40 60 80 100 120 140 160


Figure 7. Maximum voltage drop across current limit re-

sistor at full load for worst case load regula-
tion of 0.1%
The short circuit output current is also determined by R3.
Figure 8 shows the voltage drop across this resistor, when
the output is shorted, as a function of junction temperature
in the IC.

With the type of currentlimiting used in Figure 6, the dissipa-

Figure 6. 0.2A regulator
tionunder short circuit conditions can be more than three
times the worst-case full load dissipation. Hence, the heat


the current is reduced to a value determined by the current

> limit resistor and the current limit sense voltage of the
< LM105.
5 0.5
o 16
> /,

NORMAL ' f l\


0.2 / / 4'

-75 -50 -25 25 50 75 100 125 150 ~7 /'


Figure 8. Voltage drop across current limit resistor re- 0.5 1.0 1.5

quired to initiate current limiting

sink for the pass transistor must be designed to accommo- TL/H/6906-11
date the increased dissipation if the regulator is to survive
Figure 10. Limiting characteristics of regulator using
more than momentarily with a shorted output. It is encourag-
foldback current limiting
ing to note, however, that the short circuit current will de-
crease at higher ambient temperatures. This assists in pro- Figure 10 illustrates the limiting characteristics. The circuit
tecting the pass transistor from excessive heating. regulates for load currents up to 2A. Heavier loads will
cause the output voltage to drop, reducing the available cur-
foldback current limiting rent. With a short on the output, the current is only 0.5A.
With high current regulators, the heat sink for the pass tran- In design, the value of R3 is determined from
sistor must be made quite large in order to handle the power
dissipated under worst-case conditions. Making it more than
three times larger to withstand short circuits is sometimes
R3 = —
' (1)

inconvenient in the extreme. This problem can be solved where V| im is the current limit sense voltage of the LM105,
with foldback current limiting, which makes the output cur- given in Figure 8, and Isc is the design value of short circuit
rent under overload conditions decrease below the full load current. R5 is then obtained from
current as the output voltage is pulled down. The short cir- VoUT + V s
cuit current can be made but a fraction of the full load cur-
R5 (2)
'bleed + 'bias
where Vout is the regulated output voltage, V sense is maxi-
A high current regulator using foldback limiting shown
Figure A second
is in mum voltage across the current limit resistor for 0.1 % regu-
9. booster transistor, Q1, has been added as indicated
lation in Figure 7, l
bteed is the preload current
to provide 2A output current without causing excessive dis-
on the regulator output provided by R5 and as is the maxi- lt,j
sipation in theLM105. The resistor across its emitter base mum current coming out of Pin 1 of the LM105 under full
junction bleeds off any collector base leakage and estab-
load conditions. I^ias will be equal to 2 mA plus the worst-
lishes a minimum collector current for Q2 to make the circuit
case base drive for the PNP booster transistor, Q2. Ibieed
easier to stabilize with light loads. The foldback characteris- should be made about ten times greater than as lt,j .

tic produced with R4 and R5. The voltage across R4

Finally, R4 is given by
bucks out the voltage dropped across the current sense
resistor, R3. Therefore, more voltage must be developed D _ *FL ^3 ~ Vsense ,_.
H 4 j
across R3 before current limiting is initiated. After the output

voltage begins to fall, the bucking voltage is reduced, as it is where Ifl is the output current of the regulator at full load.
proportional to the output voltage. With the output shorted,

-f— Vout - 1

* M J±C2t
"P 4-7 nf
S \

—(? LM105

±C3t 360
^1,iF tSolid tantalum

tFerroxcube K5-001-00/3B
Figure 9. 2A regulator with foldback current limiting

It is recommended bead be strung on the emit-
that a ferrite short circuited output. This is illustrated in Figure 1 1. Howev-
ter of the pass as shown in Figure 9, to suppress
transistor, er, if the maximum dissipation is calculated with the worst-
oscillations that may show up with certain physical configu- case input voltage, as it should be, the power peak is not
rations. It is advisable to also include C4 across the current too high.
limit resistor. 25

In some applications, the power dissipated in Q2 becomes

too great for a 2N2905 under worst-case conditions. This
can be true even if it should be in
a heat sink is used, as
almost all applications. When
a problem, the
dissipation is

2N2905 can be replaced with a 2N3740. With a 2N3740, the

ferrite bead and C4 are not needed because this transistor

has a lower cutoff frequency.

One of the advantages of foldback limiting is that it sharp- V, N =25V
ens the limiting characteristics of the IC. In addition, the l
FL = 2.0A-

maximum output current is less sensitive to variations in the

current limit sense voltage of the IC: in this circuit, a 20% I I

2 4 6 8 10 12 14 16
change in sense voltage will only affect the trip current by
5%. The temperature sensitivity of the full load current is OUTPUT VOLTAGE (V)

likewise reduced by a factor of four, while the short circuit TL/H/6906-12

current is not. Figure 11. Power dissipation in series pass transistors
Even though the voltage dropped across the sense resistor under overload conditions in regulator using
islarger with foldback limiting, the minimum input-output foldback current limiting
voltage differential of the complete regulator is not in-

creased above the 3V specified for the LM105 as long as high current regulator
this drop is less than 2V. This can be attributed to the low The output current of a regulator using the LM105 as a con-
sense voltage of the IC by itself. trol element can be increased to any desired level by adding
Figure 10 shows that foldback limiting can only be used with more booster transistors, increasing the effective current
certain kinds of loads. When the load looks predominately gain of the pass transistors. A circuit for a 1 0A regulator is

likea current source, the load line can intersect the foldback shown in Figure 12. A third NPN
has been includ- transistor
characteristic at a point where it will prevent the regulator ed to get higher current. A low frequency device is used for
from coming up to voltage, even without an overload. Fortu- Q3 because it seems to better withstand abuse. However,
nately, most solid state circuitry presents a load line which high frequency transistors must be used to drive it. Q2 and
does not intersect. However, the possibility cannot be ig- Q3 are both double-diffused transistors with good frequency
nored, and the regulator must be designed with some response. This insures that Q3 will present the dominant lag
knowledge of the load. in the feedback loop through the booster transistors, and
With foldback limiting, power dissipation in the pass transis- back around the output transistor of the LM105. This is fur-
tor reaches a maximum at some point between full load and ther insured by the addition of C3.


~ tSolid tantalum


Figure 12. 10A regulator with foldback current limiting

The circuit, as shown, has a full load capability of 10A. Fold- through the reverse biased pass transistors or the control
back limiting is used to give a short circuit output current of circuitry, frequently causing destruction. This phenomenon
2.5A. The addition of Q3 increases the minimum input-out- is especially prevalent when solid tantalum capacitors are
put voltage differential, by "IV, to 4V. used with high-frequency power inverters. The maximum
ripple allowed on these capacitors decreases linearly with
dominant failure mechanisms
By the biggest reason for regulator failures is overdissi-

pation the series pass transistors. This has been borne

The solution to this problem is to use capacitors with con-
servative voltage ratings. the maximum ripple
In addition,
out by experience with the LM100. Excessive heating in the
allowed by the manufacturer at the operating frequency
pass transistors causes them to short out, destroying the IC.
should also be observed.
This has happened most frequently when PNP booster tran-
sistors in a TO-5 can, like the 2N2905, were used. Even with The problem can be eliminated completely by installing a
a good heat sink, these transistors cannot dissipate much diode between the input and output of the regulator such
more than 1W. The maximum dissipation is less in many that the capacitor on the output is discharged through this
applications. When a single PNP booster is used and power diode if the input is shorted. A fast switching diode should
can be a problem, it is best to go to a transistor like the be used as ordinary rectifier diodes are not always effective.
2N3740, in a TO-66 power package, using a good heat sink. Another cause of problems with regulators is severe voltage
Using acompound PNP/NPN booster does not solve all transients on the unregulated input. Even if these transients
problems. Evenwhen breadboarding with transistors in TO- do not cause immediate failure in the regulator, they can
3 power packages, heat sinks must be used. The TO-3 feed through and destroy the load. If the load shorts out, as
package is not very good, thermally, without a heat sink. is frequently the case, the regulator can be destroyed by
Dissipation in the PNP transistor driving the NPN series subsequent transients.
pass transistor cannot be ignored either. Dissipation in the This problem can be solved by specifying all parts of the
driver with worst-case current gain in the pass transistor regulator to withstand the transient conditions. However,
must be taken into account. In certain cases, this could re- when ultimate reliability is needed, this is not a good solu-
quire that a PNP transistor in a power package be used to tion. Especially since the regulator can withstand the tran-
drive the NPN pass transistor. In almost all cases, a heat sient, yet severely overstress the circuitry on its output by
sink is required if a PNP driver transistor in a TO-5 package feeding the transients through. Hence, a more logical re-
is selected. course is to include circuitry which suppresses the tran-
With output currents above 3A, it is good practice to replace sients. A method of doing this is shown in Figure 13. A zener

a 2N3055 pass transistor with a 2N3772. The 2N3055 is

diode, which can handle large peak currents, clamps the
rated for higher currents than 3A, but its current gain falls off input voltage to the regulator while an inductor limits the
rapidly. This
especially true at either high temperatures or
is current through the zener during the transient. The size of
low input-output voltage differentials. A 2N3772 will give the inductor is determined from
substantially better performance and
= AVAt
at high currents, it

makes life much easier for the PNP L (4)


The second biggest cause of failures has been the output where AV is the voltage by which the input transient ex-
filter capacitors on power inverters providing unregulated
ceeds the breakdown voltage of the diode, At is the dura-
power to the regulator. If these capacitors are operated with tion of the transient and is the peak current the zener can

excessive ripple across them, and simultaneously near their handle while still clamping the input voltage to the regulator.
maximum dc voltage rating, they will sputter. That is, they As shown, the suppression circuit will clamp 70V, 4 ms tran-
short momentarily and clear themselves. When they short,
sients on the unregulated supply.
the output capacitor of the regulator is discharged back


•Unitrode TL/H/6906-14
Figure 13. Suppression circuitry to remove large voltage spikes from unregulated supplies


conclusions Overstressing series pass transistors has been the biggest

The LM105 an exact replacement for the LM100 in the
cause of failures with IC regulators. This not only applies to
majority of applications, providing about ten times better the transistors within the IC, but also to the external booster

regulation. There are, however, a few differences: transistors. Hence, in designing a regulator, it is of utmost
importance to determine the worst-case power dissipation
In switching regulator applications, 2 the size of the resistor
in all the driver and pass transistors. Devices must then be
used to provide positive feedback should be doubled as the
selected which can handle the power. Further, adequate
impedance seen looking back into the reference bypass ter-
heat sinks must be provided as even power transistors can-
minal is twice that of the LM100 (2 kft versus 1 kH). In
not dissipate much power by themselves.
minimum output voltage of the LM105 is 4.5V,
addition, the
compared with 2V for the LM100. In low voltage regulator Normally, the highest power dissipation occurs when the
output of the regulator is shorted. If this condition requires
applications, the effect of this is obvious. However, it also
imposes some limitations on current regulator and shunt heat sinks which are so large as to be impractical, foldback
regulator designs. 3 Lastly, clamping the compensation ter- current limiting can be used. With foldback limiting, the pow-

minal (Pin 7) within a diode drop of ground or the output er dissipated under short circuit conditions can actually be

terminal will not guarantee that the regulator is shut off, as it

made less than the dissipation at full load.

will with the LM100. This restricts the LM105 in the overload The LM105 designed primarily as a positive voltage regu-

shutoff schemes3 which can be used with the LM100. lator. A negative regulator, the LM104, which is a functional

packages dictate that the

Dissipation limitations of practical complement to the LM105, is described in Reference 4.
output current of an IC regulator be less than 20 mA. How- references
ever, external booster transistors can be added to get any
1 R. J. Widlar, "A Versatile, Monolithic Voltage Regulator",
output current desired. Even with satisfactory packages,
National Semiconductor AN-1 February, 1967.

considerably larger heat sinks would be needed if the pass

2. R. J. Widlar, "Designing Switching Regulators," National
transistors were put on the same chip as the reference and
control circuitry, because an IC must be run at a lower maxi-
Semiconductor AN-2, April, 1967.

mum temperature than a power transistor. In addition, heat 3. R. J. Widlar, "New Uses for the LM100 Regulator," Na-
dissipated in the pass transistor couples into the low level tional Semiconductor AN-8, June, 1968.
circuitry and degrades performance. All this suggests that 4. R. J. Widlar, "Designs for Negative Voltage Regulators,"
the pass transistor be kept separate from the IC. National Semiconductor AN-21 October, 1968. ,

National Semiconductor
A Simplified Test Set for Op Application Note 24

Amp Characterization M. Yamatake


The test set described in thispaper allows complete quanti- Basic waveforms and dc operating voltages for the test set
tative characterization of all dc operational amplifier param- are derived from a power supply section comprising a posi-
eters quickly and with a minimum of additional equipment. tive and a negative rectifier and filter, a test set voltage
The method used is accurate and is equally suitable for lab- regulator,a test circuit voltage regulator, and a function gen-
oratory or production test—for quantitative readout or for erator. The dc supplies will be discussed in the section deal-
limit testing. As embodied here, the test set is conditioned ing with detailed circuit description.
for testing the LM709 and LM101 amplifiers; however, sim- The waveform generator provides three output functions, a
ple changes discussed in the text will allow testing of any of ± 1 9V square wave, a - 1 9V to + 1 9V pulse with a 1 % duty
the generally available operational amplifiers. cycle, and a ± 5V triangular wave. The square wave is the
Amplifier parameters are tested over the full range of com- basic waveform from which both the pulse and triangular
mon mode and power supply voltages with either of two wave outputs are derived.
output loads. Test set sensitivity and stability are adequate The square wave generator is an operational amplifier con-
for testing all presently available integrated amplifiers.
nected as an astable multivibrator. This amplifier provides
The paper be divided into two sections, i.e., a functional
will an output of approximately ±19V at 16 Hz. This square
description,and a discussion of circuit operation. Complete wave is used to drive junction FET switches in the test set
construction information will be given including a layout for and to generate the pulse and triangular waveforms.
the tester circuit boards. The pulse generator is a monostable multivibrator driven by
FUNCTIONAL DESCRIPTION the output of the square wave generator. This multivibrator
is allowed to swing from negative saturation to positive satu-
The test set operates in one of three basic modes. These
rationon the positive going edge of the square wave input
are: (1) Bias Current Test; (2) Offset Voltage, Offset Current
and has a time constant which will provide a duty cycle of
Test; and (3) Transfer Function Test. In the first two of these
approximately 1%. The output is approximately -19V to
tests, the amplifier under test is exercised throughout its full
+ 19V.
common mode range. In all three tests, power supply volt-
ages for the circuit under test may be set at ±5V, ± 10V,
± 15V, or ±20V.

FIGURE 1. Functional Diagram of Bias Current Test Circuit

The triangular wave generator is a dc stabilized integrator The bias current display of Figure 2 has the added advan-
driven by the output of the square wave generator and pro- tage that incipient breakdown of the input stage of the de-
vides a ± 5V output at the square wave frequency, inverted vice under test at the extremes of the common mode range
with respect to the square wave. is easily detected.

The purpose of these various outputs from the power supply If either or both the upper or lower trace in the bias current
section will be discussed in the functional description. display exhibits curvature near the horizontal ends of the
oscilloscope face, then the bias current of that input of the
is shown to be dependent on common mode volt-
A functional diagram of the bias current test circuit shown is age.The usual causes of this dependency are low break-
in Figure 1. The output of the triangular wave generator and down voltage of the differential input stage or current sink.
the output of the test circuit, respectively, drive the horizon-
tal and vertical deflection of an oscilloscope. OFFSET VOLTAGE, OFFSET CURRENT TEST
The device under test, (cascaded with the integrator, A7), is
The offset voltage and offset current tests are performed in

connected in a differential amplifier configuration by R-j, R2, the same general way as the bias current test. The only

R3, and R4. The inputs of this differential amplifier are driven difference is that the switches S5 a and $$o are closed on
the same half-cycle of the triangular wave input.
in common from the output of the triangular wave generator

through attenuator Rg and amplifier k%. The inputs of the The synchronous operation of S5 3 and Ssb forces the ampli-
device under test are connected to the feedback network fierunder test to draw its input currents through matched
through resistors R5 and Rq, shunted by the switch Ss a and high and low input resistors on alternate halves of the input
Ssb- triangular wave. The difference between the voltage drop
across the two values of input resistors is proportional to the
The feedback network provides a closed loop gain of 1 ,000
difference in input current to the two inputs of the amplifier
and the integrator time constant serves to reduce noise at
under test and may be measured as the vertical spacing
the output of the test circuit as well as allowing the output of
the device under test to remain near zero volts.
between the two traces appearing on the face of the oscillo-
The bias current test is accomplished by allowing the device
Offset voltage is measured as the vertical spacing between
under test to draw one of its inputs through
input current to
the corresponding input resistor on positive going or nega-
the trace corresponding to one of the two values of source
resistance and the zero volt baseline. Switch %§ and Resis-
tive going halves of the triangular wave generator output.
tor Rg are a base line chopper whose purpose is to provide
This is accomplished by closing Ss a or Ssb on alternate
a baseline reference which is independent of test set and
halves of the triangular wave input. The voltage appearing
across the input resistor is equal to input current times the
oscilloscope drift. S6 is driven from the pulse output of the
function generator and has a duty cycle of approximately
input resistor. This voltage is multiplied by 1,000 by the
feedback loop and appears at the integrator output and the
1 % of the triangular wave.

vertical input of the oscilloscope. The vertical separaton of Figure 3 is a photograph of the various waveforms present-
the traces representing the two input currents of the amplifi- ed during this test. Offset voltage and offset current are
er under test is equivalent to the total bias current of the displayed at a sensitivity of 1 mV and 100 nA per division,
amplifier under test. respectively, and both parameters are displayed over a
common mode range of ± 1 0V.
The bias current over the entire common mode range may
be examined by setting the output of Ae equal to the amplifi-
er common mode range. A photograph of the bias current
oscilloscope display is given as Figure 2. In this figure, the
total input current of an amplifier is displayed over a ±10V
common mode range with a sensitivity of 1 00 nA per vertical

FIGURE 3. Offset Voltage, Offset Current
and Common Mode Rejection Display

FIGURE 2. Bias Current and Common

Mode Rejection Display


FIGURE 4. Functional Diagram of Transfer Function Circuit


A functional diagram of the transfer function test is shown in

Figure 4. The output of the triangular wave generator and

the output of the circuit under test, respectively, drive the
horizontal and vertical inputs of an oscilloscope.
The device under test is driven by a ±2.5 mV triangular
wave derived from the ± 5 V output of the triangular wave
generator through the attenuators Rn, R12. and R-|, R3 and
through the voltage follower, A7. The output of the device
under test is fed to the vertical input of an oscilloscope.
Amplifier A7 performs a dual function in this test. When S7 is

closed during the bias current test, a voltage is developed

across C<| equal to the amplifier offset voltage multiplied by
the gain of the feedback loop. When S7 is opened in the

transfer function test, the charge stored in C-\ continues to

provide this offset correction voltage. In addition, A 7 sums
wave test signal with the offset correction volt-
the triangular
age and applies this sum to the input of the amplifier under FIGURE 5. Transfer Function Display
test through the attenuator R-|, R3. This input sweeps the Gain is displayed as the slope, AVout/AVin of the transfer
input of the amplifier under test ±2.5 mV around its offset function. Gain linearity is indicated change in slope of the
voltage. v OUT /v lN display as a function of output voltage. This dis-
play is particularly useful in detecting crossover distortion in
Figure 5 is a photograph of the output of the test set during
the transfer function
a Class B output stage. Output swing is measured as the
test. This figure illustrates the function
vertical deflection of the transfer function at the horizontal
of amplifier A7 in adjusting the dc input of the test device so
extremes of the display.
that its transfer function is displayed on the center of the
oscilloscope face.
The transfer function display is a plot of Vin vs Vout for an
amplifier. This display provides information about three am-
plifier parameters: gain, gain linearity, and output swing.



NOTE: All resistor valves

in ohms.
All resistors /4 W,
unless specified


FIGURE 6. Power Supply and Function Generator

DETAILED CIRCUIT DESCRIPTION comprising R7, Rs, R9, R10. and R26- The output of this
divider is + 10V to +2.5V according to the position of S2a
POWER SUPPLIES and is fed to the non-inverting, gain-of-two amplifier, A2. A2
As shown in Figure 6, which is a complete schematic of the is powered from + 28V and provides + 20V to + 5V at its
power supply and function generator, two power supplies output. A3 is a unity gain inverter whose input is the output
are provided in the test set. One supply provides a fixed of A2 and which is powered from -28V. The complementa-
±20V to power the circuitry in the test set; the other pro- ry outputs of amplifiers A2 and A3 provide dc power to the
vides ± 5V to ± 20V to power the circuit under test. circuit under test.

The power supply regulator accepts + 28V from the

test set LM101 amplifiers are used as A2 and A3 to allow operation
positive rectifier and filter and provides + 20V through the from one ground referenced voltage each and to provide
LM100 positive regulator. Amplifier Ai is powered from the protective current limiting for the device under test.
negative rectifier and filter and operates as a unity gain in-
verter whose input is + 20V from the positive regulator, and
whose output is -20V. The function generator provides three outputs, a ±19V
The test circuit power supply is referenced to the + 20V square wave, a - 1 9V to + 1 9V pulse having a 1 % duty
cycle, and a ± 5V triangular wave. The square wave is the
output of the positive regulator through the variable divider

wave are
basic function from which the pulse and triangular operated synchronously from the output of Q1 1 During the .

derived, the pulse referenced to the leading edge of the

is transfer function test,Qq and Q7 are switched on continu-
square wave, and the triangular wave is the inverted and ously by turning off Qn. R42 and R45 maintain the gates of
integrated square wave. the FET switches at zero gate to source voltage for maxi-
Amplifier A4 is an astable multivibrator generating a square mum conductance during their on cycle. Since the sources
wave from positive to negative saturation. The amplitude of of these switches are at the common mode input voltage of

this square wave is approximately ± 1 9V. The square wave the device under test, these resistors are connected to the
frequency is determined by the ratio of Rig to R16 and by output of the common mode driver amplifier, Ag.
the time constant, R17C9. The operating frequency is stabi- The input for the integrator-feedback buffer, A7, is selected
lized against temperature and power regulation effects by by the FET switches Q4 and Q5. During the bias current and
regulating the feedback signal with the divider R-19, D5 and offset voltage offset current tests,A7 is connected as an
D6 - integratorand receives its input from the output of the de-
Amplifier A5 is a monostable multivibrator triggered by the vice under test. The output of A7 drives the feedback resis-
positive going output of A4 The pulse width of A5 is deter-
tor, R40. In this connection, the integrator holds the output
mined by the ratio of R20to R 2 2 and by the time constant of the device under test near ground and serves to amplify

R 2iC-ir> The output pulse of A5 is an approximately 1 % duty the voltages corresponding to bias current, offset current,
cycle pulse from approximately - 1 9V to +1 9V. and offset voltage by a factor of 1 ,000 before presenting
them to the measurement system. FET switches Q4 and Q5
Amplifier A6 is a dc stabilized integrator driven from the am-
are turned on by switch section S^ during these tests.
plitude-regulated output of A4. Its output is a + 5V triangular
wave. The amplitude of the output of Ag is determined by FET switches Q4 and Q5 are turned off during the transfer
the square wave voltage developed across D5 and Dg and function test. This disconnects A7 from the output of the
the time constant R ac C14. DC stabilization is accomplished device under test and changes from an integrator to a

by the feedback network R24, R25, and C15. The ac attenua- non-inverting unity gain amplifier driven from the triangular
tion of this feedback network is high enough so that the wave output of the function generator through the attenua-

integrator action at the square wave frequency is not de- tor R33 and R34 and switch section S-| a In this connection, .

graded. amplifier A7 serves two functions; first, to provide an offset

voltage correction to the input of the device under test and,
Operating frequency of the function generator may be var-
second, to drive the input of the device under test with a
ied by adjusting the time constants associated with A 4 A5,
± 2.5 mV triangular wave centered about the offset voltage.

and A6 in the same ratio.

During this test, the common mode driver amplifier is dis-
TEST CIRCUIT abled by switch section S-| a and the vertical input of the
A complete schematic diagram of the test circuit is shown in measurement oscilloscope is transferred from the output of
Figure The test circuit accepts the outputs of the power
7. the integrator-buffer, A7, to the output of the device under
supplies and function generator and provides horizontal and test by switch section S^- S2 9 allows supply voltages for

vertical outputs for an X-Y oscilloscope, which is used as the device under test to be set at ± 5, ± 1 0, ± 1 5, or ± 20V.
the measurement system. S2b changes the vertical scale factor for the measurement
oscilloscope to maintain optimum vertical deflection for the
The primary elements of the test circuit are the feedback
particularpower supply voltage used. S4 is a momentary
buffer and integrator, comprising amplifier A7 and its feed-
contact pushbutton switch which is used to change the load
back network C-|6, R31. R32. and C17, and the differential
on the device under test from 10 kft to 2 kft.
amplifier network, comprising the device under test and the
feedback network R40, R43, R44, and R52. The remainder of A delay must be provided when switching from the input
the test circuit provides the proper conditioning for the de- tests to the transfer function tests. The purpose of this delay
vice under test and scaling for the oscilloscope, on which is to disable the integrator function of A7 before driving it
the test results are displayed. with the triangular wave. If done, the offset cor-
this is not
rection voltage, stored on be
lost. This delay be-
C-ig. will
The amplifier Ag provides a variable amplitude source of
tween opening FET switch Q4, and switch Q5, is provided by
common mode signal to exercise the amplifier under test
over its common mode range. This amplifier is connected as
theRC filter, R 35 and C 19 .

a non-inverting gain-of-3.6 amplifier and receives its input Resistor R41 and diodes D7 and Ds are provided to control
from the triangular wave generator. Potentiometer R 37 al- the integrator when no test device is present, or when a
lows the output of this amplifier to be varied from ±0 volts faulty test device is inserted. R41 provides a dc feedback
to ± 1 8 volts. The output of this amplifier drives the differen- path in the absence of a test device and resets the integra-
tial input resistors, R43 and R44, for the device under test. tor to zero. Diodes D7 and Dg clamp the input to the integra-
tor to approximately ± .7 volts when a faulty device is inserted.
resistors R46 and R47 are current sensing resistors
which sense the input current of the device under test. FET switch Q-| and resistor R 2 g provide a ground reference
These resistors are switched into the circuit in the proper at the beginning of the 50-ohm-source, offset-voltage trace.

sequence by the field effect transistors Q6 and Q7. Q$ and This trace provides a ground reference which is indepen-
Q7 are driven from the square wave output of the function dent of instrument or oscilloscope calibration. The gate of
generator by the PNP pair, Q10 and Q-n, and the NPN pair, Qi is driven by the output of monostable multivibrator A5,

Qs and Q9. Switch sections S-ib and S-| C select the switch- and shorts the vertical oscilloscope drive signal to ground
ing sequence for Qg and Qg and hence for Q6 and Q7. In during the time that A5 output is positive.
the bias current test, the FET drivers, Qg and Qg, are Switch S3, R27, and R 2 g provide a 5X scale increase during
switched by out of phase signals from Q-irj and Q^. This input parameter tests to allow measurement of amplifiers
opens the FET switches Q6 and Q7 on alternate half cycles with large offset voltage, offset current, or bias current.
of the square wave output of the function generator. During
Switch S5 allows amplifier compensation to be changed for
the offset voltage, offset current test, the FET drivers are
101 or 709 type amplifiers.

;.|10K (SCALE!
fnx v/oiv


NOTE: All resistors 1/4W, 5% unless specified otherwise '2N3819

matched for on resistance within 200n Select for BV GS > 4 5V TL/H/7190-7
FIGURE 7. Test Circuit

CALIBRATION 3. Transfer Function (Figure 5)

Calibration of the test system is relatively simple and re- Vin 0.5 mV/div.
quires only two adjustments. First, the output of the main VrjUT 5V/div. @ Vs ±20V
regulator is set up for 20V. Then, the triangular wave gener-
5V/div. @ Vs ±15V
ator is adjusted to provide ±5V output by selecting R aC|j.

This sets the horizontal sweep for the X-Y oscilloscope 2V/div. @ Vs ±10V
used as the measurement system. The oscilloscope is then 1V/div. @ Vs + 5V
set up for 1 V/division vertical and for a full 10 division hori- AVquT
zontal sweep. Gain
Scale factors for the three test positions are:
1. Bias Current Display (Figure 2)
Test set construction is simplified through the use of inte-
Ibias total 1 00 nA/div. vertical
grated circuits and etched circuit layout.
Common Mode Voltage Variable horizontal
Figure8 gives photographs of the completed tester. Figure
2. Offset Voltage-Offset Current (Figure 3) 9 shows the parts location for the components on the circuit
offset 100 nA/div. vertical board layout of Figure 10. An attempt should be made to
V ff Se t 1 mV/div. vertical
Common Mode Voltage Variable horizontal

adhere to this layout to insure that parasitic coupling be- S3, S4 Grayhill 30-1 Series 30 subminiature
tween elements will not cause oscillations or give calibration IS3
pushbutton switch
S 5) S6 Alcoswitch MST-105D SPDT
Table I is a listing of special components which are needed
to fit the physical layout given for the tester. CONCLUSIONS
TABLE I. Partial Parts List A semi-automatic test system has been described which will
Ti Triad F-90X completely test the important operational amplifier parame-
ters over the full power supply and common mode ranges.
St Centralab PA2003 non-shorting
The system is simple, inexpensive, easily calibrated, and is
S2 Centralab PA201 5 non-shorting
equally suitable for engineering or quality assurance usage.

FIGURE 8a. Bottom of Test Set



FIGURE 8b. Front Panel

FIGURE 8c. Jacks



— —

— IbadjostV


•-SlbT.F. L_».S1c
'-Slclb L"^S1cT.F
V OS. 'oS

FIGURE 9. Component Location, Top View

FIGURE 10. Circuit Board Layout

IC Op Amp Beats FETs National Semiconductor
Application Note 29 CO
on Input Current
Robert J. Widlar
Apartado Postal 541
Puerto Vallarta, Jalisco

abstract 7
A monolithic operational amplifier having input error cur-
rents in the order of 100 pA over a - 55°C to 125°C temper-
ature range is described. Instead of FETs, the circuit used
bipolar transistors with current gains of 5000 so that offset
voltage and drift are not degraded. A power consumption of
— 1 j—
1 mW at low voltage is also featured. LM101A

A number of novel circuits that make use of the low current
characteristics of the amplifier are given. Further, special // FFT
design techniques required to take advantage of these low /
currents are explored. Component selection and the treat-
ment of printed circuit boards is also covered.
10" 1

introduction -75 -50 -25 25 50 75 100 125

A year ago, one of the loudest complaints heard about IC op TEMPERATURE (°C)

amps was that their input currents were too high. This is no TL/H/6875-1
longer the case. Today ICs can provide the ultimate in per- Figure 1. Comparing IC op amps with FET-input amplifier
formance for many applications —even surpassing FET am-
plifiers. log switches or printed circuit boards, rather than by the op
FET input stages have long been considered the best way amp itself.

to get low input currents in an op amp. Low-picoamp input

effects of error current
currents can in fact be obtained at room temperature. How-
In an operational amplifier, the input current produces a volt-
ever, this current, which is the leakage current of the gate
age drop across the source resistance, causing a dc error.
junction, doubles every 10°C, so performance is severely
This effect can be minimized by operating the amplifier with
degraded at high temperatures. Another disadvantage is
equal resistances on the two inputs. 5 The error is then pro-
that it is difficult to match FETs closely. 1 Unless expensive
portional to the difference in the two input currents, or the
selection and trimming techniques are used, typical offset
offset current. Since the current gains of monolithic transis-
voltages of 50 mV and drifts of 50 (j.V/°C must be tolerated.
tors tend to match well, the offset current is typically a factor
Super gain transistors 2 are now challenging FETs. These of ten less than the input currents.
devices are standard bipolar transistors which have been
diffused for extremely high current gains. Typically, current
gains of 5000 can be obtained at 1 fiA collector currents. ^fs TA = 25°C
This makes it possible to get input currents which are com-
petitive with FETs. It is also possible to operate these tran-
sistors at zero collector base voltage, eliminating the leak-
age currents that plague the FET. Hence they can provide
WA / $/ m f

lower error currents at elevated temperatures. As a bonus,

super gain transistors match much better than FETs with
typical offset voltages of 1 mV and drifts of 3 jnV/°C.
Figure compares the typical input offset currents of IC op
Vqs + "s 'os —
amps and FET amplifiers. Although FETs give superior per-
formance at room temperature, their advantage is rapidly 5 o.i
1 1 I

lost as temperature increases. Still, they are clearly better Ik 10k 100k 1M 10M 100M 1G

than early IC amplifiers like the LM709. 3 Improved devices, INPUT RESISTANCE («)
like the LM101A, 4 equal FET performance over a -55°C to TL/H/6875-2
1 25°C temperature range. Yet they use standard transistors Figure 2. Illustrating the effect of source resistance on
in the input stage. Super gain transistors can provide more
typical input error voltage
than an order of magnitude improvement over the LM101A.
The LM108 uses these to equal FET performance over a Naturally, error current has the greatest effect in high im-
0°C to 70°C temperature range. pedance circuitry. Figure 2 illustrates this point. The offset
In applications involving 125°C operation, the LM108 is
voltage of the LM709
degraded significantly with source

about two orders of magnitude better than FETs. In fact, resistances greater than 10 kn. With the LM101A this is
unless special precautions are taken, overall circuit perform- extended to source resistances high as 500 kft. The
ance is often limited by leakages in capacitors, diodes, ana- LM108, on the other hand, works well with source resistanc-
es above 10 Mil.

Reprinted from EEE, December 1969.

High source resistances have an even greater effect on the Applications that require low error currents include amplifi-
driftof an amplifier, as shown in Figure 3. The performance ers for photodiodes or capacitive transducers, as these usu-
of the LM709 is worsened with sources greater than 3 kft. ally operate at megohm impedance levels. Sample-and-

The LM101 A holds out to 100 kft sources, while the LM108 hold-circuits, timers, integrators and analog memories also
still works well at 3 Mil. benefit from low error currents. For example, with the
LM709, worst case drift rates for these kinds of circuits is in

the order of 1.5 V/sec. The LM108 improves this to 3 mv7

sec—worst case over a -55°C to 125°C temperature
range. Low input currents are also helpful in oscillators and
active to get low frequency operation with reasonable


capacitor values. The LM1 08 can be used

at a frequency of
***£— <H -fa
- */ 1 Hz no larger than 0.01 ju.F. In logarithmic
with capacitors
amplifiers, the dynamic range can be extended by nearly 60

*- 10
dB by going from the LM709 to the LM108. In other applica-
tions, having low error currents often permits an entirely dif-
ferent design approach which can greatly simplify circuitry.

the LM108

10k 100k INI 10M 100M 1G Figure 4 shows a schematic of the LM108. Two


kinds of NPN used on the IC chip: super gain
transistors are
(primary) transistors which have a current gain of 5000 with
a breakdown voltage of 4V and conventional (secondary)
Figure 3. Degradation of typical drift characteristics transistors which have a current gain of 200 with an 80V
with high source resistances breakdown. These are differentiated on the schematic by
drawing the secondaries with a wider base.
It is difficult FET amplifiers in Figure 3 because
to include
50 jaVVC, unless they are selected and
their drift is initially Primary transistors (Qi and Q2) are used for the input stage;
trimmed. Even though their drift may be well controlled (5 and they are operated in a cascode connection with Q5 and
ju.V7°C) over a limited temperature range, trimmed amplifiers Qq. The bases of Q5 and Q6 are bootstrapped to the emit-
generally exhibit a much higher drift over a - 55°C to 1 25°C ters of Q-\ and Q2 through Q 3 and Q 4 so that the input

temperature range. At any rate, their average drift rate transistors are operated zero collector-base voltage.

would, at best, be like that of the LM101A where 125°C Hence, circuit performance is not impaired by the low break-
operation is involved. down of the primaries, as the secondary transistors stand


Figure 4. Sim plified schematic of the LM108

off the commom mode voltage. This configuration also im- There has been considerable discussion about using Dar-
proves the commom mode rejection since the input transis- lington input stages rather than super gain transistors to
tors do not see variations in the commom mode voltage. obtain low input currents. 6 7 It is appropriate to make a few

Further, because there is no voltage across their collector- comments about that here.
base junctions, leakage currents in the input transistors are
Darlington inputs can give about the same input bias cur-
effectively eliminated.
rents as super gain transistors — at room temperature. How-
The second stage is a differential amplifier using high gain ever, the bias current varies as the square of the transistor
lateral PNPs (Q 9 and Q-io)-
These devices have current current gain. At low temperatures, super gain devices have
gains of 150 and a breakdown voltage of 80V. Ri and R2 a decided advantage. Additionally, the offset current of su-
are the collector load resistors for the input stage. Q7 and per gain transistors is considerably lower than Darlingtons,
Qe are diode connected laterals which compensate for the when measured as a percentage of bias current. Further,
emitter-base voltage of the second stage so that its operat- the offset voltage and offset voltage drift of Darlington tran-
ing current is set at twice that of the input stage by R4. sistors is both higher and more unpredictable.
The second stage uses an active collector load (Q15 and Experience seems to tell the real truth about Darlingtons.
Q16) to obtain high gain. It drives a complementary class-8 Quite a few op amps with Darlington input stages have been
output stage which gives a substantial load driving capabili- introduced. However, none have become industry stan-
ty. The dead zone of the output stage is eliminated by bias- dards. The reason is that they are more sensitive to varia-
ing it on the verge of conduction with Q-^ and Qi2- tions in the manufacturing process. Therefore, satisfactory
Two methods compensation are available for
of frequency performance specifications can only be obtained by sacrific-

the amplifier. In one a 30 pF capacitor is connected from the ing the manufacturing yield.
input to the output of the second stage (between the com-
pensation terminals). This method is pin-compatible with the
LM101 LM101 A. It can also be compensated by connect-
ing a 1 00 pF capacitor from the output of the second stage =
Ta -55°C —m
to ground. This technique has the advantage of improving r 400
the high frequency power supply rejection by a factor of ten.
TA = 25°C
A complete schematic of the LM108 is given in the Appen- £ 300
dix along with a description of the circuit. This includes such Ta = 125°C
essential features as overload protection for the inputs and 5
performance LMK 8
The primary design objective for the LM108 was to obtain
5 10 15
very low input currents without sacrificing offset voltage or
drift. Asecondary objective was to reduce the power con- SUPPLY VOLTAGE <±V)

sumption. Speed was of little concern, as long as it was TL/H/6875-6

comparable with the LM709. This is logical as it is quite Figure 6. Supply current
difficult to make high-impedance circuits fast; and low power

circuits are very resistant to being made fast. In other re- The supply current of the LM108 is plotted as a function of

spects, it was desirable to make the LM1 08 as much like the supply voltage in Figure 6. The operating current is about an
order of magnitude lower than devices like the LM709. Fur-
LM101A as possible.
thermore, it does not vary radically with supply voltage
2.0 which means that the device performance is maintained at
low voltages and power consumption is held down at high
5 1.0

£ 0.5

U -

1- 0.15
- 0.10

LM 08
-55 -35 -15 5 25 45 65 85 105 125


Figure 5. Input currents
2 4 6 8
Figure5 shows the input current characteristics of the
LM108 over a -55°C 125°C temperature range. Not only
are the input currents low, but also they do not change radi-
Figure 7. Output swing
cally over temperature. Hence, the device lends itself to rel-
atively simple temperature compensation schemes, that will The output drive capability of the circuit is illustrated in Fig-
be described later. ure 7. The output swings to within a volt of the supplies,

—- —

which is especially important when operating at low volt- With unity gain compensation, both methods give a 75-de-
ages. The output falls off rapidly as the current increases gree stability margin. However, the shunt compensation has
above a certain level and the short circuit protection goes a 300 kHz small signal bandwidth as opposed to 1 MHz for

into effect. The useful output drive is limited to about the other scheme. Because the compensation capacitor is
±2 mA. It could have been increased by the addition of not included on the IC chip, it can be tailored to fit the appli-
Darlington transistors on the output, but this would have cation. When the amplifier is used only at low frequencies,
restricted the voltage swing at low supply voltages. The am- the compensation capacitor can be increased to give a
plifier, incidentally, works with common mode signals to greater stability margin. This makes the circuit less sensitive
within a volt of the supplies so it can be used with supply to capacitive loading, stray capacitances or improper supply
voltages as low as ± 2V. bypassing. Overcompensating also reduces the high fre-

quency noise output of the amplifier.

| | With closed-loop gains greater than one, the high frequency
n» = a p f V performance can be optimized by making the compensation
Cf = 3 pF
capacitor smaller. is used for an
unity-gain compensation
-C s =iuupi-^7 V If

exceed 1 -per-
*- amplifier with a gain of ten, the gain error will
v2 cent at frequencies above 400 Hz. This can be extended to
>_.« £2
\* 4 kHz by reducing the compensation capacitor to 3 pF. The
40 ^ „, ..
a formula for determining the minimum capacitor value is giv-

20 (-UAIN —
— 1 V >! 1 45 3 en in Figure 9a. It should be noted that the capacitor value
-PHASE "^-^ does not really depend on the closed-loop gain. Instead, it
| 1

depends on the high frequency attenuation in the feedback
LM1 M" lif -30p *' >

networks and, therefore, the values of Ri and R2. When it is

1 10 100 Ik 10k 100k 1M 10M desirable to optimize performance at high frequencies, the
FREQUENCY (Hz) standard compensation should be used. With small capaci-
TL/H/6875-8 tor values, the stability margin obtained with shunt compen-
Figure 8. Open loop frequency response sation is inadequate for conservative designs.
The frequency response of an operational amplifier is con-
The open loop frequency response, plotted in Figure 8, indi-
siderably different for large output signals than it is for small
cates that the frequency response is about the same as that
signals. This is indicated in Figure 10. With unity-gain com-
of the LM709 or the LM101A. Curves are given for the two
pensation, the small signal bandwidth of the LM108 is 1
compensation circuits shown in Figure 9. The standard
MHz. Yet full output swing cannot be obtained above 2 kHz.
compensation is identical to that of the LM101 or LM101A.
This corresponds to a slew rate of 0.3 V/ju,s. Both the full-
The alternate compensation scheme gives much better re-
output bandwidth and the slew rate can be increased by
jection of high frequency power supply noise, as will be
using smaller compensation capacitors, as is indicated in
shown later.
the figure. However, this is only applicable for higher closed
loop gains. The results plotted in Figure 10 are for standard
compensations. With unity gain compensation, the same
curves are obtained for the shunt compensation scheme.
Classicalop amp theory establishes output resistance as an
important design parameter. This is not true for IC op amps:

The output resistance of most devices is low enough that it

can be ignored, because they use class-B output stages. At
low frequencies, thermal feedback between the output and

R1 + R2 1 1

'I 2B°C
C = 30 pF I II
h ±1BV
a. standard compensation circuit I rf ipF

R1 I -S
= 30pFl

LM 1 08
L.l ..

Ik 10k 100k 1M

Figure 10. Large signal frequency response
b. alternate compensation circuit

Figure 9. Compensation circuits

input stages determines the effective
output resisance, and
this cannot be accounted for by conventional design theo-
ries. Semiconductor manufacturers take care of this by
specifying the gain under full load conditions, which
bines output res/stance with gain as far as it affects overall
circuit performance. This avoids the fictitious problem that
can be created by an amplifier with infinite gain, which is
good, that will cause the open loop output resistance to
appear infinite, which is bad, although none of this affects
overall performance significantly.

10k 100k 1M 10M


Figure 12. Power supply rejection
A v =1,Cf = 30pF
' Power supply rejection is defined as the ratio of the change
Av = 1000. Cf pF
1000, Cf * 30 pF
in offset voltage to the change in the supply voltage produc-
ing it. Using this definition, the rejection at low frequencies is
T» = <
™A unaffected by the closed loop gain. However, at high fre-
•out * *'
quencies, the opposite is true. The high frequency rejection
is increased by the closed loop gain. Hence, an amplifier
Ik 10k 100k 1M 10M
with a gain of ten will have an order of magnitude better
rejection than that shown in Figure 12 in the vicinity of
TL/H/6875-12 100 kHz to 1 MHz.
Figure 11. Closed loop output impedance
The overall performance of the LM108 is summarized in
The closed loop output impedance Table I*. It is apparent from the table and the previous dis-
is, nonetheless, impor-
tant in some applications. This is plotted for several operat- cussion that the device is ideally suited for applications that
ing conditions in Figure 1 1. It can be seen that the output require low input currents or reduced power consumption.

impedance about 500fl at high frequencies. The

rises to The speed of the amplifier is not spectacular, but this is not
increase occurs because the compensation capacitor rolls usually a problem high-impedance circuitry. Further, the

off the open loop gain. The output resistance can be re- reduced high frequency performance makes the amplifier
duced at the intermediate frequencies, for closed loop gains easier to use in that less attention need be paid to capaci-
greater than one, by making the capacitor smaller. This is
tive loading, stray capacitances and supply bypassing.

made apparent in the figure by comparing the output resist- applications

ance with and without frequency compensation for a closed
Because of its low input current the LM108 opens up many
loop gain of 1000.
new design possibilities. However, extra care must be taken
The output resistance also tends to increase at low frequen-
incomponent selection and the assembly of printed circuit
cies. Thermal feedback is responsible for this phenomenon. boards to take full advantage of its performance. Further,
The data for Figure 1 1 was taken under large-signal condi-
unusual design techniques must often be applied to get
tions with ± 1 5V supplies, the output at zero and ± 1 mA around the limitations of some components.
current swing. Hence, the thermal feedback is accentuated
more than would be the case for most applications. sample and hold circuits

In an op amp, it is desirable that performance be unaffected The holding accuracy of a sample and hold is directly relat-
by variations in supply voltage. IC amplifiers are generally ed to the error currents in the components used. Therefore,
better than discretes respect because it is a good circuit to start off with in explaining the problems
in this it is necessary
for one single design to cover a wide range of uses. The
LM108 has a power supply rejection which is typically in
excess of 100 dB, and it will operate with supply voltages
from ±2V to ±20V. Therefore, well-regulated supplies are
unnecessary, for most applications, because a 20-percent
variation has little effect on performance.

The story is different for high-frequency noise on the sup-

plies, as is evident from Figure 12. Above 1 MHz, practically
all the noise is fed through to the output. The figure also
demonstrates that shunt compensation is about ten times
better at rejecting high frequency noise than is standard
compensation. This difference is even more pronounced
Figure 13. Sample and hold circuit
with larger capacitor values. The shunt compensation has
the added advantage that it makes the circuit virtually unaf- involved. Figure 13 shows one
configuration for a sample
fected by the lack of supply bypassing. and hold. During the sample interval, Qi is turned on, charg-
ing the hold capacitor, Ci, up to the value of the input signal.

•See Appendix Heading in This Application Note.

When Q-\ is turned off, C retains this voltage. The output is tive diodes on the gates, special arrangements
must be

obtained from an op amp that buffers the capacitor so that it made to drive Q2 so the diode does not become forward
is not discharged by any loading. In the holding mode, an biased.
error is generated as the capacitor looses charge to supply In selecting the hold capacitor, low leakage is not the only
circuit leakages. The accumulation rate for error is given by requirement. The capacitor must also be free of dielectric
dV = Je polarization phenomena. 8 This rules out such types as pa-
mylar, electrolytic, tantalum or high-K ceramic. For

dt per,
small capacitor values, glass or silvered-mica capacitors are
where dV/dt is the time rate of change in output voltage and
recommended. For the larger values, ones with teflon, poly-
lg is the sum of the input current to the op amp, the leakage
ethylene or polycarbonate dielectrics should be used.
current of the holding capacitor, board leakages and the
"off" current of the FET switch. The low input current of the LM108 gives a drift rate, in hold,
of only 3 mV/sec when a 1 f*,F hold capacitor is used. And
When high-temperature operation is involved, the FET leak-
this number is worst case over the military temperature
age can limit circuit performance. This can be minimized by
range. Even if this kind of performance is not needed, it may
using a junction FET, as indicated, because commercial
still be beneficial to use the LM108 to reduce the size of the
junction FETs have lower leakage than their MOS counter-
hold capacitor. High quality capacitors in the larger sizes are
parts. However, at 1 25°C even junction devices are a prob-
bulky and expensive. Further, the switches must have a low
lem. Mechanical switches, such as reed relays, are quite
"on" resistance and be driven from a low impedance source
satisfactory from the standpoint of leakage. However, they
tocharge large capacitors in a short period of time.
are often undesirable because they are sensitive to vibra-
tion, they are too slow or they require excessive drive pow- If the sample interval is less than about 100 ju,s, the LM108
er. If this is the case, the circuit in Figure 14 can be used to may not be fast enough to work properly. If this is the case,

eliminate the FET leakage. it is advisable to substitute the LM102A, 9 which is a voltage
follower designed for both low input current and high speed.
v R1 It has a 30 V/>s slew rate and will operate with sample
intervals as shortas 1 jms.
ill »AA/V •
t=T 2N4067 When the hold capacitor is larger than 0.05 ju.F, an isolation
I .^
resistor should be included between the capacitor and the
input of the amplifier (R2 in Figure 14). This resistor insures
that the IC will not be damaged by shorting the output or
abruptly shutting down the supplies when the capacitor is

charged. This precaution is not peculiar to the LM108 and

should be observed on any IC op amp.
Integrators are a lot like sample-and-hold circuits and have
TL/H/6875-15 essentially the same design problems. an integrator, a In

tTeflon, polyethylene or polycarbonate dielectric capacitor capacitor is used as a storage element; and the error accu-
Worst case drift less than 3 mV/sec mulation rate is again proportional to the input current of the
op amp.
Figure 14. Sample and hold that eliminates leakage in
Figure 15 shows a circuit that can compensate for the bias
FET switches
current of the amplifier. A current is fed into the summing
When using P-channel MOS switches, the substrate must node through R^ to supply the bias current. The potentiome-
be connected to a voltage which is always more positive ter, R2, is adjusted so that this current exactly equals the
than the input signal. The source-to-substrate junction be- bias current, reducing the drift rate to zero.
comes forward biased if this is not done. The troublesome
leakage current of a MOS device occurs across the sub-
strate-to-drain junction. In Figure 14, this current is routed to
the output of the buffer amplifier through Ri so that it does
not contribute to the error current.
The main sample switch is Qi, while Q2 isolates the hold

capacitor from the leakage of Q-|. When the sample pulse is

applied, bothFETs turn on charging C1 to the input voltage.
Removing the pulse shuts off both FETs, and the output input—-A/W
leakage of Q1 goes through R1 to the output. The voltage
drop across R1 is less than 10 mV, so the substrate of Q2
can be bootstrapped to the output of the LM108. Therefore,
the voltage across the substrate-drain junction is equal to
the offset voltage of the amplifier. At this low voltage, the
leakage of the FET is reduced by about two orders of mag-
nitude. |
—T— 100 pF
It necessary to use MOS switches when bootstrapping

the leakages in this fashion. The gate leakage of a MOS TL/H/6875-16

device is still negligible at high temperatures; this is not the Figure 15. Integrator with bias current compensation
case with junction FETs. If the MOS transistors have protec-


The diode is used for two reasons. First, it acts as a regula- currents. At the end of the integration interval, Q3 removes
tor, making the compensation relatively insensitive to varia- the compensating error accumulated on C2 as the circuit is
tions in supply voltage. Secondly, the temperature drift of reset.
diode voltage is approximately the same as the temperature In applications involving large temperature changes, the cir-
drift compensation is more
of bias current. Therefore, the cuit in Figure 16 gives better results than the compensation
effective if the temperature changes. Over a 0°C to 70"C scheme in Figure 15—especially under worst case condi-
temperature range, the compensation will give a factor of tions.Over a -55°C to 125°C temperature range, the worst
ten reduction in input current. Even better results are case drift is reduced from 3 mV/sec to 0.5 mV/sec when a
achieved if the temperature change is less. 1 ju.F integrating capacitor is used. If this reduction in drift is

Normally, it is necessary to reset an integrator to establish not needed, the circuit can be simplified by eliminating R4,
the initial conditions for integration. Resetting to zero is C2 and Q3 and returning the non-inverting input of the ampli-
readily accomplished by shorting the integrating capacitor fier directly to ground.
with a suitable switch. However, as with the sample and In fabricating low drift integrators, it is again necessary to
hold circuits, semiconductor switches can cause problems use high components and minimize leakage currents
because of high-temperature leakage. in the wiring. The comments made on capacitors in connec-

A connection that gets rid of switch leakages is shown in tion with the sample-and-hold circuits also apply here. As an
Figure 16. A negative-going reset pulse turns on Q-| and Q2, additional precaution, a resistor should be used to isolate
the inverting input from the integrating capacitor if it is larger
than 0.05 \iF. This resistor prevents damage that might oc-
cur when the supplies are abruptly shut down while the inte-
grating capacitor is charged.
Some integrator applications require both speed and low
error current. The output amplifiers for photomultiplier tubes
or solid-state radiation dectectors are examples of this. Al-
though the LM1 08 is relatively slow, there is a way to speed
INPUT—— ^W-H p it up when it is used as an inverting amplifier. This is shown

in Figure 17.

The arranged so that the high-frequency gain char-

circuit is
acteristics aredetermined by A2, while A-i determines the dc
and low-frequency characteristics. The non-inverting input
of A-| is connected to the summing node through R-|. A-| is
operated as an integrator, going through unity gain at
500 Hz. Its A 2 The
output drives the non-inverting input of .

inverting input ofA2 is also connected to the summing node

through C3. C3 and R3 are chosen to roll off below 750 Hz.
Hence, at frequencies above 750 Hz, the feedback path is
directly around A 2 with A1 contributing little. Below 500 Hz,

however, the direct feedback path to A2 rolls off; and the

gain of A1 is added to that of A2.
The high gain frequency amplifier, A2, is an LM101A con-
nected with feed-forward compensation. 10 It has a 10 MHz
equivalent small-signal bandwidth, a 10V/jlis slew rate and
a 250 kHz large-signal bandwidth, so these are the high-fre-
quency characteristics of the complete amplifier. The bias
current of A2 is isolated from the summing node by C3.
TL/H/6875-17 Hence, does not contribute to the dc drift of the integrator.

*Q1 and Q3 should not have internal gate-protection diodes. The inverting input of A^ is the only dc connection to the
summing junction. Therefore, the error current of the com-
Figure 16. Low drift integrator with reset
posite amplifier is equal to the bias current of A-|

shorting the integrating capacitor. When the switches turn If A2 allowed to saturate, A-j will then start towards satura-

off, the leakage current of Q2 is absorbed by R 2 while Q-| tion. If the output of A1 gets far off zero, recovery from satu-
isolates the output of Q2 from the summing node. Q1 has ration will be slowed drastically. This can be prevented by
practically no voltage across its junctions because the sub- clamp diodes across the integrating capacitor.
putting zener
strate is grounded; hence, leakage currents are negligible. A arrangement is shown in Figure 17. D1
suitable clamping

The additional circuitry shown in Figure 16 makes the error and D2 are included in the clamp circuit along with R5 to
accumulation rate proportional to the offset current, rather keep the leakage currents of the zeners from introducing
than the bias current. Hence, the drift is reduced by roughly errors.

a factor of 1 0. During the integration interval, the bias cur- In has other advan-
addition to increasing speed, this circuit
rent of the non-inverting input accumulates an error across tages. For one, has the increased output drive capability

R4 and C2 just as the bias current on the inverting input of the LM101A. Further, thermal feedback is virtually elimi-
does across R-| and C1. Therefore, if R4 is matched with R-| nated because the LM108 does not see load variations.
and C2 is matched with C-[ (within about 5 percent) the out- Lastly, the open loop gain is nearly infinite at low frequen-
put will drift at a rate proportional to the difference in these cies as it is the product of the gains of the two amplifiers.




I — yf —I— 300 pf

Figure 17. Fast integrator


Figure 18. Sine wave oscillator
sine wave oscillator A unique solution to most of these problems is shown in
Although it is comparatively easy to build an oscillator that Figure 18. Ai is connected as a two-pole low-pass active
aproximates a sine wave, making one that delivers a high- and A2 is connected as an integrator. Since the ulti-

purity sinusoid with a stable frequency and amplitude is an- mate phase lag introduced by the amplifiers is 270 degrees,
other story. Most satisfactory designs are relatively compli- the circuit can be made to oscillate if the loop gain is high

cated and require individual trimming and temperature com- enough at the frequency where the lag is 1 80 degrees. The
pensation to make them work. In addition, they generally gain is actually made somewhat higher than is required for

take a long time to stabilize to the final output amplitude. oscillation to insure starting. Therefore, the amplitude builds
up until it is limited by some nonlinearity in the system.

Amplitude stabilization is accomplished with zener clamp di-
odes, Di and D2. This does introduce distortion, but it is
reduced by the subsequent low pass filters. If D1 and D2 R2
have equal breakdown voltages, the resulting symmetrical 10M

clipping will virtually eliminate the even-order harmonics.

The dominant harmonic is then the third, and this is about
40 dB down at the output of A-| and about 50 dB down on
the output of A2. This means that the total harmonic distor-
tion on the two outputs is 1 percent and 0.3 percent, respec-

The frequency of oscillation and the oscillation threshold

are determined by R-|, R2, R3, C-|, C2 and C3. Therefore

precision components with low temperature coefficients

should be used. If R3 is made lower than shown, the circuit

will accept looser component tolerances before dropping TL/H/6875-20

out of oscillation. The start up will also be quicker. However, Figure 19. Capacitance multiplier
the price paid is that distortion is increased. The value of R4
is not critical, but it should be made much smaller than R2 The performance of the circuit is described by the equations
so that the effective resistance at R2 does not drop when given in Figure 19, where C is the effective output capaci-
the clamp diodes conduct. tance, l|_ is the leakage current of this capacitance and Rs is

the series resistance of the multiplied capacitance. The se-

The output amplitude determined by the breakdown volt-
ries resistance is relatively high, so high-Q capacitors can-
ages of D1 and D2. Therefore, the clamp level should be
not be realized. Hence, such applications as tuned circuits
temperature compensated for stable operation. Diode-con-
nected (collector shorted to base) NPN transistors with an
and filters are ruled out. However, the multiplier can still be
emitter-base breakdown of about 6.3V work well, as the
used in timing circuits or servo compensation networks
positive temperature coefficient of the diode in reverse
where some resistance is usually connected in series with
the capacitor or the effect of the resistance can be compen-
breakdown nearly cancels the negative temperature coeffi-
sated for.
cient of the forward-biased diode. Added advantages of us-
ing transistors are that they have less shunt capacitance One final point is that the leakage current of the multiplied
and sharper breakdowns than conventional zeners. capacitance is not a function of the applied voltage. It per-
sists even with no voltage on the output. Therefore, it can
The LM108 is particularly useful in this circuit at low fre-
generate offset errors in a circuit, rather than the scaling
quencies, since it permits the use of small capacitors. The
errors caused by conventional capacitors.
circuit shown oscillates at 1 Hz, but uses capacitors in the
order of 0.01 u-F. This makes it much easier to find tempera- instrumentation amplifier
ture-stable precision capacitors. However, some judgment many instrumentation applications there frequently a
In is
must be used as large value resistors with low temperature
need for an amplifier with a high-impedance differential in-
coefficients are not exactly easy to come by.*
put and a single ended output. Obvious uses for this are
The LM108s are useful in this circuit for output frequencies amplifiers for bridge-type signal sources such as strain
up to 1 kHz. Beyond that, better performance can be real- gages, temperature sensors or pressure transducers. Gen-
ized by substituting and LM102A for A-\ and an LM101A with eral purpose op amps have satisfactory input characteris-
feed-forward compensation for A2. The improved high-fre- tics, but feedback must be added to determine the effective
quency response of these devices extend the operating fre- gain. And the addition of feedback can drastically reduce
quency out to 1 00 kHz. the input resistance and degrade common mode rejection.

capacitance multiplier Figure 20 shows the op amp circuit for a differen-

tial has three main disadvantages.
amplifier. This circuit
Large capacitor values can be eliminated from most sys-
First, the input resistance on the inverting input is relatively
tems just by raising the impedance levels, if suitable op
low, being equal to R1. Second, there usually is a large dif-
amps are available. However, sometimes it is not possible
ference in the input resistance of the two inputs, as is indi-
because the impedance levels are already fixed by some
cated by the equations on the schematic. Third, the com-
element of the system like a low impedance transducer. If
this is the case, a capacitance multiplier can be used to
mon mode rejection is greatly affected by resistor matching
increase the effective capacitance of a small capacitor and
and by balancing of the source resistances. A 1 -percent
deviation in any one of the resistor values reduces the com-
couple it into a low impedance system.
mon mode rejection to 46 dB for a closed loop gain of 1 to ,

Previously, IC op amps could not be used effectively as ca-

60 dB for a gain of 10 and to 80 dB for a gain of 100.
pacitance multipliers because the equivalent leakages gen-
Clearly, the only way to get high input impedance is to use
erated due to offset current were significantly greater than
the leakages of large tantalum capacitors, With the LM108,
very large resistors in the feedback network. The op amp
must operate from a source resistance which is orders of
thishas changed. The circuit shown in Figure 19 generates
magnitude larger than the resistance of the signal source.
an equivalent capacitance of 1 00,000 ju,F with a worst case

leakage of 8 jxA over a -55°C to 125°C temperature
Older IC op amps introduced excessive offset and drift
when operating from higher resistances and could not be
used successfully. The LM108, however, is relatively unaf-
•Large-value resistors are available from Victoreen Instrument, Cleveland,
Ohio and Pyrofilm Resistor Co., Whippany, New Jersey. fected by the large resistors, so this approach can some-
times be employed.

With large input resistors, the feedback resistors, R3 and When the bridge goes off balance, the op amp maintains
R4, can get quite large for higher closed loop gains. For the voltage between its input terminals at zero with current
example, if R-| and R2 are 1 Mil, R3 and R4 must be fed back from the output through R3. This circuit does not
1 00 Mft for a gain of 1 00. It is difficult to accurately match act like a true differential amplifier for large imbalances in
resistors that are this high in value, so common mode rejec- the bridge. The voltage drops across the two sensor resis-
tion may Nonetheless, any one of the resistors can
suffer. tors,Si and S2, become unequal as the bridge goes off
be trimmed to take out common mode feedthrough caused balance, causing some non-linearity in the transfer function.
either by resistors mismatches or the amplifier itself. However, this is not usually objectionable for small signal

R 1N = R1


R, N = R2 + R4


Figure 20. Feedback connection for a differential ampli-


Another problem caused by large feedback resistors is that

stray capacitance can seriously affect the high frequency
common mode rejection. With 1 Mfi input resistors, a 1 pF
mismatch in stray capacitance from either input to ground Figure 22. Differential input instrumentation amplifier
can drop the common mode rejection to 40 dB at 1500 Hz.
Figure 22 shows a true differential connection that has few
The high frequency rejection can be improved at the ex-
of the problems mentioned previously. It has an input resist-
pense of frequency response by shunting R3 and R4 with
ance greater than 10 10 n, yet it does not need large resis-
matched capacitors.
tors in the feedback circuitry. With the component values
With high impedance bridges, the feedback resistances be- shown, A1 is connected as a non-inverting amplifier with a
come prohibitively large even for the LM108, so the circuit in gain of 1 .01 and it feeds into A2 which has an inverting gain

Figure 20 cannot be used. One possible alternative is

of 100. Hence, the total gain from the input of A1 to the
shown in Figure 21. R2 and R3 are chosen so that their output of A2 is 101, which is equal to the non-inverting gain
equivalent parallel resistance is equal to R-|. Hence, the out-
of A2. If all the resistors are matched, the circuit responds
put of the amplifier will be zero when the bridge is balanced. only to the differential input signal —not the common mode

This circuit has the same sensitivity to resistor matching as

the previous circuits, with a 1 percent mismatch between
two resistors lowering the common mode rejection to 80 dB.
However, matching is more easily accomplished because of
the lower resistor values. Further, the high frequency com-
mon mode rejection is less affected by stray capacitances.
The high frequency rejection is limited, though, by the re-
sponse of A1

logarithmic converter
A logarithmic amplifier is another circuit that can take ad-
vantage of the low input current of an op amp to increase
dynamic range. Most practical log converters make use of
the logarithmic relationship between the emitter-base volt-
age of standard double-diffused transistors and their collec-
tor current. This logarithmic characteristic has been proven
true for over9 decades of collector current. The only prob-
lem involved in using transistors as logging elements is that

the scale factor has a temperature sensitivity of 0.3 per-

TL/H/6875-22 cent/°C. However, temperature compensating resistors
Figure 21. Amplifier for bridge transducers have been developed to compensate for this characteristic,
making possible log converters that are accurate over a
wide temperature range.

300 pF
< mA TL/H/6875-24
10 nA l|
N < 1
t1 kn (±1%) at 25°C, +3500 ppm/'C.
Sensitivity is 1 V per decade.
Available from Vishay Ultronix, Grand Junc-
tion, CO, Q81 Series.

•Determines current for zero crossing on

output: 10 ft A as shown.

Figure 23. Temperature compensated one-quadrant logarithmic converter

Figure 23 gives a circuit that uses these techniques. Qi is these Accuracy for low input currents is deter-
the logging transistor, while Q2 provides a fixed offset to mined by the caused by the bias current of A-|. At high
temperature compensate the emitter-base turn on voltage currents, the behavior of Q1 and Q2 limits accuracy. For
of Q1 Q2 is operated at a fixed collector current of 1 jaA by
. input currents approaching 1 mA, the 2N2920 develops log-
A2, and its emitter-base voltage is subtracted from that of ging errors in excess of 1 percent. If larger input currents
Q1 in determining the output voltage of the circuit. The col- are anticipated, bigger transistors must be used; and R2
lector current of Q2 is established by R3 and V+ through should be reduced to insure that A2 does not saturate.
A2 .

transducer amplifiers
The collector current of Q1 is proportional to the input cur-
With certain transducers, accuracy depends on the choice
rent through R s and, therefore, proportional to the input volt-
of the circuit configuration as much as it does on the quality
age. The emitter-base voltage of Q1 varies as the log of the
of the components. The amplifier for photodiode sensors,
input voltage. The fixed emitter-base voltage of Q2 sub-
shown in Figure 24, illustrates this point. Normally, photodi-
tracts from the voltage on the emitter of Q1 in determining
odes are operated with reverse voltage across the junction.
the voltage on the top end of the temperature-compensat-
At high temperatures, the leakage currents can approach
ing resistor, S-|.
the signal current. However, photodiodes deliver a short-cir-
The on the top of S-| will be zero when the input
cuit output current, unaffected by leakage currents, which is
current equal to the current through R3 at any tempera-
not significantly lower than the output current with reverse
ture. Further, this voltage will vary logarithmically for chang-
es in input current, although the scale factor will have a
temperature coefficient of -0.3%/°C. The output of the
converter is essentially multiplied by the ratio of R1 to S-|.

Since Si has a positive temperature coefficient of 0.3 per-

cent/°C, it compensates for the change in scale factor with
an LM101A with feedforward compensation is
In this circuit,
used A2 since it is much faster than the LM108 used for
A-| Since both amplifiers are cascaded in the overall feed-

back loop, the reduced phase shift through A2 insures sta-

Vout - 'OV/mA

Certain things must be considered in designing this circuit.

For one, the sensitivity can be changed by varying R-|. But
S ~T~ 100 pF

R1 must be made considerably larger than the resistance of

Si for effective temperature compensation of the scale fac- TL/H/6875-25
tor. Q1 and Q2 should also be matched devices in the same
Figure 24. Amplifier for photodiode sensor
package, and Si should be at the same temperature as


T TL/H/6875-27
Figure 25. Amplifier for piezoelectric transducers Figure 26. Inverting amplifier with high input resistance

The circuit shown in Figure 24 responds to the short-circuit Another disadvantage of the circuit is that four resistors de-
output current of the photodiode. Since the voltage across termine the gain, instead of two. Hence, for a given resistor
the diode is only the offset voltage of the amplifier, inherent tolerance, the worst-case gain deviation is greater, although
leakage is reduced by at least two orders of magnitude. this is probably more than offset by the ease of getting bet-
Neglecting the offset current of the amplifier, the output cur- ter tolerances in the low resistor values.
rent of the sensor is multiplied by Ri plus R2 in determining
current sources
the output voltage.
Although there are numerous ways to make current sources
Figure 25 shows an high-impedance ac trans-
amplifier for
with op amps, most have limitations as far as their applica-
ducers like a piezoelectric accelerometer. These sensors
tion is concerned. Figure 27, however, shows a current
normally require a high-input-resistance amplifier. The
source which is fairly flexible and has few restrictions as far
LM108 can provide input resistances in the range of 10 to
as its use is concerned. It supplies a current that is propor-
1 00 Mil, using conventional circuitry. However, convention-
tional to the input voltage and drives a load referred to
al designs are sometimes ruled out either because large
ground or any voltage within the output-swing capability of
resistors cannot be used or because prohibitively large input
the amplifier.
resistances are needed.
Using the circuit in Figure 25, input resistances that are or-
ders of magnitude greater than the values of the dc return
resistors can be obtained. This is accomplished by boot-
strapping the resistors to the output. With this arrangement,
the lower cutoff frequency of a capacitive transducer Is de-
termined more by the RC product of R1 and C1 than it is by :
resistor values and the equivalent capacitance of the trans- R1R5
ducer. R3 = R4 + R5
R1 = R2
resistance multiplication
When an inverting operational amplifier must have high in-

put resistance, the resistor values required can get out of

hand. For example, if a 2 Mil input resistance is needed for
an amplifier with a gain of 1 00, a 200 Mfl feedback resistor
is called for. This resistance can, however, be reduced us-

ing the circuit in Figure 26. A divider with a ratio of 1 00 to 1

(R3 and R4) is added to the output of the amplifier: Unity-
gain feedback is applied from the output of the divider, giv-
ing an overall gain of 100 using only 2 Mfi resistors. TL/H/6875-28
Figure 27. Bilateral current source
This circuit does increase the offset voltage somewhat. The
output offset voltage is given by With the output grounded, it is relatively obvious that the
output current will be determined by R5 and the gain setting
VOUT (*£*) AV V of the op amp, yielding

The offset voltage is only multiplied by Ay + 1 in a conven- 1 _ R 3 V IN

tional inverter. Therefore, the circuit in Figure 26 multiplies ---r7?V
the offset by 200, instead of 101. This multiplication factor When the output is not at zero, it would seem that the cur-
can be reduced to 1 1 by increasing R2 to 20 Mil and R3 to rent through R2 and R4 would reduce accuracy. Nonethe-
5.55k. less, if Ri = R2 and R3 = R4 + R5, the output current will

be independent of the output voltage. For Ri + R3 > R5 ,
Figure 29 shows a comparator for voltages of opposite po-
the output resistance of the circuit is given by larity.The output changes state when the voltage on the
junction of R-| and R2 is equal to Vjh- Mathematically, this is
Rout-R 5
(^ expressed by

where R is any one of the feedback resistors (R-|, R2, R3 or R2 - V2

(V 1 )
Vth = V 2 +
R4) and AR is the incremental change in the resistor value Rt + R2
from design center. Hence, for the circuit in Figure 27, a 1
percent deviation in one of the resistor values will drop the
output resistance to 200 kfl. Such errors can be trimmed
out by adjusting one of the feedback resistors. In design, it
is advisable to make the feedback resistors as large as pos-

sible. Otherwise, resistor tolerances become even more crit-


The circuit must be driven from a source resistance which is

low by comparison to R-|, since this resistance will imbal-

ance the circuit and affect both gain and output resistance.
As shown, the circuit gives a negative output current for a
positive input voltage. This can be reversed by grounding
the input and driving the ground end of R2. The magnitude
of the scale factor will be unchanged as long as R4 > R5.

voltage comparators TL/H/6875-30

Jke most op amps, it is possible to use the LM108 as a Figure 29. Voltage comparator with output buffer
voltage comparator. Figure 28 shows the device used as a
simple zero-crossing detector. The inputs of the IC are pro- The LM108 can also be used as a differential comparator,
going through a transition when two input voltages are
equal. However, resistors must be inserted in series with the
inputs to limit current and minimize loading on the signal
sources when the input-protection diodes conduct. Figure
OUTPUT 29 also shows how a PNP transistor can be added on the
output to increase the fan out to about 20 with standard DTL
or TTL.

power booster
The LM106, which was designed for low power consump-
tion, is not able to drive heavy loads. However, a relatively
simple booster can be added to the output to increase the
TL/H/6875-29 output current to ± 50 mA. This circuit, shown in Figure 30,
Figure 28. Zero crossing detector has the added advantage that it swings the output up to the
supplies, within a fraction of a volt. The increased voltage
tected internally by back-to-back diodes connected be-
swing is particularly helpful in low voltage circuits.
tween them, therefore, voltages in excess of 1 V cannot be
impressed directly across the inputs. This problem is taken
care of by R1 which limits the current so that input voltages
in excess of 1 kV can be tolerated. If absolute accuracy is

required or if R1 is made much larger than 1 Mft, a compen-

sating resistor of equal value should be inserted in series
with the other input.

In Figure 28, the output of the op amp is clamped so that it

can drive DTL or TTL directly. This is accomplished with a

clamp diode on pin 8. When the output swings positive, it is
clamped at the breakdown voltage of the zener. When it
swings negative, it is clamped at a diode drop below ground.
If the 5V logic supply is used as a positive supply for the

amplifier, the zener can be replaced with an ordinary silicon

diode. The maximum fan out that can be handled by the
device is one for standard DTL or TTL under worst case

As might be expected, the LM108 is not very fast when

used as a comparator. The response time is up in the tens
of microseconds. An LM103 1 1 is recommended for D-|, rath-
er than a conventional alloy zener, because it has lower
capacitance and will not slow the circuit further. The sharp
breakdown of the LM103 at low currents is also an advan- TL/H/6875-31
tage as the current through the diode in clamp is only Figure 30. Power booster
10 nA.

In Figure 30, the output transistors are driven from the sup- At elevated temperatures, even the leakage of clean boards
ply leads of the op amp. It is important that Ri and R2 be can be a headache. At 125°C the leakage resistance be-
made low enough so Q1 and Q2 are not turned on by the tween adjacent runs on a printed circuit board is about
worst case quiescent current of the amplifier. The output of 101 1ft (0.05-inch separation parallel for 1 inch) for high
the op amp is loaded heavily to ground with R3 and R4. quality epoxy-glass boards that have been properly cleaned.
When the output swings about 0.5V positive, the increasing Therefore, the boards can easily produce error currents in

positive supply current will turn on which pulls up the the order of 200 pA and much more if they become contam-
A inated. Conservative practice dictates that the boards be
load. similar situation occurs with Q2 for negative output
swings. coated with epoxy or silicone rubber after cleaning to pre-
vent contamination. Silicone rubber is the easiest to use.
The bootstrapped shunt compensation shown in the figure
However, if the better durability of epoxy is needed, care
is the only one that seems to work for all loading conditions.
must be taken to make sure that it gets thoroughly cured.
This capacitor, C-|, can be made inversely proportional to
Otherwise, the epoxy will make high temperature leakage
the closed loop gain to optimize frequency response. The
much worse.
value given is for a unity-gain follower connection. C2 is also
required for loop stability.
Care must also be exercised to insure that the circuit board
is protected from condensed water vapor when operating in
The does have a dead zone in the open loop transfer
the vicinity of 0°C. This can usually be accomplished by
characteristic. However, the low frequency gain is high
coating the board as mentioned above.
enough so that it can be neglected. Around 1 kHz, though,
the dead zone becomes quite noticeable. a. inverting amplifier

Current limiting can be incorporated into the

ing resistors in series with the emitters of

Q1 and Q2 be-
by add-
input —^Ar
cause the short circuit protection of the LM108 limits the
maximum voltage drop across R1 and R2.

board construction
As indicated previously, certain precautions must be ob-
served when building circuits that are sensitive to very low
currents. If proper care is not taken, board leakage currents
can easily become much larger than the error currents of
the op amp. To prevent this, it is necessary to thoroughly
clean printed circuit boards. Even experimental bread-
boards must be cleaned with trichloroethlene or alcohol to
remove solder fluxes, and blown dry with compressed air. TL/H/6875-33
These fluxes may be insulators at low impedance levels
like in electric motors —
but they certainly are not in high b. follower
impedance circuits. In addition to causing gross errors, their
presence can make the circuit behave erratically, especially
as the temperature is changed.


c. non-inverting amplifier

Bottom View
Figure 31. Printed circuit layout for input guarding with
TO-5 package

Figure 32. Connection of input guards

guarding Guarding a non-inverting amplifier is a little more complicat-
Even with properly cleaned and coated boards, leakage cur- ed. A low impedance point must be created by using rela-
rents are on the verge of causing trouble at 125°C. The tively low value feedback resistors to determine the gain (R-|

standard pin configuration of most IC op amps has the input and R2 in Figure 32c). The guard is then connected to the
pins adjacent to pins which are at the supply potentials. junction of the feedback resistors. A resistor, R 3 can be

Therefore, advisable to employ guarding to reduce the

it is connected as shown in the figure to compensate for large
voltage difference between the inputs and adjacent metal source resistances.
runs. With the dual-in-line and flat packages, it is far more difficult
A board layout that includes input guarding is shown in Fig- to guard the inputs, if the standard pin configuration of the
ure 31 for the eight lead TO-5 package. A ten-lead pin circle LM709 or LM101A is used, because the pin spacings on
isused, and the leads of the IC are formed so that the holes these packages are fixed. Therefore, the pin configuration
adjacent to the inputs are vacant when it is inserted in the of the LM108 was changed, as shown in Figure 33.
board. The guard, which is a conductive ring surrounding
the inputs, then connected to a low impedance point that

is at the same
potential as the inputs. The leakage currents
IC op amps are now available that equal the input current

from the pins at the supply potentials are absorbed by the

specifications of FET amplifiers in all but the most restricted
temperature range applications. At operating temperatures
guard. The voltage difference between the guard and the
inputs can be made approximately equal to the offset volt-
above 85°C, the IC is clearly superior as it uses bipolar tran-
age, reducing the effective leakage by more than three or-
sistors that make possible to eliminate the leakage cur-

rents that plague FETs. Additionally, bipolar transistors

ders of magnitude. If the leads of the integrated circuit, or
other components connected to the input, go through the
match better than FETs, so low offset voltage and drifts can
board, may be necessary to guard both sides.
be obtained without expensive adjustments or selection.
Further, the bipolar devices lend themselves more readily to
32 shows how the guard is commited on the more-
low-cost monolithic construction.
common op amp circuits. With an integrator or inverting am-
where the inputs are close These amplifiers open up new application areas and vastly
plifier, to ground potential, the
improve performance in others. For example, in analog
guard is simply grounded. With the voltage follower, the
memories, holding intervals can be extended to minutes,
is bootstrapped to the output. If it is desirable to put a
even where -55°C to 125°C operation is involved. Instru-
resistor in the inverting input to compensate for the source
mentation amplifiers and low frequency waveform genera-
resistance, it is connected as shown in Figure 32b.
tors also benefit from the low error currents.



11 V* INPUT 4



V" 7

TL/H/6875 -37
NOTE: Pin 6 connected to bottom of package.
NOTE: Pin 7 connected to bottom of package
Top View Top View
Figure 33. Comparing connection diagrams of the LM101 A and LM108, showing addition of guarding

When operating above 85°C, overall performance is fre- to compensate for the current gain falloff of the input tran-
quently limited by components other than the op amp, un- sistors atlow temperatures without creating stability prob-
less certain precautions are observed. It is generally neces- lems at high temperatures.
sary to redesign circuits using semiconductor switches to The biasing circuitry for the input current source is nearly
reduce the effect of their leakage currents. Further, high identical to that in the LM101 A, and a complete description
quality capacitors must be used, and care must be exer- is given in Reference 4. However, a brief explanation fol-
cised in selecting large value resistors. Printed circuit board lows.
leakages can also be troublesome unless the boards are
A collector FET, 6 Q23, which has a saturation current of
properly treated. And above 100°C, it is almost mandatory
about 30 /liA, establishes the collector current of Q24. This
to employ guarding on the boards to protect the inputs, if
FET provides the initial turn-on current for the circuit and
the full potential of the amplifier is to be realized.
insures starting under all conditions. The purpose of R14 is

appendix to compensate for production and temperature variations in

the FET It is a collector resistor (indicated by the T

A complete schematic of the LM108 is given in Figure A1. A

description of the basic circuit is presented along with a

through made of the same semiconductor material as the

simplified schematic earlier in the text. The purpose of this

FET channel. As the FET current varies, the drop across
R14 tends to compensate for changes in the emitter base
Appendix is to explain some of the more subtle features of
voltage of Q24.
the design.
The current source supplying the input transistors is C^g- It
The collector-emitter voltage of Q24 is equal to the emitter

isdesigned to supply a total input stage current of 6 juA at base voltage of Q24 plus that of Q25. This voltage is deliv-
ered to Q26 and Q29. Q25 and Q24 are operated at substan-
25°C. This current drops to 3 ju,A at -55°C but increases to
tially higher currents than Q26 and Q29. Hence, there is a
only 7.5 juA at 125°C. This temperature characteristic tends



Figure A1. Complete schematic of the LM108

differential in their emitter base voltages that is dropped TABLE Typical Performance of the
I. LM108 Operational
across R19 to determine the input stage current. R = 25°Cand Vs = ±15V)
18 is a Amplifier (T A
pinched base resistor, as is indicated by the slash bar
through it. This resistor, which has a large positive tempera-
Input Offset Voltage 0.7 mV
Input Offset Current 50 pA
ture coefficient, operates in conjunction with R17 to help
shape the temperature characteristics of the input stage Input Bias Current 0.8 nA
current source. Input Resistance 70 Mil
The output currents of Q 2 6. Q25. and Q23 are fed to Q Input Common Mode Range ± 1 4V
12 ,

which a controlled-gain lateral PNP.6 it delivers one-half

Common Mode Rejection 1 00 dB
of the combined currents to the output stage. Q-| is also
Offset Voltage Drift 3 jnV/°C
connected to Q12. with its output current set at approxi-
mately 15 /xA by R 7 Since this type of current source
Offset Current Drift 0.5 pA/°C
makes use of the emitter-base voltage differential between Voltage Gain 300V/mW
similar transistors operating at different collector currents,
Small Signal Bandwidth 1 .0 MHz
the output of Q11 is relatively independent of the current
Slew Rate 0.3V/ jus
delivered to Qi2- 12 This current is used for the input stage
bootstrapping circuitry. Output Swing ± 1 4V
Q20 also supplies current to the class-B output stage. Supply Current 300 juA
output current determined by the ratio of R15 to R 12 and
is Power Supply Rejection 1 00 dB
the current through R 12 R13 is included so that the biasing Range
Operating Voltage ± 2V to ± 20V
circuit is not upset when Q 2 o saturates.
One major departure from the simplified schematic is the
bootstrapping of the second stage active loads, Q 2 i and 1. R. J. Widlar, "Future Trends in Intregrated Operational

Q22. to the output. This makes the second stage gain de-
Amplifiers," EDN, Vol. 13, No 6, pp 24-29, June 1968.
pendent only on how well Qg and Q 10 match with variations 2. R. J. Widlar, "Super Gain Transistors for IC," IEEE Jour-
in output voltage. Hence, the second stage gain is quite nal of Solid-State Circuits, Vol. SC-4, No. 4, August, 1969.
high. In fact, the overall gain of the amplifier is typically in 3. R. J. Widlar, "A Unique Circuit Design for a High Perform-
excess of 10 6 at dc. ance Operational Amplifier Especially Suited to Monolith-
The second stage active loads drive Q14. A high-gain pri- ic Construction," Proc. of NEC, Vol.XXI, pp. 85-89, Octo-

mary transistor is used to prevent loading of the second ber, 1965.

stage. Its bootstrapped by Q13 to operate it at
collector is 4. R. J. Widlar, "I.C. Op Amp with Improved Input-Current
zero collector-base voltage. The class-B output stage is ac- Characteristics," EEE, pp. 38-41, December, 1968.
tually driven by the emitter of Q14.
5. R. J. Widlar, "Linear IC's: part 6; Compensating for Drift,"
A dead zone in the output stage is prevented by biasing Qie Electronics, Vol. 41, No. 3, pp. 90-93, February, 1968.
and Q19 on the verge of conduction with Q 15 and Q-| 6 Rg is .
6. R. J. Widlar, "Design Techniques for Monolithic Opera-
used to compensate for the transconductance of Q 15 and
tional Amplifiers," IEEE Journal of Solid-State Circuits,
Q16, making the output stage quiescent current relatively
Fol. SC-4, No. 4, August 1969.
independent of the output current of Q12. The drop across
this resistor also reduces quiescent current. 7. D. R. Sulllivan and M. A. Maidique, "Characterization and
Application of a New
High Input Impedance Monolithic
For positive-going outputs, short circuit protection is provid-
Amplifier," Transitron Electronic Corporation Application
ed by R10 and Q17. When the voltage drop across R-| turns
on Q17, it removes base drive from Q-\g. For negative-going
8. Paul C. Dow, Jr., "An Analysis of Certain Errors in Elec-
outputs, current limiting is initiated when the voltage drop
tronic Differential Analyzers, ll-Capacitor Dielectric Ab-
across R-n becomes large enough for the collector base
junction of Q-| 7 to become forward biased. When this hap-
sorption," IRE Trans, on Electronic Computers, pp. 17-
pens, the base of Q19 is clamped so the output current 22, March, 1958.

cannot increase further. 9. R. J. Widlar, "A Fast Integrated Voltage Follower with
Low Input Current," Myoelectrics, Vol. No. June,
Input protection is provided by Q3 and Q4 which act as 1, 7,

clamp diodes between the 1968.

inputs. The collectors of these
transistors are bootstrapped to the emitter of Q28 through 10. R. C. Dobkin, "Feedforward Compensation Speeds Op
R3. This keeps the collector-isolation leakage of the transis- Amp," National Semiconductor LB-2, March, 1969.
tors from showing up on the inputs. R is included so that 11. R. J. Wildlar, "A New Low Voltage Breakdown Diode,"
the bootstrapping is not disrupted when Q3 or Q4 saturate National Semiconductor TP-5, April, 1 968.
withan input overload, Current-limiting resistors were not
12. R. J. Widlar, "Some Circuit Design Techniques for Lin-
connected in series with the inputs, since diffused resistors
ear Integrated Circuits," IEEE Transactions on Circuit
cannot be employed such that they work effectively, without
Theory, Vol. CT-12, No. 4, pp. 586-590, December,
causing high temperature leakages.

National Semiconductor
Log Converters Application Note 30

One most predictable non-linear elements commonly

of the for Ein ^ 0. This shows that the output is proportional to the

available the bipolar transistor. The relationship between

is logarithm of the input voltage. The coefficient of the log

collector current and emitter base voltage is precisely loga- term is directly proportional to absolute temperature. With-
rithmic from currents below one picoamp to currents above out compensation, the scale factor will also vary directly
one milliamp. Using a matched pair of transistors and inte- with temperature. However, by making R 2 directly propor-
grated circuit operational amplifiers, it is relatively easy to tional to temperature, constant gain is obtained. The tem-
construct a linear to logarithmic converter with a dynamic perature compensation is typically 1 %
over a temperature
range in excess of five decades. range of -25°C to 100°C for the resistor specified. For limit-
ed temperature range applications, such as 0°C to 50°C, a
The circuit in generates a logarithmic output volt-
Figure 1
430n sensistor in series with a 570fl resistor may be substi-
age for a linear input current. Transistor Qi is used as the
non-linear feedback element around an LM108 operational
tuted for the 1 k resistor, also with 1 %
accuracy. The divider,
R1 and R2 sets the gain while the current through R3 sets
amplifier. Negative feedback applied to the emitter of Qi

the zero. With the values given, the scale factor is 1V/dec-
through divider, Ri and R2, and the emitter base junction of
ade and
Q 2 This forces the collector current of Qi to be exactly

equal to the current through the input resistor. Transistor Q2

Equt = logical + 5] (4)
is used as the feedback element of an LM101A operational I

amplifier. Negative feedback forces the collector current of

where the absolute value sign indicates that the dimensions
Q 2 to equal the current through R3. For the values shown, of the quantity inside are to be ignored.
this current is 10 juA Since the collector current of Q2 re-
Log generator circuits are not limited to inverting operation.
mains constant, the emitter base voltage also remains con-
In fact, a feature of this circuit is the ease with which non-in-
stant. Therefore, only the Vbe of Qi varies with a change of
verting operation is obtained. Supplying the input signal to
input current. However, the output voltage is a function of
the difference in emitter base voltages of Qi and Q 2 :
A 2 and the reference current to A1 results in a log output
that is not inverted from the input. To achieve the same
R1 + R2 100 dB dynamic range in the non-inverting configuration, an
Equt = (V B E
- Ve^)- (D
R2 LM1 08 should be used for A2 and an LM1 01 A for A^ Since
, .

For matched transistors operating at different collector cur the LM108 cannot use feedforward compensation, is fre- it

rents, the emitter base differential is given by quency compensated with the standard 30 pF capacitor.
The only other change is the addition of a clamp diode con-
log e —c

nected from the emitter of Qi to ground. This prevents dam-
q 'c 2
age to the logging transistors if the input signal should go
where k is Boltzmann's constant, T is temperature in de-
grees Kelvin and q is the charge of an electron. Combining
these two equations and writing the expression for the out-
put voltage gives
-kT T R-i + R2 E,nR3
EOUT , ^llogj
R I.Eref r
q I 2 J inJ


roi cs
.01 (if

*1 kO (±1%) at 25°C, +3500 pprWC.

Available from Vishay Ultronix, Grand Junction, CO, Q81 Series.

tOffset Voltage Adjust

FIGURE 1. Log Generator with 100 dB Dynamic Range

The log output is accurate to 1 % for any current between Anti-log or exponential generation is simply a matter of rear-
10 nA and 1 mA. This is equivalent to about 3% referred to ranging the circuitry. Figure 3 shows
the circuitry of the log
the input. At currents over 500 ju.A the transistors used devi- converter connected to generate an exponential output
ate from log characteristics due to resistance in the emitter, from a linear input. Amplifier A1 in conjunction with transis-
while at low currents, the offset current of the LM108 is the tor Q1 drives the emitter of Q2 in proportion to the input
major source of These errors occur at the ends of the
error. The
voltage. collector current of Q2 varies exponentially
dynamic range, and from 40 nA to 400 juA the log converter with the emitter-base voltage. This current is converted to a
is 1 %
accurate referred to the input. Both of the transistors voltage by amplifier A2 . With the values given
are used in the grounded base connection, rather than the [E|Nl
diode connection, to eliminate errors due to base current. EOUT = 10" .

Unfortunately, the grounded base connection increases the Many non-linear functions such as XY2, X 2 X 3 1 /X, XY, and , ,

loop gain. More frequency compensation is necessary to X/Y are easily generated with the use of logs. Multiplication
prevent oscillation, and the log converter is necessarily becomes addition, division becomes subtraction and pow-
slow. It may take 1 to 5 ms for the output to settle to 1 of % ers become gain coefficients of log terms. Figure 4 shows a
its final value. This is especially true at low currents. circuit whose output is the cube of the input. Actually, any
power function is available from this circuit by changing the
The circuit shown in 2
is two orders of magnitude
values of Rg and R10 in accordance with the expression:
faster than the previous circuit and has a dynamic range of
80 dB. Operation is the same as the circuit in Figure 1, 16.7 R9
except the configuration optimizes speed rather than dy-
E0UT=E| N R9 + R1
namic range. Transistor Qi is diode connected to allow the
use of feedforward compensation^ on an LM101A opera- Note that when log and anti-log circuits are used to perform
tional amplifier. This compensation extends the bandwidth an operation with a linear output, no temperature compen-
to 10 MHz and increases the slew rate. To prevent errors sating resistors at all are needed. If the log and anti-log
due to the finite hp E of Q-\ and the bias current of the transistors are at the same temperature, gain changes with
LM101A, an LM102 voltage follower buffers the base cur- temperature cancel. It is a good idea to use a heat sink
rent and input current. Although the log circuit will operate which couples the two transistors to minimize thermal gradi-
without the LM102, accuracy will degrade at low input cur- ents. A 1°C temperature difference between the log and

rents. Amplifier A2 is also compensated for maximum band- anti-log transistors results in a 0.3% error. Also, in the log

width. As with the previous log converter, R-\ and R2 control converters, a 1°C difference between the log transistors and
the sensitivity; and R3 controls the zero crossing of the the compensating resistor results in a 0.3% error.
transfer function. With the values shown the scale factor is Either of the circuits in Figures 1 or 2 may be used as divid-
IV/decade and ers or reciprocal generators. Equation 3 shows the outputs
of the log generators are actually the ratio of two currents:
EouT=-[log 10 + 4 (5)
1^| ]

from less than 100 nA to 1 mA.

+ — —WNr-i

•1 kn (±1%) at 25°C, +3500 ppm/°C.

Available from Vlshay Ultronix,
Grand Junction, CO, Q81 Series.

FIGURE 2. Fast Log Generator

the input current and the current through R3. When used as output voltage by A4 and R7, with the scale factor set by R7
a log generator, the current through R3 was held constant at E1 E 3 /10E 2 .

by connecting R3 to a fixed voltage. Hence, the output was Measurement of transistor current gains over a wide range
just the log of the input. If R3 is driven by an input voltage, of operating currents is an application particularly suited to
rather than the 1 5V reference, the output of the log genera- log multiplier/dividers. Using the circuit in Figure 5, PNP cur-
tor is the log ratio of the input current to the current through rent gains can be measured at currents from 0.4 ju,A to
R3. The anti-log of this voltage is the quotient. Of course, if
1 mA. The collector current is the input signal to A-|, the
the divisor is constant, the output is the reciprocal. base current is the input signal to Ag, and a fixed voltage to
A complete one quadrant is shown in Fig-
multiplier/divider R 5 sets the scale factor. Since A2 holds the base at ground,
ure 5. It is shown in Figure 1
basically the log generator a single resistor from the emitter to the positive supply is all

driving the anti-log generator shown in Figure 3. The log that is needed to establish the operating current. The output
generator output from A1 drives the base of Q3 with a volt- is proportional to collector current divided by base current,

age proportional to the log of E1/E2. Transistor Q3 adds a or h FE -

voltage proportional to the log of E3 and drives the anti-log In addition to their application in performing functional oper-
transistor, 64. The collector current of Q4 is converted to an ations, log generators can provide a significant increase in


JL SB4 -sr y

1 kn (±1%) at 25°C, +3500 ppm/°C.

Available from Vishay Ultronix,
Grand Junction, CO, Q81 Series.

FIGURE 3. Anti-Log Generator

08 »F —I— ~ VVV



FIGURE 4. Cube Generator

the dynamic range of signal processing systems. Also, un-
zeroed, if necessary, to improve accuracy with low input
like a linear system, there is no loss in accuracy or resolu- voltages. ii
tion when the input signal is small compared to full scale. The log converters are low level circuits and some care
Over most dynamic range, the accuracy is a percent-
of the
should be taken during construction. The input leads should
of-signal rather than a percent-of-full-scale. For example, be as short as possible and the input circuitry guarded
using log generators, a simple meter can display signals
against leakage currents. Solder residues can easily con-
with 1 00 dB dynamic range or an oscilloscope can display a
duct leakage currents, therefore circuit boards should be
10 mV and 10V pulse simultaneously. Obviously, without the
cleaned before use. High quality glass or mica capacitors
log generator, the low level signals are completely lost.
should be used on the inputs to minimize leakage currents.
To achieve wide dynamic range with high accuracy, the in- Also, when the + 1 5V supply is used as a reference, it must
put operational amplifier necessarily must have low offset be well regulated.
voltage, bias current and offset current. The LM108 has a
maximum bias current of 3 nA and offset current of 400 pA
over a -55°C to 125°C temperature range. By using equal 1. R. C. Dobkin, "Feedforward Compensation Speeds Op
source resistors, only the offset current of the LM108 caus- Amp", National Semiconductor Corporation, Linear Brief
es an error. The offset current of the LM108 is as low as 2, April, 1969.
many FET amplifiers. Further, it has a low and constant tem- 2. R. J. Widlar,
"Monolithic Operational Amplifiers— The
perature coefficient rather than doubling every 10°C. This Universal Linear Component", National Semiconductor
results in greater accuracy over temperature than can be Corporation, AN-4, April, 1 968.
achieved with FET amplifiers. The offset voltage may be

CI -J-
- L-VW-
2K 5lpF|
4 ^

FIGURE 5. Multiplier/Divider

National Semiconductor
Op Amp Circuit Collection

< Application Note 31


Inverting Amplifier Non-Inverting Amplifier
R1 R2


Difference Amplifier Inverting Summing Amplifier

R2 v,—**/Vsr-P


VR3 + R4/ D
R1< ' D<
( Vi V2 V3 \

For R1 = R3 and R2 = R4
R5 = R1//R2//R3//R4
v ut = ^(v2 -v 1) For minimum offset error
TL/ due to input bias current
R1//R2 = R3//R4
For minimum offset error TL/H/7057-4
due to input bias current
Inverting Amplifier with High Input Impedance

Non-Inverting Summing Amplifier R1



*Rs = 1k
•Source Impedance
100K I
for 1 % accuracy

less than 100k

9 ives ,ess than 1 % R3

gain error.

Fast Inverting Amplifier with High Input Impedance Non-Inverting AC Amplifier

+ ^ VoUT =
R1 + R2
R|N= R3
R3 = R1//R2

i L_|H
Practical Differentiator

o vw o 100


1 p2 3
VouT= v 'Ndt
-mcTj tl

I C '
Tf! <
Tur)ity g3j n 30 pF

" 2irR1C1
= R2
rr| i r, i

to input bias current

rnurn offset error due
f —

Fast Integrator

Current to Voltage Converter

10 pF


VQUT = llN R1

For minimum error due to

R2 = R1

r bias current




Circuit for Operating the LM101 Circuit for Generating the

without a Negative Supply Second Positive Voltage
R1 R2

CI > t
J_ 1

TL/H/7057-13 TL/H/7057-14

Neutralizing Input Capacitance Double-Ended Limit Detector
to Optimize Response Time

V UT = 4 -6V for

V LT <; V, N £ V UT

Vout = OV for
Vin < V L t or V| N > V UT
Integrator with Bias Current Compensation TL/H/7057-19

Multiple Aperture Window Discriminator

V,n —
>V 4
v IN —^^-H^ V 1N

•Adjust for zero integrator drift.

Current drift typically 0.1, n/A°C

over -55°Cto125 C
temperature range.
V3 <V IN <V 4

Voltage Comparator for Driving

DTL or TTL Integrated Circuits


V2 <V,n<V 3


Threshold Detector for Photodiodes





Offset Voltage Adjustment for Inverting Amplifiers Offset Voltage Adjustment for Non-Inverting Amplifiers
Using Any Type of Feedback Element Using Any Type of Feedback Element


L 200K
GAIN = +
RS 1
R4 + R2
(S) TL/H/7057-22
5J00 J 2


Offset Voltage Adjustment for Voltage Followers Offset Voltage Adjustment for Differential Amplifiers




— R2


n -»(S)

R2 = R3 + R4

V,R4/ \R1 + R3/

GAIN = p
R1 TL/H/7057-24

Offset Voltage Adjustment for Inverting

Amplifiers Using 10 kn Source Resistance or Less

—ws» R3


Low Frequency Sine Wave Generator with Quadrature Output

-vs/v- OUTPUT
0.01 mF"

I o " 1 Hi


High Frequency Sine Wave Generator with Quadrature Output


f = 10 kHz



Free-Running Multivibrator Wein Bridge Sine Wave Oscillator

R1 R3
160K 750

' Equt

0.01 nf

Chosen for oscillation at 100 Hz

'Eldema 1869
TL/H/7057-28 10V, 14 mA Bulb


Function Generator
0.1 xF
Square Wtvt Output

R1 ' R2
I0K 1M


Pulse Width Modulator


.47 mF


toon > 02

Bilateral Current Source Bilateral Current Source
R1 R3
2M 1M
Rt 1% 1%
100K -AAAr
AAAr ;
R3V| N

R2t > 49.5K


[ < 0.1% 'out I


I '

TL/H/7057-32 -^AAr


Wein Bridge Oscillator with FET Amplitude Stabilization


—r^ir -J— C2
.01 nf

X .01(iF

100K 100K

10 uf
R1 = R2
C1 = C2

4—- 15

Low Power Supply for Integrated Circuit Testing

03 ,

> R3
— > R5
<I C 2=100 OS
J?LM103 I •IT-"'
^J 1N759


8.2K I I •
O-^AAr—O—-I VN/Sr—O—


Positive Voltage Reference

<>— v


Negative Voltage Reference Negative Voltage Reference
i—WSr-4- 6.6V



Precision Current Sink Precision Current Source



N +
LM107 x H^ 2N3456
m—4 ^
T L2N2219

l0 = V| N R1> TL/H/7057-41
V|N- ov



Differential-Input Instrumentation Amplifier

R2 R4
0.1% 0.1%
*—WN»—f W\r

inputs ( r-A/Wr-< > , ALAMCE

R4 = R5
AA/V- •—Wv
1 R2 R3
IK INK - AV = —


Variable Gain, Differential-Input Instrumentation Amplifier

INPUTS •>—^^-0#


Instrumentation Amplifier with ± 100 Volt Common Mode Range


R3 = R4
R1 = R6 = 10R3

R1 = R5 = 10R2 'tMatching determines common

R2 = R3 mode rejection.
0.1% SOK

Instrumentation Amplifier with ± 10 Volt Common Mode Range

R1 = R4
R2 = R5
R6 = R7
t'Matching Determines CMRR
>\ R3


High Input Impedance Instrumentation Amplifier


•TMatching determines CMRR

tMay be deleted to maximize bandwidth

Bridge Amplifier with Low Noise Compensation


'Reduces feed through of

OUTPUT power supply noise by 20 dB
and makes supply bypassing
tTrim for best common
mode rejection

fGain adjust


Bridge Amplifier Preclsion Diode


Precision Clamp Fast Half Wave Rectifier

e iw —WA> t



H'Eref must have a source

pedance 200ftof less than

D2 is used.



Precision AC to DC Converter


R2 R3
2SK 10K
f WV • f WrH>

I M |>^JL-C1 --1M14 [ H5
I 15K -jr-150pF I S JK l l j I

~ ~ C3*
30 pF
•Feedforward compensation can be used to make a fast full wave rectifier without a filter. TL/H/7057-52

Low Drift Peak Detector


I fc. ^. ln * 3

.01 nF

30 pF

Absolute Value Amplifier with Polarity Detector
R1 Rl
input m VNA^ # A^V-



VOUT = - |V| N X

R2 R4 + R3


Sample and Hold

l" 1B • OUTPUT
V m
T J_ a*
Pc capacitor


Sample and Hold


— f-WV-f

'Worst case drift less than 2.5

tTeflon, Polyethylene or Polycarbonate




Dielectric Capacitor


Low Drift Integrator

•Q1 and Q3 should not have internal gate-protection diodes. Worst case drift less than 500 /xWsec over -55°C to + 125°C.

Fastt Summing Amplifier with Low Input Current




In addition to increasing speed, the LM101 A raises high and low frequency t Power Bandwidth: 250 kHz
gain, increases output drive capability and eliminates thermal feedback. Small Signal Bandwidth: 3.5 MHz
Slew Rate: 10V/fis

6 X 10-8
t C5

Fast Integrator with Low Input Current

J • vw

input '\M\r- tt
R1 10 pF
0.002 nf _1_
0.002 »f 150 pF




Adjustable Q Notch Filter

10M 10M
Win- -VWr


270 pF

f =
2ttR1C1 OK
= 60 Hz fR4
R1 = R2 = R3
C1 = C2 = C23 TL/H/7057-60

Easily Tuned Notch Filter

Tuned Circuit


C2 C1

500 pf
•*- D 1.1^F 0.33 jrf^ R1



R4 = R5 R5 C2
R1 = R3 2K
R4 = y, R1 0.1%

»0 =

Two-Stage Tuned Circuit



Negative Capacitance Multiplier

VqS + R2 Iqs
R3(R1 + R| N )
RS =
R| N A v0


Variable Capacitance Multiplier

R1 R2
IK 10K

-s-J X
(-§)< *—vw-



Simulated Inductor Capacitance Multiplier


v s + Iqs R1
•L =
R S = R3




High Pass Active Filter

11 OK

I —VSAr-#—

HMM 0.01 uf

0.01 *iF

l T 1
S 110K

'Values are for 1 00 Hz cutoff. Use metalized polycarbonate capacitors for good temperature stability.

Low Pass Active Filter

940 pF

'Values are for 1 kHz cutoff. Use silvered mica capacitors for good temperature stability.

Nonlinear Operational Amplifier with Temperature Compensated Breakpoints

187.5K S0K

rsAA^w- 7

—^oi 700K
< > > 4 WAr-
V" -15V



Current Monitor Saturating Servo Preamplifier with
INPUT Rate Feedback
LM103 „,


270 R3
O -WAr
— 1.6K



•SK w _ m R3 ,



Power Booster



< 2N2219



Analog Multiplier



Long Interval Timer Fast Zero Crossing Detector

IM57 IN4S7


R1 '

•Low leakage -0.017 jiF per second delay
Propagation delay approximately 200 ns
TL/H/7057-78 tDTL or TTL fanout of three.
Minimize stray capacitance
Pin 8

Amplifier for Piezoelectric Transducer Temperature Probe


/ 93i > | yvv


I LM107 ^> m

12K IX 'Set for 0V at 0°C

t Adjust for

"ST Low frequency cutoff = R1 C1

Photodiode Amplifier Photodiode Amplifier


Vout = R1 Id


'Operating photodiode with less than 3 mV
across it eliminates leakage currents.

High Input Impedance AC Follower



Temperature Compensated Logarithmic Converter

V • 15V

X* T 1Z1 «3*

t1 kfl ( ± 1 %) at 25*C, + 3500 ppm/'C.

Available from Vishay Uttronix,
Grand Junction, CO, Q81
INPUT —^W- Series.

'Determines current for zero

crossing on output 10 jiA
as shown.


10 nA < N <
l| 1 mA
Sensitivity is 1V per decade



E. -VNAr-4^ ~\ 300 PF -T- »


1% 2N2920
£3 -VSAr-#- l^r

— C6
150 pF


Cube Generator

iook r
1 2
RIO 15.7K
4.55K 1%


Fast Log Generator Z
Eref 1SV

150 pF

t1 kn(±1%)at25"i'C, +3500 ppm/°C.

C2 C3
Available from Vishay Ultronix,
Grand Junction, CO, Q81 Series.

300 pF 75 pF IpF

Anti-Log Generator
Eref 15V

< 1S0K 10K
IX 2N2920 1%

20pF-r- >2K _L II

4 HH 150 pF
150 pf
t1 kn (± 1 %) at 25"C, + 3500 ppm/'C.
Available from Vishay Ultronix,
Grand Junction, CO, Q81 Series.


National Semiconductor
FET Circuit Applications Application Note 32


input O

'Polycarbonate dielectric
1—1-15' 15V HOLD
Sample and Hold With Offset Adjustment

The 2N4339 JFET was selected because of its low Iqss a9e Leakages of this level put the burden of circuit perform-

(<100 pA), very-low Id(OFF) (<50 PA) and low pinchoff volt- ance on clean, solder-resin free, low leakage circuit layout.

s* -0+15V Ov+


( JX)'""' 3
input O—VW

TL/H/6791 -3
TL/H/6791 -2
Long Time Comparator JFET AC Coupled Integrator

The 2N4393 is operated as a Miller integrator. The high Yf S This circuit utilizes the "ju.-amp" technique to achieve very
of the 2N4393 (over 1 2,000 jumhos @ 5 mA) yields a stage high voltage gain. Using Ci in the circuit as a Miller integra-
gain of about 60. Since the equivalent capacitance looking tor, or capacitance multiplier, allows this simple circuit to

C times gain and the gate source resistance

into the gate is handle very long time constants.
can be as high as 10 Mft, time constants as long as a
minute can be achieved.

30V GO


TL/H/6791 -4
Ultra-High ZIN AC Unity Gain Amplifier
Nothing is left to chance in reducing input capacitance. The resistor and drain. Any input capacitance you get with this
2N4416, which has low capacitance in the first place, is circuit is due to poor layout techniques.
operated as a source follower with bootstrapped gate bias



TL/H/6791 -6

TL/H/6791 -5
FET Cascode Video Amplifier J FET Pierce Crystal Oscillator

The FET cascode video amplifier features very low input The JFET Pierce crystal oscillator allows a wide frequency
loading and reduction of feedback to almost zero. The range of crystals to be used without circuit modification.
2N3823 is used because of its low capacitance and high Since the JFET gate does not load the crystal, good Q is
YfS Bandwidth of this amplifier
. is limited by Rl and load maintained thus insuring good frequency stability.

-CH— O—S1





-O iooov s S2A

FETVM-FET Voltmeter
This FETVM replaces the function ot the VTVM while at the allowing a 0.5 volt full scale range which is impractical with
same time ridding the instrument of the usual line cord. In most vacuum tubes. The low-leakage, low-noise 2N4340 is

addition, drift rates are far superior to vacuum tube circuits an ideal device for this application.

'^Hr I0K 10K

-WSr- f vyv • -vs/v-


HI-FI Tone Control Circuit (High Z Input)

The 2N3684 JFET provides the function of a high input amp-operated feedback type tone control circuit,

impedance and low noise characteristics to buffer an op


Differential Analog Switch

The FM1208 monolithic dual is used in a differential multi- (-25 to + 125°C), this makes it an unusual but ideal choice
plexer application where Rds(ON) should be closely foran accurate multiplexer. This close tracking greatly re-
matched. Since Rds(ON) for the monolithic dual tracks duces errors due to common mode signals.
at better than ±1% over wide temperature ranges

004 jjF -i

820K .0015 uF


Magnetic-Pickup Phono Preamplifier

This preamplifier provides proper loading to a reluctance ratio of better than -70 dB (referenced to 10 mV input at
phono cartridge. It provides approximately 25 dB of gain at 1 kHz) and has a dynamic range of 84 dB (referenced to
1 kHz (2.2 mV input for 100 mV output), it features S + N/N 1 kHz). The feedback provides for RIAA equalization.




Variable Attenuator Negative to Positive Supply Logic Level Shifter

The 2N3685 acts as a voltage variable resistor with an This simple circuit provides for level shifting from any logic
R DS(ON) of 800a max. The 2N3685 JFET will have linear function (such as MOS) operating from minus to ground
resistance over several decades of resistance providing an supply to any logic level (such as TTL) operating from a plus
excellent electronic gain control. to ground supply. The 2N3970 provides a low rd S (ON) and
fast switching times.

Voltage Controlled Variable Gain Amplifier

The 2N4391 provides a low Rds(ON) ('ess than 30H). The tion of greater than 100 dB can be obtained at 10 MHz
tee attenuator provides for optimum dynamic linear range providing proper RF construction techniques are employed.
for attenuation and if complete turnoff is desired, attenua-


v,„0 Av = T = 500 TYPICAL

Ultra-High Gain Audio Amplifier

Sometimes called the "JFET" amp," this circuit provides

ju, currentis, the more gain you get. You do sacrifice input

a very low power, high gain amplifying function. Since jx of a dynamic range with increasing gain, however.
JFET increases as drain current decreases, the lower drain



Level-Shiftlng-lsolation Amplifier

The 2N4341 JFET is used as a level shifter between two op JFET is ideally suited for this type of application because
amps operated at different power supply voltages. The Id = Is-



Trademark of the
Burroughs Corp.
FET Nixie* Drivers Precision Current Sink

The 2N3684 JFETs are used as Nixie tube drivers. Their V The 2N3069 JFET and 2N2219 bipolar have inherently high
of 2-5 volts ideally matches DTL-TTL logic levels. Diodes output impedance. Using R-| as a current sensing resistor to
are used to a +50 volt prebias line to prevent breakdown of provide feedback to the LM101 op amp provides a large
the JFETs. Since the 2N3684 a TO-72 (4 lead TO-18)
is in amount feedback to enhance the
of loop gain for negative
package, none of the circuit voltages appear on the can. true current sink nature of this circuit. For small current val-
The JFET is immune to almost all of the failure mechanisms ues, the 10k resistor and 2N2219 may be eliminated if the
found in bipolar transistors used for this application. source of the JFET is connected to R-|.



JFET-Blpolar Cascode Circuit

The JFET-Bipolar cascode circuit will provide full video out- video detector. An m derived filter using stray capacitance
put for the CRT cathode drive. about 90. The cas-
Gain is and a variable inductor prevents 4.5 MHz sound frequency
code configuration eliminates Miller capacitance problems from being amplified by the video amplifier.
with the 2N4091 JFET, thus allowing direct drive from the

output o

'Polycarbonate dielectric capacitor

Low Drift Sample and Hold
The JFETs, Qi and Cfe, provide complete buffering to C-|, and Q2 Igss (<100 pA) as the only discharge paths. Q2
the sample and hold capacitor. During sample, Q-) is turned serves a buffering function so feedback to the LM101 and
on and provides a path, r,j
8 (ON), for charging Cn . During output current are supplied from its source.
hold, Qi is turned off thus leaving Qi Id(OFF) (
<50 P A )



V, « V, + 1V


O +15V

Wein Bridge Sine Wave Oscillator
JFET Sample and Hold Circuit

The major problem in producing a low distortion, constant The logic voltage is applied simultaneously to the sample
amplitude sine wave is getting the amplifier loop gain just and hold JFETs. By matching input impedance and feed-
right. By using the 2N3069 JFET as a voltage variable resis- back resistance and capacitance, errors due to rd S (ON) of
tor in the amplifier feedback loop, this can be easily the JFETs is minimized. The inherent matched rds(0 N) and
achieved. The LM103 zener diode provides the voltage ref- matched leakage currents of the FM1109 monolithic dual
erence for thepeak sine wave amplitude; this is rectified greatly improve circuit performance.
and fed to the gate of the 2N3069, thus varying its channel
resistance and, hence, loop gain.



•—OV OU ,

TL/H/6791-23 TL/H/6791 -24

High Impedance Low Capacitance Wideband Buffer High Impedance Low Capacitance Amplifier
The 2N4416 features low input capacitance which makes This compound series-feedback circuit provides high input
this compound-series feedback buffer a wide-band unity impedance and stable, wide-band gain for general purpose
gain amplifier. video amplifier applications.






Stable Low Frequency Crystal Oscillator
This Colpitts-Crystal oscillator is ideal for low frequency to 360° Phase Shifter
crystal oscillator circuits. Excellent stability is assured be-

cause the 2N3823 JFET circuit loading does not vary with Each stage provides 0° to 180° phase By ganging the

temperature. two stages, 0° to 360° phase shift is The 2N3070

JFETs are ideal since they do not load the phase shift net-

I -tOi t I —



(J— .


I 2N4W0

S=PO-> •to -vw-

DTL-TTL Controlled Buffered Analog Switch

This analog switch uses the 2N4860 JFET for its 25 ohm chopper. The DM7800 monolithic I.C. provides adequate
roN and low leakage. The LM102 serves as a voltage buffer. switch drive controlled DTL-TTL logic levels.

This circuit can be adapted to a dual trace oscilloscope


C1 « 700 pF L1 = 1.3 jiH

C2 = 75 pF L2 = 10T »/,' DIA %" LONG

V DD = 16V l
D = 1 itiA

Low Distortion Oscillator
The 2N4416 JFET is capable of oscillating in a circuit where is excellent when a low harmonic content is required for a
harmonic distortion is very low. The JFET local oscillator good mixer circuit.

L 102


~ 11 * .07 pHy CENTER TAP
12 -.J7 (iHy TAP % UP f ROM GROUND

200 MHz Cascode Amplifier
This 200 MHz JFET cascode circuit features low crossmo- only special requirement of this circuit is that loss of the
dulation, large-signal handling ability,
no neutralization, and upper unit must be greater than that of the lower unit.
AQC controlled by biasing the upper cascode JFET. The

FET Op Amp
The FM3954 monolithic-dual provides an ideal low-offset, its bias current range thus improving common mode rejec-
low-drift buffer function for the LM101 A op amp. The excel- tion.
lent matching characteristics of the FM3954 track well over

High Toggle Rate High Frequency Analog Switch

This commutator circuit provides low impedance gate drive ac impedance for off drive and high ac impedance for on
to the 2N3970 analog switch for both on and off drive condi- drive to the 2N3970. The LH0005 op amp does the job of
tions. This circuit also approaches the ideal gate drive con- amplifying megahertz signals.
ditions for high frequency signal handling by providing a low




DM7800 -O INPUT 3


i i
4-Channei Commutator

This 4-channel commutator uses the 2N4091 to achieve low which provides from +10V to -20V gate drive to the
channel ON resistance (<30ft) and low OFF current leak- JFETs while at the same time providing DTL-TTL logic com-
age. The DM7800 voltage translator is a monolithic device patability.


INPUT ^ + */>At + •O TO LOAD



R1 R3
© 2N36S4

UT "
R2 '
> i

1 TL/H/6791-34
Current Monitor

R-i senses current flow of a power supply. The JFET is used voltage accurately reflects the power supply current flow.
as a buffer because lp = Is. therefore the output monitor

O +1SV

Low Cost High Level Preamp and Tone Control Circuit

This preamp and tone control uses the JFET to its best ratio of over 85 dB. The tone controls allow 1 8 dB of cut and
advantage; as a low noise high input impedance device. All boost; the amplifier has a 1 volt output for 1 00 mV input at

device parameters are non-critical yet the circuit achieves maximum level.

harmonic distortion levels of less than 0.05% with a S/N



input O

Precision Current Source

TL/H/6791 -37
The 2N3069 JFET and 2N2219 bipolar serve as voltage Schmitt Trigger
devices between the output and the current sensing resis-
This Schmitt trigger circuit is "emitter coupled" and provides
tor, R-). The LM101 provides a large amount of loop gain to

assure that the circuit acts as a current source. For small a simple comparator The 2N3069 JFET places very

values of current, the 2N2219 and 10k resistor may be elimi- little loading on the measured input. The 2N3565 bipolar is a
nated with the output appearing at the source of the high hpE transistor so the circuit has fast transition action

2N3069. and a distinct hysteresis loop.


^ 2N4338

G s

' Spmho mix.

fi LM103

Low Power Regulator Reference
This simple reference circuit provides a stable voltage refer- power supply rejection exceeds 100 dB.
ence almost totally free of supply voltage hash. Typical


son 2N4391


' son


& ATTENUATION > 80 dB ® 100 MHz


High Frequency Switch



The 2N4391 provides a low on-resistance of 30 ohms and a and an "ideal" switch, the performance stated above can
high off-impedance (<0.2 pF) when off. With proper layout be readily achieved.

Precision IC Comparator
Runs from + 5V
Logic Supply
Robert J. Widlar
National Semiconductor
Application Note 41

Apartado Postal 541
Puerto Vallarta, Jalisco

In digital systems, it is sometimes necessary to convert low
level analog signals into digital information. An example of
this might be a detector for the illumination level of a photo-
diode. Another would be a zero crossing detector for a mag-
netic transducer such as a magnetometer or a shaft-posi-
tion pickoff. These transducers have low-level outputs, with
currents in the low microamperes or voltages in the low mil-
livolts. Therefore, low level circuitry is required to condition

these signals before they can drive logic circuits.

A voltage comparator can perform many of these precision
functions. A comparator is op amp
essentially a high-gain
designed open loop operation. The function of a compar-
ator is to produce a logic "one" on the output with a positive
signal between its two inputs or a logic "zero" with a nega-
tive signal between the inputs. Threshold detection is ac-
complished by putting a reference voltage on one input and
the signal on the other. Clearly, an op amp can be used as a
comparator, except that its response time is in the tens of
microseconds which is often too slow for many applications.
A unique comparator design will be described here along
with some of its applications in digital systems. Unlike older
IC comparators or operate from the same 5V
op amps, it will

supply as DTL or TTL logic circuits. It will also operate with

the single negative supply used with MOS logic. Hence, low
level functions can be performed without the extra supply
voltages previously required.
The versatility of the comparator along with the minimal cir-

cuit loading and considerable precision recommend it for

many uses, in digital systems, other than the detection of
low level signals. Itcan be used as an oscillator or multivi- TL/H/7303-1

brator, in digital interface circuitry and even for low voltage Figure 1. Simplified schematic of the comparator
analog circuitry. Some of these applications will also be dis-
buffer the differential input stage to get low input currents
without sacrificing speed. The PNP's drive a standard NPN
circuit description differential stage, Q3 and Q4. The output of this stage is
In order to understand how to use this comparator, it is nec-
further amplifiedby the Q 5 —
6 pair. This feeds Qg which
essary to look briefly at the circuit configuration. Figure 1 provides additonal gain and drives the output stage. Current
shows a simplified schematic of the device. PNP transistors sources are used to determine the bias currents, so that
performance is not greatly affected by supply voltages.

The output transistor is Q-| 1 and , it is protected by Qi o and mon mode range of the IC. The output will directly drive DTL
R6 which limit the peak output current. The output lead, or TTL.The exact value of the pull up resistor, R5, is deter-
since is not connected to any other point in the circuit, can
it mined by the speed required from the circuit since it must
either be returned to the positive supply through a pull-up drive any capacitive loading for positive-going output sig-
resistor or switch loads that are connected to a voltage nals. An optional offset-balancing circuit using R3 and R4 is

higher than the positive supply voltage. The circuit will oper- included in the schematic.
ate from a single supply if the negative supply lead is con-
Figure 3 shows a connection for operating with MOS logic.
nected to ground. However, if a negative supply is available, This a level detector for a photodiode that operates off a
it can be used to increase the input common mode range.
-10V supply. The output changes state when the diode
Table I summarizes the performance of the comparator current reaches 1 juA Even at this low current, the error
when operating from a 5V supply. The circuit will work with contributed by the comparator is less than 1 %.

Table I. Important electrical characteristics of the

LM111 comparator when operating from single,
5V supply (TA = 25°C)
Parameter Units
Min Typ Max
Input Offset Voltage 0.7 3 mV
Input Offset Current 4 10 nA
Input Bias Current 60 100 nA
Voltage Gain 100 V/mV
Response Time 200 ns
Common Mode Range 0.3 3.8 V
Figure 3. Level detector for photodiode
Output Voltage Swing 50 V
Higher threshold currents can be obtained by reducing R1,
Output Current 50 mA R2 and R3 proportionally. At the switching point, the voltage
Fan Out (DTL/TTL) 8 across the photodiodeis nearly zero, so its leakage current

does not cause an error. The output switches between

Supply Current 3 5 mA ground and -10V, driving the data inputs of MOS logic di-
supply voltages up to ±1 5V with a corresponding increase
in the input voltage range. Other characteristics are essen- The circuit in Figure 3 can, of course, be adapted to work
tially unchanged at the higher voltages. with a 5V supply. At any rate, the accuracy of the circuit will

depend on the supply-voltage regulation, since the refer-

low level applications ence is derived from the supply. Figure 4 shows a method
A detect zero crossing in the output of a
circuit that will
magnetic transducer within a fraction of a millivolt is shown
in Figure 2. The magnetic pickup is connected between the

two inputs of the comparator. The resistive divider, Ri and

R2, biases the inputs 0.5V above ground, within the com-

Figure 4. Precision level detector for photodiode

ofmaking performance independent of supply voltage. D1 is

a temperature-compensated reference diode with a 1.23V
breakdown voltage. It acts as a shunt regulator and delivers
a stable voltage to the comparator. When the diode current
is large enough (about 10 ju,A) to make the voltage drop

Figure 2. Zero crossing detector for magnetic transducer

across R3 equal to the breakdown voltage of D-|, the output The comparator can be strobed, as shown in Figure 6, by
will change state. R 2 has been added to make the threshold the addition of Q1 and R5. With a logic one on the base of
error proportional to the offset current of the comparator, Q-i, approximately 2.5 mA is drawn out of the strobe termi-
rather than the bias current. It can be eliminated if the bias nal of the LM111, making the output high independent of
current error is not considered significant. the input signal.
A zero crossing detector that drives the data input of MOS
logic is shown in Figure 5. Here, both a positive supply and
V = 5V


1 — TO MOS

- V = -10V -
Figure 5. Zero crossing detector driving MOS logic Figure 6. Circuit for transmitting data between high-lev-
el logic and TTL
the -10V supply for MOS circuits are used.Both supplies Sometimes it is necessary to transmit data between digital
are required for the circuit to work with zero common-mode equipments, yet maintain a high degree of electrical isola-
voltage. An alternate balancing scheme is also shown in the tion. is done with a transformer. However,
Normally, this
schematic. It differs from the circuit in Figure 2 in that it
transformers have problems with low-duty-cycle pulses
raises the input-stage current by a factor of three. This in-
since they do not preseve the dc level.
creases the rate at which the input voltage follows rapidly-
The circuit in Figure 7 is a more satisfactory method of ob-
changing signals from 7V/ju.s to 18V/jm.s. This increased
taining isolation. At the transmitting end, a TTL gate drives a
common-mode slew can be obtained without the balancing
gallium-arsenide light-emitting diode. The light output is opti-
potentiometer by shorting both balance terminals to the
callycoupled to a silicon photodiode, and the comparator
positive-supply terminal. Increased input bias current is the
detects the photodiode output. The optical coupling makes
price that must be paid for the faster operation.
possible electrical isolation in the thousands of megohms at
digital interface circuits potentials in the thousands of volts.
Figure 6 shows an interface between high-level logic and The maximum data rate of this circuit is 1 MHz. At lower
DTL or TTL The input signal, with 0V and 30V logic states is rates ( ~ 200 kHz) R3 and C1 can be eliminated.
attenuated to 0V and 5V by R1 and R2. R3 and R4 set up a
multivibrators and oscillators
2.5V threshold level for the comparator so that it switches
when the input goes through 1 5V. The response time of the
The free-running multivibrator in Figure 8 is another exam-
circuit can be controlled with C-|, if desired, to make it insen- ple of the versatility of the comparator. The inputs are bi-

sitive to fast noise spikes. Because of the low error currents ased within the common moderange by R1 and R2. DC
of the LM111, it is possible to get input impedances even stability, which insures starting, is provided by negative

higher than the 300 kft obtained with the indicated resistor feedback through R3. The negative feedback is reduced at
values. high frequencies by C-|. At some frequency, the positive
feedback through R4 will be greater than the negative feed-
back; and the circuit will oscillate. For the component values
V = 5V +
V = 5V

Figure 7. Data transmission system with near-infinite ground isolation

shown, the circuit delivers a 1 00 kHz square wave output. tive feedback is obtained through a quartz crystal. The cir-

The frequency can be changed by varying C-\ or by adjusting cuit oscillates when transmission through the crystal is at a
Ri through R 4 while keeping their ratios constant.
, maximum, so the crystal operates in its series-resonant
Because of the low input current of the comparator, large V = 5V
impedances can be used. Therefore, low frequencies
can be obtained with relatively-small capacitor values: it is
no problem to get down to 1 Hz using a 1 jxF capacitor. The
speed of the comparator also permits operation at frequen-
cies above 1 00 kHz.

Figure 9. Crystal-controlled oscillator

mode. The high input impedance of thecomparator and the

isolating capacitor, C2, minimize loading of the crystal and
contribute to frequency stability. As shown, the oscillator
*TTL or DTL Fanout of two. delivers a 1 00 kHz square-wave output.
Figure 8. Free-running multivibrator
frequency doubler
The frequency depends almost entirely on the
of oscillation
In a digital it is a relatively simple matter to divide by
resistance and capacitor values because of the precision of
any However, multiplying by an integer is quite an-
the comparator. Further, the frequency changes by only 1 %
other story especially if operation over a wide frequency
for a 10% change in supply voltage. Waveform symmetry is
range and waveform symmetry are required.
also good, but the symmetry can be varied by changing the
A frequency doubler that satisfies the above requirements is
ratio of Ri to R2.
shown in Figure 10. A comparator is used to shape the in-
A crystal-controlled oscillator that can be used to generate
the clock in slower digital systems is shown in Figure 9. It is
similar to the free running multivibrator, except that the posi-


Frequency Range
Input— 5 kHz to 50 kHz
Output— 10 kHz to 100 kHz
Figure 10. Frequency doubler

put signal and feed it to an integrator. The shaping is re- the linear region with source resistances above 1 kft, be-
quired because the input to the integrator must swing be- cause the 1 MHz open loop gain of the comparator is about
tween the supply voltage and ground to preserve symmetry 80 dB. However, this does not affect the dc characteristics
in the output waveform. An LM1 08 op amp, that works from and is not a problem unless the input signal dwells within
the 5V logic supply, serves as the integrator. This feeds a 200 jmV of the transition level. But if the oscillation does
triangularwaveform to a second comparator that detects cause difficulties, it can be eliminated with a small amount
when the waveform goes through a voltage equal to its av- of positive feedback around the comparator to give a 1 mV
erage value. Hence, as shown in Figure 1 1, the output of the hysteresis.

FIRST COMPARATOR Stray coupling between the output and the balance termi-
OUTPUT nals can also cause oscillations, so an attempt should be
made to keep these leads apart. It is usually advisable to tie
the balance pins together to minimize the effect of this feed-
back. If balancing is used, the same result can be accom-
plished by connecting a 0.1 ju.F capacitor between these
Normally, individual supply bypasses on every device are
unnecessary, although long leads between the comparator
"Lnn_nr TL/H/7303-11
and the bypass capacitors are
definitely not recommended.
large current spikes are injected into the supplies in
switching the output, bypass capacitors should be included
Figure 11. Waveforms for the frequency doubler
at these points.

second comparator is delayed by half the duration of the When driving the inputs from a low impedance source, a
input pulse. The two comparator outputs can then be com- limiting resistor should be placed in series with the input
bined through an exclusive-OR gate to produce the double- lead to limit the peak current to something less than
frequency output. 100 mA. This is especially important when the inputs go
With the component values shown, the circuit operates at outside a piece of equipment where they could accidentally
frequencies from 5 kHz to 50 kHz. Lower frequency opera- be connected to high voltage sources. Low impedance
tion can be secured by increasing both C2 and C4. sources do not cause a problem unless their output voltage
exceeds the negative supply voltage. However, the supplies
application hints go to zero when they are turned off, so the isolation is usual-
One of the problems encountered in using earlier IC com- ly needed.
parators like the LM710 or LM106 was
were prone
that they Large capacitors on the input (greater than 0.1 /xF) should
to erratic operation caused by oscillations. This was a direct be treated as a low source impedance and isolated with a
result of the high speed of the devices, which made it man- resistor. A charged capacitor can hold the inputs outside the
datory to provide good input-output isolation and low-induc- supply voltage if the supplies are abruptly shut off.
tance bypassing on the supplies. These oscillations could
Precautions should be taken to insure that the power sup-
be particularly puzzling when they occurred internally, show-
ing up at the external terminals only as erratic dc character-
plies for this orany other IC never become reversed even —
under transient conditions. With reverse voltages greater
than 1 V, the IC can conduct excessive current, fuzing inter-
In general, the LM1 1 1 is less susceptible to spurious oscilla- nal aluminum interconnects. This usually takes more than
tions bothbecause of its lower speed (200 ns response time 0.5A. If there is a possibility of reversal, clamp diodes with
vs 40 ns) and because of its better power supply rejection. an adequate peak current rating should be installed across
Feedback between the output and the input is a lesser prob- the supply bus.
lem with a given source resistance. However, the LM111
No attempt should be made to operate the circuit with the
can operate with source resistance that are orders of mag-
ground terminal at a voltage exceeding either supply volt-
nitude higher than the earlier devices, so stray coupling be-
age. Further, the 50V output-voltage rating applies to the
tween the inputand output should be minimized. With
potential between the output and the V~ terminal. There-
source resistances between 1 kfl and 10 kfl, the imped-
fore, if the comparator is operated from a negative supply,
ance (both capacitive and resistive) on both inputs should
the maximum output voltage must be reduced by an amount
be made equal, as this tends to reject the signal fed back. -
equal to the voltage on the V terminal.
Even so, it is difficult to completely eliminate oscillations in

The output circuitry
is protected for shorts across the load. It The comparator can also be used in many analog systems.
example, withstand a short to a voltage more
will not, for Itoperates from standard ± 1 5V op amp supplies, and its dc
negative than the ground terminal. Additionally, with a sus- accuracy equals some of the best op amps. It is also an
tained short, power dissipation can become excessive if the order of magnitude faster than op amps used as compara-
voltage across the output transistor exceeds about 1 0V. tors.

The input terminals can exceed the positive supply voltage The new comparator is considerably more flexible than old-
without causing damage. However, the 30V maximum rating er devices. Not only will it drive RTL, DTL and TTL logic; but
between the inputs and the V terminal must be observed. also it can interface with MOS logic or deliver ± 1 5V to FET
As mentioned earlier, the inputs should not be driven more analog switches. The output can switch 50V, 50 mA loads,
negative than the V~ terminal. making it useful as a driver for relays, lamps or light-emitting
diodes. Further, a unique output stage enables it to drive
loads referred to either supply or to ground and provide
A versatile voltage comparator that can perform many of the ground isolation between the comparator inputs and the
precision functions required systems has been pro-
in digital load.
duced. Unlike older comparators, the IC can operate from
The LM111 is a plug-in replacement for comparators like
the same supply voltage as the digital circuits. The compar-
the LM710 and LM106 in applications where speed is not of
ator is particularly useful in circuits requiring considerable
prime concern. Compared to its predecessors in other re-
sensitivity and accuracy, such as threshold detectors for low
spects, it has many improved electrical specifications, more
level sensors, data transmission circuits or stable oscillators
design flexibility and fewer application problems.
and multivibrators.

National Semiconductor
IC Provides On-Card
Regulation for
Logic Circuits
Application Note 42

Robert J. Widlar
Apartado Postal 541
Puerto Valiarta, Jalisco

Because of the relatively high current requirements of digital For one, if is put on the chip, the
the series pass transistor
systems, there are a number of problems associated with integrated circuitneed only have three terminals. Hence, an
using one centrally-located regulator. Heavy power busses ordinary transistor power package can be used. The practi-
must be used to distribute the regulated voltage. With low cality of this approach depends on eliminating the adjust-
voltages and currents of many amperes, voltage drops in ments usually required to set up the output voltage and limit-
connectors and conductors can cause an appreciable per- ing current for the particular application, as external adjust-
centage change in the voltage delivered to the load. This is ments require extra pins. A new solid-state reference, to be
aggravated further with TTL logic, as it draws transient cur- described later, has sufficiently-tight manufacturing toler-
rents many times the steady-state current when it switches. ances that output voltages do not always have to be individ-
These problems have created a considerable interest in on- ually trimmed. Further, thermal overload protection can pro-
card regulation, that is, to provide local regulation for the tect an IC regulator for virtually any set of operating condi-
subsystems of the computer. Rough preregulation can be tions, —
making current limit adjustments unnecessary.
used, and the power distributed without excessive concern Thermal protection limits the maximum junction temperature
for line drops. The local regulators then smooth out the volt- and protects the regulator regardless of input voltage, type
age variations due to line drops and absorb transients. of overload or degree of heat sinking. With an external pass
A monolithic regulator is now available to perform this func- transistor, there is no convenient way to sense junction tem-

tion. It is quite simple to use in that it requires no external perature so it is much more difficult to provide thermal limit-
components. The integrated circuit has three active leads ing. Thermal protection is, in itself, a very good reason for

input, output and ground —

and can be supplied in standard putting the pass transistor on the chip.
transistor power packages. Output currents in excess of 1A When a regulator is protected by current limiting alone, it is
can be obtained. Further, no adjustments are required to set necessary to limit the output current to a value substantially
up the output voltage, and overload protection is provided lower than is dictated by dissipation under normal operating
that makes it virtually impossible to destroy the regulator. conditions to prevent excessive heating when a fault oc-
The simplicity of the regulator, coupled with low-cost fabri- curs. Thermal limiting provides virtually absolute protection
cation and improved reliability of monolithic circuits, now for any overload condition. Hence, the maximum output cur-
makes on-card regulation quite attractive. rent under normal operating conditions can be increased.
This tends to make up for the fact that an IC has a lower
design concepts
maximum junction temperature than discrete transistors.
A useful on-card regulator should include everything within
5V regulator works with relatively low volt-

one package including the power-control element, or pass
Additionally, the
age across the integrated circuit. Because of the low volt-
transistor. The author has previously advanced arguments
age, the internal circuitry can be operated at comparatively
against including the pass transistor in an integrated circuit
high currents without causing excessive dissipation. Both
regulator. 1 First, there are no standard multi-lead power
the low voltage and the larger internal currents permit high-
packages. Second, integrated circuits necessarily have a
er junction temperatures. This can also reduce the heat
lower maximum operating temperature because they con-
tain low-level circuitry. This means that an IC regulator
sinking required —
especially for commercial-temperature-
range parts.
needs a more massive heat sink. Third, the gross variations
in chip temperature due to dissipation in the pass transistors Lastly, the variations in chip temperature caused by dissipa-
worsen load and line regulation. However, for a logic-card tion in the pass transistor do not cause serious problems for
regulator, these arguments can be answered effectively. a logic-card regulator. The tolerance in output voltage is

. ,

loose enough that it is relatively easy to design an internal across R2 has a positive temperature coefficient. It will be
reference that is much more stable than required, even for shown that the output voltage will be temperature compen-
temperature variations as large as 1 50°C. sated when the sum of the two voltages is equal to the
energy-band-gap voltage.
circuit description
Conditions for temperature compensation can be derived
The internal voltage reference for this logic-card regulator is
starting with the equation for the emitter-base voltage of a
probably the most significant departure from standard de-
transistor which is 2
sign techniques. Temperature-compensated zener diodes
are normally used for the reference. However, these have
breakdown voltages between 7V and 9V which puts a lower VBE = Vg „(,-^) + V BE „(I)
<T j
limit on the input voltage to the regulator. For low voltage
operation, a different kind of reference

The reference in the LM109 does

is needed.
not use a zener diode.
+ —
iog e —T + —
log e —

Instead, it is developed from the highly-predictable emitter- where Vg o is the extrapolated energy-band-gap voltage for
base voltage of the transistors. In its simplest form, the ref- the semiconductor material at absolute zero, q is the charge
erence developed is equal to the energy-band-gap voltage of an electron, n is a constant which depends on how the
of the semiconductor material. For silicon, this is 1.205V, so transistor is made (approximately 1.5 for double-diffused,
the reference need not impose minimum input voltage limi- NPN transistors), k is Boltzmann's constant, T is absolute
tations on the regulator. An added advantage of this refer- temperature, Irj is collector current and Vbeo is the emitter-
ence is that the output voltage is well determined in a pro- base voltage at Tq and Ico-
duction environment so that individual adjustment of the The emitter-base voltage differential between two transis-
regulators is frequently unnecessary. tors operated at different current densities is given by 3
A simplified version of this reference is shown in Figure 1.
In this circuit, Q-\ is operated at a relatively high current AVbe log e 7- (2)
q J2

where J is current density.

Referring to Equation (1 ), the last two terms are quite small

and are made even smaller by making lc vary as absolute

aV bi
temperature. At any rate, they can be ignored for now be-
Vref = V B E* r§
cause they are of the same order as errors caused by non-
theoretical behavior of the transistors that must be deter-
mined empirically.
If the reference is composed of Vbe plus a voltage propor-
tional to AVbe. the output voltage is obtained by adding (1)
in its simplified form to (2):

Vref V90 (
1 - i) +V BEo( ?5:)+ ? !
£ (3)
To/ J2

Differentiating with respect to temperature yields

_>k + Vbeo
3T To To q J2
Figure 1. The low voltage reference in one of its simpler
For zero temperature drift, this quantity should equal zero,
density. The current density of Q2 is

and the emitter-base voltage differential (AVbe) between

about ten times lower,
Vag o = Vbeo + —
'og e


the two devices appears across R3. If the transistors have

high current gains, the voltage across R2 will also be pro-
The first term on the right is the initial emitter-base voltage
while the second the component proportional to emitter-
portional to AVbe- Q3 is a gain stage that will regulate the
output at a voltage equal to its emitter base voltage plus the
base voltage differential. Hence, if the sum of the two are
equal to the energy-band-gap voltage of the semiconductor,
drop across R2. The emitter base voltage of Q3 has a nega-
tive temperature coefficient while the AVbe component
the reference will be temperature-compensated.

A simplified schematic for a 5V regulator is given in Figure 2. Q5, so that the AVbe component is not affected by changes
The circuitry produces an output voltage that is approxi- in the regular output voltage or the absolute value of com-

mately four times the basic reference voltage. The emitter- ponents.
base voltage of Q3, Q4, Q5 and Qs provide the negative- The voltage is provided by Q10,
gain for the regulating loop
temperature-coefficient component of the output voltage. with Qg buffering and Q-n its output. The emitter
its input
The voltage dropped across R 3 provides the positive-tem- base voltage of Qg and Q10 is added to that of Q12 and Q13
perature-coefficient component. Qq
operated at a consid-
and the drop across Rs to give a temperature-compensat-
erably higher current density than 07, producing a voltage An
ed, 5V output. emitter-base-junction capacitor, C-\, fre-
drop across R4 that is proportional to the emitter-base volt- quency compensates the circuit so that it is stable even
age differential of the two transistors. Assuming large cur- without a bypass capacitor on the output.
rent gain in the transistors, the voltage drop across R3 will
The active collector load for the error amplifier is Q17. It is a
be proportionalto this differential, so a temperature-com-
multiple-collector lateral PNP 4 The output current is essen-

pensated-output voltage can be obtained.

equal to the collector current of Q2, with current being

supplied to the zener diode controlling the thermal shut-

down, D2, by an auxiliary collector. Q1 is a collector FET 4
that,along with R1, insures starting of the regulator under
worst-case conditions.
The output current of the regulator is limited when the volt-
age across R14 becomes large enough
on Q14. This
to turn
insures that the output current cannot get high enough to
cause the pass transistor to go into secondary breakdown
or damage the aluminum conductors on the chip. Further,
when the voltage across the pass transistor exceeds 7V,
current through R15 and D3 reduces the limiting current,

Figure 2. Schematic showing essential details of the 5V

In this circuit, Qg
is the gain stage providing regulation. Its

effective gain increased by using a vertical PNP, Qg, as a


buffer driving the active collector load represented by the

current source. Qg drives a modified Darlington output stage
(Q1 and Q2) which acts as the series pass element. With
this circuit, the minimum input voltage is not limited by the
voltage needed to supply the reference. Instead, it is deter-
mined by the output voltage and the saturation voltage of
the Darlington output stage.
Figure 3 shows a complete schematic of the LM109, 5V
regulator. The AVbe component of the output voltage is de-
veloped across Rs by the collector current of Q7. The emit-
ter-base voltage differential is produced by operating Q4
and Q5 at high current densities while operating Qq and Q7
at much lower current levels. The extra transistors improve
TL/H/6931 -3
tolerances by making the emitter-base voltage differential
Figure 3. Detailed schematic of the regulator.
larger. R3 serves to compensate the transconductance 4 of

again to minimize the chance of secondary breakdown. The ground when there is a large capacitor on the output. Fur-
performance of this protection circuitry is illustrated in Fig- ther, if the input voltage tries to reverse, D1 will clamp this
ure 4. for currents up to 1 A.

The frequency compensation of the regulator per-

mits it operate with or without a bypass capacitor on the
output. However, an output capacitor does improve the tran-
sient response and reduce the high frequency output imped-
ance. A plot of the output impedance in Figure 5 shows that
it remains low out to 1 kHz even without a capacitor. The
ripple rejection also remains high out to 10 kHz, as shown in
Figure 6. The irregularities in this curve around 1 00 Hz are
caused by thermal feedback from the pass transistor to the
reference circuitry. Although an output capacitor is not re-
quired, it is necessary to bypass the input of the regulator
with at least a 0.22 ju,F capacitor to prevent oscillations un-
der all conditions.

10 15 20 25 30 35


= V IN = 10V =
-T» = 25° C-
Figure 4. Current-limiting characteristics. 8 10

Even though the current is limited, excessive dissipation can

cause the chip to overheat. In fact, the dominant failure I, =20 mA
mechanism of solid state regulators is excessive heating of
the semiconductors, particularly the pass transistor. Ther- II L = 500mA
mal protection attacks the problem directly by putting a tem-
10" 3 |

perature regulator on the IC chip. Normally, this regulator is

10 100 Ik 10k 100k 1M
biased below its does not affect
activation threshold; so it

circuit operation. However, if the chip approaches its maxi-
mum operating temperature, for any reason, the tempera- TL/H/6931-5

ture regulator turns on and reduces internal dissipation to Figure 5. Plot of output impedance as a function of fre-

prevent any further increase in chip temperature. quency.

The thermal protection circuitry develops its reference volt-

age with a conventional zener diode, D2. Q16 is a buffer that
feeds a voltage divider, delivering about 300 mV to the base T, = -55°C
of Q15 at 175°C. The emitter-base voltage, Q15, is the actual l, = 2 i°c\
temperature sensor because, with a constant voltage ap-
T| = 150°C
plied across the junction, the collector current rises rapidly
with increasing temperature.

Although some form of thermal protection can be incorpo- . Ii =20

rated a discrete regulator, IC's have a distinct advantage:
in V|N = 1 OV
the temperature sensing device detects increases in junc- AV |N = 3V„
tion temperature within milliseconds. Schemes that sense
10 100 Ik 10k 100k 1M
case or heat-sink temperature take several seconds, or
longer. With the longer response times, the pass transistor
usually blows out before thermal limiting comes into effect.
Figure 6. Ripple rejection of the regulator.
Another protective feature of the regulator is the crowbar
clamp on the output. If the output voltage tries to rise for Figure 7 is a photomicrograph of the regulator chip. It can
some reason, D4 will break down and limit the voltage to a be seen that the pass transistors, which must handle more
safe value. If this rise is caused by failure of the pass tran- than 1 A, occupy most of the chip area. The output transistor
sistor such that the current is not limited, the aluminum con- is actually broken into segments. Uniform current distribu-
ductors on the chip will fuse, disconnecting the load. Al- tion is insured by also breaking the current limit resistor into
though this destroys the regulator, it does protect the load
from damage. The regulator is also designed so that it is not
damaged in the event the unregulated input is shorted to

segments and using them to equalize the currents. The over- output voltages. One circuit for doing this is shown in

all electrical performance of this IC is summarized in Table I. Figure 9.

ifciniiT . 1
I R1
3 > 300
> 1%
0.22 mF~ < R2
S 1%

Figure 9. Using the LM109 as an adjustable-output regu-

The is impressed across R-), devel-

regulated output voltage
oping a reference current. The quiescent current of the reg-
ulator, coming out of the ground terminal, is added to this.
These combined currents produce a voltage drop across R2
TL/H/6931-7 which raises the output voltage. Hence, any voltage above
Figure 7. Photomicrograph of the regulator shows that 5V can be obtained as long as the voltage across the inte-
high current pass transistor (right) takes more grated circuit is kept within ratings.
area than control circuitry (left). The LM1 09 was designed so that its quiescent current is not
greatly affected by variations in input voltage, load or tem-
TABLE Typical Characteristics of the
perature. However, completely insensitive, as
is not
Logic-Card Regulator: TA = 25°C

shown in Figures 10 and so the changes do affect regu-

/ /,

Parameter Conditions Typ lation somewhat. This tendency is minimized by making the
reference current though R1 larger than the quiescent cur-
Output Voltage 5.0V rent. Even so, it is difficult to get the regulation tighter than a

Output Current 1.5A couple percent.

Output Resistance 0.03H 1 1

= 200 mA
Line Regulation 7.0V <; V| N <: 35V 0.005 %/V

Temperature Drift -55°C^TA ^ 125°C 0.02%/°C

v 25°
Minimum Input Voltage 'OUT = 1A 6.5V "Tl = -55°C

Output Noise Voltage 10Hz^f <i 100 kHz 40jliV

Thermal Resistance LM109H(TO-5) 15°C/W
Junction to Case LM109K(TO-3) 3°C/W T| = 15 0°C

5 10 15 20 25
Because it was designed for virtually foolproof operation
and because it has a singular purpose, the LM109 does not INPUT VOLTAGE (V)

require a lot of application information, as do most other TL/H/6931-10

linear circuits. Only one precaution must be observed: it is Figure 10. Variation of quiescent current with input volt-
necessary to bypass the unregulated supply with a 0.22 ju,F age at various temperatures.
capacitor, as shown in Figure 8, to prevent oscillations that

v N=1 ov


0.22 mF'
* ^ *H =
s "

i = 1 A^

Figure 8. Fixed 5V regulator.

can cause erratic operation. This, of course, is only neces-

sary if the regulator located on appreciable distance from
is -75-50-25 25 50 75 100 125 150
the filter capacitors on the output of the dc supply.
Although the LM109 is designed as a fixed 5V regulator, it is
also possible to use it as an adjustable regulator for higher
Figure 11. Variation of quiescent current with tempera-
ture for various load currents.

The LM109 can also be used as a current regulator as is by the reference zener, D-i Noise can be reduced by insert-

shown in Figure 12. The regulated output voltage is im- ing 100 kft, 1 %
resistors in series with both inputs of the op
pressed across R-i, which determines the output current. amp and bypassing the non-inverting input to ground. A
The quiescent current is added to the current through R-j, 1 00 pF capacitor should also be included between the out-

and this puts a lower limit of about 10 mA on the available put and the inverting input to prevent frequency instability.
output current. Temperature drift can be reduced by adjusting R4, which
determines the zener current, for minimum drift. For best

performance, remote sensing directly to the load terminals,
as shown in the diagram, should be used.

The LM109 performs a complete regulation function on a
single silicon chip, no external components. It
makes use of some unique advantages of monolithic con-
Figure 12. Current regulator.
struction to achieve performance advantages that cannot

The increased failure resistance brought about by thermal

be obtained in discrete-component circuits. Further, the low
cost of the device suggests its use in applications where
overload protection make the LM109 attractive as the pass
single-point regulation could not be justified previously.
transistor in other regulator circuits. A precision regulator
that employs the IC thusly is shown in Figure 13. An opera- Thermal overload protection significantly improves the reli-
tional amplifier compares the output voltage with the output ability of an IC regulator. It even protects the regulator for

voltage of a reference zener. The op amp controls the unforseen fault conditions that may occur in field operation.
LM109 by driving the ground terminal through an FET. Although this can be accomplished easily in a monolithic
regulator, it is usually not completely effective in a discrete
or hybrid device.

The internal reference developed for the LM109 also ad-

vances the state of the art for regulators. Not only does it
provide a low voltage, temperature-compensated reference
for the first time, but also it can be expected to have better
long term stability than conventional zeners. Noise is inher-
X>-vn„T=iov ently much lower, and it can be manufactured to tighter tol-

1. R.J. Widlar, "Designing Positive Voltage Regulators,"
EEE, Vol. 17, No. 6, pp. 90-97, June 1969.
2. J.S. Brugler, "Silicon Transistor Biasing for Linear Collec-
tor CurrentTemperature Dependence, " IEEE Journal of
Solid State Circuits, pp. 57-58, June, 1967.
3. R.J. Widlar, "Some Circuit Design Techniques for Linear
Integrated Circuits," IEEE Trans, on Circuit Theory, Vol.
XII, pp. 586-590, December, 1965.

'Solid tantalum
4. "Design of Monolithic Linear Circuits, " Hand-
R.J. Widlar,
book of Semiconductor Electronics, Chapter X, pp.
10.1-10.32, L.P. Hunter, ed., McGraw-Hill Inc., New
Figure 13. High stability regulator.
York, 1970.
The load and line regulation of this circuit is better than
0.001%. Noise, drift and long term stability are determined

National Semiconductor
The Phase Locked Loop IC Application Note 46
as a Communication Thomas B. Mills

System Building Block

The phase locked loop has been found to be a useful ele- It can be seen that the action of the VCO is that of an
ment in many types of communication systems. It is used in integrator in the feedback loop when the phase locked loop

two fundamentally different ways: (1) as a demodulator, is considered in servo theory.

where it is used to follow phase or frequency modulation A better understanding of the operation of the loop may be
and (2) to track a carrier or synchronizing signal which may obtained by considering that initially, the loop is not in lock,
vary in frequency with time. but that the frequency of the input signal ej and VCO e are
When operating as a demodulator, the phase locked loop very close in frequency. Under these conditions &a will be a

may be thought as a matched filter operating as a coher-

of beat note, the frequency of which is equal to the frequency
ent detector. When used to track a carrier, it may be thought difference of e and 6j. This signal is also applied to the
of as a narrow-band filter for removing noise from a signal. VCO input, since it is low enough to pass through the filter.

Recently, a phase locked loop has been on a monolith- built

The instantaneous frequency of the VCO is therefore
ic integrated circuit, incorporating the basic elements neces-
changing and at some point in time, if the VCO frequency
sary for operation: a double balanced phase detector and a equals the input frequency, lock will result. At this instant, ef
highly linear voltage controlled oscillator, the frequency of will assume a level sufficient to hold the VCO frequency in
which can be varied with either a resistor or capacitor. lock with the input frequency. If the tuning of the VCO is

changed (such as by varying the value of the tuning capaci-

BASIC PHASE LOCK LOOP OPERATION tor)the frequency output of the VCO will attempt to change;
Figure 1 shows the basic blocks of a phase locked loop. however, this will result in an instantaneous change in
The input signal ej is a sinusoid of arbitrary frequency, while phase angle between ej and e resulting in a change in the

the VCO output signal, e is a sinsuoid of the same fre-

, dc level of e^ which will act to maintain frequency lock: no
quency as the input but of arbitrary phase. If average frequency change will result.
= V§E|8in[« t + «i(t)]
ei (1) Similarly, if ejchanges frequency, an instantaneous change
e = ^Eo cos [o) t + 2 (t)] (2)
will result in a phase change between e, and e and hence a
dc level change in e^. This level shift will change the fre-
the output of the multiplier (phase detector) is
quency of the VCO to maintain lock.
ed = ej • e
The amount of phase error resulting from a given frequency
= 2EjE sin [w t + 6^(\)\ • cos [w t + 6 2 (t)] shiftcan be found by knowing the "dc" loop gain of the
= EjE sin [0i(t) - 2 (t)] + E|E sin [2 a> t + fl^t) + system. Considering the phase detector to have a transfer
2 (t)] (3) function:

the low pass filterremoves the ac components

of the loop Ed-Kp^ -B 2 )

of the multiplier output; the dc term is seen to be a function and the voltage controlled oscillator to have a transfer func-
of the phase angle between the VCO and the input signal. tion:

e2 = K ef (6)
e «f
or taking the Laplace transform

2 (s)
= K e f
the phase of the
gral of the control voltage.
VCO output will be proportional to the inte

TL/H/7363-1 Combining these equations:

FIGURE 1. Basic Phase Locked Loop
K Kd
2 (8) _ F(s)
The output of the VCO is related to its input control voltage
^(s) s + K K D F(s) (8)

= K ef (4) 01 (s) - 2 (s) s
2 (t)
for ef = 0, Let 2 = ad, then 01 (s) s + K KD F(s)

e 2 (t) = S e f (t) dt (5)

Application of the final value theorem of Laplace transforms data modulation must be followed. The transfer function of
yields the filter is simply:

m m S2 1(S ) 6f 1

i «i(s)-Ms) = (10)

oo i (13)
t s s + K KD F(s) ed 1 + sRi Ci
With a step change in phase of the input A0-|, the Laplace substitution into (8) results in
transform of the input is
«2(s) K K D /ri
A01 (14)
01 (s) which gives = - 02(s) 01 (s) s2 + s/t 1 + «oK d /ti
e (s) 0i(s)
ti = Ri Ci
lim lim sA0
= (11) In terms of servo theory, the damping factor and natural
o s + K KD F(s) frequencies are
the loop will eventually track out any change of input phase,
and there will be no phase error in the steady state solution.
_ [K K D ]l/2
If the input a step in frequency, of magnitude Aw, the

change in input phase will be a ramp:

01 (s) = Aco/s2 2l(RiCiK K D)J
substitution of this value 0, into (10) results in R1

lim lim Ao Act) DETECTOR
9 ,
)= (12)
°s + K KD F(s) K KD F(o)

this result shows the resulting

the magnitude of the frequency step and the "dc" loop gain

K Kd, which is also called the velocity error coefficient Kv It

error is dependent on

. T-, = R1C1

should be noted that the dimensions of K Kq are 1/sec.

This can also be seen by considering Kq = volts/radian,
while K = radians/sec/volt. The product is

volts radians/sec 1

radian volt sec BODE PLOT

this can be thought of as the "dc" loop gain. (Note that

additional dc gain between the phase detector and the volt-
6 dB/OCT
age controlled oscillator will increase the loop gain and
hence reduce the steady state phase error resulting from a
-12 dB/OCT
change in frequency of the input).


In working with phase locked loops, it is necessary to con-
sider not only the "dc" performance described above, but
the "ac" or transient performance which is governed by the
components of the loop filter placed between the phase
FIGURE 2. Phase Locked Loop with Simple Filter
detector and the voltage controlled oscillator. In fact, it is

this loop filter that makes the phase locked loop so power- From thiscan be seen that large time constants for Ri Ci

only a resistor and capacitor are all that is needed to

or high loop gain will reduce the damping factor and hence

produce an arbitrarily narrow bandwidth at any selected decrease stability. Therefore, if a narrow bandwidth is de-
center frequency. sired, the damping factor will become very small and insta-
bility will result. It is not possible to adjust bandwidth, loop
The simplest filter is a single capacitor, Figure 2, and is used
gain, and damping independently with this simple filter.
for wide bandwith applications, such as where wideband


With the addition of a damping resistor R2 as shown in Fig- 10*

ure 3, it is possible to choose bandwidth, damping factor

and loop gain independently; the transfer function of this
filter is
Jf /RAD\
6d 1 + ST 2 10
5? ASEcV
(17) <l
1 + ST-\
the loop transfer function becomes: '

g 2 (s) _ 1
in3 *

Z (S)
K K d (st 2 + 1)(t 1 + r 2) o
2 -
(18) 1
S2 + S(1 + KoKd T 2)/T<l + KoKp/Ti 10
10- 4 10"3 10-
10° 1 10
the loop natural frequency is

ti + T2 (sec)

(19) TL/H/7363-I
FIGURE 4. Filter Time Constant vs Natural Frequency
while the damping factor
ictor becomes
1 V2 10*
[l +r 2 K KD (20)
4[;Lt! K KD ] ] "DAMPING
s (21) \LIIIH
2 103


T 10- 4 3
tir 10-3 10- 1
t, = R1C1 t2 = R2C1 TL/H/7363-4

FIGURE 5. Damping Time Constant vs

Natural Frequency

Considering the above discussion, there are really two pri-

mary considerations in designing a phase locked loop. The

use to which the loop is to be put will affect the design
criterion of the loop components. The two primary factors to
consider are:
-12 XdB/OCf^
Loop gain. As pointed out previously, this affects the
dB/0CTi\ \ 1

phase error between the input signal and the voltage con-
trolled oscillator for a given frequency shift of the input
signal. It also determines the "hold in range" of the loop
TL/H/7363-5 providing no components of the loop go into limiting or
saturation. This is because the loop will remain in lock as
FIGURE 3. Phase Locked Loop with
Damping Resistor Added long as the phase difference between the input and the
VCO is less than ±90°. The higher the loop gain, the
In practice, for a fixed loop gain K Kd, the natural frequency
further the input can change in frequency before the 90°
of the loop may be chosen and will be dependent mainly on
phase error is reached. The hold in range is
r-i,since 7- 2 < t-\ in most cases. Then, according to (21),
damping may be determined by r 2 and for all practical pur- Aw H = ±K K D (22)

poses, will be an independent adjustment. These equations (providing saturation or limiting does not occur).
are plotted in Figures 4 and 5 and may be used for design 2. Natural Frequency. The bandwidth of the loop is deter-
purposes. mined by the filter components R-|, R 2 and C1, and the
loop gain. Since the loop gain is normally selected by the
criterion in 1.above, the filter components are used to
select the bandwidth. The selection of loop bandwidth
may be governed by several things: noise bandwidth,
modulation rates if the loop is to be used as an FM de-


modulator, pull-in time and hold-in range. There are two

conflicting requirements that will have an affect on loop
0.7 |

bandwidth: ~y»-{ = 0.3

(a) Loop bandwidth must be as narrow as possible to Oi-t = 0-5