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Operational Amplifiers

EE 410 Final Design Project

Pennsylvania State Department of Electrical Engineering

University Park, PA, USA

using .6-µm technology. The first is a stable one stage operational

A. Design of Single Stage Amplifier

amplifier that uses a triode MOSFETs to sense common mode The design of this operational amplifier required a folded

feedback. This amplifier retains a constant gain with varying input, because an input common mode DC requirement of 4V.

temperatures. The second operational amplifier is two-stage single A telescopic operational amplifier was used to achieve a gain

ended differential amplifier. This amplifier has power constraints greater than 60 decibels. Cascading the output increases output

and requires a high output swing. Both these amplifiers are resistance, which increases the gain. To further increase the

created through MOSFETs, while using .6-µm technology through

output resistance the lengths of P2, P3, N1, and N3 were

cadence.

increases. Changing the length effects the early voltage, which

Index Terms—Amplifier, Common Mode Feedback, MOSFET, also increases output resistance. The width to length ratio were

Stability, Compensation, and Two Stage. assigned through overdrive voltages and total current of 5mA.

The width to length ratios and final design of circuit can be seen

in Figure 1.

I. INTRODUCTION

MOSFET technology is the most common type of integrated

circuitry used today. It allows the reduction of power

consumption while maintaining a very high input impedance.

MOSFET technology is useful in the modern industry, because

of the feasibility of the fabrication. To continue, MOSFETs are

common to operational amplifiers. Thus, this paper will discuss

to designs for operational amplifiers that multiple specifications

such as temperature constraints, phase margin, gain, static

power consumption, and output swing.

The remainder of the paper will break into three sections.

Section II will discuss the design of the common mode

feedback (CMFB) single stage operational amplifier. Section

III will discuss a design of a two stage operational amplifier and

Fig. 1. Schematic of CMFB Operation Amplifier

its distinct specifications. Section IV will discuss the

implications and pitfalls of both designs. The biasing voltages are assigned through voltage drops

II. ONE STAGE CMFB OPERATIONAL AMPLIFIER across the resistors. These voltages were also decided through

overdrive voltages of the transistors, which were assigned by a

The specifications of this operational amplifier are observed randomly assigned output swing.

in Table 1. In order to meeting these specifications, a NMOS Finally, the CMFB of this amplifier is connected to two

folded telescopic differential amplifier with a CMFB was triode sensing MOSFETs. By adjusting the width to length

designed. ratios of these MOSFETs, the DC output voltage can be set

and remain at 2V. Even though these triode MOSFETs (N4

TABLE I. ONE STAGE CMFB OPERATIONAL AMPLIFIER REQUIREMENTS

and N5) are temperature dependent, to produce only 60

Specifications Parameters decibels as a gain allows it to operate sufficiently within

Supply Voltage (VDD) 4V varying temperatures.

Differential Gain (AD) > 60 dB The phase margin of this circuit is increased by adding a

Temperature Range (ºC) 0 ºC - 80 ºC 30 pF capacitor to the differential output. The next subsection

Phase Margin (Degrees) >60 Degrees will show the results of the design in Figure 1.

Input Common-Mode (DC) 4V

B. Results of Single Stage Amplifier

Below are graphs that display the results of the CMFB amplifier

design.

Fig. 2. Gain of CMFB Operation Amplifier III. TWO STAGE OPERATIONAL AMPLIFIER

The specifications for the two stage operational amplifier are

Figure 2 shows the achieved gain of 61.5114 decibels as seen in Table 2. To meet the required specifications a two stage

well the unity gain frequency of 6.2382MHz. Below, Figure 3 operational amplifier will be designed within the power

displays an achieved phase margin of 64.89477 degrees. The constraints.

specifications for the phase margin and gain.

TABLE II. TWO STAGE OPERATIONAL AMPLIFIER REQUIREMENTS

Specifications Parameters

Supply Voltage (VDD) 4V

Differential Gain (AD) > 60 dB

Power Consumption (PD) < 2mW

Phase Margin (Degrees) >60 Degrees

Loading (CL||RL) 1pF || 50kΩ

Slew Rate (SR) 100V/µs

Output Swing (Vp-p) 3.6V

this operational amplifier will require a different topology. For

example, the gain of this amplifier will need to be greater than

100 decibels. To continue, a high output swing is also specified,

so multiple telescopic transistors will reduce the swing. Thus,

Fig. 3. Phase Margin of CMFB Operation Amplifier two stages will be needed to achieve a high gain as well as a high

output swing. The width to length ratios have increased lengths

An AC analysis was completed to derive the gain verse the (proportional to the widths) to again create a high output

temperature range of 0 ºC - 80 ºC. As observed from Figure 5, resistance for the gain. An overdrive of .1 V was used on P5 and

the temperature remains either within 3 decibels to 60 decibels N10 to achieve a high output swing. These specification of width

or constantly increases as the temperature increases. to length ratios can be seen in Figure 5.

Nevertheless, the requirement of maintain a gain above 60 Furthermore, the maximum total current within this circuit is

decibels is met. .5mA due to total static power constraints of 2mW. This small

current can affect the slew rate. To increase the current on the

second stage output, a multiplier on N10 creates a current six

times larger than the current mirror at N9. A multiplier on N5 Below, Figure 7 displays the phase margin. As observed

creates a current three times larger than the current mirror. from the graph the phase margin at unity gain is 78.89 degrees.

Finally, in order to increase the phase margin of this two Another observation from Figure 7 is that a zero can be seen as

stage amplifier, a compensation capacitor is put in series with the phase margin slightly increases around 1MHz.

resistor from the drain of P5 to the gate of P5. The capacitor

pushes the pole from the first stage lower, while pushing the

output pole from the second stage higher. The resistor creates a

left-half-plane zero which can also increase the phase margin by

reducing the effects of the mirror, stage one, or output pole.

symmetric. Two figures are taken to represent the high point of

the swing and low point of the swing. Figure 8, displays the

highest swing that can be achieved, which is 3.927 V. This

measure was taken at the highest peak of the sinusoid wave

without clipping.

Figure 5. Figure 6 represents the gain, bandwidth, and the unity

gain frequency. The gain acquired is 101.6359, the bandwidth is

98.85 Hz, and the unity gain frequency is 4.38798MHz.

without clipping. This low peak value is 20.95 mV. Thus the

peak to peak swing is 3.91, which fulfills the swing requirement.

Figure 10 displays the current in all of the branches of the

two stage single ended amplifier design. From these current

values the slew rate of the amplifier can be derived as well as the

power used within the circuit. The total current used within this

circuit was .372mA. Therefore, the total static power consumed

is 1.49mW.

Next, the slew rate of this design is derived from the total

current at the output of stage two divided by the total capacitance

at the same output. The total current is 290.39µA, and total

capacitance is 4pF (load capacitance and compensation

capacitance). Thereby, the slew rate is 72.6V/µs. This is the

requirement that falls short of the desired specifications.

Over all, this design meets all specifications but the slew rate.

Fig. 9. Lowest Swing of Two Stage Operational Amplifier

The advantages of this type of circuit is the gain, swing, power

consumption, and high phase margin. The disadvantages of this

circuit is the low input common mode range (ICMR). This

circuit operates with a .7 V input voltage, and has very little

range to operate with another input voltage.

IV. CONCLUSION AND DISCUSSION

The objective of this document is to design two stable

operational amplifiers that deliver to the given specifications.

The first design was a one stage CMFB amplifier that met all of

its requirements all the while using a triode sensing circuit. The

second design is a two stage amplifier that has a high gain, phase

margin, and low power consumption. This design meets all

requirements except the 100 V/µs slew rate. This document

delivers and gives two potential designs that match the

Fig. 10. Currents of Components in the Two Stage Operational Amplifier specifications.

REFERENCES

[1] Ele Razavi, Behzad. Design of Analog CMOS Integrated

Circuits. New York: McGraw Hill Education, 2017. Print.

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