9.1.
2 Operation with a Differential Input Voltage
Next we apply a difference or differential input voltage by grounding the gate ofQ2
(i.e., setting
vG2
=0) and applying a signal vid to the gate of Q1, as shown in Fig. 9.4. We can see
that since
vid
= vGS1 � vGS2, if vid is positive, vGS1 will be greater than vGS2 and hence iD1
will be greater
than iD2 and the difference output voltage (vD2 � vD1) will be positive. On the
other hand, when
vid is negative, vGS1 will be lower than vGS2, iD1 will be smaller than iD2, and
correspondingly
vD1 will be higher than vD2; in other words, the difference or differential output
voltage
(vD2 � vD1) will be negative.
From the above, we see that the differential pair responds to differencemode or
differential input signals by providing a corresponding differential output signal
between
the two drains. At this point, it is useful to inquire about the value of vid that
causes the entire
bias current I to flow in one of the two transistors. In the positive direction,
this happens when
vGS1 reaches the value that corresponds to iD1
= I, and vGS2 is reduced to a value equal to the
threshold voltage Vt , at which point vS
=Vt . The value of vGS1 can be found from
I = 1
2
#
k#
n
W
L
#
(vGS1
Vt)
2
VSS
VDD
vD1 vD2
vGS1 vGS2
vS
RD RD
I
Q1 Q2
vid
iD1 iD2
Figure 9.4 The MOS differential pair
with a differential input signal vid
applied. With vid positive: vGS1 > vGS2,
iD1 > iD2, and vD1 < vD2; thus (vD2 � vD1)
will be positive. With vid negative: vGS1
< vGS2, iD1 < iD2, and vD1 > vD2; thus
(vD2 � vD1) will be negative.
602 Chapter 9 Differential and Multistage Amplifiers
as
vGS1
= Vt
+
#
2I/k#
n (W/L)
= Vt
+
v
2VOV (9.9)
where VOV is the overdrive voltage corresponding to a drain current of I/2 (Eq.
9.5). Thus, the
value of vid at which the entire bias current I is steered into Q1 is
vidmax
= vGS1
+vS
= Vt
+
v
2VOV
Vt
=
v
2VOV (9.10)
If vid is increased beyond
v
2VOV , iD1 remains equal to I, vGS1 remains equal to (Vt
+
v
2VOV ),
and vS rises correspondingly, thus keeping Q2 off. In a similar manner we can show
that in
the negative direction, as vid reaches 
v
2VOV , Q1 turns off and Q2 conducts the entire bias
current I. Thus the current I can be steered from one transistor to the other by
varying vid in
the range

v
2VOV
= vid
=
v
2VOV
which defines the range of differentialmode operation. Finally, observe that we
have assumed
that Q1 and Q2 remain in saturation even when one of them is conducting the entire
current I.
EXERCISE
9.2 For the MOS differential pair specified in Example 9.1 find (a) the value of
vid that causes Q1 to conduct
the entire current I, and the corresponding values of vD1 and vD2; (b) the value of
vid that causes Q2 to
conduct the entire current I, and the corresponding values of vD1 and vD2; (c) the
corresponding range
of the differential output voltage (vD2 � vD1).
Ans. (a) +0.45 V, 0.5 V, 1.5 V; (b) �0.45 V, 1.5 V, 0.5 V; (c) +1 V to �1 V
To use the differential pair as a linear amplifier, we keep the differential input
signal vid
small. As a result, the current in one of the transistors (Q1 when vid is positive)
will increase
by an increment #I proportional to vid, to (I/2+#I). Simultaneously, the current in
the other
transistor will decrease by the same amount to become (I/2 � #I). A voltage signal
�#IRD
develops at one of the drains and an oppositepolarity signal,#IRD, develops at the
other drain.
Thus the output voltage taken between the two drains will be 2#I RD, which is
proportional
to the differential input signal vid . The smallsignal operation of the
differential pair will be
studied in detail in Section 9.1.4.
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