1.5 caning aitecrs for SOR » Devces like the Plato SDR shows in Figure 1.8 integrate the fll RF, analog, and digital signal chain onto a single CMOS device and include dig procesing to run euadature and cari leaks carecton in realtime aos all process frequen, and temperature variauens. Devices like the AD9361 focuses on ‘medium performance specications and very low power, such as UAV data links, hhanchel! communication systems, and spall form factor SDR applications. The ‘AD9371 is optimized for high-perormunce specifications and medum power, ‘AdGivoally, this device has rfid ealiteation control, aswell nam obvrvaion ‘receives for power amplifier (PA) lnca-zation and asnifcr eceiver fe whitespace colette iba forlinea alge, signal processing, and imapeand ideo ‘Processing ly the foundation for frure software defined radio applications fran on these types of archzetus [7 + Advanced RISC Machines (SBM) have recived sigaicant stention in fecentyeats fo thee low cost, small size, low power consumption, and ‘computational capabilites. Such processors combined with a capable RFFE tmake them sable platforms for mobile communications ad computing, ‘Alditions of new SIMD instruct ons for the Arm Cores svies and Cotes [SZ processors, Known an NECN [8] are accelerate signal processing slgorithms and Functions ro spe=d ap sofowaredefned radio applications isan exciting time for algorithm dewdopers there are many new and advanced methods of implementing signal processing applications on hardware. The dificuty is to emure that no matter which adware is chosen to run algorithms on, the hardware and development methodelo sy wil be supported in $ years. 1.6 Software Environments for SDR [As described in Section 1.2, a their mort fundamental evel, most commercially available SDR platforms convert ive RF sal 0 saples at digital baseband and ‘se woltware defined mechanism for modulation and demodulation echnigs (0 transferealword data, Referring back 9 Figure 1.3, the boundary berween the Analog and digital works fora commaniation sytem is located athe analog Aigtal onverter [ADC) and the dgital-o-analog converter (DAC), where signal information is translated berween a cont.nuous signal and a discret tof signal sample ‘ales, Typically, the radio ex be configured to select centr Frequency, Sampling rate, bandwidth, and odher parameters to tansmit and rie signals of inert. This leaves the modulation and demodulation techniques, which are Seveloped using two-step development 30s 1. Develop, rune, nd optimize the nodulation and demodulation algithms fora specific ample rate, bencwdeh, and environment. This is normally «one on a host PC, where debugging aod visualization i much easier, At ‘his phase of developmen, de rralation and demodulation ofthe RFFES sae performed on a host, providing great llebily to experiment and est lgorthm ideas