BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI –K. K.

BIRLA GOA CAMPUS

INSTRUCTION DIVISION
FIRST SEMESTER 2018-2019
C OURSE H ANDOUT (PART II)

August 02, 2018

In addition to part-I (General Handout for all courses appended to the time-table), this portion gives further specific
details regarding the course.

Course No. : EEE F313/INSTR F313

Course Title : Analog & Digital VLSI Design
Instructor-in-charge : PRAVIN MANE (pravinmane@goa.bits-pilani.ac.in)
Team of Instructors : Darshak Bhatt

1 Scope and Objective of the Course:

The objective of this course is to provide to the students an introduction to the fundamentals and practical considerations
pertaining to the design of integrated circuits.The scope encompasses both analog and digital integrated circuits. The
importance of CAD tools in IC system design process is also acknowledged and stressed upon.

2 Text Books:

1. Rabaey J. M., Chandrakasan Anantha, Nikolic Borivoje, “Digital Integrated Circuits : A Design Perspective”, PHI
Learning Private Limited, 2nd Edition.

3 Prime Reference Book:

1. Behzad Razavi,“Design of Analog CMOS Integrated Circuits ”, TATA McGRAW Hill, 2001.

2. Kang S.M. and Leblebici Y., “CMOS Digital Integrated Circuits: Analysis and Design”, McGraw Hill International
Editions 3rd Edition 2003.

4 Other Reference Books:

1. Neil H.E. Weste, Kamran Eshraghian, “Principles of CMOS VLSI Design”, Addison-Wesley Publishing Company.

2. Pucknell D.A., Eshraghian K.,“Basic VLSI design, systems and circuits”, Third edition, Prentice Hall of India Pvt.
Ltd.

3. Fabricius E.D., “Introduction to VLSI design”, McGraw Hill international editions.

4. Gregorian R., Temes G.C.,“Analog Mos integrated circuits for signal processing”, Wiley interscience publication.

5. Sze S.M.,“VLSI Technology”, Second edition, McGraw Hill International Edition.

6. Randall A Geiger, Phillips E. allen, Noel R Strader, “VLSI Design techniques for analog and digital circuits”,
McGraw Hill International Edition 1990.

7. Bhaskhar Jayram, “A VHDL PRIMER”, Prentice Hall.

 8. IEEE Journals of solid state circuits, VLSI system.

9. Martin. Ken, “Digital Integrated Circuit Design”, Oxford University Press, Inc.

10. Johns. David A. and Martin K, “Analog Integrated Circuit Design”, John Wily & Sons Inc. 2002.

5 Course Plan:

Sr. Topic Learning Objective No.of Lec-

No. tures
1. Introduction to VLSI Design Methodo- Introduction to the semiconductor industry 2
gies
2. Scaling Technology Generation transition and its effects on 2
performance
3. CMOS Technology, Design Rules, Introduction to layouts and industry design flow for 3
MOS Capacitances analog and digital integrated circuits
4. Advanced Current Sources & sinks; Building temperature independent voltage and cur- 6
Current Reference circuit, Operational rent references, Basic building block for most analog
amplifiers Architectures,feedback subsystems
5. Noise Quantification of various types of noise in analog cir- 8
cuits
6. MOS inverter- Static and switching Basic building block for most digital sub-systems 4
characteristics,Combinational MOS and Speed of digital systems Study and design of
logic circuits –static logic various CMOS logic gate families
7. Synchronous system and Sequential Synchronous design, timing metrics,Design of flip- 5
circuits design flops
8. Memory Circuits Design Design of SRAM, DRAM, decoders, sense ampli- 5
fiers
9. Design verification & test Verification of functionality,manufacturing defects 4

6 Evaluation Scheme:

EC No. Components Duration Marks Date & Time Remarks

09.10.2018
1 Midterm Test 90 Minutes 60 Closed Book
09.00-10.30 AM
19.09.2018
2 Quiz-I 20 Minutes 10 Closed Book
06.00-06.20 PM
07.11.2018
2 Quiz-II 20 Minutes 10 Open Book
06.00-06.20 PM

3 Assignments 20 Throughout Semester Open Book

4 Comprehensive Examination 3 Hours 100 03.12.2018 (FN) Open/Closed Book

Total 200
7 Assignment/s:

Regular analog/digital design Assignments covering use Cadence tools for Simulation of VLSI Circuits will be given.

8 Chamber Consultation Hour:

To be announced in the class.

9 Make-up Policy:

Make up for any component will be given only in genuine cases. In all cases prior intimation must be given to IC.

10 Notices:

All notices related to the course will be put on moodle page of course. Also students are requested to check their mails
on institute Email ID regularly.

Instruction Incharge
EEE F313/INSTR F313