8:1 MULTIPLEXER USING STRUCTURAL MODEL

2:1 mux :

module mux2(

input i0,

input i1,

input s,

output y

);

assign y=((i0&(~s))||(i1&s));

endmodule

mux2:1 testbench

mux2_testbench

module mux2test(

);

reg r;

reg s;

reg t;

wire x;

mux2 test(r,s,t,x);

initial begin

r=0;

s=1;

t=1;

#100

r=1;
s=0;

t=0;

end

endmodule

4:1 MULTIPLEXER:

module mux4(

input a,

input b,

input c,

input d,

input s0,

input s1,

output y

);

wire e,f,g,h,i,j;

not g1(i,s0);

not g2(j,s1);

and g3(e,i,j,a);

and g4(f,i,s1,b);

and g5(g,j,s0,c);

and g6(h,s0,s1,d);

or g7(y,e,f,g,h);

endmodule
mux 4:1 testbench

module mux4test(

);

reg p;

reg q;

reg r;

reg s;

reg t;

reg u;

wire x;

mux4 test(p,q,r,s,t,u,x);

initial begin

p=1;

q=0;

r=1;

s=1;

t=0;

u=0;

#100

p=1;

q=0;

r=1;

s=1;

t=0;

u=1;
#100

p=1;

q=0;

r=1;

s=1;

t=1;

u=0;

#100

p=1;

q=0;

r=1;

s=1;

t=1;

u=1;

end

endmodule

8:1 MULTIPLEXER

module mux8(

input i0,

input i1,

input i2,

input i3,

input i4,

input i5,

input i6,
 input i7,

input s2,

input s1,

input s0,

output y

);

wire x1;

wire x2;

mux4 test1(i0,i1,i2,i3,s1,s0,x1);

mux4 test2(i4,i5,i6,i7,s1,s0,x2);

mux2 test3(x1,x2,s2,y);

endmodule

TEST BENCH

module mux8test(

);

reg m;

reg n;

reg o;

reg p;

reg q;

reg r;

reg s;

reg t;

reg u;

reg v;
reg w;

wire z;

mux8 test(m,n,o,p,q,r,s,t,u,v,w,z);

initial begin

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=0;

v=0;

w=0;

#100

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=0;
v=0;

w=1;

#100

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=0;

v=1;

w=0;

#100

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=0;

v=1;
w=1;

#100

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=1;

v=0;

w=0;

#100

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=1;

v=0;

w=1;
#100

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=1;

v=1;

w=0;

#100

m=1;

n=0;

o=1;

p=1;

q=0;

r=1;

s=1;

t=0;

u=1;

v=1;

w=1;

end
endmodule