Acer - Travelmate 2423 (Ag1-910) PDF

AG1(Alviso) Block Diagram 2005/11/09
A B C D E
CLK GEN. Mobile CPU G792 Project Code:91.4G301.001

4
Dothan
19
PCB:05223-01 4
IDT CV125
3 4, 5
RGB CRT CPU DC/DC
HOST BUS 400MHz ISL6218CV-T
CONN 14 34
DDR II 400MHz
LCD INPUTS OUTPUTS
400 MHz Intel 910GML
11,12 LVDS XGA VCC_CORE
13 DCBATOUT
0.844~1.3V
DDR II 400MHz
27A
400 MHz 6,7,8,9,10

11,12 SYSTEM DC/DC
DMI I/F 100MHz TPS51120 35
3 3
INPUTS OUTPUTS
Line In27 ACLINK ENE DCBATOUT 3D3V_S5
Codec PCI BUS CB1410 PWR SW 5V_S5
PCMCIA APL5912-LAC
ALC655 CP2211
Int. 26 25 APL5308-25AC 36
24,25
ONE SLOT
MIC In 27 25 INPUTS OUTPUTS
5V_S5 1D5V_S0
3D3V_S0 2D5V_S0
Mini-PCI SYSTEM DC/DC
Line Out OP AMP ICH6-M 802.11A/B/G 28

ISL6227 37
27
G1421B 27 LAN
10/100
INPUTS OUTPUTS
RTL8110CL
TXFM RJ4523 5V_S5
23 DCBATOUT
22, 23 3D3V_S3
2 2
INT.SPKR MODEM TPS51100DGQ 37

27
MDC Card DDR_VREF
5V_S5
21 DDR_VREF_S3
LPC BUS
CHARGER
ISL6255
15,16,17,18 38
Xbus BIOS ROM
PATA
INPUTS OUTPUTS
KBC 4M BITS
ENE KB3910 PM39LV040-70JCE
PCB Layer Stackup USB 29 31 DCBATOUT

BT+
16.8V 3A
4 PORT
L1: Signal 1 HDD CD ROM 21
20 20
L2:VCC <Core Design>
1 1
L3: Signal 2 MINI USB 21 Touch INT_KB Wistron Corporation
L4: Signal 3 Blue-tooth Pad 30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
30
L5: GND Title
L6: Signal 4 BLOCK DIAGRAM

Size Document Number Rev
Custom
AG1(Alviso) 01
Date: Friday, November 11, 2005 Sheet 1 of 40
A B C D E
A B C D E
Alviso Strapping Signals ICH6-M Integrated Pull-up
and Configuration page 7 and Pull-down Resistors ICH6-M EDS 14308 0.8V1
Pin Name Strap Description Configuration
ACZ_BIT_CLK, DPRSLP#, EE_DIN,
CFG[2:0] FSB Frequency Select 000 = Reserved
001 = FSB533 EE_DOUT, GNT[5]#/GPO[17],
010 = FSB800 ICH6 internal 20K pull-ups
011-111 = Reversed GNT[6]#/GPO[16], LDRQ[1]/GPI[41],
4 CFG[3:4] Reversed LAD[3:0]#/FB[3:0]#, LDRQ[0], 4
CFG5 DMI x2 Select 0 = DMI x2 PME#, PWRBTN#, TP[3]
1 = DMI x4 (Default)
0 = DDR II
CFG6 DDR I / DDR II 1 = DDR I LAN_RXD[2:0] ICH6 internal 10K pull-ups
CFG7 CPU Strap 0 = Prescott
1 = Dothan (Default) ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ICH6 internal 20K pull-downs
CFG[8:11] Reversed ACZ_SDOUT,ACZ_BITCLK, DPRSLPVR,
CFG[12:13] XOR/ALL Z test 00 = Reserved SPKR, EE_CS,
straps 01 = XOR mode enabled
10 = All Z mode enabled
11 = Normal Operation USB[7:0][P,N] ICH6 internal 15K pull-downs
(Default)
CFG[14:15] Reversed DD[7], SDDREQ ICH6 internal 11.5K pull-downs
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled LAN_CLK ICH6 internal 100K pull-downs
(Default)
CFG17 Reversed
CFG18 CPU core VCC 0 = 1.05V (Default)
Select 1 = 1.5V
3 CFG19 CPU VTT Select 0 = 1.05V (Default)

ICH6-M IDE Integrated Series 3
1 = 1.2V
CFG20 Reversed
PCI Routing Termination Resistors
DD[15:0], DIOW#, DIOR#, DREQ,
SDVOCRTL SDVO Present 0 = No SDVO device present IDSEL IRQ REQ/GNT approximately 33 ohm
_DATA (Default) DDACK#, IORDY, DA[2:0], DCS1#,
1= SDVO device present
1410 25 B.F.G 0 DCS3#, IDEIRQ
NOTE: All strap signals are sampled with respect to the leading
edge of the Alviso GMCH PWORK In signal.
MiniPCI 21 F 1
LAN 23 E 2
2 2
<Core Design>
1 Wistron Corporation
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Memo
A3
AG1(Alviso) 01
Date: Tuesday, November 01, 2005 Sheet 2 of 40
A B C D E
3D3V_S0 3D3V_S0 3D3V_S0
1 R122 2 3D3V_APWR_S0 1 R105 2 3D3V_48MPWR_S0 1 R110 2 3D3V_CLKGEN_S0

0R0603-PAD 2R3J-2-GP 0R0603-PAD
1
C295 C103 C108 C109 C122 C105
C124 C104
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC4D7U6D3V3KX-GP
SC4D7U10V5ZY-3GP
2
2
IN EN OUT
(3D3V_S0) (6218_PGOOD) (VTT_PWRGD#)
H L H
X H Hi - Z
AG1-910-01
3D3V_CLKGEN_S0 R251 1 U28
28 PCLK_MINI 2 33R2J-2-GP 2nd
AG1-A-SA PCLK_MINI_1 56 17 DREFSSCLK1 2 3 DREFSSCLK 7

PCLK_LAN_1 PCI0 LVDS DREFSSCLK#1
8 1 3 PCI1 LVDS# 18 1 4 DREFSSCLK# 7
1
22 PCLK_LAN PCLK_PCM_1
24 PCLK_PCM 7 2 4 PCI2
AG1-910-01 6 3 PCLK_KBC_1 5 19 RN62
R98 R369 29 PCLK_KBC PCI3 SRC1 SRN33J-5-GP-U
16 CLK_ICHPCI 5 4 H/L: 100/96MHz SRC1# 20
1KR2J-1-GP 1KR2J-1-GP SS_SEL 9 22
RN7 ITP_EN PCIF1/SEL100/96# SRC2
8 23
2
FS_A SRN33J-4-GP PCIF0/ITP_EN SRC2#

H/L : CPU_ITP/SRC7 SRC3 24
16 PM_STPPCI# 55 PCI_STOP# SRC3# 25
CPU_SEL1 7 26 RN10 1 4 SRN33J-5-GP-U CLK_PCIE_ICH 16
SRC4
CPU_SEL0 4,7 SRC4# 27 2 3 CLK_PCIE_ICH# 16
46 31 CLK_PCIE_ICH1
SCL SRC5
1
11,18 SMBC_ICH CLK_PCIE_ICH#1

11,18 SMBD_ICH 47 SDA SRC5# 30
R102 33 CLK_MCH_3GPLL1 RN18 1 4 SRN47J-7-GP CLK_MCH_3GPLL 7
1KR2J-1-GP RN63 SRN33J-5-GP-U SRC6 CLK_MCH_3GPLL#1
SRC6# 32 2 3 CLK_MCH_3GPLL# 7
AG1-910-01 AG1-910-SB 3 2 DREFCLK_1 14
7 DREFCLK DREFCLK#_1 DOT96
4 1 15 36
2
SC22P50V2JN-4GP 7 DREFCLK# DOT96# CPU2_ITP/SRC7

CPU2_ITP#/SRC7# 35
C116 XTAL_IN 50 44 CLK_CPU_BCLK1 RN12 1 4 SRN33J-5-GP-U CLK_CPU_BCLK 4

XTAL_OUT XTAL_IN CPU0 CLK_CPU_BCLK#1
1 2 49 XTAL_OUT CPU0# 43 2 3 CLK_CPU_BCLK# 4
3 2 41 CLK_MCH_BCLK1
2 26 CLK_Audio CPU1
4 1 40 CLK_MCH_BCLK#1 RN11 1 4 SRN33J-5-GP-U CLK_MCH_BCLK 6
16 CLK_ICH14 CPU1#
RN13 SRN33J-5-GP-U 52 2 3 CLK_MCH_BCLK# 6
X1 REF
1 2 39 IREF CPU_STOP# 54 PM_STPCPU# 16,34
X-14D31818M-31GP R252 475R2F-L1-GP 53 CPU_SEL0
1
FSC/TEST_SEL CPU_SEL1
1 2 FSB/TEST_MODE 16
VTT_PWRGD# 10 12 FS_A 2 1
CPU VTT_PWRGD#/PD USB48/FSA CLK48_ICH 16
FS_C FS_B FS_A C120 CLK_ICH14 & CLK14_SIO R103 22R2J-2-GP
SC27P50V2JN-2-GP AG1-910-01
0 0 0 266M need equal length 2 34 3D3V_CLKGEN_S0
0 0 1 133M VSS_PCI VDD_SRC
6 VSS_PCI VDD_SRC 21
0 1 0 200M AG1-910-01
0 1 1 166M 51 7
1 0 0 333M VSS_REF VDD_PCI
45 VSS_CPU VDD_PCI 1
1 0 1 100M 38
1 1 0 400M VSSA
13 VSS48 VDD_REF 48
1 1 1 Reserved 29 42
VSS_SRC VDD_CPU 3D3V_APWR_S0
VDDA 37
11 3D3V_48MPWR_S0
VDD48
VDD_SRC 28
3D3V_S0
IDTCV125PAG-GP
8
7
6
5
AG1-A-SA
RN64
SRN10KJ-4-GP CLK_CPU_BCLK RN20 1 4 SRN49D9F-GP
CLK_CPU_BCLK# 2 3 EMI capacitor
1
2
3
4
CLK_MCH_BCLK RN19 1 4 SRN49D9F-GP CLK_ICH14 EC45 1 2 SC10P50V2JN-4GP

CLK_MCH_BCLK# 2 3 DY
PCLK_PCM EC41 1 2 SC10P50V2JN-4GP
DY
PCLK_MINI EC70 1 2 SC10P50V2JN-4GP
AG1-A-SA CLK_MCH_3GPLL RN14 1 4 SRN49D9F-GP DY
CLK_MCH_3GPLL# 2 3 PCLK_KBC EC42 1 2 SC10P50V2JN-4GP
VTT_PWRGD# ITP_EN DY
SS_SEL CLK_ICHPCI EC43 1 2 SC10P50V2JN-4GP
D DY
1
CLK_PCIE_ICH RN9 1 4 SRN49D9F-GP CLK48_ICH EC39 1 2 SC10P50V2JN-4GP

DY DY DY
3
CLK_PCIE_ICH# 2 3
Q23 R106 R104
10KR2J-2-GP 10KR2J-2-GP
2N7002PT-U
1
2
32,34 6218_PGOOD
G <Core Design>
AG1-910-01
2
S DREFSSCLK# 2 3
DREFSSCLK
RN60
1 4
SRN49D9F-GP
Wistron Corporation
DREFCLK# 2 3
DREFCLK 1 4 Title
RN61
SRN49D9F-GP Clock Generator - IDT125
A3
AG1(Alviso) 01
Date: Friday, October 28, 2005 Sheet 3 of 40
A B C D E
ADDR GROUP 0
U41A TP53
TUALA-SKT-1
TPAD28 1D05V_S0
4 H_A#3 P4 N2 4
6 H_A#[31..3] A3# ADS# H_ADS# 6
H_A#4 U4 L1
A4# BNR# H_BNR# 6
H_A#5 V3 J3 H_BPRI# 6
A5# BPRI#
1
H_A#6 R3 AG1-910-01
H_A#7 A6# R261
V2 A7# DEFER# L4 H_DEFER# 6
H_A#8 W1 H2 56R2J-4-GP
A8# DRDY# H_DRDY# 6
H_A#9 T4 M2
A9# DBSY# H_DBSY# 6
H_A#10 W2
2
H_A#11 A10# Place testpoint on
Y4 A11# BR0# N4 H_BREQ#0 6
H_A#12 Y1 H_IERR# with a GND
CONTROL
H_A#13 A12# H_IERR# 0.1" away
U1 A13# IERR# A4
H_A#14 AA3 B5 H_INIT# 15
H_A#15 A14# INIT#
Y3 A15#
H_A#16 AA2 J2
A16# LOCK# H_LOCK# 6
6 H_ADSTB#0 U3 ADSTB#0 H_CPURST# 6
6 H_REQ#[4..0] RESET# B11 H_RS#[2..0] 6
H_REQ#0 R2 H1 H_RS#0
H_REQ#1 REQ0# RS0# H_RS#1 U41B
P3 REQ1# RS1# K1 H_D#[63..0] 6
H_REQ#2 T2 L2 H_RS#2 TUALA-SKT-1
H_REQ#3 REQ2# RS2# H_D#0 H_D#32
P1 REQ3# TRDY# M3 H_TRDY# 6 A19 D0# D32# Y26 H_DINV#[3..0] 6
H_REQ#4 T1 H_D#1 A25 AA24 H_D#33
REQ4# H_D#2 D1# D33# H_D#34
K3 H_HIT# 6 A22 T25 H_DSTBN#[3..0] 6
XTP/ITP SIGNALS
H_A#17 HIT# H_D#3 D2# D34# H_D#35
AF4 K4 B21 U23
DATA GRP 0
DATA GRP 2
A17# HITM# H_HITM# 6 D3# D35#
H_A#18 AC4 H_D#4 A24 V23 H_D#36
A18# D4# D36# H_DSTBP#[3..0] 6
H_A#19 AC7 C8 XDP_BPM#0 TPAD28 TP78 H_D#5 B26 R24 H_D#37
ADDR GROUP 1
H_A#20 A19# BPM#0 XDP_BPM#1 TPAD28 TP87 H_D#6 D5# D37# H_D#38
AC3 A20# BPM#1 B8 A21 D6# D38# R26
H_A#21 AD3 A9 XDP_BPM#2 TPAD28 TP86 H_D#7 B20 R23 H_D#39
H_A#22 A21# BPM#2 XDP_BPM#3 TPAD28 TP77 H_D#8 D7# D39# H_D#40
AE4 A22# BPM#3 C9 C20 D8# D40# AA23
H_A#23 AD2 A10 XDP_BPM#4 TPAD28 TP85 H_D#9 B24 U26 H_D#41
3 H_A#24 A23# PRDY# XDP_BPM#5 TPAD28 TP76 H_D#10 D9# D41# H_D#42 3
AB4 A24# PREQ# B10 D24 D10# D42# V24
H_A#25 AC6 A13 XDP_TCK TPAD28 TP81 H_D#11 E24 U25 H_D#43
H_A#26 A25# TCK XDP_TDI TPAD28 TP82 H_D#12 D11# D43# H_D#44
AD5 A26# TDI C12 C26 D12# D44# V26
H_A#27 AE2 A12 XDP_TDO TPAD28 TP83 H_D#13 B23 Y23 H_D#45
H_A#28 A27# TDO XDP_TMS TPAD28 TP84 H_D#14 D13# D45# H_D#46
AD6 A28# TMS C11 E23 D14# D46# AA26
H_A#29 AF3 B13 XDP_TRST# TPAD28 TP91 H_D#15 C25 Y25 H_D#47
H_A#30 A29# TRST# XDP_DBRESET# TPAD28 TP88 H_DSTBN#0 D15# D47# H_DSTBN#2
AE1 A30# DBR# A7 C23 DSTBN0# DSTBN2# W25
H_A#31 AF1 H_DSTBP#0 C22 W24 H_DSTBP#2
A31# CPU_PROCHOT# TPAD28 TP89 H_DINV#0 DSTBP0# DSTBP2# H_DINV#2
6 H_ADSTB#1 AE5 ADSTB#1 PROCHOT# B17 D25 DINV0# DINV2# T24
B18
HCLK THERM
THERMDA H_THERMDA 19
15 H_A20M#
C2 A20M# THERMDC A18 H_THERMDC 19
D3 H_D#16 H23 AB25 H_D#48
15 H_FERR# FERR# H_D#17 D16# D48# H_D#49
15 H_IGNNE# A3 IGNNE# THERMTRIP# C17 PM_THRMTRIP-I# 7,15,19 AG1-A-SA G25 D17# D49# AC23
H_D#18 L23 AB24 H_D#50
H_D#19 D18# D50# H_D#51
AG1-A-SA C6 A15 M26 AC20
DATA GRP 1
DATA GRP 3
15 H_STPCLK# STPCLK# ITP_CLK1 H_D#20 D19# D51# H_D#52
15 H_INTR
D1 LINT0 ITP_CLK0 A16 H24 D20# D52# AC22
D4 B14 CLK_CPU_BCLK# 3 H_D#21 F25 AC25 H_D#53
15 H_NMI LINT1 BCLK1 H_D#22 D21# D53# H_D#54
15 H_SMI# B4 SMI# BCLK0 B15 CLK_CPU_BCLK 3 G24 D22# D54# AD23
H_D#23 J23 AE22 H_D#55
H_D#24 D23# D55# H_D#56
M23 D24# D56# AF23
PM_THRMTRIP# H_D#25 J25 AD24 H_D#57 Layout Note:
62.10053.061 should connect to H_D#26 D25# D57# H_D#58 Comp0, 2 connect with Zo=27.4 ohm, make
L26 D26# D58# AF20
CONNECTOR Y ICH6 and Alviso H_D#27 N24 AE21 H_D#59 trace length shorter than 0.5" .
without T-ing H_D#28 D27# D59# H_D#60 Comp1, 3 connect with Zo=55 ohm, make
M25 D28# D60# AD21
AG1_A-SA : 62.10079.001 ( No stub) H_D#29 H26 AF25 H_D#61 trace length shorter than 0.5" .
H_D#30 D29# D61# H_D#62
N25 D30# D62# AF22
H_D#31 K25 AF26 H_D#63
H_DSTBN#1 K24 D31# D63# H_DSTBN#3
DSTBN1# DSTBN3# AE24 AG1-910-01
H_DSTBP#1 L24 AE25 H_DSTBP#3
2 H_DINV#1 DSTBP1# DSTBP3# H_DINV#3 2
J26 DINV1# DINV3# AD20
1D05V_S0
To V-CORE SWITCH TP92 E1 PSI# COMP0 P25 COMP0 R281 1 2 27D4R2F-L1-GP
R264 TPAD28
COMP1 P26 COMP1 R279 1 2 54D9R2F-L1-GP
1
1 2 0R3-0-U-GP C16 AB2 COMP2 R287 1 2 27D4R2F-L1-GP
3,7 CPU_SEL0 DY C14
BSEL0
BSEL1
COMP2
COMP3 AB1 COMP3 R284 1 2 54D9R2F-L1-GP R154
TP90 TPAD28 200R2F-L-GP
1D05V_S0
1D05V_S0 MISC G1 AG1-910-01
H_DPRSLP# 15
2
DPRSTP#
C3 RSVD2 DPSLP# B7 H_DPSLP# 15
1
AG1-910-01 TP80 TPAD28 AF7 C19 H_DPWR# 6
CPU_PROCHOT# R262 1 RSVD3 DPWR#
2 56R2F-1-GP R283 TP94 TPAD28 AC1 RSVD4 PWRGOOD E4 H_PWRGD 15,19
1KR2F-3-GP TP93 TPAD28 E26 A6
RSVD5 SLP# H_CPUSLP# 6,15
XDP_TDI R256 1 2 150R2F-1-GP TP49 TPAD28
GTLREF0 AD26 C5 TEST1 TPAD28 TP79
1 2
XDP_TMS R259 1 GTLREF0 TEST1 TEST2

2 39D2R3F-2-GP TEST2 F23 TPAD28 TP51
Layout Note:
XDP_TDO R257 1 2 54D9R2F-L1-GP R282 0.5" max length. AG1-A-SA
2KR3F-L-GP
H_CPURST# R258 1 2 54D9R2F-L1-GP 62.10053.061
CONNECTOR
2
Y
3D3V_S0 BSEL[1:0] Freq.(MHz)
(A Stepping)
XDP_DBRESET# R263 1 2 150R2F-1-GP LL 100
LH 133
1
XDP_TCK R255 1 2 27D4R2F-L1-GP BSEL[1:0] Freq.(MHz) 1
<Core Design>
(B Stepping)
XDP_TRST# R260 1 2 680R3F-GP LH 100
LL 133
All place within 2" to CPU Wistron Corporation
AG1-910-01 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
CPU (1 of 2)
A3
AG1(Alviso) 01
Date: Friday, November 11, 2005 Sheet 4 of 40
A B C D E
A B C D E
VCC_CORE_S0 U41D TUALA-SKT-1

A2 VSS0 VSS97 D13
VCC_CORE_S0 A5 D15
VSS1 VSS98
U41C A8 VSS2 VSS99 D17
A11 VSS3 VSS100 D19
TUALA-SKT-1 A14 D21
VSS4 VSS101
AA11 VCC0 VCC59 G5 A17 VSS5 VSS102 D23
AA13 VCC1 VCC60 H22 A20 VSS6 VSS103 D26
AA15 VCC2 VCC61 H6 A23 VSS7 VSS104 E3
AA17 VCC3 VCC62 J21 A26 VSS8 VSS105 E6
AA19 VCC4 VCC63 J5 AA1 VSS9 VSS106 E8
AA21 VCC5 VCC64 K22 AA4 VSS10 VSS107 E10
AA5 VCC6 VCC65 U5 AA6 VSS11 VSS108 E12
4 AA7 VCC7 VCC66 V22 AA8 VSS12 VSS109 E14 4
AA9 V6 1D5V_S0 AA10 E16
VCC8 VCC67 VSS13 VSS110
AB10 VCC9 VCC68 W21 AA12 VSS14 VSS111 E18
AB12 VCC10 VCC69 W5 AA14 VSS15 VSS112 E20
1
AB14 VCC11 VCC70 Y22 AA16 VSS16 VSS113 E22
AB16 Y6 C311 C161 AA18 E25
VCC12 VCC71 SCD01U16V2KX-3GP SC10U10V5ZY-1GP VSS17 VSS114
AB18 AA20 F1
2
VCC13 VSS18 VSS115
AB20 VCC14 VCCA0 F26 AA22 VSS19 VSS116 F4
AB22 VCC15 VCCA1 B1 AA25 VSS20 VSS117 F5
AB6 VCC16 VCCA2 N1 AB3 VSS21 VSS118 F7
AB8 AC26 1D05V_S0 AB5 F9
VCC17 VCCA3 VSS22 VSS119
AC11 VCC18 AB7 VSS23 VSS120 F11
AC13 VCC19 VCCP0 D10 AB9 VSS24 VSS121 F13
AC9 VCC23 VCCP4 E11 AB17 VSS28 VSS125 F21
AD10 VCC24 VCCP5 E13 AB19 VSS29 VSS126 F24
AD12 VCC25 VCCP6 E15 AB21 VSS30 VSS127 G2
AD14 VCC26 VCCP7 F10 AB23 VSS31 VSS128 G6
AD16 VCC27 VCCP8 F12 AB26 VSS32 VSS129 G22
AD18 VCC28 VCCP9 F14 AC2 VSS33 VSS130 G23
AD8 VCC29 VCCP10 F16 AC5 VSS34 VSS131 G26
AE11 VCC30 VCCP11 K6 AC8 VSS35 VSS132 H3
AE13 VCC31 VCCP12 L21 AC10 VSS36 VSS133 H5
AE15 VCC32 VCCP13 L5 AC12 VSS37 VSS134 H21
AE17 VCC33 VCCP14 M22 AC14 VSS38 VSS135 H25
AE19 VCC34 VCCP15 M6 AC16 VSS39 VSS136 J1
AE9 VCC35 VCCP16 N21 AC18 VSS40 VSS137 J4
3 AF10 N5 AC21 J6 3
VCC36 VCCP17 VSS41 VSS138
AF12 VCC37 VCCP18 P22 AC24 VSS42 VSS139 J22
AF14 VCC38 VCCP19 P6 AD1 VSS43 VSS140 J24
AF16 VCC39 VCCP20 R21 AD4 VSS44 VSS141 K2
AF18 VCC40 VCCP21 R5 AD7 VSS45 VSS142 K5
AF8 VCC41 VCCP22 T22 AD9 VSS46 VSS143 K21
D18 VCC42 VCCP23 T6 AD11 VSS47 VSS144 K23
D20 VCC43 VCCP24 U21 AD13 VSS48 VSS145 K26
D22 VCC44 AD15 VSS49 VSS146 L3
D6 VCC45 VCCQ0 P23 AD17 VSS50 VSS147 L6
D8 VCC46 VCCQ1 W4 AD19 VSS51 VSS148 L22
E17 VCC47 AD22 VSS52 VSS149 L25
E19 VCC48 VID0 E2 H_VID0 34 AD25 VSS53 VSS150 M1
E21 VCC49 VID1 F2 H_VID1 34 AE3 VSS54 VSS151 M4
E5 VCC50 VID2 F3 H_VID2 34 AE6 VSS55 VSS152 M5
E7 VCC51 VID3 G3 H_VID3 34 AE8 VSS56 VSS153 M21
E9 VCC52 VID4 G4 H_VID4 34 AE10 VSS57 VSS154 M24
F18 VCC53 VID5 H4 H_VID5 34 AE12 VSS58 VSS155 N3
F20 VCC54 AE14 VSS59 VSS156 N6
F22 1D05V_S0 AE16 N22
VCC55 TP_VCCSENSE TPAD28 TP58 VSS60 VSS157
F6 VCC56 VCCSENSE AE7 AE18 VSS61 VSS158 N23
F8 AE20 N26
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VCC57 VSS62 VSS159
ST100U6D3VBM-9GP
G21 AF6 TP_VSSSENSE TPAD28 TP59 AE23 P2
VCC58 VSSSENSE VSS63 VSS160
AE26 VSS64 VSS161 P5
AF2 VSS65 VSS162 P21
1
1
C178
C187
C163
C177
C180
C164
AG1-A-SA AF5 VSS66 VSS163 P24
TC8
62.10053.061 AF9 R1
CONNECTOR VSS67 VSS164
AF11 R4
2
2
Y VSS68 VSS165
AF13 R6
2 DY AF15
VSS69
VSS70
VSS166
VSS167 R22
2
AF17 VSS71 VSS168 R25

AF19 VSS72 VSS169 T3
AF21 VSS73 VSS170 T5
Layout Note: AF24 T21
VCCSENSE and VSSSENSE lines VCC_CORE_S0 VSS74 VSS171
AG1-A-SA B3 VSS75 VSS172 T23
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
should be of equal length. B6 T26

VSS76 VSS173
B9 VSS77 VSS174 U2
B12 VSS78 VSS175 U6
1
1
C168
C169
C196
C194
Layout Note: B16 U22

Provide a test point (with VSS79 VSS176
B19 VSS80 VSS177 U24
no stub) to connect a B22 V1
2
differential probe VSS81 VSS178

B25 VSS82 VSS179 V4
between VCCSENSE and C1 V5
VSSSENSE at the location VSS83 VSS180
C4 VSS84 VSS181 V21
where the two 54.9ohm C7 V25
resistors terminate the VCC_CORE_S0 VSS85 VSS182
C10 VSS86 VSS183 W3
55 ohm transmission line. C13 W6
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VSS87 VSS184
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C15 VSS88 VSS185 W22

1
1
C167
C166
C209
C213
C211
C200
C201
C203
C24 VSS91 VSS188 Y2

D2 VSS92 VSS189 Y5
D5 Y21
2
VSS93 VSS190
D7 VSS94 VSS191 Y24
D9
DY DY DY DY DY D11
VSS95
VSS96
AG1-910-SB CONNECTOR Y
1 62.10053.061 1
VCC_CORE_S0 <Core Design>
SC10U6D3V5KX-1GP
Wistron Corporation
1
C202

2
Title
CPU (2 of 2)
A3
AG1(Alviso) 01
Date: Monday, October 17, 2005 Sheet 5 of 40
A B C D E
A B C D E
H_XRCOMP
1
R290
24D9R2F-L-GP
U38A
4 H_D#[63..0] H_A#[31..3] 4
AG1-910-01
2
H_D#0 E4 G9 H_A#3
H_D#1 HD0# HA3# H_A#4
4 E1 HD1# HA4# C9 4
H_D#2 F4 E9 H_A#5
H_D#3 HD2# HA5# H_A#6
H7 HD3# HA6# B7
H_D#4 E2 A10 H_A#7
1D05V_S0 H_D#5 HD4# HA7# H_A#8
F1 HD5# HA8# F9
H_D#6 E3 D8 H_A#9
H_D#7 HD6# HA9# H_A#10
D3 HD7# HA10# B10
H_D#8 K7 E10 H_A#11
HD8# HA11#
2
H_D#9 F2 G10 H_A#12
H_D#10 HD9# HA12# H_A#13
J7 HD10# HA13# D9
54D9R2F-L1-GP H_D#11 J8 E11 H_A#14
R291 H_D#12 HD11# HA14# H_A#15
H6 HD12# HA15# F10
AG1-910-01 H_D#13 F3 G11 H_A#16
1
H_D#14 HD13# HA16# H_A#17
K8 HD14# HA17# G13
H_XSCOMP H_D#15 H5 C10 H_A#18
H_D#16 HD15# HA18# H_A#19
H1 HD16# HA19# C11
H_D#17 H2 D11 H_A#20
H_D#18 HD17# HA20# H_A#21
K5 HD18# HA21# C12
1D05V_S0 H_D#19 K6 B13 H_A#22
H_D#20 HD19# HA22# H_A#23
J4 HD20# HA23# A12
H_D#21 G3 F12 H_A#24
HD21# HA24#
1
H_D#22 H3 G12 H_A#25

R288 H_D#23 HD22# HA25# H_A#26
J1 HD23# HA26# E12
221R2F-2-GP H_D#24 L5 C13 H_A#27 1D05V_S0
H_D#25 HD24# HA27# H_A#28
K4 HD25# HA28# B11
H_D#26 J5 D13 H_A#29
2
HD26# HA29#
1
H_XSWING H_D#27 P7 A13 H_A#30
H_D#28 HD27# HA30# H_A#31 R172
L7 HD28# HA31# F13
1
H_D#29 J3 100R2F-L1-GP-U
HD29#
1
3 R289 H_D#30 P5 F8 3
HD30# HADS# H_ADS# 4
100R2F-L1-GP-U C331 H_D#31 L3 B9 H_ADSTB#0 4
2
SCD1U16V2ZY-2GP H_D#32 HD31# HADSTB#0
AG1-910-01 U7 E13 H_ADSTB#1 4
2
H_D#33 HD32# HADSTB#1 H_VREF

V6 J11
2
H_D#34 HD33# HVREF

R6 HD34# HBNR# A5 H_BNR# 4
1
H_D#35 R5 D5
SCD1U16V2ZY-2GP
HD35# HBPRI# H_BPRI# 4
C186
H_D#36 P3 E7 R175
HD36# HBREQ0# H_BREQ#0 4 200R2F-L-GP
H_D#37 T8 H10 H_CPURST# 4
H_D#38 HD37# HCPURST#
R7 AG1-910-01
2
H_D#39 HD38#
R8
2
H_D#40 HD39#
U8
HOST
H_YRCOMP H_D#41 HD40#
R4 HD41# HCLKINN AB1 CLK_MCH_BCLK# 3
H_D#42 T4 AB2 CLK_MCH_BCLK 3
H_D#43 HD42# HCLKINP
T5 HD43#
1
H_D#44 R1 C6
HD44# HDBSY# H_DBSY# 4
R292 H_D#45 T3 E6 H_DEFER# 4
24D9R2F-L-GP HD45# HDEFER# H_DINV#[3..0] 4
H_D#46 V8 H8 H_DINV#0
H_D#47 HD46# HDINV#0 H_DINV#1
U6 HD47# HDINV#1 K3
AG1-910-01 H_D#48 W6 T7 H_DINV#2
2
H_D#49 HD48# HDINV#2 H_DINV#3

U3 HD49# HDINV#3 U5
H_D#50 V5 G6 H_DPWR# 4
H_D#51 HD50# HDPWR#
W8 HD51# HDRDY# F7 H_DRDY# 4 H_DSTBN#[3..0] 4
H_D#52 W7 G4 H_DSTBN#0
H_D#53 HD52# HDSTBN#0 H_DSTBN#1
U2 HD53# HDSTBN#1 K1
1D05V_S0 H_D#54 U1 R3 H_DSTBN#2
H_D#55 HD54# HDSTBN#2 H_DSTBN#3
Y5 HD55# HDSTBN#3 V3 H_DSTBP#[3..0] 4
H_D#56 Y2 G5 H_DSTBP#0
H_D#57 HD56# HDSTBP#0 H_DSTBP#1
AG1-910-01 V4 HD57# HDSTBP#1 K2
2
H_D#58 Y7 R2 H_DSTBP#2
2 H_D#59 HD58# HDSTBP#2 H_DSTBP#3 2
W1 HD59# HDSTBP#3 W4
54D9R2F-L1-GP H_D#60 W3 F6 TP_H_EDRDY# TPAD28 TP57
R295 H_D#61 HD60# HEDRDY#
Y3 HD61# HHIT# D4 H_HIT# 4
H_D#62 Y6 D6 H_HITM# 4
1
H_D#63 HD62# HHITM#

W2 HD63# HLOCK# B3 H_LOCK# 4
H_YSCOMP A11 TP_H_PCREQ#
HPCREQ# H_REQ#[4..0] 4
H_XRCOMP C1 A7 H_REQ#0 TPAD28 TP55
H_XSCOMP HXRCOMP HREQ#0 H_REQ#1
C2 HXSCOMP HREQ#1 D7
H_XSWING D1 B8 H_REQ#2
1D05V_S0 H_YRCOMP HXSWING HREQ#2 H_REQ#3
T1 HYRCOMP HREQ#3 C7
H_YSCOMP L1 A8 H_REQ#4 H_RS#[2..0] 4
H_YSWING HYSCOMP HREQ#4 H_RS#0
P1 HYSWING HRS0# A4
1
C5 H_RS#1
R294 HRS1# H_RS#2
HRS2# B4
221R2F-2-GP G8
HCPUSLP# H_CPUSLP# 4,15
HTRDY# B5 H_TRDY# 4
2
H_YSWING
1
R293 71.0GMCH.08U
100R2F-L1-GP-U C335
SCD1U16V2ZY-2GP
2
AG1-910-01
2
1 <Core Design> 1
Place them near to the chip
Wistron Corporation
Title
GMCH (1 of 5)
A3
AG1(Alviso) 01
Date: Tuesday, October 25, 2005 Sheet 6 of 40
A B C D E
A B C D E
AG1-910-01
1D05V_S0
1
R166
10KR2J-3-GP CFG[2:0] Freq.(MHz)
U38B 1D5V_PCIE_S0
101 400
001 533 Alviso will provide SDVO_CTRLCLK
2
DMI_TXN0 AA31 G16 CFG0 and CTRLDATA pulldowns on-die
16 DMI_TXN0 DMI_TXN1 DMIRXN0 CFG0 U38G
16 DMI_TXN1 AB35 DMIRXN1 CFG1 H13 CPU_SEL1 3 R366
4 DMI_TXN2 4
16 DMI_TXN2 AC31 DMIRXN2 CFG2 G14 CPU_SEL0 3,4
DMI_TXN3 AD35 F16 TP50 TPAD28 SDVOC_CTRLDATAH24 D36 1 2
16 DMI_TXN3 DMIRXN3 CFG3 TP48 TPAD28 SDVOC_CTRLCLK H25 SDVOCTRL_DATA EXP_COMPI
MISC
CFG4 F15 R165 SDVOCTRL_CLK EXP_ICOMPO D34
DMI_TXP0 Y31 G15 AB29 24D9R2F-L-GP
16 DMI_TXP0 DMI_TXP1 DMIRXP0 CFG5 CFG6 3 CLK_MCH_3GPLL# GCLKN
16 DMI_TXP1 AA35 DMIRXP1 CFG6 E16 2 1 3 CLK_MCH_3GPLL AC29 GCLKP EXP_RXN0 E30
DMI_TXP2 AB31 D17 F34 AG1-910-01
16 DMI_TXP2 DMI_TXP3 DMIRXP2 CFG7 2K2R2J-2-GP EXP_RXN1
16 DMI_TXP3 AC35 DMIRXP3 CFG8 J16 A15 TVDAC_A EXP_RXN2 G30
D15 C16 H34
DMI
CFG9 TVDAC_B EXP_RXN3
CFG/RSVD
DMI_RXN0 AA33 E15 AG1-910-01 A17 J30
16 DMI_RXN0 DMI_RXN1 DMITXN0 CFG10 TVDAC_C EXP_RXN4
16 DMI_RXN1 AB37 DMITXN1 CFG11 D14 J18 TV_REFSET EXP_RXN5 K34
TV
DMI_RXN2 AC33 E14 B15 L30
16 DMI_RXN2 DMI_RXN3 DMITXN2 CFG12 TV_IRTNA EXP_RXN6
16 DMI_RXN3 AD37 DMITXN3 CFG13 H12 B16 TV_IRTNB EXP_RXN7 M34
CFG14 C14 B17 TV_IRTNC EXP_RXN8 N30
DMI_RXP0 Y33 H15 P34
16 DMI_RXP0 DMI_RXP1 DMITXP0 CFG15 EXP_RXN9
16 DMI_RXP1 AA37 DMITXP1 CFG16 J15 EXP_RXN10 R30
DMI_RXP2 AB33 H14 T34
16 DMI_RXP2 DMI_RXP3 DMITXP2 CFG17 EXP_RXN11
16 DMI_RXP3 AC37 DMITXP3 CFG18 G22 EXP_RXN12 U30
CFG19 G23 EXP_RXN13 V34
CFG20 D23 EXP_RXN14 W30
11 M_CLK_DDR0 AM33 SM_CK0 RSVD21 G25 AG1-910-01 14 GMCH_DDCCLK E24 DDCCLK EXP_RXN15 Y34
11 M_CLK_DDR1 AL1 SM_CK1 RSVD22 G24 14 GMCH_DDCDATA E23 DDCDATA
AE11 SM_CK2 RSVD23 J17 14 GMCH_BLUE E21 BLUE EXP_RXP0 D30
AJ34 A31 150R2F-1-GP 1 R158 2 D21 E34
11 M_CLK_DDR3 SM_CK3 RSVD24 BLUE# EXP_RXP1
AF6 A30 C20 F30
VGA
11 M_CLK_DDR4 SM_CK4 RSVD25 150R2F-1-GP 14 GMCH_GREEN GREEN EXP_RXP2
AC10 SM_CK5 RSVD26 D26 1 R157 2 B20 GREEN# EXP_RXP3 G34
RSVD27 D25 14 GMCH_RED A19 RED EXP_RXP4 H30
AN33 150R2F-1-GP 1 R162 2 B19 J34
11 M_CLK_DDR#0 SM_CK0# HSYNC RED# EXP_RXP5
11 M_CLK_DDR#1 AK1 SM_CK1# 14 GMCH_VSYNC 1 2 H21 VSYNC EXP_RXP6 K30
AE10 R159 1 2 39R2J-L-GP CRTIREF G21 L34
SM_CK2# 10KR2J-2-GP 14 GMCH_HSYNC R156 1 VSYNC HSYNC EXP_RXP7
AJ33 2 39R2J-L-GP J20 M30
PCI-EXPRESS GRAPHICS
11 M_CLK_DDR#3 SM_CK3# VGATE_PWRGD 2 REFSET EXP_RXP8
11 M_CLK_DDR#4 AF5 SM_CK4# 1 EXP_RXP9 N34
AD10 AG1-910-01 R161 P30
3 SM_CK5# DY R254 261R2F-GP EXP_RXP10
EXP_RXP11 R34
3
11,12 M_CKE0 AP21 SM_CKE0 EXP_RXP12 T30

MUXING
11,12 M_CKE1 AM21 SM_CKE1 EXP_RXP13 U34

AH21 J23 PM_BMBUSY# 16 AG1-910-SB LBKLT_CRTL E25 V30
11,12 M_CKE2 SM_CKE2 BM_BUSY# LBKLT_CRTL EXP_RXP14
11,12 M_CKE3 AK21 SM_CKE3 EXT_TS0# J21 PM_EXTTS#0 29 BL_ON F25 LBKLT_EN EXP_RXP15 W34
EXT_TS1# H22 PM_EXTTS#1 LCTLA_CLK C23 LCTLA_CLK
AN16 F5 LCTLB_DATA C22 E32
PM
11,12 M_CS#0 SM_CS0# THRMTRIP# PM_THRMTRIP-I# 4,15,19 LCTLB_DATA EXP_TXN0

AM14 AD30 VGATE_PWRGD 16,32 CLK_DDC_EDID F23 F36
11,12 M_CS#1 SM_CS1# PWROK 13 CLK_DDC_EDID LDDC_CLK EXP_TXN1
DDR
Layout Note: AH15 AE29 1 2 DAT_DDC_EDID F22 G32

11,12 M_CS#2 SM_CS2# RSTIN# PLT_RST1# 16,18,29 13 DAT_DDC_EDID LDDC_DATA EXP_TXN2
Route as short AG16 R152 100R2J-2-GP F26 H36
as possible 11,12 M_CS#3 SM_CS3# 13 GMCH_LCDVDD_ON LIBG LVDD_EN EXP_TXN3
DREF_CLKN A24 DREFCLK# 3 AG1-910-01 C33 LIBG EXP_TXN4 J32
M_OCDCOMP0 AF22 A23 TP42 TPAD28 L_LVBG C31 K36
CLK
SM_OCDCOMP0 DREF_CLKP DREFCLK 3 LVBG EXP_TXN5

M_OCDCOMP1 AF16 C37 DREFSSCLK# 3 TP44 TPAD28 L_VREFH F28 L32
SM_OCDCOMP1 DREF_SSCLKN LVREFH EXP_TXN6
1
D37 DREFSSCLK 3 TP46 TPAD28 L_VREFL F27 M36

R155 R168 DREF_SSCLKP LVREFL EXP_TXN7
LVDS
11,12 M_ODT0 AP14 SM_ODT0 EXP_TXN8 N32
40D2R2F-GP
40D2R2F-GP
11,12 M_ODT1 AL15 SM_ODT1 NC1 AP37 13 GMCH_TXACLK- B30 LACLKN EXP_TXN9 P36
11,12 M_ODT2 AM11 SM_ODT2 NC2 AN37 13 GMCH_TXACLK+ B29 LACLKP EXP_TXN10 R32
AN10 AP36 C25 T36
2
11,12 M_ODT3 SM_ODT3 NC3 13 GMCH_TXBCLK- LBCLKN EXP_TXN11

NC4 AP2 13 GMCH_TXBCLK+ C24 LBCLKP EXP_TXN12 U32
M_RCOMPN AK10 AP1 V36
DDR_VREF_S3 M_RCOMPP SMRCOMPN NC5 EXP_TXN13
AK11 SMRCOMPP NC6 AN1 13 GMCH_TXAOUT0- B34 LADATAN0 EXP_TXN14 W32
AF37 B1 B33 Y36
NC
SMVREF0 NC7 13 GMCH_TXAOUT1- LADATAN1 EXP_TXN15

AD1 SMVREF1 NC8 A2 13 GMCH_TXAOUT2- B32 LADATAN2
SMXSLEW AE27 B37 D32
SMXSLEWIN NC9 EXP_TXP0
AE28 SMXSLEWOUT NC10 A36 EXP_TXP1 E36
C304
C219
BC4
BC2
SMYSLEW AF9 A37 A34 F32

SMYSLEWIN NC11 13 GMCH_TXAOUT0+ LADATAP0 EXP_TXP2
1
AF10 SMYSLEWOUT 13 GMCH_TXAOUT1+ A33 LADATAP1 EXP_TXP3 G36

13 GMCH_TXAOUT2+ B31 LADATAP2 EXP_TXP4 H32
J36
2
EXP_TXP5
13 GMCH_TXBOUT0- C29 LBDATAN0 EXP_TXP6 K32
71.0GMCH.08U 13 GMCH_TXBOUT1- D28 LBDATAN1 EXP_TXP7 L36
2 C27 M32 2
13 GMCH_TXBOUT2- LBDATAN2 EXP_TXP8
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EXP_TXP9 N36
AG1-A-SA 13 GMCH_TXBOUT0+ C28 LBDATAP0 EXP_TXP10 P32
2D5V_S0 D27 R36
SRN10KJ-5-GP 13 GMCH_TXBOUT1+ LBDATAP1 EXP_TXP11
13 GMCH_TXBOUT2+ C26 LBDATAP2 EXP_TXP12 T32
2 3 PM_EXTTS#0 U36
PM_EXTTS#1 EXP_TXP13
1 4 EXP_TXP14 V32
EXP_TXP15 W36
RN24
1D8V_S3 71.0GMCH.08U
1
AG1-A-SA
R171 DY 2D5V_S0
80D6R2F-L-GP RN21
LCTLA_CLK 1 4
M_RCOMPN LCTLB_DATA 2 3
2
SRN2K2J-1-GP
M_RCOMPP RN23
1
CLK_DDC_EDID 1 4
R173 DAT_DDC_EDID 2 3
80D6R2F-L-GP
SRN2K2J-1-GP
2
BL_ON 1 4 RN22
LBKLT_CRTL 2 3
SRN100KJ-6-GP
1 1
<Core Design>
LIBG 1 R271 2 1K5R2F-2-GP
AG1-910-01
Wistron Corporation
Title
GMCH (2 of 5)
Custom
AG1(Alviso) 01
A B C D E
A B C D E
4 4
U38C U38D
11 M_A_DQ[63..0] 11 M_B_DQ[63..0]
M_A_DQ0 AG35 AK15 M_A_BS#0 11,12 M_B_DQ0 AE31 AJ15 M_B_BS#0 11,12
M_A_DQ1 SADQ0 SA_BS0# M_B_DQ1 SBDQ0 SB_BS0#
AH35 SADQ1 SA_BS1# AK16 M_A_BS#1 11,12 AE32 SBDQ1 SB_BS1# AG17 M_B_BS#1 11,12
M_A_DQ2 AL35 AL21 M_A_BS#2 11,12 M_B_DQ2 AG32 AG21 M_B_BS#2 11,12
M_A_DQ3 SADQ2 SA_BS2# M_B_DQ3 SBDQ2 SB_BS2#
AL37 SADQ3 M_A_DM[7..0] 11 AG36 SBDQ3 M_B_DM[7..0] 11
M_A_DQ4 AH36 AJ37 M_A_DM0 M_B_DQ4 AE34 AF32 M_B_DM0
M_A_DQ5 SADQ4 SA_DM0 M_A_DM1 M_B_DQ5 SBDQ4 SB_DM0 M_B_DM1
AJ35 SADQ5 SA_DM1 AP35 AE33 SBDQ5 SB_DM1 AK34
M_A_DQ6 AK37 AL29 M_A_DM2 M_B_DQ6 AF31 AK27 M_B_DM2
AL34 SADQ7 SA_DM3 AP24 AF30 SBDQ7 SB_DM3 AK24
M_A_DQ8 AM36 AP9 M_A_DM4 M_B_DQ8 AH33 AJ10 M_B_DM4
AN35 SADQ9 SA_DM5 AP4 AH32 SBDQ9 SB_DM5 AK5
M_A_DQ10 AP32 AJ2 M_A_DM6 M_B_DQ10 AK31 AE7 M_B_DM6
AM31 SADQ11 SA_DM7 AD3 AG30 SBDQ11 SB_DM7 AB7
M_A_DQ12 AM34 M_B_DQ12 AG34
SADQ12 M_A_DQS[7..0] 11 SBDQ12 M_B_DQS[7..0] 11
M_A_DQ13 AM35 AK36 M_A_DQS0 M_B_DQ13 AG33 AF34 M_B_DQS0
M_A_DQ14 SADQ13 SA_DQS0 M_A_DQS1 M_B_DQ14 SBDQ13 SB_DQS0 M_B_DQS1
AL32 SADQ14 SA_DQS1 AP33 AH31 SBDQ14 SB_DQS1 AK32
M_A_DQ15 AM32 AN29 M_A_DQS2 M_B_DQ15 AJ31 AJ28 M_B_DQS2
AN31 SADQ16 SA_DQS3 AP23 AK30 SBDQ16 SB_DQS3 AK23
M_A_DQ17 AP31 AM8 M_A_DQS4 M_B_DQ17 AJ30 AM10 M_B_DQS4
AN28 SADQ18 SA_DQS5 AM4 AH29 SBDQ18 SB_DQS5 AH6
M_A_DQ19 AP28 AJ1 M_A_DQS6 M_B_DQ19 AH28 AF8 M_B_DQS6
AL30 SADQ20 SA_DQS7 AE5 AK29 SBDQ20 SB_DQS7 AB4
M_A_DQ21 AM30 M_B_DQ21 AH30
SADQ21 M_A_DQS#[7..0] 11 SBDQ21 M_B_DQS#[7..0] 11
M_A_DQ22 AM28 AK35 M_A_DQS#0 M_B_DQ22 AH27 AF35 M_B_DQS#0
3 M_A_DQ23 SADQ22 SA_DQS0# M_A_DQS#1 M_B_DQ23 SBDQ22 SB_DQS0# M_B_DQS#1 3
AL28 AP34 AG28 AK33
DDR SYSTEM MEMORY A
M_A_DQ24 SADQ23 SA_DQS1# M_A_DQS#2 M_B_DQ24 SBDQ23 SB_DQS1# M_B_DQS#2

AP27 SADQ24 SA_DQS2# AN30 AF24 SBDQ24 SB_DQS2# AK28
M_A_DQ25 AM27 AN23 M_A_DQS#3 M_B_DQ25 AG23 AJ23 M_B_DQS#3
DDR SYSTEM MEMORY B

AM23 SADQ26 SA_DQS4# AN8 AJ22 SBDQ26 SB_DQS4# AL10
M_A_DQ27 AM22 AM5 M_A_DQS#5 M_B_DQ27 AK22 AH7 M_B_DQS#5
AL23 SADQ28 SA_DQS6# AH1 AH24 SBDQ28 SB_DQS6# AF7
M_A_DQ29 AM24 AE4 M_A_DQS#7 M_B_DQ29 AH23 AB5 M_B_DQS#7
M_A_DQ30 SADQ29 SA_DQS7# M_B_DQ30 SBDQ29 SB_DQS7#
AN22 SADQ30 M_A_A[13..0] 11,12 AG22 SBDQ30 M_B_A[13..0] 11,12
M_A_DQ31 AP22 AL17 M_A_A0 M_B_DQ31 AJ21 AH17 M_B_A0
M_A_DQ32 SADQ31 SA_MA0 M_A_A1 M_B_DQ32 SBDQ31 SB_MA0 M_B_A1
AM9 SADQ32 SA_MA1 AP17 AG10 SBDQ32 SB_MA1 AK17
M_A_DQ33 AL9 AP18 M_A_A2 M_B_DQ33 AG9 AH18 M_B_A2
AL6 SADQ34 SA_MA3 AM17 AG8 SBDQ34 SB_MA3 AJ18
M_A_DQ35 AP7 AN18 M_A_A4 M_B_DQ35 AH8 AK18 M_B_A4
AP11 SADQ36 SA_MA5 AM18 AH11 SBDQ36 SB_MA5 AJ19
M_A_DQ37 AP10 AL19 M_A_A6 M_B_DQ37 AH10 AK19 M_B_A6
AL7 SADQ38 SA_MA7 AP20 AJ9 SBDQ38 SB_MA7 AH19
M_A_DQ39 AM7 AM19 M_A_A8 M_B_DQ39 AK9 AJ20 M_B_A8
AN5 SADQ40 SA_MA9 AL20 AJ7 SBDQ40 SB_MA9 AH20
M_A_DQ41 AN6 AM16 M_A_A10 M_B_DQ41 AK6 AJ16 M_B_A10
AN3 SADQ42 SA_MA11 AN20 AJ4 SBDQ42 SB_MA11 AG18
M_A_DQ43 AP3 AM20 M_A_A12 M_B_DQ43 AH5 AG20 M_B_A12
AP6 SADQ44 SA_MA13 AM15 AK8 SBDQ44 SB_MA13 AG15
M_A_DQ45 AM6 M_B_DQ45 AJ8
M_A_DQ46 SADQ45 M_B_DQ46 SBDQ45
AL4 SADQ46 SA_CAS# AN15 M_A_CAS# 11,12 AJ5 SBDQ46
M_A_DQ47 AM3 AP16 M_A_RAS# 11,12 M_B_DQ47 AK4 AH14 M_B_CAS# 11,12
M_A_DQ48 SADQ47 SA_RAS# SA_RCVENIN# TP43 TPAD28 M_B_DQ48 SBDQ47 SB_CAS#
AK2 SADQ48 SA_RCVENIN# AF29 AG5 SBDQ48 SB_RAS# AK14 M_B_RAS# 11,12
M_A_DQ49 AK3 AF28 SA_RCVENOUT# TP47 TPAD28 M_B_DQ49 AG4 AF15 SB_RCVENIN# TP52 TPAD28
M_A_DQ50 SADQ49 SA_RCVENOUT# M_B_DQ50 SBDQ49 SB_RCVENIN# SB_RCVENOUT# TP54 TPAD28
AG2 SADQ50 SA_WE# AP15 M_A_WE# 11,12 AD8 SBDQ50 SB_RCVENOUT# AF14
M_A_DQ51 AG1 M_B_DQ51 AD9 AH16 M_B_WE# 11,12
2 M_A_DQ52 SADQ51 M_B_DQ52 SBDQ51 SB_WE# 2
AL3 SADQ52 AH4 SBDQ52
M_A_DQ53 AM2 Place Test PAD Near to Chip M_B_DQ53 AG6
AH3 SADQ54 as could as possible AE8 SBDQ54 Place Test PAD Near to Chip
M_A_DQ55 AG3 M_B_DQ55 AD7
SADQ55 SBDQ55 ascould as possible
M_A_DQ56 AF3 M_B_DQ56 AC5
AE3 SADQ57 AB8 SBDQ57
M_A_DQ58 AD6 M_B_DQ58 AB6
AC4 SADQ59 AA8 SBDQ59
M_A_DQ60 AF2 M_B_DQ60 AC8
AF1 SADQ61 AC7 SBDQ61
M_A_DQ62 AD4 M_B_DQ62 AA4
AD5 SADQ63 AA5 SBDQ63
71.0GMCH.08U 71.0GMCH.08U
1 <Core Design> 1
Wistron Corporation
Title
GMCH (3 of 5)
A3
AG1(Alviso) 01
A B C D E
1
2
3
4
2 1
C157
SC4D7U6D3V3KX-GP
2 1
C176
1D05V_S0
SC4D7U6D3V3KX-GP
2 1
C145
use 1D05V_S0
SC4D7U6D3V3KX-GP
A
A
2 1
then connect to the gnd plane

decoupling cap groung lead and
C172
Route ASSATVBG gnd from GMCH to

SC4D7U6D3V3KX-GP
high speed clock.default

2 1
graphic clock.1D5V_S0 for

VCC 1D05_S0 for low speed
C154
SCD1U16V2ZY-2GP
T29 VCC0 VCCA_TVDACA0 F17

2 1 R29 VCC1 VCCA_TVDACA1 E17
N29 VCC2 VCCA_TVDACB0 D18
C195 M29 C18
SCD1U16V2ZY-2GP VCC3 VCCA_TVDACB1
K29 VCC4 VCCA_TVDACC0 F18
J29 VCC5 VCCA_TVDACC1 E18
V28 VCC6
2 1 U28 VCC7 VCCA_TVBG H18
T28 VCC8 VSSA_TVBG G18
C144 R28
SCD1U16V2ZY-2GP VCC9
P28 VCC10 VCCD_TVDAC D19
N28 VCC11 VCCDQ_TVDAC H17
M28 VCC12
2 1 L28 VCC13 VCCD_LVDS0 B26
K28 VCC14 VCCD_LVDS1 B25
C162 J28 A25
SCD1U16V2ZY-2GP VCC15 VCCD_LVDS2
H28 VCC16
G28 VCC17 VCCA_LVDS A35
1D5V_S0
V27 2D5V_ALVDS_S0
VCC18
U27 B22
1D5V_DLVDS_S0
VCC19 VCCHV0
T27 B21
B
B
VCC20 VCCHV1
R27 VCC21 VCCHV2 A21
P27
1
1
1
1
2
VCC22
N27 VCC23 VCCSM0 AM37 V1.8_DDR_CAP1 1 2
M27 VCC24 VCCSM1 AH37 V1.8_DDR_CAP2 1 2
L3
L5
R178
AG1-910-SB
L27 AP29 V1.8_DDR_CAP5
L12
L13
VCC25 VCCSM2
C133
K27 VCC26 VCCSM3 AD28
0R0805-PAD
0R0805-PAD
0R0805-PAD
0R0805-PAD
C131
J27 AD27
2
2
2
2
1
0R0805-PAD
VCC27 VCCSM4
H27 VCC28 VCCSM5 AC27
2 1 2 1 2 1 2 1 K26 AP26
1
VCC29 VCCSM6
H26 VCC30 VCCSM7 AN26
C151
K25 VCC31 VCCSM8 AM26
C225
C226
C136
C141
J25 AL26
2
SCD1U16V2ZY-2GP
VCC32 VCCSM9
C313
K24 AK26
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VCC33 VCCSM10
K23 VCC34 VCCSM11 AJ26 2 1
internally
K22 AH26
SCD1U16V2ZY-2GP
VCC35 VCCSM12
pins shorted
K21 VCC36 VCCSM13 AG26

W20 AF26
Note: All VCCSM
VCC37 VCCSM14
2D5V_TVDAC_S0
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
U20 VCC38 VCCSM15 AE26
T20 AP25 SC10U10V5ZY-1GP
VCC39 VCCSM16
C312
K20 VCC40 VCCSM17 AN25

2 1 2 1 2 1 2 1 V19 VCC41 VCCSM18 AM25 2 1
U19 VCC42 VCCSM19 AL25
K19 VCC43 VCCSM20 AK25
C333
C334
C135
C150
W18 AJ25
1
POWER
VCC44 VCCSM21
V18 VCC45 VCCSM22 AH25
T18 VCC46 VCCSM23 AG25
R275
K18 VCC47 VCCSM24 AF25

K17 VCC48 VCCSM25 AE25
AE24
0R0603-PAD
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D5V_HMPLL_S0
VCCSM26
AC2 VCCH_MPLL1 VCCSM27 AE23
1D5V_HPLL_S0
1D5V_MPLL_S0
AC1 AE22 2 1
1D5V_DPLLB_S0
1D5V_DPLLA_S0
VCCH_MPLL0 VCCSM28
B23 VCCA_DPLLA VCCSM29 AE21
C316
C
C
C35 VCCA_DPLLB VCCSM30 AE20

AA1 AE19 SC10U10V5ZY-1GP
2D5V_S0
VCCA_HPLL VCCSM31
AA2 VCCA_MPLL VCCSM32 AE18
VCCSM33 AE17
F19 VCCA_CRTDAC0 VCCSM34 AE16 2 1
E19 VCCA_CRTDAC1 VCCSM35 AE15
G19 AE14 C317
2D5V_S0
2D5V_S0
1D5V_S0
1
1
1
VSSA_CRTDAC VCCSM36 SC10U10V5ZY-1GP

VCCSM37 AP13
VCCSM38 AN13
GMCH_VCC_SYNC
R273
H20 VCC_SYNC VCCSM39 AM13

VCCSM40 AL13 2 1
K13 AK13
0R0603-PAD
0R0603-PAD
0R0603-PAD
2
R272 2
R274 2
VTT0 VCCSM41 C321

J13 AJ13
1
VTT1 VCCSM42
1D8V_S3
K12 AH13 SC10U10V5ZY-1GP

VTT2 VCCSM43
W11 VTT3 VCCSM44 AG13
V11 VTT4 VCCSM45 AF13
U11 VTT5 VCCSM46 AE13
C318
T11 AP12
R163 2
0R0402-PAD
VTT6 VCCSM47
SC4D7U6D3V3KX-GP
2D5V_CRTDAC_S0
R11 VTT7 VCCSM48 AN12 2 1 2 1 2 1

2 1 P11 VTT8 VCCSM49 AM12
N11 AL12
DY
VTT9 VCCSM50
M11 AK12
of Alviso. Route FB
VTT10 VCCSM51
within 3" of Alviso.
2D5V_ALVDS_S0
C143
C309
C310
2 1 2 1 L11 AJ12
2D5V_TXLVDS_S0
VTT11 VCCSM52
K11 AH12
1
VTT12 VCCSM53
Route caps within 250mil
W10 AG12
1D5V_DLVDS_S0
Layout Notes: VSSA_CRTDAC
VTT13 VCCSM54
C319
C314
V10 AF12
2
VTT14 VCCSM55
R276
U10 AE12
DY
VTT15 VCCSM56
1 R277
C323
T10 VTT16 VCCSM57 AD11

0R3-0-U-GP
SC10U10V5ZY-1GP
R10 AC11
2
1
VTT17 VCCSM58
SC4D7U10V5ZY-3GP
SCD01U16V2KX-3GP
internally
P10 AB11
2
0R0603-PAD
VTT18 VCCSM59
pins shorted
N10 AB10
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VTT19 VCCSM60
M10 AB9
Note: All VCCSM
VTT20 VCCSM61
K10 VTT21 VCCSM62 AP8 V1.8_DDR_CAP6
D
D
J10 AM1 V1.8_DDR_CAP4 2 1

1
2D5V_S0
VTT22 VCCSM63 V1.8_DDR_CAP3

Y9 VTT23 VCCSM64 AE1 2 1
1D05V_S0
W9 VTT24
R278
U9 B28
DY
VTT25 VCCTX_LVDS0
C216
R9 VTT26 VCCTX_LVDS1 A28

1KR2J-1-GP
C330
P9 A27
2
connect to the gnd plane.
VTT27 VCCTX_LVDS2
AG1-910-SB
N9 VTT28
M9 AF20
2
VTT29 VCCA_SM0
L9 VTT30 VCCA_SM1 AP19
2D5V_TXLVDS_S0
J9 VTT31 VCCA_SM2 AF19

Route VSSA_CRTDAC gnd from GMCH to
N8 AF18
SCD1U16V2ZY-2GP
decoupling cap ground lead and then

D27
DY
VTT32 VCCA_SM3
M8
SCD1U16V2ZY-2GP
VTT33
A3
N7 AE37
1
VTT34 VCC3G0
Title
Size
M7 VTT35 VCC3G1 W37

SCD47U10V3ZY-GP
C324
N6 VTT36 VCC3G2 U37

SSM5818SLPT-GP
M6 VTT37 VCC3G3 R37

2 1 VCCP_GMCH_CAP1 A6 N37
VTT38 VCC3G4
1D05V_S0
<Core Design>
N5 VTT39 VCC3G5 L37

M5 VTT40 VCC3G6 J37
N4 VTT41
C325
M4 Y29 2 1
1D5V_DDRDLL_S0
VTT42 VCCA_3GPLL0
SC4D7U10V5ZY-3GP
C185
SCD47U10V3ZY-GP
N3 VTT43 VCCA_3GPLL1 Y28 2 1
1D05V_S0
2 1 M3 Y27
Document Number
VTT44 VCCA_3GPLL2
2 1 N2 VTT45
C315
1D5V_PCIE_S0
M2 F37 2 1
Date: Monday, October 17, 2005
SCD22U16V3ZY-GP VCCP_GMCH_CAP2 VTT46 VCCA_3GBG

C328
C126
B2 VTT47 VSSA_3GBG G37

2 1 VCCP_GMCH_CAP3 V1 VTT48
C142
N1 VTT49
1D5V_3GPLL_S0
2 1 M1 VTT50
2 1 VCCP_GMCH_CAP4 G1 2 1
C210 VTT51
ST100U6D3VBM-9GP
SC10U10V5ZY-1GP
SC2D2U6D3V3MX-1-GP
C305
E
E
2D5V_3GBG_S0
C329
SC10U10V5ZY-1GP
Sheet
2 1
U38E
1
1
1
AG1(Alviso)
1
C184
GMCH (4 of 5)
R153
R142
R160
SCD1U16V2ZY-2GP
R253
SCD1U16V2ZY-2GP
71.0GMCH.08U
SCD22U16V3ZY-GP
2
2
2
0R0603-PAD
0R0603-PAD
0R0603-PAD
of
2
0R0603-PAD

40
Rev
1D5V_S0
then connect to the gnd plane
Wistron Corporation
1D5V_S0
decoupling cap groung lead and
01
Route ASSA3GBG gnd from GMCH to
2D5V_S0
1D5V_S0
1
2
3
4
1
2
3
4
U38F
B36 VSSALVDS
AL24
71.0GMCH.08U
VSS267
A
A
AN24
U38H
VSS266
Y1 VSS271 VSS265 A26
D2 VSS270 VSS264 E26
G2 G26
71.0GMCH.08U
VSS269 VSS263
VCCSM_NCTF31 AB12 J2 VSS268 VSS262 J26
VCCSM_NCTF30 AC12 L2 VSS260 VSS261 B27
VCCSM_NCTF29 AD12 P2 VSS259 VSS129 E27
1D8V_S3
VCCSM_NCTF28 AB13 T2 VSS258 VSS128 G27
VCCSM_NCTF27 AC13 V2 VSS257 VSS127 W27
VCCSM_NCTF26 AD13 2 1 AD2 VSS256 VSS126 AA27
VCCSM_NCTF25 AC14 AE2 VSS255 VSS125 AB27
AD14 C322 AH2 AF27
VCCSM_NCTF24 SC10U10V5ZY-1GP VSS254 VSS124
VCCSM_NCTF23 AC15 AL2 VSS253 VSS123 AG27
VCCSM_NCTF22 AD15 AN2 VSS252 VSS122 AJ27
VCCSM_NCTF21 AC16 A3 VSS251 VSS121 AL27
VCCSM_NCTF20 AD16 2 1 C3 VSS250 VSS120 AN27
VCCSM_NCTF19 AC17 AA3 VSS249 VSS119 E28
AD17 C181 AB3 W28
VCCSM_NCTF18 SCD1U16V2ZY-2GP VSS248 VSS118
VCCSM_NCTF17 AC18 AC3 VSS247 VSS117 AA28
VCCSM_NCTF16 AD18 AJ3 VSS246 VSS116 AB28
VCCSM_NCTF15 AC19 C4 VSS245 VSS115 AC28
1D05V_S0
VCCSM_NCTF14 AD19 2 1 H4 VSS244 VSS114 A29
VCCSM_NCTF13 AC20 L4 VSS243 VSS113 D29
AD20 C175 P4 E29
VCCSM_NCTF12 SCD1U16V2ZY-2GP VSS242 VSS112
L12 VTT_NCTF17 VCCSM_NCTF11 AC21 U4 VSS241 VSS111 F29
M12 VTT_NCTF16 VCCSM_NCTF10 AD21 Y4 VSS240 VSS110 G29
N12 VTT_NCTF15 VCCSM_NCTF9 AC22 AF4 VSS239 VSS109 H29
P12 VTT_NCTF14 VCCSM_NCTF8 AD22 2 1 AN4 VSS238 VSS108 L29
R12 VTT_NCTF13 VCCSM_NCTF7 AC23 E5 VSS237 VSS107 P29
T12 AD23 C152 W5 U29
VTT_NCTF12 VCCSM_NCTF6 SCD1U16V2ZY-2GP VSS236 VSS106
U12 VTT_NCTF11 VCCSM_NCTF5 AC24 AL5 VSS235 VSS105 V29
V12 VTT_NCTF10 VCCSM_NCTF4 AD24 AP5 VSS234 VSS104 W29
W12 AC25 B6 AA29
B
B
VTT_NCTF9 VCCSM_NCTF3 VSS233 VSS103

L13 VTT_NCTF8 VCCSM_NCTF2 AD25 2 1 J6 VSS232 VSS102 AD29
M13 VTT_NCTF7 VCCSM_NCTF1 AC26 L6 VSS231 VSS101 AG29
N13 AD26 C188 P6 AJ29
VTT_NCTF6 VCCSM_NCTF0 SCD1U16V2ZY-2GP VSS230 VSS100
P13 VTT_NCTF5 T6 VSS229 VSS99 AM29
R13 VTT_NCTF4 VCC_NCTF78 L17 AA6 VSS228 VSS98 C30
T13 VTT_NCTF3 VCC_NCTF77 M17 AC6 VSS227 VSS97 Y30
U13 VTT_NCTF2 VCC_NCTF76 N17 2 1 AE6 VSS226 VSS96 AA30
V13 VTT_NCTF1 VCC_NCTF75 P17 AJ6 VSS225 VSS95 AB30
W13 T17 C160 G7 AC30
VTT_NCTF0 VCC_NCTF74 SCD1U16V2ZY-2GP VSS224 VSS94
VCC_NCTF73 U17 V7 VSS223 VSS93 AE30
VCC_NCTF72 V17 AA7 VSS222 VSS92 AP30
VCC_NCTF71 W17 AG7 VSS221 VSS91 D31
VCC_NCTF70 L18 AK7 VSS220 VSS90 E31
VCC_NTTF69 M18 AN7 VSS219 VSS89 F31
Y12 VSS_NCTF68 VCC_NCTF68 N18 C8 VSS218 VSS88 G31
AA12 VSS_NCTF67 VCC_NCTF67 P18 E8 VSS217 VSS87 H31
Y13 VSS_NCTF66 VCC_NCTF66 R18 L8 VSS216 VSS86 J31
AA13 VSS_NCTF65 VCC_NCTF65 Y18 P8 VSS215 VSS85 K31
L14 VSS_NCTF64 VCC_NCTF64 L19 Y8 VSS214 VSS84 L31
M14 VSS_NCTF63 VCC_NCTF63 M19 AL8 VSS213 VSS83 M31
N14 VSS_NCTF62 VCC_NCTF62 N19 A9 VSS212 VSS82 N31
P14 VSS_NCTF61 VCC_NCTF61 P19 H9 VSS211 VSS81 P31
R14 VSS_NCTF60 VCC_NCTF60 R19 K9 VSS210 VSS80 R31
T14 VSS_NCTF59 VCC_NCTF59 Y19 T9 VSS209 VSS79 T31
Place these Hi-Freq decoupling caps near GMCH
U14 VSS_NCTF58 VCC_NCTF58 L20 V9 VSS208 VSS78 U31

V14 VSS_NCTF57 VCC_NCTF57 M20 AA9 VSS207 VSS77 V31
W14 VSS_NCTF56 VCC_NCTF56 N20 AC9 VSS206 VSS76 W31
Y14 VSS_NCTF55 VCC_NCTF55 P20 AE9 VSS205 VSS75 AD31
AA14 VSS_NCTF54 VCC_NCTF54 R20 AH9 VSS204 VSS74 AG31
AB14 Y20 AN9 AL31
NCTF
VSS_NCTF53 VCC_NCTF53 VSS203 VSS73

L15 L21 D10 A32
VSS
VSS_NCTF52 VCC_NCTF52 VSS202 VSS72

M15 VSS_NCTF51 VCC_NCTF51 M21 L10 VSS201 VSS71 C32
C
C
N15 VSS_NCTF50 VCC_NCTF50 N21 Y10 VSS200 VSS70 Y32

P15 VSS_NCTF49 VCC_NCTF49 P21 AA10 VSS199 VSS69 AA32
R15 VSS_NCTF48 VCC_NCTF48 T21 F11 VSS198 VSS68 AB32
T15 VSS_NCTF47 VCC_NCTF47 U21 H11 VSS197 VSS67 AC32
U15 VSS_NCTF46 VCC_NCTF46 V21 Y11 VSS196 VSS66 AD32
V15 VSS_NCTF45 VCC_NCTF45 W21 AA11 VSS195 VSS65 AJ32
W15 VSS_NCTF44 VCC_NCTF44 L22 AF11 VSS194 VSS64 AN32
Y15 VSS_NCTF43 VCC_NCTF43 M22 AG11 VSS193 VSS63 D33
AA15 VSS_NCTF42 VCC_NCTF42 N22 AJ11 VSS192 VSS62 E33
AB15 VSS_NCTF41 VCC_NCTF41 P22 AL11 VSS191 VSS61 F33
L16 VSS_NCTF40 VCC_NCTF40 R22 AN11 VSS190 VSS60 G33
M16 VSS_NCTF39 VCC_NCTF39 T22 B12 VSS189 VSS59 H33
N16 VSS_NCTF38 VCC_NCTF38 U22 D12 VSS188 VSS58 J33
P16 VSS_NCTF37 VCC_NCTF37 V22 J12 VSS187 VSS57 K33
R16 VSS_NCTF36 VCC_NCTF36 W22 A14 VSS186 VSS56 L33
T16 VSS_NCTF35 VCC_NCTF35 L23 B14 VSS185 VSS55 M33
U16 VSS_NCTF34 VCC_NCTF34 M23 F14 VSS184 VSS54 N33
V16 VSS_NCTF33 VCC_NCTF33 N23 J14 VSS183 VSS53 P33
W16 VSS_NCTF32 VCC_NCTF32 P23 K14 VSS182 VSS52 R33
Y16 VSS_NCTF31 VCC_NCTF31 R23 AG14 VSS181 VSS51 T33
AA16 VSS_NCTF30 VCC_NCTF30 T23 AJ14 VSS180 VSS50 U33
AB16 VSS_NCTF29 VCC_NCTF29 U23 AL14 VSS179 VSS49 V33
R17 VSS_NCTF28 VCC_NCTF28 V23 AN14 VSS178 VSS48 W33
Y17 VSS_NCTF27 VCC_NCTF27 W23 C15 VSS177 VSS47 AD33
AA17 VSS_NCTF26 VCC_NCTF26 L24 K15 VSS176 VSS46 AF33
AB17 VSS_NCTF25 VCC_NCTF25 M24 A16 VSS175 VSS45 AL33
AA18 VSS_NCTF24 VCC_NCTF24 N24 D16 VSS174 VSS44 C34
AB18 VSS_NCTF23 VCC_NCTF23 P24 H16 VSS173 VSS43 AA34
AA19 VSS_NCTF22 VCC_NCTF22 R24 K16 VSS172 VSS42 AB34
AB19 VSS_NCTF21 VCC_NCTF21 T24 AL16 VSS171 VSS41 AC34
AA20 VSS_NCTF20 VCC_NCTF20 U24 C17 VSS170 VSS40 AD34
AB20 VSS_NCTF19 VCC_NCTF19 V24 G17 VSS169 VSS39 AH34
R21 VSS_NCTF18 VCC_NCTF18 W24 AF17 VSS168 VSS38 AN34
D
D
Y21 VSS_NCTF17 VCC_NCTF17 L25 AJ17 VSS167 VSS37 B35

AA21 VSS_NCTF16 VCC_NCTF16 M25 AN17 VSS166 VSS36 D35
AB21 VSS_NCTF15 VCC_NCTF15 N25 A18 VSS165 VSS35 E35
Y22 VSS_NCTF14 VCC_NCTF14 P25 B18 VSS164 VSS34 F35
AA22 VSS_NCTF13 VCC_NCTF13 R25 U18 VSS163 VSS33 G35
AB22 VSS_NCTF12 VCC_NCTF12 T25 AL18 VSS162 VSS32 H35
Y23 VSS_NCTF11 VCC_NCTF11 U25 C19 VSS161 VSS31 J35
AA23 VSS_NCTF10 VCC_NCTF10 V25 H19 VSS160 VSS30 K35
AB23 VSS_NCTF9 VCC_NCTF9 W25 J19 VSS159 VSS29 L35
Y24 VSS_NCTF8 VCC_NCTF8 L26 T19 VSS158 VSS28 M35
AA24 VSS_NCTF7 VCC_NCTF7 M26 W19 VSS157 VSS27 N35
AB24 VSS_NCTF6 VCC_NCTF6 N26 AG19 VSS156 VSS26 P35
A3
Y25 VSS_NCTF5 VCC_NCTF5 P26 AN19 VSS155 VSS25 R35

Title
Size
AA25 VSS_NCTF4 VCC_NCTF4 R26 A20 VSS154 VSS24 T35

AB25 VSS_NCTF3 VCC_NCTF3 T26 D20 VSS153 VSS23 U35
Y26 VSS_NCTF2 VCC_NCTF2 U26 E20 VSS152 VSS22 V35
AA26 VSS_NCTF1 VCC_NCTF1 V26 F20 VSS151 VSS21 W35
<Core Design>
AB26 VSS_NCTF0 VCC_NCTF0 W26 G20 VSS150 VSS20 Y35

V20 VSS149 VSS19 AE35
1D05V_S0
AK20 VSS148 VSS18 C36

C21 VSS147 VSS17 AA36
F21 VSS146 VSS16 AB36
AF21 AC36
Document Number
VSS145 VSS15
AN21 VSS144 VSS14 AD36
A22 AE36
Date: Monday, October 17, 2005
VSS143 VSS13
D22 VSS142 VSS12 AF36
E22 VSS141 VSS11 AJ36
J22 VSS140 VSS10 AL36
AH22 VSS139 VSS9 AN36
AL22 VSS138 VSS8 E37
H23 VSS137 VSS7 H37
AF23 VSS136 VSS6 K37
B24 M37
E
E
VSS135 VSS5
D24 P37
Sheet
VSS134 VSS4
F24 T37
AG1(Alviso)
VSS133 VSS3
J24 VSS132 VSS2 V37
10
AG24 Y37
GMCH (5 of 5)
VSS131 VSS1
AJ24 VSS130 VSS0 AG37
of
40
Rev
Wistron Corporation
01
1
2
3
4
A B C D E
AG1-A-SA
AG1-A-SA
DM1 2nd
8,12 M_A_A[13..0]
DM2 2nd M_A_A0 102 108 M_A_RAS# 8,12
8,12 M_B_A[13..0] A0 /RAS
M_B_A0 102 108 M_B_RAS# 8,12 M_A_A1 101 109 M_A_WE# 8,12
M_B_A1 A0 /RAS M_A_A2 A1 /WE
101 A1 /WE 109 M_B_WE# 8,12 100 A2 /CAS 113 M_A_CAS# 8,12
M_B_A2 100 113 M_B_CAS# 8,12 M_A_A3 99
M_B_A3 A2 /CAS M_A_A4 A3
99 A3 98 A4 /CS0 110 M_CS#0 7,12
M_B_A4 98 110 M_CS#2 7,12 M_A_A5 97 115 M_CS#1 7,12
M_B_A5 A4 /CS0 M_A_A6 A5 /CS1
97 A5 /CS1 115 M_CS#3 7,12 94 A6
M_B_A6 94 M_A_A7 92 79 M_CKE0 7,12
M_B_A7 A6 M_A_A8 A7 CKE0
92 A7 CKE0 79 M_CKE2 7,12 93 A8 CKE1 80 M_CKE1 7,12
M_B_A8 93 80 M_CKE3 7,12 M_A_A9 91
4
M_B_A9 A8 CKE1 M_A_A10 A9 4
91 A9 105 A10/AP CK0 30 M_CLK_DDR0 7
M_B_A10 105 30 M_CLK_DDR3 7 M_A_A11 90 32 M_CLK_DDR#0 7
M_B_A11 A10/AP CK0 M_A_A12 A11 /CK0
90 A11 /CK0 32 M_CLK_DDR#3 7 89 A12
M_B_A12 89 M_A_A13 116 164 M_CLK_DDR1 7
M_B_A13 A12 A13 CK1
116 A13 CK1 164 M_CLK_DDR4 7 86 A14 /CK1 166 M_CLK_DDR#1 7
86 A14 /CK1 166 M_CLK_DDR#4 7 84 A15 M_A_DM[7..0] 8
84 8,12 M_A_BS#2 85 10 M_A_DM0
A15 M_B_DM[7..0] 8 A16/BA2 DM0
8,12 M_B_BS#2 85 10 M_B_DM0 26 M_A_DM1
A16/BA2 DM0 M_B_DM1 DM1 M_A_DM2
DM1 26 8,12 M_A_BS#0 107 BA0 DM2 52
8,12 M_B_BS#0 107 52 M_B_DM2 8,12 M_A_BS#1 106 67 M_A_DM3
BA0 DM2 M_B_DM3 BA1 DM3 M_A_DM4
8,12 M_B_BS#1 106 BA1 DM3 67 DM4 130
130 M_B_DM4 M_A_DQ0 5 147 M_A_DM5
M_B_DQ0 DM4 M_B_DM5 M_A_DQ1 DQ0 DM5 M_A_DM6
5 DQ0 DM5 147 8 M_A_DQ[63..0] 7 DQ1 DM6 170
M_B_DQ1 7 170 M_B_DM6 M_A_DQ2 17 185 M_A_DM7
8 M_B_DQ[63..0] DQ1 DM6 SRN33J-5-GP-U DQ2 DM7
M_B_DQ2 17 185 M_B_DM7 AG1-A-SA M_A_DQ3 19
M_B_DQ3 DQ2 DM7 RN51 M_A_DQ4 DQ3 SMBD_ICH_1
19 DQ3 4 DQ4 SDA 195
M_B_DQ4 4 195 SMBD_ICH_1 1 4 SMBD_ICH 3,18 M_A_DQ5 6 197 SMBC_ICH_1
M_B_DQ5 DQ4 SDA SMBC_ICH_1 M_A_DQ6 DQ5 SCL
6 DQ5 SCL 197 2 3 SMBC_ICH 3,18 14 DQ6
M_B_DQ6 14 M_A_DQ7 16 199
DQ6 DQ7 VDDSPD 3D3V_S0
M_B_DQ7 16 199 M_A_DQ8 23
DQ7 VDDSPD 3D3V_S0 DQ8
M_B_DQ8 23 M_A_DQ9 25 198
M_B_DQ9 DQ8 M_A_DQ10 DQ9 SA0
25 DQ9 SA0 198 35 DQ10 SA1 200
M_B_DQ10 35 200 1 2 3D3V_S0 M_A_DQ11 37
DQ10 SA1 DQ11
10KR2J-3-GP
M_B_DQ11 37 M_A_DQ12 20 50
M_B_DQ12 DQ11 R183 M_A_DQ13 DQ12 NC#50
20 DQ12 NC#50 50 22 DQ13 NC#69 69
M_B_DQ13 22 69 M_A_DQ14 36 83
M_B_DQ14 DQ13 NC#69 M_A_DQ15 DQ14 NC#83
36 DQ14 NC#83 83 AG1-910-01 38 DQ15 NC#120 120
M_B_DQ15 38 120 M_A_DQ16 43 163
M_B_DQ16 DQ15 NC#120 M_A_DQ17 DQ16 NC#163/TEST
43 DQ16 NC#163/TEST 163 45 DQ17
M_B_DQ17 45 M_A_DQ18 55
M_B_DQ18 DQ17 M_A_DQ19 DQ18
55 DQ18 57 DQ19 VDD 81
3 M_B_DQ19 57 81 M_A_DQ20 44 82 3
M_B_DQ20 DQ19 VDD M_A_DQ21 DQ20 VDD
44 82 46 87
NORMAL TYPE

46 87 56 88
NORMAL TYPE
56 DQ22 VDD 88 58 DQ23 VDD 95
M_B_DQ23 58 95 M_A_DQ24 61 96
61 DQ24 VDD 96 63 DQ25 VDD 103
M_B_DQ25 63 103 M_A_DQ26 73 104
73 DQ26 VDD 104 75 DQ27 VDD 111
M_B_DQ27 75 111 M_A_DQ28 62 112
62 DQ28 VDD 112 64 DQ29 VDD 117
M_B_DQ29 64 117 M_A_DQ30 74 118
DQ29 VDD DQ30 VDD 1D8V_S3
M_B_DQ30 74 118 M_A_DQ31 76
DQ30 VDD 1D8V_S3 DQ31
M_B_DQ31 76 M_A_DQ32 123 3
M_B_DQ32 DQ31 M_A_DQ33 DQ32 VSS
123 DQ32 VSS 3 125 DQ33 VSS 8
M_B_DQ33 125 8 M_A_DQ34 135 9
M_B_DQ34 DQ33 VSS M_A_DQ35 DQ34 VSS
135 DQ34 VSS 9 137 DQ35 VSS 12
M_B_DQ35 137 12 M_A_DQ36 124 15
124 DQ36 VSS 15 126 DQ37 VSS 18
M_B_DQ37 126 18 M_A_DQ38 134 21
134 DQ38 VSS 21 136 DQ39 VSS 24
M_B_DQ39 136 24 M_A_DQ40 141 27
141 DQ40 VSS 27 143 DQ41 VSS 28
M_B_DQ41 143 28 M_A_DQ42 151 33
151 DQ42 VSS 33 153 DQ43 VSS 34
M_B_DQ43 153 34 M_A_DQ44 140 39
140 DQ44 VSS 39 142 DQ45 VSS 40
M_B_DQ45 142 40 M_A_DQ46 152 41
152 DQ46 VSS 41 154 DQ47 VSS 42
M_B_DQ47 154 42 M_A_DQ48 157 47
157 DQ48 VSS 47 159 DQ49 VSS 48
M_B_DQ49 159 48 M_A_DQ50 173 53
2 173 DQ50 VSS 53 175 DQ51 VSS 54 2
M_B_DQ51 175 54 M_A_DQ52 158 59
158 DQ52 VSS 59 160 DQ53 VSS 60
M_B_DQ53 160 60 M_A_DQ54 174 65
174 DQ54 VSS 65 176 DQ55 VSS 66
M_B_DQ55 176 66 M_A_DQ56 179 71
179 DQ56 VSS 71 181 DQ57 VSS 72
M_B_DQ57 181 72 M_A_DQ58 189 77
189 DQ58 VSS 77 191 DQ59 VSS 78
M_B_DQ59 191 78 M_A_DQ60 180 121
180 DQ60 VSS 121 182 DQ61 VSS 122
M_B_DQ61 182 122 M_A_DQ62 192 127
192 DQ62 VSS 127 194 DQ63 VSS 128
M_B_DQ63 194 128 132
DQ63 VSS M_A_DQS#0 VSS
VSS 132 11 /DQS0 VSS 133
M_B_DQS#0 11 133 M_A_DQS#1 29 138
/DQS0 VSS 8 M_A_DQS[7..0] /DQS1 VSS
M_B_DQS#1 29 138 M_A_DQS#2 49 139
8 M_B_DQS#[7..0] /DQS1 VSS /DQS2 VSS
M_B_DQS#2 49 139 M_A_DQS#3 68 144
M_B_DQS#3 /DQS2 VSS M_A_DQS#4 /DQS3 VSS
68 /DQS3 VSS 144 129 /DQS4 VSS 145
M_B_DQS#4 129 145 M_A_DQS#5 146 149
M_B_DQS#5 /DQS4 VSS M_A_DQS#6 /DQS5 VSS
146 /DQS5 VSS 149 167 /DQS6 VSS 150
M_B_DQS#6 167 150 M_A_DQS#7 186 155
M_B_DQS#7 /DQS6 VSS /DQS7 VSS
186 /DQS7 VSS 155 VSS 156
156 M_A_DQS0 13 161
M_B_DQS0 VSS M_A_DQS1 DQS0 VSS
13 DQS0 VSS 161 8 M_A_DQS#[7..0] 31 DQS1 VSS 162
M_B_DQS1 31 162 M_A_DQS2 51 165
8 M_B_DQS[7..0] DQS1 VSS DQS2 VSS
M_B_DQS2 51 165 M_A_DQS3 70 168
M_B_DQS3 DQS2 VSS M_A_DQS4 DQS3 VSS
70 DQS3 VSS 168 131 DQS4 VSS 171
M_B_DQS4 131 171 M_A_DQS5 148 172
M_B_DQS5 DQS4 VSS M_A_DQS6 DQS5 VSS
148 DQS5 VSS 172 169 DQS6 VSS 177
M_B_DQS6 169 177 M_A_DQS7 188 178
M_B_DQS7 DQS6 VSS DQS7 VSS
188 DQS7 VSS 178 VSS 183
1 183 114 184 1
VSS 7,12 M_ODT0 ODT0 VSS <Core Design>
7,12 M_ODT2 114 ODT0 VSS 184 7,12 M_ODT1 119 ODT1 VSS 187
7,12 M_ODT3 119 ODT1 VSS 187 VSS 190
190 1 193
DDR_VREF_S3 1 VREF
VSS
VSS 193
DDR_VREF_S3
2
VREF
VSS
VSS
VSS 196 Wistron Corporation
1
2 196 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

VSS VSS
1
C307 202 201 Taipei Hsien 221, Taiwan, R.O.C.

C140 SC4D7U6D3V3KX-GP GND GND
202 201
2
SC4D7U6D3V3KX-GP GND GND BC3 DDR2-200P-4-GP 62.10017.761 Title

2
BC1 DDR2-200P-5-GP 62.10017.771 CONNECTOR

CONNECTOR SCD1U16V2ZY-2GP DDR Socket
SCD1U16V2ZY-2GP Size Document Number Rev
High 5.2mm High 9.2mm Custom
AG1(Alviso) 01
2nd source:62.10017.661 2nd source:62.10017.A61 Date: Tuesday, October 25, 2005 Sheet 11 of 40
A B C D E
A B C D E
PARALLEL TERMINATION Put decap near power(0.9V) and pull-up resistor

DDR_VREF
Decoupling Capacitor
AG1-910-01
1 R177 2 56R2J-4-GP M_CKE0 7,11

1 R179 2 56R2J-4-GP
Put decap near power(0.9V)
M_ODT1 7,11 DDR_VREF
RN43
4 1
and pull-up resistor
M_CS#3 7,11
3 2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
M_ODT3 7,11
4 M_A_A[13..0] 8,11 4
SRN56J-4-GP
1
C245
C193
C227
C214
C212
C207
C238
RN30 M_B_A[13..0] 8,11
8 1 M_CKE2 7,11
7 2 M_B_A8
2
6 3 M_B_BS#2 8,11
5 4 M_B_A9
SRN56J-2-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN34
1
C237
C249
C234
C198
C222
C247
C251
C204
C205
C199
C248
8 1 M_B_A12
7 2 M_B_A5
6 3 M_B_A3
2
5 4 M_B_A10
SRN56J-2-GP
RN42
8 1 M_B_A13
7 2 M_ODT2 7,11
6 3 M_CS#2 7,11
5 4 M_B_RAS# 8,11 1D8V_S3
SRN56J-2-GP Place these Caps near DM1
RN37
8 1 M_B_BS#1 8,11
1
7 2 M_B_A2 C197 C192 C235 C228 C224
3 6 3 M_B_A0 SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP 3
5 4 M_B_A4
2
SRN56J-2-GP
RN33
8 1 M_B_A6
7 2 M_B_A7
6 3 M_B_A11
5 4 M_CKE3 7,11
SRN56J-2-GP
RN38
8 1 M_B_A1
7 2 M_B_BS#0 8,11
6 3 M_B_WE# 8,11
5 4 M_B_CAS# 8,11
SRN56J-2-GP 1D8V_S3
Place these Caps near DM2
RN39
8 1 M_A_RAS# 8,11
7 2 M_CS#0 7,11
1
6 3 C190 C229 C218 C231 C208
M_A_A13 M_ODT0 7,11 SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP
5 4
2
SRN56J-2-GP
2 2
RN36
8 1 M_A_A4
7 2 M_A_A2
6 3 M_A_A0
5 4 M_A_BS#1 8,11
SRN56J-2-GP
RN40
8 1 M_A_BS#0 8,11
7 2 M_A_WE# 8,11
6 3 M_A_CAS# 8,11
5 4 M_CS#1 7,11
SRN56J-2-GP
RN31
8 1 M_A_BS#2 8,11
7 2 M_A_A12
6 3 M_A_A9
5 4 M_A_A8
SRN56J-2-GP
RN32
8 1 M_CKE1 7,11
7 2 M_A_A11
6 3 M_A_A7
<Core Design>
1 5 4 M_A_A6 1
SRN56J-2-GP
Wistron Corporation
RN35 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
8 1 M_A_A5 Taipei Hsien 221, Taiwan, R.O.C.
7 2 M_A_A3
6 3 M_A_A1 Title
5 4 M_A_A10
DDR2 Termination Resistor
SRN56J-2-GP Size Document Number Rev
A3
AG1(Alviso) 01
A B C D E
AG1-A-SA
LED
LCDVDD
AG1-910-01 3D3V_S0 5V_S0 AG1-910-01
Layout 40 mil 3D3V_S0
U21
BAV99PT-GP-U LED-Y-26-U-GP 83.01608.D70
1 6 2 WLAN_LED# 1 2 2 1 LED4
R189 OUT IN 28 WLAN_LED#
2 5 R205 100R2J-2-GP LED-G-98-GP 83.01608.J70
GMCH_LCDVDD_ON LCDVDD_ON_1 GND GND WLAN_LED# LED6
1 2 3 4 3 K A
7 GMCH_LCDVDD_ON
1KR2J-1-GP ON/OFF# IN D26 DY
1
1 SRN100J-4-GP 3D3V_S5
C220 C236
SC1U10V3ZY-6GP AAT4280IGU-1-T1GP SC1U10V3ZY-6GP FRONT_PWRLED#4 5 LED-Y-26-U-GP 83.01608.D70
2
C223 29,30 FRONT_PWRLED# STDBY_LED#
29 STDBY_LED# 3 6 2 1 LED3
SCD1U16V2ZY-2GP BAV99PT-GP-U CHARGE_LED# 2 7 LED-Y-26-U-GP 83.01608.D70
29 CHARGE_LED# DC_BATFULL#
2 29 DC_BATFULL# 1 8 2 1 LED2
AG1-910-01 LED-G-98-GP 83.01608.J70
BLT_LED# 3 K A LED1
D24 DY RN57
1 5V_S0
LCD/INVERTER/CCD CONN 29 BLT_LED#

BLT_LED# 1
R200
2
470R2J-2-GP
2
LED5 LED-B-27-U-GP
1
83.00190.P70
5V_S0 3D3V_S0
1
EC62
SCD1U16V2ZY-2GP LED BD CONN
2
DY
CCD Pin
AG1-910-01
Pin Symbol LEDB1
LCD1
10
1 5V 43 41 1
2 USB- MH1 1 2
SC10U10V5ZY-1GP
LCDVDD 3 CAP_LED#
NUM_LED# CAP_LED# 29
3 USB+ 2 4 NUM_LED# 29
45 3 5 IDE_LED#
IDE_LED# 20
1
C173
4 GND 4 EDID_CLK C155 6
5 EDID_DAT EC63 7 3D3V_S0
5 GND SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
6 8
2
7 9
DY DY
1
8 EC50
Inverter Pin 9 MLX-CON8-7-GP-U SCD1U16V2ZY-2GP
GMCH_TXACLK- 7 CONNECTOR
10
2
GMCH_TXACLK+ 7 20.K0185.008
Pin Symbol 11
12 GMCH_TXAOUT2- 7
1 Vin 13 GMCH_TXAOUT2+ 7
14
2 Vin 15 GMCH_TXAOUT1- 7
16 GMCH_TXAOUT1+ 7
3 PWM 17 EVEN CHANNEL
18 GMCH_TXAOUT0- 7
4 BLON 19 GMCH_TXAOUT0+ 7
20
3D3V_S0
5 GND 21 GMCH_TXBOUT0- 7
22 GMCH_TXBOUT0+ 7
6 GND 23
24 GMCH_TXBOUT1- 7
25 GMCH_TXBOUT1+ 7
Launch BD 26
1
2
27 ODD CHANNEL 2D5V_S0
GMCH_TXBOUT2- 7
Pin Symbol 28 GMCH_TXBOUT2+ 7
29 SRN2K2J-1-GP
1 5V_S0 30 GMCH_TXBCLK- 7 RN3
31 GMCH_TXBCLK+ 7
2 PWRBTN# 32
4
3
33 BRIGHTNESS
FPBACK BRIGHTNESS 29
3 PROGRAM# 34 FPBACK 29
35 S D EDID_CLK
7 CLK_DDC_EDID
4 EBUTTON# 36
G
37 Q26
5 INTERNET# 46 38 FDN337N-1-GP
39 DCBATOUT S D EDID_DAT
7 DAT_DDC_EDID
1
6 MAIL# MH2 40 EC65 EC64

Layout 60 mil SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP Q22
7 KCOL19 44 42 FDN337N-1-GP
2
2
1
C32
DY DY
1
SC1000P50V3JN-GP
8 MAIL_LED# IPEX-CON40-2-GP C233 C33

20.F0763.040 SC10U35V0ZY-GP DY SCD1U50V3ZY-GP EC67 EC66
2
9 STDBY_LED# CONNECTOR SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2
10 PWRLED# DY DY
11 GND
12 GND AG1-A-SA
TOP VIEW <Core Design>
Wistron Corporation
LCD Title
1 LCD CONN & LED

A3
AG1(Alviso) 01
CRT CONNECTOR
Ferrite bead impedance: 75ohm@100MHz
L6
GMCH_RED
50 Ohm Impedance 1 2
75 Ohm Impedance CRT_R
7 GMCH_RED
BLM18BA100SN1DGP
L7
GMCH_GREEN 1 2 CRT_G
7 GMCH_GREEN
BLM18BA100SN1DGP
L8
GMCH_BLUE 1 2 CRT_B
7 GMCH_BLUE
1
R53 R46 R79 EC28 EC27 EC29 BLM18BA100SN1DGP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
EC22 EC23 EC26
DY DY DY
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
2
2
2
2
AG1-910-01
Hsync & Vsync level shift

5V_S0
1
C14
SCD1U16V2ZY-2GP
2
14
13
GMCH_HSYNC 12 11 CRT_HSYNC1
7 GMCH_HSYNC
TSAHCT125PW-GP DAT_DDC1_5
14
7
1
U3D
GMCH_VSYNC 2 3 CRT_VSYNC1 CRT_HSYNC1

7 GMCH_VSYNC
U3A TSAHCT125PW-GP CRT_VSYNC1

7
1
CLK_DDC1_5
C15 C11
SC33P50V2JN-3GP SC33P50V2JN-3GP ESD Protection Diode
2
1
EC2 EC3
DY DY
SC10P50V2JN-4GP
SC10P50V2JN-4GP
EC1 EC4 5V_S0
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
2
BAV99PT-GP-U
AG1-910-SB 2
CRT_R 3
D1
1
DDC_CLK & DATA level shift DY
5V_S0 BAV99PT-GP-U
AG1-910-01 2
2D5V_S0 5V_CRT_S0 D4
1 2 5V_CRT_S0 CRT_G 3
D2
1
CH521S-30-GP-U 1
EC5 DY
SCD01U16V2KX-3GP
2
8
7
6
5
BAV99PT-GP-U
RN2 DY 2
SRN2K2J-2-GP
CRT_B 3
D3
1
1
2
3
4
AG1-A-SA DY
CRT1 AG1-910-SB
2D5V_S0 17
6
CRT_R 1 11
G
7
CRT_G 2 12 DAT_DDC1_5
S D DAT_DDC1_5 8
7 GMCH_DDCDATA
CRT_B 3 13 CRT_HSYNC1
5V_CRT_S0 9 <Core Design>
FDN337N-1-GP 4 14 CRT_VSYNC1
Q6 10
G
5 15 CLK_DDC1_5
Wistron Corporation
7 GMCH_DDCCLK S DCLK_DDC1_5 16 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
FDN337N-1-GP VIDEO-15-42-GP-U Title

CONNECTOR
Q7
20.20378.015 CRT Connector
Custom
AG1(Alviso) 01
A B C D E
AG1-A-SA AG1-910-01
AG1-910-SB SC22P50V2JN-4GP 1D05V_S0
C277 3D3V_S0
1 2
1
AG1-910-01 10KR2J-3-GP
R219 R77
56R2J-4-GP LPC_LDRQ1 1 2
4
DY
1
3D3V_AUX_S5 RTC_AUX_S5 X2 R227 KBRCIN#_1 1 4
2
10MR3J-L1-GP
H_DPSLP# KA20GATE_1 2 3
X-32D768KHZ-38GPU
D22 RN16
1
4 1 SRN10KJ-5-GP 4
2
C259 U26A
3 SC1U10V3ZY-6GP
LPC_LAD[0..3] 29
2
1 2
BAT_D2 RCT_X1 Y1 P2 LPC_LAD0
C272 RCT_X2 Y2 RTCX1 LAD[0]/FWH[0] LPC_LAD1
RTCX2 LAD[1]/FWH[1] N3
SC22P50V2JN-4GP LPC_LAD2
LPC
N5
RTC
BAT54C-1-GP R215 1 RCT_RST# LAD[2]/FWH[2] LPC_LAD3
AG1-910-01 2 20KR2F-L-GP AA2 RTCRST# LAD[3]/FWH[3] N4
1
R202 AG1-A-SA R222 1 2 1MR2J-1-GP INTRUDER# AA3 N6 LPC_LDRQ#0

1KR2J-1-GP INTVRMEN INTRUDER# LDRQ[0]# LPC_LDRQ1 TP27 TPAD28
AA5 INTVRMEN LDRQ[1]#/GPI[41] P4
1
TP25 TPAD28
C53 P3 LPC_LFRAME# 29
2
SCD1U16V2ZY-2GP 19 INTRUDER# LFRAME#/FWH[4]

AG1-910-01 D12
2
EE_CS 1D05V_S0
B12 EE_SHCLK
D11 EE_DOUT A20GATE AF22 KA20GATE_1 29
F13 EE_DIN A20M# AF23 H_A20M# 4
1
LAN
AG1-910-01 F12 AE27 H_CPUSLP# 4,6 AG1-910-01 R214
R101 LAN_CLK CPUSLP#
BAT
56R2J-4-GP
1 2 B11 LAN_RSTSYNC DPRSLP# AE24 H_DPRSLP# 4
AD27 H_DPSLP# 4
2
DPSLP#
4
1
2
3
10KR2J-3-GP E12
CPU
LANRXD[0] H_FERR_R R216 1
E11 LANRXD[1] FERR# AF24 2 56R2J-4-GP H_FERR# 4
Y C13 LANRXD[2]
CPUPWRGD/GPO[49] AG25 H_PWRGD 4,19
2nd C12 LANTXD[0]
AG1-910-01 C11 LANTXD[1] IGNNE# AG26 H_IGNNE# 4
ACES-CON3-1-GP E13 AE22 FWH_INIT# TP2
3 20.F0735.003 LANTXD[2] INIT3_3V# 3
INIT# AF27 H_INIT# 4
RTC1 CONNECTOR R90 1 2 0R0603-PAD C10 AG24 H_INTR 4
26 ACZ_BITCLK ACZ_BIT_CLK INTR
1
1 2 ACZ_SYNC_R B9 1D05V_S0
AC-97/AZALIA
21,26 ACZ_SYNC 39R2J-L-GP R99 ACZ_SYNC C260
2nd source: 20.F0736.003 ACZ_RST#_R RCIN# AD23 KBRCIN#_1 29
SC4700P50V2KX-1GP
1 2 A10
2
21,26 ACZ_RST# ACZ_RST#
1
39R2J-L-GP R100 AF25
26 ACZ_SDATAIN0 F11 ACZ_SDIN[0]
NMI
SMI# AG27
H_NMI 4
H_SMI# 4
DY R211
AG1-910-01 F10 75R2F-2-GP
21 ACZ_SDATAIN1 ACZ_SDIN[1]
B10 ACZ_SDIN[2] STPCLK# AE26 H_STPCLK# 4
TP36 TPAD28
2
1 2 ACZ_SDATAOUT_R C9 AE23 H_THERMTRIP_R 1 R210 2 PM_THRMTRIP-I# 4,7,19
21,26 ACZ_SDATAOUT R94 39R2J-L-GP ACZ_SDO THRMTRIP# 56R2J-4-GP
AC19 AC16 Layout Note: R632 needs to placed

SATALED# DA[0] IDE_PDA0 20
AB17 within 2" of ICH6, R634 must be placed
DA[1] IDE_PDA1 20
AE3 AC17 within 2" of R632 w/o stub.
SATA[0]RXN DA[2] IDE_PDA2 20
AD3 SATA[0]RXP
AG2 SATA[0]TXN DCS1# AD16 IDE_PDCS1# 20
BAT EC69 1 2 SCD01U16V2KX-3GP AF2 AE17 IDE_PDCS3# 20
SATA[0]TXP DCS3#
AG1-910-01
AD7 AD14
DY AC7
SATA[2]RXN DD[0]
AF15
IDE_PDD0 20
SATA
SATA[2]RXP DD[1] IDE_PDD1 20
AF6 SATA[2]TXN DD[2] AF14 IDE_PDD2 20
AG1-910-SB AG6
IDE
SATA[2]TXP DD[3] AD12 IDE_PDD3 20
DD[4] AE14 IDE_PDD4 20
RTC_AUX_S5 AC2 AC11
SATA_CLKN DD[5] IDE_PDD5 20
AC1 SATA_CLKP DD[6] AD11 IDE_PDD6 20
DD[7] AB11 IDE_PDD7 20
1
AG11 SATARBIAS# DD[8] AE13 IDE_PDD8 20

2 2
R56 AG1-910-01 AF11 AF13
SATARBIAS DD[9] IDE_PDD9 20
100KR2J-1-GP AB12
DD[10] IDE_PDD10 20
DD[11] AB13 IDE_PDD11 20
AC13 IDE_PDD12 20
2
P.H. for internal VCCSUS1_5 DD[12]

20 IDE_PDIORDY AF16 IORDY DD[13] AE15 IDE_PDD13 20
INTVRMEN AB16 AG15
20 INT_IRQ14 IDEIRQ DD[14] IDE_PDD14 20
20 IDE_PDDACK#
AB15 DDACK# DD[15] AD13 IDE_PDD15 20
20 IDE_PDIOW# AC14 DIOW#
1
20 IDE_PDIOR# AE16 DIOR# DDREQ AB14 IDE_PDDREQ 20

R60
0R2J-GP
DY
2
1 <Core Design> 1
Wistron Corporation
Title
ICH6-M (1 of 4)
A3
AG1(Alviso) 01
Date: Thursday, November 03, 2005 Sheet 15 of 40
A B C D E
A B C D E
U26C Layout Note:

PCIE AC coupling caps
U26B 3D3V_S0 need to be within 250 mils of the driver.
2,24,28 PCI_AD[31..0]
RN15 PM_RI# T2 H25
PCI_AD0 PCI_REQ#0 SRN10KJ-4-GP RI# PERn[1]
E2 AD[0] REQ[0]# L5 PCI_REQ#0 24 PERp[1] H24
PCI_AD1 E5 PCI C1 PCI_GNT#0 PCI_GNT#0 24 1 8SATA0_R0 SATA0_R0 AF17 G27
PCI_AD2 AD[1] GNT[0]# PCI_REQ#1 SATA[0]GP/GPI[26] PETn[1]
C2 AD[2] REQ[1]# B5 PCI_REQ#1 28 2 7SATA0_R1 SATA0_R1 AE18
SATA[1]GP/GPI[29] PETp[1] G26
PCI_AD3 F5 B6 PCI_GNT#1 28 3 6SATA0_R3 SATA0_R2 AF18
PCI_AD4 AD[3] GNT[1]# PCI_REQ#2 SATA[2]GP/GPI[30]
F3 AD[4] REQ[2]# M5 PCI_REQ#2 22 4 5SATA0_R2 SATA0_R3 AG18
SATA[3]GP/GPI[31] PERn[2] K25
PCI_AD5
PCI-EXPRESS
E9 AD[5] GNT[2]# F1 PCI_GNT#2 22 PERp[2] K24
PCI_AD6 F2 B8 PCI_REQ#3 Y4 J27
AD[6] REQ[3]# 18 SMB_CLK SMBCLK PETn[2]
PCI_AD7 D6 C8 TP35 TPAD28 W5 J26
AD[7] GNT[3]# 18 SMB_DATA SMBDATA PETp[2]
PCI_AD8 E6 F7 BOOT_BLOCK# TP37 TPAD28 SMB_LINK_ALERT# Y5
PCI_AD9 AD[8] REQ[4]#/GPI[40] TP34 TPAD28 SMLINK0 LINKALERT#
D3 E7 W4 M25
GPIO
4 4
PCI_AD10 AD[9] GNT[4]#/GPO[48] PCI_REQ#5 SMLINK1 SMLINK[0] PERn[3]
A2 AD[10] REQ[5]#/GPI[1] E8 U6 SMLINK[1] PERp[3] M24
PCI_AD11 D2 F6 PCI_GNT#5 MCH_SYNC# AG21 L27
PCI_AD12 AD[11] GNT[5]#/GPO[17] PCI_REQ#6 MCH_SYNC# PETn[3]
D5 AD[12] REQ[6]#/GPI[0] B7 26 ACZ_SPKR
F8 SPKR PETp[3] L26
PCI_AD13 H3 D8 PCI_GNT#6
PCI_AD14 AD[13] GNT[6]#/GPO[16]
B4 AD[14] 29 PM_SUS_STAT# W3 SUS_STAT#/LPCPD# PERn[4] P24
PCI_AD15 J5 J6 P23
AD[15] C/BE[0]# PCI_C/BE#0 22,24,28 PERp[4]
PCI_AD16 K2 H6 DBRESET# U2 N27
AD[16] C/BE[1]# PCI_C/BE#1 22,24,28 SYS_RESET# PETn[4]
PCI_AD17 K5 G4 AG1-910-01 N26
AD[17] C/BE[2]# PCI_C/BE#2 22,24,28 PETp[4]
PCI_AD18 D4 G2 AD19
AD[18] C/BE[3]# PCI_C/BE#3 22,24,28 7 PM_BMBUSY# BMBUSY#
PCI_AD19 L6 T25 DMI_RXN0 7
PCI_AD20 AD[19] DMI[0]RXN
G3 AD[20] IRDY# A3 PCI_IRDY# 22,24,28 29 ECSCI#_1 AE19 GPI[7] DMI[0]RXP T24 DMI_RXP0 7
PCI_AD21 H4 E1 R1 R27 DMI_TXN0 7
Layout Note:
PCI_PAR 22,24,28
Direct Media Interface

PCI_AD22 AD[21] PAR R76 29 ECSMI# GPI[8] DMI[0]TXN PCIE AC coupling caps
H2 AD[22] PCIRST# R2 1 210R2J-2-GP PCIRST1# 22,24,28 DMI[0]TXP R26 DMI_TXP0 7
PCI_AD23 H5 C3 SMB_ALERT# W6 need to be within 250 mils of the driver.
AD[23] DEVSEL# PCI_DEVSEL# 22,24,28 SMBALERT#/GPI[11]
1
PCI_AD24 B3 E3 V25 DMI_RXN1 7
AD[24] PERR# PCI_PERR# 22,24,28 DMI[1]RXN
PCI_AD25 M6 C5 PCI_LOCK# C67 TP60 TPAD28 ICH_GPI12 M2 V24 DMI_RXP1 7
PCI_AD26 AD[25] PLOCK# SC22P50V2JN-4GP GPI[12] DMI[1]RXP
B2 G5 PCI_SERR# 22,24,28 R6 U27 DMI_TXN1 7
2
PCI_AD27 AD[26] SERR# 29 ECSWI# GPI[13] DMI[1]TXN
K6 AD[27] STOP# J1 PCI_STOP# 22,24,28 DMI[1]TXP U26 DMI_TXP1 7
PCI_AD28 K3 J2 AC21
AD[28] TRDY# PCI_TRDY# 22,24,28 3 PM_STPPCI# STP_PCI#
PCI_AD29 A5 Y25 DMI_RXN2 7
PCI_AD30 AD[29] TP21 TPAD28 ICH_GPO19 DMI[2]RXN
L1 AD[30] AB21 GPO[19] DMI[2]RXP Y24 DMI_RXP2 7
PCI_AD31 K4 R5 PLT_RST1#_1 1 R67 247R2J-2-GP PLT_RST1# 7,18,29 W27 DMI_TXN2 7
AD[31] PLTRST# DMI[2]TXN
PCICLK G6 CLK_ICHPCI 3 3,34 PM_STPCPU#
AD22 STP_CPU# DMI[2]TXP W26 DMI_TXP2 7
2,24,28 PCI_FRAME# J3 FRAME# PME# P6 ICH_PME# 22,29 Int. PH
TP6 TPAD28 ICH_GPO21 AD20 AB24 DMI_RXN3 7
KBC_SLP_WAKE AD21 GPO[21] DMI[3]RXN 1D5V_S0
Interrupt I/F AB23 DMI_RXP3 7
INT_PIRQA# INT_PIRQE# 29 KBC_SLP_WAKE GPO[23] DMI[3]RXP
N2 PIRQ[A]# PIRQ[E]#/GPI[2] D9 INT_PIRQE# 22 DMI[3]TXN AA27 DMI_TXN3 7
24 INT_PIRQB# INT_PIRQB# L2 C7 INT_PIRQF# INT_PIRQF# 28 V3 AA26 DMI_TXP3 7
Place within 500 mils of ICH
PIRQ[B]# PIRQ[F]#/GPI[3] 31 PCB_VER1 GPIO[24] DMI[3]TXP
1
3 INT_PIRQC# M1 C6 INT_PIRQG# INT_PIRQG# 24
3
INT_PIRQD# PIRQ[C]# PIRQ[G]#/GPI[4] INT_PIRQH# 10KR2J-3-GP 1 R83 R86
L3 PIRQ[D]# PIRQ[H]#/GPI[5] M3 AG1-910-01 2 P5 GPIO[25] DMI_CLKN AD25 CLK_PCIE_ICH# 3
R3 AC25 24D9R2F-L-GP
31 PCB_VER0 GPIO[27] DMI_CLKP CLK_PCIE_ICH 3
RESERVED CHK_PW# T3 AG1-910-SB
TP17 TPAD28 TPAD28 TP16 31 CHK_PW# GPIO[28]
AC5 AD9 22,24,28,29 PM_CLKRUN# AF19 F24 AG1-910-01
2
TP3 TPAD28 RSVD[1] RSVD[6] TPAD28 TP15 TP4 TPAD28 ICH_GPIO33 CLKRUN# DMI_ZCOMP
AD5 RSVD[2] RSVD[7] AF8 AF20 GPIO[33]
TP10 TPAD28 AF4 AG8 TPAD28 TP14 TP20 TPAD28 ICH_GPIO34 AC18 F23 DMI_IRCOMP_R
TP11 TPAD28 RSVD[3] RSVD[8] TPAD28 TP22 GPIO[34] DMI_IRCOMP
AG4 RSVD[4] TP[3] U3
TP18 TPAD28 AC9 ICH6_WAKE# U5 C23 3D3V_S5
RSVD[5] WAKE# OC[4]#/GPI[9]
D23 RN72
OC[5]#/GPI[10] USB_OC#6
24,28,29 INT_SERIRQ AB20 SERIRQ OC[6]#/GPI[14] C25 USB_OC#6 21 1 8
AG1-910-01 C24 USB_OC#1 2 7
ICH6 Pullups 3D3V_S5 3D3V_S0
19 THRM#
THRM# AC20 THRM#
OC[7]#/GPI[15] USB_OC#6 3 6
RN6 C27 USB_OC#0 USB_OC#0 21 USB_OC#0 4 5
ICH6_WAKE# PCI_REQ#6 OC[0]# USB_OC#1
1 2 1 8 7,32 VGATE_PWRGD AF21 VRMPWRGD OC[1]# B27
RN47 R70 1KR2J-1-GP PCI_REQ#1 2 7 B26 SRN10KJ-4-GP
3D3V_S0 OC[2]#
INT_PIRQD# 1 10 PM_BATLOW#_R 1 2 BOOT_BLOCK# 3 6 E10 C26 AG1-910-SB
CLOCKS
PCI_REQ#5 PCI_FRAME# R238 8K2R2J-3-GP 3 CLK_ICH14 CLK14 OC[3]#
2 9 4 5
PCI_SERR# 3 8 PCI_STOP# A27 C21
3 CLK48_ICH CLK48 USBP[0]N USBPN0 21
INT_PIRQF# PCI_TRDY# ECSMI# 3D3V_S0
3D3V_S0
4
5
7
6 PCI_PERR# R69
1
DY 2
100KR2J-1-GP ECSCI#_1 1
SRN10KJ-4-GP
2 18 PM_SUS_CLK
V6 SUSCLK
USBP[0]P
USBP[1]N
D21
A20 USBPN1
USBPP0 21
R7F9
ECSWI# R203 100KR2J-1-GP USBPP1 TPAD28 TP71 ACZ_SPKR
SRN10KJ-L3-GP R84
1
DY 2
100KR2J-1-GP PM_SLP_S3#_ICH T4 SLP_S3#
USBP[1]P
USBP[2]N
B20
D19 USBPN2 TPAD28 TP72 R85
1 2
DY 1KR2J-1-GP
RN59 T5 C19 USBPP2 TPAD28 TP75
3D3V_S0 29,37 PM_SLP_S4# SLP_S4# USBP[2]P
PCI_LOCK# 1 10 AG1-910-01 PM_SLP_S5# T6 A18 USBPN3 TPAD28 TP70
INT_PIRQG# PCI_REQ#3 TP23 TPAD28 SLP_S5# USBP[3]N USBPP3 TPAD28 TP69
2 9 B18 R7F8
PCI_DEVSEL# INT_PIRQE# Need to check what power we will use USBP[3]P TPAD28 TP74 1KR2J-1-GP
3 8 AA1 E17 USBPN4 21
POWER MGT
PCI_IRDY# PM_CLKRUN# 19 PWROK PWROK USBP[4]N R97 PCI_GNT#6
4 7 D17 1 2
2 3D3V_S0 5 6 PCI_REQ#2
34 PM_DPRSLPVR 1 2 PM_DPRSLPVR_RAE20
DPRSLPVR
USBP[4]P
USBP[5]N B16 USBPN5
USBPP4 21 DY 2
USB
R204 A16 USBPP5 TPAD28 TP73
100R2J-2-GP PM_BATLOW#_R USBP[5]P USBPN6 TPAD28 TP68 1KR2J-1-GP
SRN10KJ-L3-GP AG1-910-01 V2 C15 USBPN6 21
R7F7
BATLOW# USBP[6]N USBPP6 R87 PCI_GNT#5
RN45 D15 1 2
PCI_REQ#0 1 10
3D3V_S0
29 PM_PWRBTN#
PM_PWRBTN# U1 PWRBTN#
USBP[6]P
USBP[7]N A14 USBPN7
USBPP6 21
USBPN7 21
DY
INT_PIRQA# 2 9 INT_SERIRQ B14 USBPP7 100KR2J-1-GP
USBP[7]P USBPP7 21
INT_PIRQC# 3 8 THRM# PM_SLP_S3#_ICH 1 R78 2 LAN_RST# V5 R223 1 2 PWROK
INT_PIRQH# 4 7 MCH_SYNC# 0R0402-PAD PM_SLP_S3# 18,29,32,35,37 LAN_RST#
USBRBIAS# A22 DY
2
5 6 INT_PIRQB# Y3 B22 USB_RBIAS_PN 1 R250 2

3D3V_S0 29,32 RSMRST#_KBC RSMRST# USBRBIAS
R80
SRN10KJ-L3-GP PM_DPRSLPVR_R 100KR2J-1-GP 22D6R2F-L1-GP
1
DY
2
RN5 R336 R337 Place within 500 mils of ICH

1
SMB_LINK_ALERT# 1 10 R207 100KR2J-1-GP 10KR2J-3-GP AG1-910-01

3D3V_S5
SMLINK0 2 9 100KR2J-1-GP
SMB_ALERT# 3 8 CHK_PW# AG1-910-01
DY
2
SMLINK1 4 7 PM_RI# ICH6-M Strapping Options
1
3D3V_S5 5 6 DBRESET#
SRN10KJ-L3-GP REF FUNCTION DEFAULT OPTIONAL OVERRIDE
R7F9 No Reboot NO_STUFF STUFF

A16 Swap
R7F8 Override NO_STUFF STUFF
R7F7 Boot BIOS NO_STUFF STUFF

1 <Core Design> 1
Wistron Corporation
Title
ICH6-M (2 of 4)
A3
AG1(Alviso) 01
A B C D E
A B C D E
1D5V_S0
Layout Note:
Place above caps within
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
C82
C91
100 mils of ICH near F27, P27, AB27
U26E Layout Note:
Place near pin AA19
2
1D5V_S0
AA22 VCC1_5_B VCC1_5_A F9

C80 AA23 U17
VCC1_5_B VCC1_5_A
EC24
AA24 U16
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VCC1_5_B VCC1_5_A
1
EC31
EC32
EC33
4 TC5 AA25 U14 4
ST220U2D5VBM-2GP VCC1_5_B VCC1_5_A
AB25 U12
2
VCC1_5_B VCC1_5_A
AB26 U11
DY
2
VCC1_5_B VCC1_5_A
AB27 VCC1_5_B VCC1_5_A T17
F25 VCC1_5_B VCC1_5_A T11
F26 P17
CORE
VCC1_5_B VCC1_5_A
F27 VCC1_5_B VCC1_5_A P11
G22 VCC1_5_B VCC1_5_A M17
G23 VCC1_5_B VCC1_5_A M11
G24 VCC1_5_B VCC1_5_A L17
Layout Note: G25 L16
IDE decoupling VCC1_5_B VCC1_5_A
H21 VCC1_5_B VCC1_5_A L14
3D3V_S0 H22 L12
VCC1_5_B VCC1_5_A
J21 VCC1_5_B VCC1_5_A L11 ALL NO_STUFF Caps do
1
C257 J22 AA21 not have layout

VCC1_5_B VCC1_5_A Place within 100
K21 VCC1_5_B VCC1_5_A AA20 requirements but if
1D5V_S0 mils of ICH pin 3D3V_S0 layout allows then place
SCD1U16V2ZY-2GP
K22 AA19
2
VCC1_5_B VCC1_5_A AG13, AG16

L21 VCC1_5_B
next to ICH6
1
L22 AA10
PCIE
VCC1_5_B VCC3_3
1
EC37 M21 AG19
SCD1U16V2ZY-2GP VCC1_5_B VCC3_3 C256
M22 AG16 *Within a given well, 5VREF needs to be up before the
2
VCC1_5_B VCC3_3 SCD1U16V2ZY-2GP
N21 AG13
DY corresponding 3.3V rail
2
VCC1_5_B VCC3_3
N22 VCC1_5_B VCC3_3 AD17
N23 AC15
IDE
VCC1_5_B VCC3_3
N24 VCC1_5_B VCC3_3 AA17
N25 VCC1_5_B VCC3_3 AA15
P21 AA14 Layout Note: 3D3V_S0 3D3V_S0 5V_S0
Layout Note: VCC1_5_B VCC3_3 Distribute in PCI section
P25 VCC1_5_B VCC3_3 AA12
PCI decoupling P26 near pin A2-A6 near D1-H1
VCC1_5_B
2
3 P27 P1 3
VCC1_5_B VCC3_3
1
R21 VCC1_5_B VCC3_3 M7 RB751V-40-1-GP
R22 L7 C97 10R2J-2-GP
VCC1_5_B VCC3_3 SCD1U16V2ZY-2GP D16 R109
T21 L4
2
VCC1_5_B VCC3_3
T22 J7
1
VCC1_5_B VCC3_3
PCI
U21 H7 1D5V_INT_S5 V5REF_S0
VCC1_5_B VCC3_3
U22 VCC1_5_B VCC3_3 H1
1
V21 VCC1_5_B VCC3_3 E4
1
V22 B1 C55 C107
VCC1_5_B VCC3_3 SC1U10V3ZY-6GP
AG1-910-01
W21 A6 C62 C68 SCD1U16V2ZY-2GP
2
VCC1_5_B VCC3_3 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
W22
2
1D5V_S0 VCC1_5_B
Y21 VCC1_5_B VCCSUS1_5 U7
Y22 VCC1_5_B VCCSUS1_5 R7
1D5V_INT_S5 3D3V_S5 5V_S5
AA6 VCC1_5_A
USB
AB4 G19
SCD1U16V2ZY-2GP
VCC1_5_A VCCSUS1_5
1
2
Place within 100 C43 AB5 1D5V_S0
VCC1_5_A
1
mils of ICH AB6 G20 C81 Layout Note:
VCC1_5_A VCC1_5_A RB751V-40-1-GP
1
near pin AG5 AC4 F20 SCD1U16V2ZY-2GP Place near ICH6 10R2J-2-GP
2
VCC1_5_A VCC1_5_A C75 D25 R248

AD4 E24
2
VCC1_5_A VCC1_5_A SCD1U16V2ZY-2GP
AE4 E23
USB CORE
1
VCC1_5_A VCC1_5_A V5REF_S5
AE5 VCC1_5_A VCC1_5_A E22
AF5 E21 Place both
VCC1_5_A VCC1_5_A
1
1D5V_S0 AG5 E20 within 100 mils
SATA
VCC1_5_A VCC1_5_A of ICH near D27 C89 C78

D27
SCD1U16V2ZY-2GP
Place within 100 VCC1_5_A SCD1U16V2ZY-2GP SC1U10V3ZY-6GP

AA7 D26
2
mils of ICH VCC1_5_A VCC1_5_A
AA8 VCC1_5_A VCC1_5_A D25
1
near pin AG9 AA9 D24 AG1-910-SB

1D5V_S0 C44 VCC1_5_A VCC1_5_A
AB8 VCC1_5_A
2 V2D5S_PCI_IDE 2
1D5V_GPLL_ICH_S0 AC8 G8 R81 2D5V_S0
2
VCC1_5_A VCC1_5_A
AD8
1 R224 2 AE8
VCC1_5_A
AB18 1 DY 2 AG1-910-SB
PCI/IDE
VCC1_5_A VCC2_5
1
0R0603-PAD AE9 P7 0R3J-3-GP 1D5V_ICH_S0
VCC1_5_A VCC2_5
1
AF9 C74
VCC1_5_A
REF
Place within 100 C266 C262 AG9 SCD1U16V2ZY-2GP Layout Note: 3D3V_S5
DY
2
mils of ICH SC10U10V5ZY-1GP SCD01U16V2KX-3GP VCC1_5_A Place near AB18 Place within 100 1D5V_INT_S5
AA18
2
V5REF
1
AC27 A8 mils of ICH U35
VCCDMIPLL V5REF
SC2D2U6D3V3MX-1-GP
3D3V_S0 E26 V5REF_S0 C95
Place within 100 VCC3_3 V5REF_S5 3D3V_S5 SCD01U16V2KX-3GP
F21 2
2
mils of ICH 1D5V_S0 V5REF_SUS VOUT
AE1 VCCSATAPLL 3 VIN
1
near E26, E27 1D5V_ICH_S0 AG10 A25 1 C287

VCC3_3 VCCUSBPLL GND
1
C90 1 R212 2 A24
SC1U10V3ZY-6GP
VCCSUS3_3 DY
1
SCD1U16V2ZY-2GP 0R0603-PAD A13 Place within 100
DY
2
VCCLAN3_3/VCCSUS3_3
1
1
F14 AB3 mils of ICH C281 APL5308-15AC-GP
2
C246 VCCLAN3_3/VCCSUS3_3 VCCRTC C94
G13
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP VCCLAN3_3/VCCSUS3_3 1D5V_INT_S5 SCD1U16V2ZY-2GP
G14
2
2
Place within 100 VCCLAN3_3/VCCSUS3_3
VCCLAN1_5/VCCSUS1_5 G11
1
3D3V_S0 mils of ICH A11 G10

pin AE1 VCCSUS3_3 VCCLAN1_5/VCCSUS1_5 C79 Place within 100 RTC_AUX_S5
U4 VCCSUS3_3
V1 AG23 mils of ICH
2
VCCSUS3_3 V_CPU_IO
1
Place within 100 V7 AD26 pin G10 Layout Note:

mils of ICH C45 VCCSUS3_3 V_CPU_IO Place near AB3
W2 VCCSUS3_3 V_CPU_IO AB22
1
pin AG10 SCD1U16V2ZY-2GP Y7 1D05V_S0
2
3D3V_S5 VCCSUS3_3 C50 C51

VCCSUS3_3 G16
1
A17 G15 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2
VCCSUS3_3 VCCSUS3_3 C49
B17 VCCSUS3_3 VCCSUS3_3 F16
C17 F15 SCD1U16V2ZY-2GP
2
VCCSUS3_3 VCCSUS3_3 <Core Design>

1
F18 E16 Layout Note:

1 VCCSUS3_3 VCCSUS3_3 1
1D5V_S0 C96 G17 D16 Place near AG23
Place within 100 VCCSUS3_3 VCCSUS3_3
G18 C16
Wistron Corporation
2
mils of ICH VCCSUS3_3 VCCSUS3_3

pin A13 3D3V_S5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
1
3D3V_S5
EC36
C69
Title
1
ICH6-M (3 of 4)
2
Place within 100 C84 C88

DY C56 mils of ICH SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP Place within 100 Size Document Number Rev
2
SCD1U16V2ZY-2GP pin V7 mils of ICH A3

DY AG1(Alviso) 01
2
pin A17
A B C D E
A B C D E
U26D
E27 VSS VSS F4

Y6 VSS VSS F22
32K suspend clock output 3D3V_S5 Y27 F19
VSS VSS
Y26 VSS VSS F17
U30 AG1-910-01 Y23 VSS VSS E25
W7 VSS VSS E19
16,29,32,35,37 PM_SLP_S3# 1 OE VCC 5 R237 W25 VSS VSS E18
16 PM_SUS_CLK
2 A W24 VSS VSS E15
3 4 32KHZ 1 2 G791_32K 19 W23 E14
GND Y VSS VSS
4 W1 VSS VSS D7 4
10R2J-2-GP V4 D22
VSS VSS
NC7SZ126P5X-GP V27 D20
VSS VSS
V26 VSS VSS D18
1
V23 VSS VSS D14
R239 U25 D13
100KR2J-1-GP VSS VSS
U24 VSS VSS D10
U23 VSS VSS D1
U15 C4
2
VSS VSS
U13 VSS VSS C22
T7 VSS VSS C20
T27 VSS VSS C18
AG1-910-01 T26 VSS VSS C14
T23 VSS VSS B25
T16 VSS VSS B24
T15 VSS VSS B23
AG1-910-01 T14 VSS VSS B21
T13 VSS VSS B19
T12 VSS VSS B15
T1 VSS VSS B13
AG1-910-SB R4 VSS VSS AG7
R25 VSS VSS AG3
R24 VSS VSS AG22
5V_S0 R23 AG20
VSS VSS
R17 VSS VSS AG17
33R2J-2-GP
14
10
U3C R16 AG14
VSS VSS
R367 R15 VSS VSS AG12
R14 VSS VSS AG1
1 2 9 8 1 R201 2 R13 AF7
3 7,16,29 PLT_RST1# RSTDRV#_5 20 VSS VSS 3
R12 VSS VSS AF3
1
0R0402-PAD R11 AF26
VSS VSS
VSS
C447 P22 AF12
7
SC100P50V2JN-3GP TSAHCT125PW-GP R190 VSS VSS
P16 VSS VSS AF10
10KR2J-3-GP P15 AF1
2
VSS VSS
AG1-910-01 P14 AE7
2
VSS VSS
P13 VSS VSS AE6
P12 VSS VSS AE25
N7 VSS VSS AE21
PCIRST# 3V to 5V level shift for HDD & CDROM N17 VSS VSS AE2
N16 VSS VSS AE12
N15 VSS VSS AE11
N14 VSS VSS AE10
N13 VSS VSS AD6
N12 VSS VSS AD24
N11 VSS VSS AD2
N1 VSS VSS AD18
M4 VSS VSS AD15
M27 VSS VSS AD10
M26 VSS VSS AD1
M23 VSS VSS AC6
M16 VSS VSS AC3
M15 VSS VSS AC26
M14 VSS VSS AC24
M13 VSS VSS AC23
M12 VSS VSS AC22
L25 VSS VSS AC12
L24 VSS VSS AC10
2
AG1-A-SA L23 VSS VSS AB9
2
L15 VSS VSS AB7
3D3V_S5 3D3V_S0 L13 AB2
VSS VSS
K7 VSS VSS AB19
K27 VSS VSS AB10
K26 VSS VSS AB1
K23 VSS VSS AA4
8
7
6
5
K1 VSS VSS AA16

RN17 J4 AA13
VSS VSS
SRN10KJ-4-GP J25 VSS VSS AA11
J24 VSS VSS A9
J23 VSS VSS A7
H27 A4
1
2
3
4
VSS VSS
H26 VSS VSS A26
H23 VSS VSS A23
G9 VSS VSS A21
5V_S0 G7 A19
VSS VSS
G21 VSS VSS A15
G12 VSS VSS A12
G1 VSS VSS A1
SMBUS
G
1
3 2
D
16 SMB_CLK SMBC_ICH 3,11

S
Q27
G
1 <Core Design> 1
2N7002PT-U
1
3 2 Wistron Corporation
D
16 SMB_DATA SMBD_ICH 3,11

S

Q14
Q94 & Q95 connect SMLINK and 2N7002PT-U Title
SMBUS in S) for SMBus 2.0
compliance
ICH6-M (4 of 4)
A3
AG1(Alviso) 01
A B C D E
FAN1_VCC
*Layout* 15 mil
1
SCD1U16V2ZY-2GP
3
C70 C77 C73
2 SC10U10V5ZY-1GP SC2200P50V2KX-2GP 5V_S0
2
D13
DY BAT54-4-GP DY
AG1-910-01
1
1
2
AG1-910-SB R82
10KR2J-3-GP 2nd
FAN1 Y
AG1-910-SB 5
2
3
FAN1_VCC 2
1
1
*Layout* 15 mil
C76 4
SC100P50V2JN-3GP
2
ACES-CON3-1-GP
AG1-910-01 20.F0735.003
CONNECTOR
5V_S0
5V_S0 U19 2nd source: 20.F0736.003
R246
AG1-910-01 *Layout* 30 mil
1 2 5V_G791_S0 6 1
VCC FAN1
20 DVCC FG1 4
1
200R2F-L-GP 14
SCD1U16V2ZY-2GP
CLK G791_32K 18
1
R242 C66 C72 16
SDA SMBD_G792 29
4K99R2F-L-GP
C286 C71 SCD1U16V2ZY-2GP 7 18
SC4D7U10V5ZY-3GP
SMBC_G792 29
2
SCD1U16V2ZY-2GP DXP1 SCL
9 19
2
DXP2 NC#19 H_THERMDA
11 DXP3
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
G792_DXP3 SC470P50V2KX-3GP
2
5 G792_DXP2 SC470P50V2KX-3GP
DGND
3
THRM# 15 17 Q24
ALERT# DGND
3
C83
C290
T8_HW_SHUT# 13 Q25 C139 1
V_DEGREE THERM# H_THERMDC C171
Setting T8 as 3 8 1
2
THERM_SET SGND1 G792_DXN2 PMBS3904-1-GP
2 10
2
RESET# SGND2
1
100 Degree 12 PMBS3904-1-GP
2
R241 SGND3 G792_DXN3
49K9R2F-L-GP G30
2
GAP-CLOSE
GAP-CLOSE
V_DEGREE G792SFUF-GP
=(((Degree-72)*0.02)+0.34)*VCC System Sensor
2
G29
3D3V_S0 AG1-910-SB
System接第二組,VGA接第三組
SC2200P50V2KX-2GP
AG1-910-01
1
16 PWROK 1 2 G792_RESET#
4K7R2J-2-GP DXP1:108 Degree H_THERMDA 4
1
C308
R244 R235
10KR2J-3-GP C65 DXP2:H/W Setting Place near chip as close
SC2200P50V2KX-2GP R236 AG1-910-01 DXP3:88 Degree as possible H_THERMDC 4
2
2
10KR2J-3-GP
THRM# 16 DY
2
5V_S5_G913 DCBATOUT
1
R88
DY
1
C92 1MR2J-1-GP
SCD1U16V2ZY-2GP
DY DY U27
2
5 1 HTH
VCC HTH
GND 2
T8_HW_SHUT# LOW3_OFF 4 3
RESET#/RESET LTH
R249
DY
1
G680LT1F-GP 2 1 INTRUDER# 15
1
15KR2F-GP
Output type: R92
3D3V_AUX_S5
BAW56-2-GP
Open-Drain RESET# 0R2J-GP DY
RSMRST# 29
2
D15
3
3
1
1
R93
R247 D14 110KR2F-GP DY
10KR2J-3-GP BAT54-4-GP
2
AG1-910-01
2
(dummy, KBC already delay)

1
C85
SCD1U16V2ZY-2GP
2
DY
<Core Design>
AG1-910-01 Wistron Corporation

C
R95
1 2 B Q15
4,15 H_PWRGD PMBT2222A-1GP Title
1KR2J-1-GP
Thermal/Fan Controllor
E
1
C412 Size Document Number Rev

SCD1U16V2ZY-2GP Custom
AG1(Alviso) 01
2
AG1-910-SB PM_THRMTRIP-I# 4,7,15

HDD Connector CD-ROM Connector
5V_S0
3D3V_S0 5V_S0
AG1-910-SB
AG1-910-SB
AG1-910-01
8
7
6
5
1
RN68 R218 ODD1 Y
SRN4K7J-6-GP 10KR2J-3-GP 51
K
1
ST100U6D3VDM-5
C346 C345 C347 TC16 2 1
DY D23
1
SC10U10V5ZY-1GP
AG1-910-01
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
SSM22LLPT-GP
4 3
2
1
2
3
4
IDE_PDD8 6 5 RSTDRV#_5
2
A IDE_PDD9 8 7 IDE_PDD7
IDE_LED# IDE_PDD10 10 9 IDE_PDD6
IDE_PDD11 12 11 IDE_PDD5
IDE_PDIORDY IDE_PDD12 14 13 IDE_PDD4
IDE_PDDACK# IDE_PDD13 16 15 IDE_PDD3
INT_IRQ14 IDE_PDD14 18 17 IDE_PDD2
IDE_PDD15 20 19 IDE_PDD1
IDE_PDDREQ 22 21 IDE_PDD0
HDD1 IDE_PDIOR#
AG1-910-01 AG1-910-01 24 23
26 25 IDE_PDIOW#
R305
42 20 IDE_PDDACK# 28 27 IDE_PDIORDY
+5V_MOTOR KEY HDDCSEL R217 INT_IRQ14
41 +5V_LOGIC CSEL 28 2 1 30 29
34 PDIAG 470R2J-2-GP 5V_S0 1 2 PDIAG 32 31 IDE_PDA1
PDIAG# RSTDRV#_5 IDE_PDA2 IDE_PDA0
RESET# 1 RSTDRV#_5 18 34 33
15 IDE_PDD15 IDE_PDD15 18 39 IDE_LED# 13 10KR2J-3-GP IDE_PDCS3# 36 35 IDE_PDCS1#
IDE_PDD14 DD15 DASP# INT_IRQ14 IDE_LED#
15 IDE_PDD14 16 DD14 INTRQ 31 INT_IRQ14 15 38 37
15 IDE_PDD13 IDE_PDD13 14 27 IDE_PDIORDY 40 39
IDE_PDD12 DD13 IORDY IDE_PDIOR# IDE_PDIORDY 15
15 IDE_PDD12 12 DD12 DIOR# 25 IDE_PDIOR# 15 5V_S0 42 41 5V_S0
15 IDE_PDD11 IDE_PDD11 10 23 IDE_PDIOW# 44 43
IDE_PDD10 DD11 DIOW# IDE_PDDREQ IDE_PDIOW# 15 R225
15 IDE_PDD10 8 DD10 DMARQ 21 IDE_PDDREQ 15 46 45
15 IDE_PDD9 IDE_PDD9 6 29 IDE_PDDACK# 48 47 CSEL 1 2
DD9 DMACK# IDE_PDDACK# 15
1
15 IDE_PDD8 IDE_PDD8 4 C268 C270 50 49
IDE_PDD7 DD8 C263 10KR2J-2-GP
15 IDE_PDD7 3 DD7 RESERVED#44 44 52
IDE_PDD6 SC10U10V5ZY-1GP AG1-910-SB
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
15 IDE_PDD6 5 32
2
DD6 RESERVED#32
1
15 IDE_PDD5 IDE_PDD5 7 STC-CONN50-4R
IDE_PDD4 DD5 R226
15 IDE_PDD4
IDE_PDD3
9 DD4 NP2 NP2 20.80251.050 DY
15 IDE_PDD3 11 NP1 CONNECTOR 0R2J-GP
IDE_PDD2 DD3 NP1
15 IDE_PDD2 13 DD2
15 IDE_PDD1 IDE_PDD1 15 PIN 49,50 DON'T USE
2
IDE_PDD0 DD1
15 IDE_PDD0 17 DD0 GND 40
GND 30
Check IDE_PDCS3# GND 26
15 IDE_PDCS3# 38 CS1# GND 24
IDE_PDCS1# 37 22
15 IDE_PDCS1# CS0# GND
GND 43
GND 19
IDE_PDA2 36 45
15 IDE_PDA2 IDE_PDA1 DA2 GND
15 IDE_PDA1 33 DA1 GND 46
IDE_PDA0 35 2
15 IDE_PDA0 DA0 GND
SYN-CON44-1-GP 20.F0793.044
CONNECTOR
<Core Design>
Wistron Corporation
Title
HDD and CDROM
A3
AG1(Alviso) 01
100 mil 5V_S5 U45
5V_USB0_S0 5V_USB1_S0
SRN0J-6-GP AG1-910-SB
USB PORT 5V_USB0_S0
CONNECTOR
22.10218.J11
5V_USB1_S0 SKT-USB-105-GP
1 GND OC1# 8 2 3 USB_OC#0 16 8
2 IN OUT1 7 1 4 USB_OC#6 16
AG1-910-01 6
3 EN1/EN1# OUT2 6 4
1
1
TC13 EC52 EC53 4 5 RN66 3
29 USB_PWR_EN# EN2/EN2# OC2# 16 USBPN6
SE100U10VM-4GP
SCD1U16V2ZY-2GP
SC1000P50V3JN-GP
2
DY 16 USBPP6
2
2
1
G546A2P1UF-GP 5
7
1
EC73 EC74
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
USB2
2
DY DY
5V_USB0_S0
AG1-910-SB CONNECTOR
22.10218.J11
SKT-USB-105-GP
8
6
4
16 USBPN7 3
100 mil 16 USBPP7 2
5V_USB0_S0 1
5
7
1
EC55 USB3
TC17 TC20 EC54
DY
SE100U10VM-4GP
SE100U10VM-4GP
SCD1U16V2ZY-2GP
SC1000P50V3JN-GP
2
5V_USB1_S0
CONNECTOR
22.10218.J11
SKT-USB-105-GP
8
6
BLUETOOTH MODULE 16 USBPN0
4
3
2
3D3V_BT_S0 16 USBPP0
U42 3D3V_S0 1
5
3D3V_BT_S0 1 5 7
OUT IN
2 GND
3 NC#3 ON/OFF# 4 USB4
1
EC56 BLUETOOTH_EN 29
DY SCD1U16V2ZY-2GP AAT4250IGV-T1-GP
2
AG1-A-SA
74.04250.A3F AG1-A-SA
2nd
BLUE1
6
4 USBPN4 16
3 USBPP4 16
2
1 3D3V_BT_S0
ETY-CON4-16-GP
20.F0760.004
CONNECTOR 1st source: 20.D0197.104
MDC 1.5 CONNECTOR

MDC1 2nd
13 15
MH1 14
0R0402-PAD 1 2 TP5 TPAD28
R44
15,26 ACZ_SDATAOUT ACZ_SDATAOUT
2 1 3 4 TP7 TPAD28
5 6 3D3V_S5
15,26 ACZ_SYNC ACZ_SYNC 7 8
15 ACZ_SDATAIN1 1 R49 2 ACSDATAIN1_A 9 10 <Core Design>
0R0402-PAD ACZ_RST# 11 12
15,26 ACZ_RST# ACZ_BTCLK_MDC 26
MH2 17
1
16 18
Wistron Corporation
1
C41 C243
1
SC22P50V2JN-4GP AMP-CONN12A-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

2
CONNECTOR R213 C258 Taipei Hsien 221, Taiwan, R.O.C.

SC4D7U10V5ZY-3GP
2
100KR2J-1-GP
20.F0582.012 DUMMY-C2
Title
DY 2nd source: 20.F0604.012 USB / MDC / BLUETOOTH
DY
2
R47
2 1 C40 2 1 Size Document Number Rev
A3
SCD47U10V3ZY-GP 10R2J-2-GP AG1-910-01 AG1(Alviso) 01
A B C D E
TGP0 TGP1 CLOSE TO 16,24,28 PCI_C/BE#[3..0]

TGN0 TGN1 LAN CHIP
2
1
2
1
16,24,28 PCI_AD[31..0]
RN67 RN69
SRN49D9F-GP SRN49D9F-GP
AG1-910-SB
3
4
3
4
LAN_X2
MID0X
MID1X
AG1-A-SA 1 2
2
C254
4 X3 SC15P50V3JN-GP 4
1
XTAL-25MHZ-70GP
C352 C355
1
SCD01U50V3KX-4GP SCD01U50V3KX-4GP LAN_X1 1 2
2
C255
SC15P50V3JN-GP
3D3V_LAN_S5
U48
DY LAN_EECS_3 1 CS VCC 8
1
LAN_X1 1 R302 2 10KR2J-2-GP LAN_EESK 2 7
3D3V_LAN_S5 SK DC
1 2 LAN_EEDI 3 6 C350
3D3V_LAN_S5 DI ORG
LAN_X2 R303 3K6R3-GP LAN_EEDO
SCD1U16V2ZY-2GP
4 5
2
DO GND
ACT_LED# EEPROM LED OPTION USE '01' AT93C46-10SU-1GP

ACT_LED# 23
LDVDD
RTL_LED1# (DEFINED IN SPEC)
RTL_LED1# 23
=> LED0 : ACT
LAN_EESK => LED1 : LINK
LDVDD (BOTH 10/100 AND GIGA CHIP)
LAN_EEDI
LAN_EEDO 3D3V_LAN_S5
R304
3D3V_LAN_S5
3D3V_LAN_S5
1 2 LAN_EECS_3
5K6R3F-GP
PCI_AD0
3 RSET PCI_AD1 3
1
C365
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U39
SCD1U16V2ZY-2GP
2
VSS
RSET
AVDD18
CTRL18
VSS
VSS
XTAL2
XTAL1
AVDDH
VSSPST
GND
LED0
VDD18
LED1
LED2
LED3
GND
EESK
VDD18
EEDO
EEDI
VDD33
EECS
LANWAKE
PCIAD0
PCIAD1
TGP0 1 102 PCI_AD2 3D3V_LAN_S5
23 TGP0 MDI0+ PCIAD2
23 TGN0 TGN0 2 101
LAVDDL MDI0- VSSPST
3 AVDDL GND 100
3
4 99 LDVDD
TGP1 VSS VDD18 PCI_AD3 CTRL25 BCP69T1-1-GP
23 TGP1 5 MDI1+ PCIAD3 98 1
TGN1 6 97 PCI_AD4 Q33
23 TGN1 MDI1- PCIAD4
LAVDDL 7 96 PCI_AD5
2
CTRL25 AVDDL PCIAD5 PCI_AD6
8 CTRL25 PCIAD6 95
9 VSS VDD33 94
10 93 PCI_AD7
AVDDH PCIAD7 PCI_C/BE#0 LDVDD
11 HSDAC+ CBEB0 92
3D3V_S0 D30 LDVDD 12 91
BAT54-4-GP HSDAC- VSSPST PCI_AD8
13 VSS PCIAD8 90
AG1-910-01 14 89 PCI_AD9
MDI2+ PCIAD9
1
1 15 88 C351 C354 C369 C353 C364
LAVDDL MDI2- M66EN PCI_AD10
16 AVDDL PCIAD10 87
3 1 R308 PCI_AD11
SC10U10V5ZY-1GP
2 17 86
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
1KR2J-1-GP VSS PCIAD11 PCI_AD12
18 MDI3+ PCIAD12 85
2 2
2 19 MDI3- VDD33 84
LAVDDL 20 83 PCI_AD13
AVDDL PCIAD13 PCI_AD14
21 VSSPST PCIAD14 82
22 GND VSSPST 81
1 2 ISOLATE# 23 80
R307 15KR2F-GP LDVDD ISOLATE# GND PCI_AD15
24 VDD18 PCIAD15 79
16 INT_PIRQE# 25 78 LDVDD
INTA# VDD18 PCI_C/BE#1
3D3V_LAN_S5 26 VDD33 CBEB1 77
16,24,28 PCIRST1# 27 76 PCI_PAR
PCIRST# PAR PCI_PAR 16,24,28 3D3V_LAN_S5
3 PCLK_LAN 28 75 PCI_SERR#
PCICLK SERR# PCI_SERR# 16,24,28
16 PCI_GNT#2 PCI_GNT#2 29 74
PCI_REQ#2 GNT# NC
16 PCI_REQ#2 30 REQ# GND 73
16,29 ICH_PME# 31 PME# NC 72
1
LDVDD 32 71
PCI_AD31 VDD18 VDD33 PCI_PERR# R306
33 PCIAD31 PERR# 70 PCI_PERR# 16,24,28
PCI_AD30 34 69 PCI_STOP# 0R0603-PAD
PCIAD30 STOP# PCI_DEVSEL# PCI_STOP# 16,24,28
35 GND DEVSEL# 68 PCI_DEVSEL# 16,24,28
PCI_AD29 36 67 PCI_TRDY# LAVDDL
PCI_TRDY# 16,24,28
2
PCI_AD28 PCIAD29 TRDY#
37 PCIAD28 VSSPST 66
38 65 PM_CLKRUN#
VSSPST CLKRUN# PM_CLKRUN# 16,24,28,29
PCIAD27
PCIAD26
PCIAD25
PCIAD24
PCIAD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD18
PCIAD17
PCIAD16
FRAME#
VSSPST
CBEB3
CBEB2
VDD33
VDD18
VDD18
VDD33
VDD18
1
IRDY#
IDSEL
C357
GND
GND
GND
C356
SC1U10V3ZY-6GP SCD1U16V2ZY-2GP
2
GIGALAN: RTL8110SBL
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
RTL8100CL-U
Y 10/100 LAN:RTL8100C
1 <Core Design> 1
PCI_AD27 LDVDD
PCI_AD26 PCI_IRDY#
PCI_IRDY# 16,24,28
PCI_FRAME#
3D3V_LAN_S5
PCI_AD25 PCI_C/BE#2
PCI_FRAME# 16,24,28 Wistron Corporation
PCI_AD24 PCI_AD16 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AG1-910-01 PCI_C/BE#3 PCI_AD17 Taipei Hsien 221, Taiwan, R.O.C.
LDVDD PCI_AD18
R311
LAN_IDSEL G42 Title
PCI_AD23 3D3V_LAN_S5
PCI_AD23 LAN_IDSEL PCI_AD19
1 2
PCI_AD22 LDVDD
3D3V_S5 1 2 3D3V_LAN_S5 RTL8100CL
100R2F-L1-GP-U PCI_AD21 PCI_AD20 GAP-CLOSE-PWR Size Document Number Rev
A3
AG1(Alviso) 01
A B C D E
A B C D E
4 4
10/100M Lan Transformer
U14 2nd
22 TGP0 7 10 TDP_RJ45-1
TD+ TX+ TDN_RJ45-2
22 TGN0 8 TD- TX- 9
RD+ 1 TGP1 22
XRF_RDC 6 2 TGN1 22
CT RD-
14
SCD1U16V2ZY-2GP
CT RDP_RJ45-3
11 CT RX+ 16
XRF_TDC 3 15 RDN_RJ45-6
CT RX-
SCD1U16V2ZY-2GP
1
1
C174
C215
DY
RJ45_45
2
RJ45_78
4
3
2
1
RN1
SRN75J-1-GP
C31
5
6
7
8
LAN_TERMINAL 1 2
3 3
SC1KP2KV8KX-LGP
C445
1 2 1.route on bottom as differential pairs.

SCD01U50V3KX-4GP 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
DY 3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
AG1-910-SB
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
LAN Connector AG1-910-01

LAN1
2 2
R20 9
3D3V_S5 2 1 CONN_PWR_B2 B1
470R2J-2-GP NP1
22 ACT_LED# ACT_LED# B2
TDP_RJ45-1 RJ45_1
TDN_RJ45-2 RJ45_2
RDP_RJ45-3 RJ45_3
RJ45_4
RJ45_45 RJ45_5
MDCW1 2nd RDN_RJ45-6 RJ45_6
3 RJ45_7
1 TIP_MDC 1 L2 2 0R0603-PAD TIP RJ45_78 RJ45_8
2 RING_MDC 1 L1 2 0R0603-PAD RING A1
4 3D3V_S5 2 R33 1 CONN_PWR A2
22 RTL_LED1# 470R2J-2-GP RTL_LED1# A3
ACES-CON2-GP-U AG1-910-01 RING RJ11_1
20.F0714.002 B2:YELLOW TIP RJ11_2
CONNECTOR NP2
A1:ORANGE 10
2nd source: 20.D0196.102
A3:GREEN RJ45-107-GP
connector
22.10245.J01
1 <Core Design> 1
Wistron Corporation
Title
LAN CONN
A3
AG1(Alviso) 01
Date: Saturday, October 29, 2005 Sheet 23 of 40
A B C D E
A B C D E
3D3V_S0 3D3V_S0 CBB_D[0..15] 25

CBB_A[0..25] 25
AG1-910-01
1
1
1
R182
C289 C280 C276 4K7R2J-2-GP 3D3V_S0
SC1000P50V3JN-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP RN50
2
2
CB_MFUNC5 1 8
2
CB1410_GBRST# CB_MFUNC4 2 7
4 INT_SERIRQ 3 6 4
1
CB_MFUNC2 4 5
3D3V_S0 C261
3D3V_S0 SCD1U16V2ZY-2GP
2
SRN10KJ-4-GP
VCC_ASKT_S0
3D3V_S0
1
1
C264 C274 C265
SC1000P50V3JN-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2
1
C269 C288
4
3
2
1
SC1000P50V3JN-GP SCD1U16V2ZY-2GP
2
114
130
102
122
138
126
SRN47KJ-L1-GP
18
30
44
50
22
42
58
78
94
14
66
86
63
90
U40
6
RN52
16,22,28 PCI_AD[31..0]
PCI_AD31 3 125 CBB_REG#
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
GND
GND
GND
GND
GND
GND
GND
GND
GRST# CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
AUX_VCC
SOCKET_VCC
SOCKET_VCC
CBB_REG# 25
5
6
7
8
PCI_AD30 AD31 REG#/CCBE3# CBB_A25
4 AD30 A25/CAD19 116 CBB_A25 25
PCI_AD29 5 113 CBB_A24 CBB_A24 25 CBB_RESET
PCI_AD28 AD29 A24/CAD17 CBB_A23 CBB_OE#
7 AD28 A23/CFRAME# 111 CBB_A23 25
PCI_AD27 8 109 CBB_A22 CBB_A22 25 CBB_CE2#
PCI_AD26 AD27 A22/CTRDY# CBB_A21 CBB_CE1#
9 AD26 A21/CDEVSEL# 107 CBB_A21 25
PCI_AD25 10 105 CBB_A20 CBB_A20 25
PCI_AD24 AD25 A20/CSTOP# CBB_A19
11 AD24 A19/CBLOCK# 103 CBB_A19 25 AG1-910-01
PCI_AD23 15 100 CBB_A18 CBB_A18 25
PCI_AD22 AD23 A18/RFU CBB_A17
16 AD22 A17/CAD16 98 CBB_A17 25
PCI_AD21 17 108 A_CCLKXX R191 1 2 33R2J-2-GP CBB_A16 25
PCI_AD20 AD21 A16/CCLK# CBB_A15
19 AD20 A15/CIRDY# 110 CBB_A15 25
3 PCI_AD19 23 104 CBB_A14 CBB_A14 25
3
PCI_AD18 AD19 A14/CPERR# CBB_A13
24 AD18 A13/CPAR 101 CBB_A13 25
PCI_AD17 25 112 CBB_A12 CBB_A12 25
PCI_AD16 AD17 A12/CCBE2# CBB_A11
26 AD16 A11/CAD12 95 CBB_A11 25
PCI_AD15 38 89 CBB_A10 CBB_A10 25
PCI_AD14 AD15 A10/CAD9 CBB_A9
39 AD14 A9/CAD14 97 CBB_A9 25
PCI_AD13 40 99 CBB_A8 CBB_A8 25
PCI_AD12 AD13 A8/CCBE1# CBB_A7
41 AD12 A7/CAD18 115 CBB_A7 25
45 AD10 A5/CAD21 120 CBB_A5 25
47 AD8 A3/CAD23 124 CBB_A3 25
51 AD6 A1/CAD25 128 CBB_A1 25
PCI_AD4 AD5 A0/CAD26 CBB_D15
53 AD4 D15/CAD8 87 CBB_D15 25
PCI_AD3 54 84 CBB_D14 CBB_D14 25
PCI_AD2 AD3 D14/RFU CBB_D13
55 AD2 D13/CAD6 82 CBB_D13 25
PCI_AD1 56 80 CBB_D12 CBB_D12 25
PCI_AD0 AD1 D12/CAD4 CBB_D11
57 AD0 D11/CAD2 77 CBB_D11 25
144 CBB_D10 CBB_D10 25
16,22,28 PCI_C/BE#[3..0] D10/CAD31
PCI_C/BE#3 12 142 CBB_D9 CBB_D9 25
PCI_C/BE#2 C_BE3# D9/CAD30 CBB_D8
27 C_BE2# D8/CAD28 140 CBB_D8 25
PCI_C/BE#1 37 85 CBB_D7 CBB_D7 25
PCI_C/BE#0 C_BE1# D7/CAD7 CBB_D6
48 C_BE0# D6/CAD5 83 CBB_D6 25
28 81 CBB_D5 CBB_D5 25
16,22,28 PCI_FRAME# FRAME# D5/CAD3
AG1-910-01 29 79 CBB_D4 CBB_D4 25 VCC_ASKT_S0
16,22,28 PCI_IRDY# IRDY# D4/CAD1
31 76 CBB_D3 CBB_D3 25
16,22,28 PCI_TRDY# TRDY# D3/CAD0
16,22,28 PCI_STOP# 33 STOP# D2/RFU 143 CBB_D2 25
1
2 PCI_AD25 CARD_IDESL 13 CBB_D1 2
1 R188 2 IDSEL D1/CAD29 141 CBB_D1 25 AG1-910-01
100R2F-L1-GP-U 32 139 CBB_D0 CBB_D0 25 R192
16,22,28 PCI_DEVSEL# DEVSEL# D0/CAD27 10KR2J-3-GP
34 92 CBB_OE# CBB_OE# 25
16,22,28 PCI_PERR# PERR# OE#/CAD11
16,22,28 PCI_SERR# 35 SERR# WE#/CGNT# 106 CBB_WE# 25
36 93 CBB_IORD# CBB_IORD# 25
16,22,28 PCI_PAR
2
PAR IORD#/CAD13 CBB_IOWR#
3 PCLK_PCM 21 PCI_CLK IOW#/CAD15 96 CBB_IOWR# 25
16,22,28 PCIRST1# 20 RST# WP/IOIS16/CCLKRUN# 136 CBB_WP 25
1
59 RI_OUT#/PME# INPACK#/CREQ# 123 CBB_INPACK# 25

R187 TP95
16 PCI_GNT#0 2 132 CBB_RDY 25
GNT# RDY_IREQ#/CINT#
VCCD0#/SMBDATA/SDATA
10R2J-2-GP 1 133
16 PCI_REQ#0 REQ# WAIT#/CSERR# CBB_WAIT# 25
VCCD1#/SMBCLK/SCLK
137
DY CD2/CCD2#
75
CBB_CD2# 25
CBB_CD1# 25
CLK33_PCM12
CD1/CCD1# CBB_CE2#
CE2/CAD10 91 CBB_CE2# 25
1
88 CBB_CE1# CBB_CE1# 25
VPPD0/SLATCH
C271 CE1#/CCBE0#
RESET/CRST# 119 CBB_RESET 25
SPKR_OUT#
SC22P50V2JN-4GP 134 CBB_BVD2# 25

2
BVD2/SPKR/LED/AUDIO
SUSPEND
BVD1/STSCHG/RI/CSTSCHG 135 CBB_BVD1# 25

117
O2MF6
O2MF5
O2MF4
O2MF3
O2MF2
O2MF1
O2MF0
VPPD1
VS2/CVS2 CBB_VS2# 25
131
DY VS1/CVS1 CBB_VS1# 25
1
C267
SC10P50V2JN-4GP Y CB-1410-U
2
74
73
72
71
CBUS_SUSPEND70
69
68
67
65
64
61
60
62
AG1-910-01
Reduce start up noise
CB_SPKR 26
RC1 1 2 43KR3-GP
25
25
VCCD1#
VCCD0#
DY INT_PIRQG# 16
1
25 VPPD1 INT_PIRQB# 16 AG1-910-01
1
CB_MFUNC2 R185 1
25 VPPD0 47KR2J-2-GP <Core Design>
3D3V_S0 1 2 INT_SERIRQ 16,28,29
R184 10KR2J-3-GP CB_MFUNC4
CB_MFUNC5
Wistron Corporation
2
PM_CLKRUN# 16,22,28,29
AG1-910-01
Title
CardBus_ENE CB1410
A3
AG1(Alviso) 01
A B C D E
A B C D E
PCMCIA Socket Cardbus I/F

Power switch
NP1
CBB_D[0..15] 24
PCH1
CBB_A[0..25] 24
69 CBB_IORD# 24
CBB_IOWR# 24
1 CBB_OE# 24 3D3V_S0
CBB_WE# 24 3D3V_S0
35 CBB_REG# 24
CBB_D3 2
CBB_CD1# CBB_RDY 24
4 24 CBB_CD1# 36 CBB_WP 24 4
CBB_D4 3 CBB_RESET 24
2
CBB_D11 37 5V_S0
CBB_D5 CBB_WAIT# 24 C361 C362
4 CBB_INPACK# 24
CBB_D12 38 SC1U10V3ZY-6GP SCD1U16V2ZY-2GP 4K7R2J-2-GP
2
CBB_D6 5 R318
CBB_D13 39 CBB_CE1# 24
1
CBB_D7 U50
6 CBB_CE2# 24 AG1-910-01
1
CBB_D14 40 C363 C358
CBB_CE1# CBB_BVD1# 24 SCD1U16V2ZY-2GP SC1U10V3ZY-6GP 2211_SHDN#
7 CBB_BVD2# 24
3 3.3V SHDN# 16
CBB_D15 41 4
2
CBB_A10 3.3V
8 5 5V AVCC 13 VCC_ASKT_S0
CBB_CE2# 42 6 12
VCC_ASKT_S0 CBB_VS1# 24 5V AVCC
CBB_OE# 9 9 11
CBB_VS2# 24 12V AVCC
CBB_VS1# 43 TP96 TPAD28
CBB_A11 10 1 10
CBB_IORD# 24 VCCD0# VCCD0# AVPP VPP_ASKT_S0
44 24 VCCD1# 2 VCCD1#
CBB_A9 11 8
SCD1U16V2ZY-2GP
CBB_IOWR# OC#
45 24 VPPD0 15 VPPD0
CBB_A8 12 14 7
SC10U10V5ZY-1GP
24 VPPD1 VPPD1 GND

1
C375
CBB_A17 46
1
CBB_A13 13
C379 CBB_A18 47 TPS2211AIDBR-1GP
2
CBB_A14 14
DY
2
CBB_A19 48
C374 CBB_WE# 15
SC1000P50V3JN-GP CBB_A20 49 PC1
2
CBB_RDY 16 1 4
CBB_A21 50
3 17 3
VPP_ASKT_S0 51
18 2 3
52
CBB_A16 19 CARDBUS-SKT43-GP
1
CBB_A22 53
C372 CBB_A15 20 21.H0057.011
SCD1U16V2ZY-2GP CBB_A23 54
2
CBB_A12 21 CONNECTOR
CBB_A24 55
CBB_A7 22
CBB_A25 56
CBB_A6 23
CBB_VS2# 57
CBB_A16 CBB_A5 24
CBB_RESET 58
CBB_A4 25
CBB_WAIT# 59
CBB_A3 26
CBB_INPACK# 60
CBB_A2 27
CBB_REG# 61
Place close to pin 19. CBB_A1 28
1
CBB_BVD2# 62
C371 CBB_A0 29
DUMMY-C2 CBB_BVD1# 63
CBB_D0 30
CBB_D8 64
CBB_D1 31
2
2 CBB_D9 2
65
CBB_D2 32
CBB_D10 66
CBB_WP
Clock AC termination 24 CBB_CD2# CBB_CD2#
33
67
34
33MHz clock for 32-bit 68
Cardbus card I/F VCC_ASKT_S0 70
1
R309
NP2
DUMMY-R2 CARDBUS68P-15-GP
47K 62.10024.671
CONNECTOR
2
1
C359
SCD01U16V2KX-3GP
2
1 <Core Design> 1
Wistron Corporation
Title
PCMCA
A3
AG1(Alviso) 01
A B C D E
A B C D E
24 CB_SPKR
C368
1 2
ALC655 AC97 AUDIO CODEC
SCD47U10V3ZY-GP
RN70
C366 CB_SPKR1 1 8 C377
16 ACZ_SPKR 1 2 ACZ_SPKR1 2 7 AUDIO_BEEP 1 2 AUDIP_PC_BEEP
KBC_BEEP1 3 6
SCD47U10V3ZY-GP 4 5 SCD1U16V2ZY-2GP
1
4 C367 SRN47KJ-L1-GP 4
29 KBC_BEEP 1 2 R317 C373
22KR2J-GP SC3900P50V3KX-GP
2
SCD47U10V3ZY-GP
2
U52
42
26
13
12
44
43
37
19
20
18
7
4
ALC655-U-GP
C370 Y
GND
GND
AGND
AGND
PHONE
PC-BEEP
LFE-OUT
CEN-OUT
MONO-OUT-R
CD-GND
CD-R
CD-L
R314
2
DY 1 2
DY 1
SCD47U10V3ZY-GP 10R2J-2-GP
MIC2 22
15,21 ACZ_RST# 11 21 MIC 2 1 MIC_IN MIC_IN 27
RESET# MIC1 C381 SC1U10V3ZY-6GP
15,21 ACZ_SYNC 10 36 SOUNDR

AC97_BTCLK SYNC FRONT-OUT-R SOUNDL SOUNDR 27
6 BITCLK FRONT-OUT-L 35 SOUNDL 27
SC1U10V3ZY-6GP
0R0402-PAD C387
R321 1 2 CODEC_XTLSEL 46 24 LINEIN_R 2 1 LINE_IN_R LINE_IN_R 27
XTLSEL LINE-R
1
AG1-910-01 45 23 LINEIN_L 2 1 LINE_IN_L LINE_IN_L 27
0R0402-PAD JD0/GPIO0 LINE-L C397 C396
SC1000P50V3JN-GP
SC1000P50V3JN-GP
15,21 ACZ_SDATAOUT R315 1 2 C383
2
SC1U10V3ZY-6GP
EPSON 15 ACZ_SDATAIN0 1 2 AC97_SDIN
5
8
SDOUT SURR-OUT-R 41
39
3 R316 47R2J-2-GP SDIN SURR-OUT-L 3
FA-365 20PF
50PPM AG1-910-SB 47
48
SPDIFI/EAPD JD1/GPIO1 17
16
SPDIFO JD2
R319 3 15
XTL-OUT AUX-R
3 CLK_Audio 1 2 2 XTL-IN AUX-L 14
0R0402-PAD
FRONT-MIC
VREFOUT
AG1-910-01
AFILT2
AFILT1
NC#40
NC#33
AVDD
AVDD
VRAD
VRDA
VREF
VDD
VDD
1
9
25
38
40
33
34
28
27
32
31
30
29
3D3V_S0_AU DY
AFLT1 C390 1 2 SC3300P50V2KX-1GP U51 AG1-910-01
AFLT2 C399 1 2 SC1000P50V3JN-GP
5VA_S0 VRDA C398 1 2 SC1U10V3ZY-6GP AC97_BTCLK 1 5
A VCC 3D3V_S0_AU
ACZ_RST# 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
B
1
1
C279
C376
3 GND Y 4
R312 1 2 33R2J-2-GP
ALC655_VREF ACZ_BITCLK 15
ALC655_VREF
2
VREFOUT NC7SZ08M5X-NL-GP R310 1 2 33R2J-2-GP ACZ_BTCLK_MDC 21

C382 C393 VREFOUT 27
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP AG1-910-01
2
1
C400
1
1
SC1U10V3ZY-6GP C392 R313
2 SCD1U16V2ZY-2GP AC97_BTCLK1 2
C404 C391 1 2
2
SC1U10V3ZY-6GP SCD1U16V2ZY-2GP 0R0402-PAD
2
2
AG1-910-01
*Layout*
POWER GENERATE 5VA_S0
20 mil
SC22P50V2JN-4GP
5V_S0
R370
3D3V_S0
1
1 2
DY
1
C407
R332
28K7R3F-GP U63 0R3-0-U-GP
5V_S0 U53 1 5
2
SHDN# SET
1 5 AG1-910-01
2
SHDN# SET 5VA_SETPIN 1 2 2 GND

1
2 3D3V_S0_AU
GND
1
R333 C449 3 4
IN OUT
SC1U10V3ZY-6GP
C409 3 4 10KR3F-L-GP
2
IN OUT
SC1U10V3ZY-6GP
G923-330T1UF-1GP
2
1
G923-330T1UF-1GP
1
C450 C416 C451

C384 C389
SC22P50V2JN-4GP
SC2D2U16V5ZY-2GP
SC1U10V3ZY-6GP
2
2
SC1U10V3ZY-6GP SC2D2U16V5ZY-2GP
2
<Core Design>
1 1
Wistron Corporation
Title
AG1-910-01
AC'97 CODEC - ALC655
A3
AG1(Alviso) 01
A B C D E
A B C D E
AUDIO OP AMPLIFIER
AG1-910-SB
I/P signal level
need +5V level
5V_S0 OP+5V
R335
1 2
0R0603-PAD AMP_SHUTDOWN 29 AG1-910-01
1
C405 C410 C406 C441
4 3D3V_S0_AU 4
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
2
2
TP28 R320 AG1-910-SB
TPAD28 10KR2J-3-GP
1
C446
2
AG1-910-01 SC2D2U16V5ZY-2GP
2
U61 U62
20
15
13
15
11
4
9
AG1-910-01
LVDD
RVDD
SHUTDOWN
SVDD
PVDD
VOL
IN1#/IN2
NC#9
NC#11
1
SC1U10V3ZY-6GP 10KR2J-3-GP 10KR2J-3-GP SC1U10V3ZY-6GP SC1U10V3ZY-6GP 10KR2J-3-GP
C299 R196 R327 C394 C293 R193 C442
1 2 SOUND_L2 1 2 SOUND_L_OP1 1 18 SOUND_R_OP1 2 1 SOUND_R2 2 1 SOUNDL 1 2 SOUND_L1 1 2 HP_L 4 12 SC2D2U16V5ZY-2GP
2
26 SOUNDL LIN1 RIN1 SOUNDR 26 INL C1N
2 LIN2 RIN2 17 8 INR C1P 14
SOUND_L_OP1 1 2 SPKR_L+ 24 19 SPKR_R+ 2 1 SOUND_R_OP1 SOUNDR 1 2 SOUND_R1 1 2 HP_R
R195 SPKR_L- LOUT+ ROUT+ SPKR_R- R326 SPKR_L+1 HP_L
7 LOUT- ROUT- 12 1 SHDNR# OUTL 5 2 1
10KR2J-3-GP 10KR2J-3-GP C385 R322 16 7 SPKR_R+1 R194
SC1U10V3ZY-6GP 10KR2J-3-GP SHDNL# OUTR 10KR2J-3-GP
LBYPASS 3
SGND
PGND
SVSS
PVSS
1 2 6 2 1
DY
GND
NC#6
8 16 2 1
C298 23
NC#8
NC#23
RBYPBASS C401 DY SYS_LOUT_IN
SC1U10V3ZY-6GP SC1U10V3ZY-6GP C294
6
10
17
2
13
1
1
GND/HS
GND/HS
GND/HS
GND/HS
G1410Q4U-GP SC470P50V2KX-3GP
MUTE
OUT
C386 C395 AG1-910-SB
GND
GND
AG1-910-01 2 1 HP_R
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
2
3
R323
10KR2J-3-GP
R1
11
9
10
21
22
14
25
G1432Q5U-GP
2 1
R2
D31 Q34
1
3 CHDTC124EU-1GP C388 3
29 KBC_MUTE 1
C443 AG1-910-01 SC470P50V2KX-3GP
3 MUTE_5 SC2D2U16V5ZY-2GP
2
GND
IN
SYS_LOUT_IN 2
1
R365
BAT54C-1-GP 100KR2J-1-GP 29 KBC_MUTE
2
AG1-910-01
LINE OUT AG1-910-01

AG1-A-SA
AG1-A-SA AG1-A-SB SYS_LOUT_IN=High after PLUG-IN

3D3V_S0_AU 20.F0760.004
2
EXT\Internal MIC IN Y
1
R364
2
2K2R2J-2-GP
PHONE-JK222-GP-U
NP2 Internal Speaker 6
ETY-CON4-16-GP
2
MIC2 AG1-910-01 NP1
NP2 100KR2J-1-GP 8 SPKR_L- 4
26 VREFOUT
NP1 1 R368 2 7 SPKR_L+ 3
1
8 5 SPKR_R- 2
AG1-910-01 R199 C300 7 SYS_LOUT_IN 4
2K2R2J-2-GP SC4D7U10V5ZY-3GP 5 SPKR_R+1 3 SPKR_R+ 1
2
4 6
3 SPKR_L+1 2 5
2
30 INT_MIC INT_MIC 6 1
1 2 EXT_MIC_IN_1 2
26 MIC_IN
3
4
1
2
3
4
R206 300R3-GP 1 LOUT1 CONNECTOR SPKR1
1
1
RN56 C403 C402 EC59 22.10138.091 CONNECTOR
C301 PHONE-JK221-GP SRN1KJ-7-GP DY Y SRC100P50V-2-GP 2nd
ERC8
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC3300P50V2KX-1GP
SC330P50V2KX-1GP
22.10138.101
2
2
1
C302
8
7
6
5
SCD1U16V2ZY-2GP
2
1
2
AG1-910-01 1st source: 20.D0197.104
AG1-A-SA
LINE IN PHONE-JK222-GP-U
SRN1KJ-7-GP NP2
NP1
1 AUD_LINE_R 1
26 LINE_IN_R 2 3 8 <Core Design>
1 4 AUD_LINE_L 7
26 LINE_IN_L
5
4
RN54
3 Wistron Corporation
4
3
C411 C408 6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2 Taipei Hsien 221, Taiwan, R.O.C.

RN55 1
SRN10KJ-5-GP Title
2
LIN1 CONNECTOR Audio AMP and Jack

Y 22.10138.091
1
2
AG1(Alviso) 01
A B C D E
A B C D E
3D3V_S0
1
C110 C125 C93
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
4 4
16,22,24 PCI_AD[31..0]
MINI1
125 3D3V_S0
1 2
3 4
5 6
7 8
9 10 AG1-910-01
80211_ACTIVE 11 12 PIN 3-16 : LAN RESERVE
1
29 WIRELESS_EN 13 14
15 16 R129
INT_PIRQF# 17 18 100KR2J-1-GP
5V_S0
3D3V_S0 19 20 INT_PIRQF# 16 WLAN_LED# 13
21 22
2
TP41 TPAD28 23 24
3 PCLK_MINI 25 26 PCIRST1# 16,22,24
27 28 D
3D3V_S0
16 PCI_REQ#1 29 30 PCI_GNT#1 16
3
3 31 32 3
PCI_AD31 33 34 PME#_MINI TPAD28 TP39 C106
PCI_AD29 35 36 BT_COEX1 SC22P50V2JN-4GP
2
PCI_AD30 TPAD28 TP38 80211_ACTIVE 2N7002PT-U
37 38 1
PCI_AD27 39 40 Q17
G
PCI_AD25 41 42 PCI_AD28
2
TP40 TPAD28 BT_COEX2 43 44 PCI_AD26 AG1-910-01
PCI_C/BE#3 45 46 PCI_AD24 S
16,22,24 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 2 PCI_AD21
49 50 R123
PCI_AD21 51 52 PCI_AD22 100R2J-2-GP D
3
55 56 PCI_PAR 16,22,24
PCI_C/BE#2 59 60 PCI_AD16
16,22,24 PCI_C/BE#2 2N7002PT-U
61 62 WIRELESS_EN 1
16,22,24 PCI_IRDY# Q20
63 64 PCI_FRAME# 16,22,24 G
65 66 PCI_TRDY# 16,22,24
2
16,22,24,29 PM_CLKRUN#
16,22,24 PCI_SERR# 67 68 PCI_STOP# 16,22,24
69 70 S
16,22,24 PCI_PERR# 71 72 PCI_DEVSEL# 16,22,24
PCI_C/BE#1 73 74
16,22,24 PCI_C/BE#1
77 78 PCI_AD13
PCI_AD10 81 82
83 84 PCI_AD9 AG1-A-SA
OUT
PCI_AD8 85 86 PCI_C/BE#0
PCI_C/BE#0 16,22,24
PCI_AD7 87 88
3
2 PCI_AD6 2
89 90
R1
93 94 PCI_AD2
R2
97 98 Q16
5V_S0
PCI_AD1 99 100 CHDTC124EU-1GP
INT_SERIRQ 16,24,29
101 102
103 104
2
105 106
GND
IN
107 108 29 WLAN_TEST_LED
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
126
PCISLT124-4-GP
CONNECTOR
62.10032.061
1 <Core Design> 1
Wistron Corporation
Title
MINI-PCI
A3
AG1(Alviso) 01
A B C D E
A B C D E
AG1-910-SB 3D3V_AUX_S5 5V_S0
1 2
KBC_XO
C326
KCOL[1..16] 30
8
7
6
5
3D3V_AUX_S5 SC22P50V2JN-4GP
KROW[1..8] 30
RN41
3D3V_AUX_S5 X4
AG1-910-SB SRN10KJ-4-GP
2
3D3V_S0
1
4 1 3 4
C206 C191 C217 1 L10 2 3D3V_KBC_AUX_S5 Y
1
2
3
4
G
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
0R0603-PAD
KBC_SDA2
KBC_SCL2
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
1
BAT_SDA
BAT_SCL
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
SCD1U16V2ZY-2GP
1
C179 KBC_XI
G
1 2 3 2
S
1
C182 C327
123
136
157
166
161
153
154
163
164
169
170
160
158
SCD1U16V2ZY-2GP SC22P50V2JN-4GP Q31
16
34
45
95
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
71
72
73
74
77
78
79
80
U44 3 2 2N7002PT-U
D
KBC_SCL2 SMBC_G792
S
VCC
VCC
VCC
VCC
VCC
VCC
VCC
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
SCL1
SDA1
SCL2
SDA2
XCLKI
VCCBAT
XCLKO
VCCA
KBC_SDA2 SMBD_G792 SMBC_G792 19
SMBD_G792 19
Q30
2N7002PT-U 3D3V_AUX_S5
15 LPC_LAD[0..3]
LPC_LAD0 15 155
LAD0 GPIO29 MATRIXID2# 31
AG1-910-01
LPC_LAD1 14
LPC_LAD2 13 LAD1 KB Matrix GPIO28 149 MATRIXID1# 31
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
LAD2 GPIO27 148 PRE_CHG 38
1
LPC_LAD3 10 119
LAD3 LPC GPIO26 BLT_BTN# 30
R174
R176
R170
GPIO25 118 CHG_ON# 38
15 LPC_LFRAME# 9 LFRAME# GPIO24 109
AD_OFF 39
3 PCLK_KBC 18 LCLK GPIO23 108
16,24,28 INT_SERIRQ 7 107 E51TXD TP56
2
SERIRQ GPIO22 3D3V_S5
GPIO21 106
105 E51CS#
KBCBIOS_RD# GPIO20 BAT_IN#
150 RD# GPIO19 86 STDBY_LED# 13
31 KBCBIOS_RD# KBCBIOS_WE# KBC_BB_ENABLE#
31 KBCBIOS_WE# 151 WR# GPIO18 85 AG1-910-01
1
KBCBIOS_CS# 173 75 INTERNET# 30
31 KBCBIOS_CS# MEMCS# GPIO17 R240
152 IOCS# GPIO16 70 MAIL# 30
69 10KR2J-3-GP
31 KBC_D[0..7] GPIO15 PM_SLP_S4# 16,37
KBC_D0 138 63 3S1P_I 38 AG1-A-SA
KBC_D1 D0 GPIO14
139 62 PM_SUS_STAT# 16
2
KBC_D2 D1 GPIO13
140 D2 GPIO12 55
KBC_D3 141 54 CAP_LED# 13
KBC_D4 D3 GPIO11 PM_PWRBTN#
3 144 D4 GPIO10 48 FRONT_PWRLED# 13,30 3
KBC_D5 145 22
KBC_D6 D5 GPIO09
146 D6 GPIO08 21 KBC_MUTE 27
KBC_D7 147 20 3D3V_AUX_S5
D7 GPIO07 KEY5# 30
GPIO06 12
124
31 A0 A0 X-bus GPIO05 11
15 KA20GATE_1 6
D20
1 KA20GATE
31
31
31
31
31
A1
A2
A3
A4
A5
125
126
127
128
131
A1
A2
A3
A4
A5
ROM KB3910 GPIO04
GPIO03
GPIO02
GPIO01
GPIO00
8
6
5
4
3
KBRCIN#
KA20GATE
WIRELESS_BTN#
KEY4# 30
30
BAT_IN# 39
39
39
BAT_SCL
BAT_SDA
2
1
RN29
3
4
15 KBRCIN#_1 5 2 KBRCIN# 132

31 A6 A6 SRN8K2J-3-GP
31 A7 133 A7 GPIO0F 41
143 28 ECSMI# ECSMI# 16
ECSCI# 31 A8 A8 GPIO0E
4 3 31 A9
142 A9 GPIO0D 27 WIRELESS_EN 28
16 ECSCI#_1 135 25 KBC_SLP_WAKE 2 1
31
31
A10
A11
134
A10
A11
GPIO0C
GPIO0B 24
PM_CLKRUN# 16,22,24,28
FPBACK 13 PLT_RST1# 7,16,18 R285 10KR2J-2-GP DY
CH731UPT-GP 130 23 PRE_CHG 2 1
31
31
A12
A13 129
A12
A13
GPIO0A NUM_LED# 13
R286 10KR2J-2-GP DY
121 98 3D3V_S5
31 A14 A14 GPIO1F BLUETOOTH_EN 21
31 A15 120 A15 GPIO1E 97 DC_BATFULL# 13
1
113 A16 GPIO1D 94 BLT_LED# 13
31 A16 R296
31 A17 112 A17 GPIO1C 93 WLAN_TEST_LED 28
104 92 100KR2J-1-GP
31 A18 A18 GPIO1B MAIL_LED# 30
103 A19 GPIO1A 91 CHARGE_LED# 13 AG1-910-01
2
168 VCC3VSB
5V_S0 GPIOI2D
30 TDATA_5 117 PSDAT3 GPIO2F 175
1
RN25 116 171 AMP_SHUTDOWN 27
30 TCLK_5 PSCLK3 GPIO2E KBC_PCIRST#1 R297 C332
8 1 115 165 2
7 2 114
PSDAT2 PS/2 GPIO2C
162 BL_ON 0R0402-PAD BL_ON 7
SC1U10V3ZY-6GP
2
PSCLK2 GPIO2B
6 3 111 PSDAT1 GPIO2A 156
1
5 4 110 PSCLK1
AG1-910-01 C336
SC150P50V2JN-3GP
2
2 5V_S0 SRN10KJ-4-GP 2
BATGND
ECRST#
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7
ECSCI#
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
AGND
RN26
GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
1 4 TDATA_5
2 3 TCLK_5
43
40
39
38
37
36
33
32
2
26
29
30
44
76
172
176
99
100
101
102
1
42
47
174
81
82
83
84
87
88
89
90
19
31
96
159
17
35
46
122
137
167
SRN10KJ-5-GP CHANGE TO 71.03910.B0G
KBC_BB_ENABLE#
RSMRST#_KBC
EC_RST#
ECSCI#
26 KBC_BEEP
BRIGHTNESS
16 ECSWI#
AG1-910-SB
A1 3D3V_AUX_S5
SRN10KJ-5-GP
1
1 2
E
16 PM_PWRBTN# C413
16,32 RSMRST#_KBC 2 3
GAP-OPEN B 1 4
SCD1U16V2ZY-2GP
RSMRST# 19
2
35 S5_ENABLE G11
AG1-910-01 13 BRIGHTNESS 35 S5_ENABLE
1
CH3906PT-GP RN49
C
R186 Q28
10KR2J-3-GP AG1-910-01
16,18,32,35,37 PM_SLP_S3#
1
30 KBC_PWRBTN# R34
2
38 AC_IN# 100KR2F-L1-GP
30 KBC_LID# KBC_SLP_WAKE
16 KBC_SLP_WAKE
2
Place near K/B Connector (TOP side)
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable

A4 for DMRP==>High=Disable,Low=Enable
1 A5 for EMWB==>High=Enable,Low=Disable 1
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) 21 USB_PWR_EN#
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended)
<Core Design>
38 3S2P_I
AG1-A-SA
Wistron Corporation
Title
KBC ENE
Custom 01
AG1(Alviso)
Date: Thursday, October 27, 2005 Sheet 29 of 40
A B C D E
A B C D E
LAUNCH BD CONN 3D3V_S5 Cover Up Switch 3D3V_AUX_S5
AG1-A-SA
1
RN44 AG1-A-SA R167
MAIL#_1 8 1 10KR2J-3-GP
LID1
INTERNET#_1 7 2
3D3V_S0 KEY4#_1 6 3 AG1-910-01 AG1-910-01
2
KEY5#_1 5 4 4 2 R169
SRN10KJ-4-GP 3 1 COVER_SW# 1 2 KBC_LID#
1
EC20 KBC_LID# 29
1
4 SCD1U16V2ZY-2GP MAIL_LED# EC30 1 2 SC100P50V2JN-3GP 100R2F-L1-GP-U 4
PUSH-SW81-GP C183
2
LAUNCH1 3D3V_AUX_S5 62.40014.141 SCD22U16V3ZY-GP
2
14 CONNECTOR
12
11 INT_MIC 27
AG1-910-SB 10 AG1-910-01
1
9
8
7
MAIL_LED#
MAIL#_1
MAIL_LED# 29 R58
10KR2J-3-GP
TOUCH PAD 5V_S0
6 1 8
5 INTERNET#_1 2 7 MAIL# 29
2
4 KEY4#_1 3 6 INTERNET# 29
3 KEY5#_1 4 5 KEY4# 29
1
2 PWRBTN# KEY5# 29 2 1 KBC_PWRBTN# 29
EC51 C189
1
1 SRN470J-3-GP R61 SCD1U16V2ZY-2GP SC1U10V3ZY-6GP
TPAD1
2
13 RN28 470R2J-2-GP C58
DY
1
EC21 SCD1U16V2ZY-2GP 14
2
ACES-CON12-GP 12
SCD1U16V2ZY-2GP
4
3
2
1
20.K0174.012 RN27 11
2
CONNECTOR SRC100P50V-2-GP 29 TDATA_5 1 4 TP_DATA 10

2nd ERC1 29 TCLK_5 2 3 TP_CLK 9
8
SRN100J-3-GP 7
5
6
7
8
2nd source: 20.K0185.012 TP_SCROLL_UP TP_SCROLL_RIGHT 6

1 SCRL1 2 TP_SCROLL_UP 5
TP_SCROLL_DOWN 4
5 TP_LEFT 3
3 TP_RIGHT 2 3
3 4
SW-TACT-59-GP-U1 TP_SCROLL_LEFT 1
62.40009.431 13
AG1-A-SB 3D3V_S0 TP_SCROLL_LEFT CONNECTOR TP_SCROLL_RIGHT 2nd
1 SCRL2 2 2nd 1 SCRL3 2
4 ACES-CON12-GP
3 5 5 CONNECTOR
RN58 20.K0174.012
WIRELESS_BTN#
29 WIRELESS_BTN# SRN10KJ-5-GP
1 3 3
SW-TACT-59-GP-U1
4 3
SW-TACT-59-GP-U1
4 2nd source: 20.K0185.012
BLT_BTN# 62.40009.431 62.40009.431
1
WLBTN1 BTBTN1 CONNECTOR CONNECTOR

1
2
EC57 EC58 4 1 4 1 BLT_BTN# 29 2nd TP_SCROLL_DOWN 2nd TP_LEFT TP_RIGHT

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 1 SCRL4 2 1 LEFT1 2 1 RIGHT1 2
2
Y 2 Y 2
DY DY 3 3 Level Trigger 5 5 5
5 5
3 4 3 4 3 4
SW-SLIDE34 SW-SLIDE34 2nd source: 62.40009.341 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1
62.40018.191 62.40018.191 62.40009.431 62.40009.431 62.40009.431
CONNECTOR CONNECTOR CONNECTOR CONNECTOR CONNECTOR
2nd 2nd 2nd
EMI Bypass cap.

Internal KeyBoard CONN KROW[1..8] 29
KCOL[1..16] 29
TP_DATA
ERC10
DY
ERC6 1 8
2
Pin1 ==>*R01 KROW7 1 8 DY TP_CLK 2 7
2
Pin2 ==>*R02 KCOL11 2 7 TP_RIGHT 3 6

KB1 KCOL12 3 6 TP_SCROLL_RIGHT 4 5
1 25 26
Pin3 ==>*R03 KROW8 4 5
NC#26 KROW1 Pin4 ==> C01
1 SRC100P50V-2-GP
C01 KROW2
........ C02 2 Pin5 ==> C02 SRC100P50V-2-GP
3 KROW3 ERC4
C03
4 KCOL1
Pin6 ==> C03 KCOL5 1 8 DY ERC9
R01
R02 5 KCOL2 Pin7 ==>*R04 KCOL6 2 7 TP_SCROLL_UP 1 8 DY
R03 6 KCOL3 Pin8 ==> C04 KCOL7 3 6 TP_SCROLL_LEFT 2 7
7 KROW4 Pin9 ==> C05 KCOL8 4 5 TP_SCROLL_DOWN 3 6
C04 KCOL4 TP_LEFT
8 4 5
R04
9 KCOL5 Pin10 ==> C06 SRC100P50V-2-GP
R05 KCOL6 Pin11 ==> C07
10 ERC3 SRC100P50V-2-GP
R06
R07 11 KCOL7 Pin12 ==> C08 KCOL2 1 8 DY
12 KCOL8 KCOL3 2 7
R08 KCOL9
Pin13 ==> C09 KROW4
R09 13 3 6
14 KROW5 Pin14 ==>*R05 KCOL4 4 5
C05 KCOL10 Pin15 ==> C10
R10 15
16 KROW6 Pin16 ==>*R06 SRC100P50V-2-GP
C06 KROW7
17 ERC5
C07
R11 18 KCOL11 Pin17 ==>*R07 KCOL9 1 8 DY
19 KCOL12 Pin18 ==> C11 KROW5 2 7
R12 KROW8 KCOL10
C08 20 Pin19 ==> C12 3 6
21 KCOL13 Pin20 ==>*R08 KROW6 4 5
R13 KCOL14
22
R14
23 KCOL15 Pin21 ==> C13 SRC100P50V-2-GP
R15 KCOL16 Pin22 ==> C14
24 ERC2
1
R16
NC#25 25 Pin23 ==> C15 KROW1 1 8 DY <Core Design> 1
27 KROW2 2 7
NC#27 Pin24 ==> C16 KROW3 3 6
ACES-CON25-GP Pin25 ==> NC KCOL1 4 5
2nd Wistron Corporation
20.K0197.025 SRC100P50V-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CONNECTOR ERC7 Taipei Hsien 221, Taiwan, R.O.C.
2nd source: 20.K0198.025 KCOL13 1 8 DY
KCOL14 2 7 Title
KCOL15
KCOL16
3
4
6
5
BUTTONs / KB / TOUCHPAD
SRC100P50V-2-GP A3
AG1-910 01
A B C D E
5 4 3 2 1
KBC_D[0..7] 29
29 KBCBIOS_WE#
29 KBCBIOS_RD#
29 KBCBIOS_CS#
D A18 29 D
A17 29
3D3V_AUX_S5 A16 29
1
C360 U49
SCD1U16V2ZY-2GP
32
22
24
31
30
2
2
VDD
CE#
OE#
WE#
A18
A17
A16
29 KBC_D0 13 DQ0 A15 3 A15 29
29 KBC_D1 14 DQ1 A14 29 A14 29
29 KBC_D2 15 DQ2 A13 28 A13 29
29 KBC_D3 17 DQ3 A12 4 A12 29
29 KBC_D4 18 DQ4 A11 25 A11 29
29 KBC_D5 19 DQ5 A10 23 A10 29
29 KBC_D6 20 DQ6 A9 26 A9 29
29 KBC_D7 21 DQ7 A8 27 A8 29
VSS
A0
A1
A2
A3
A4
A5
A6
A7
16
12
11
10
9
8
7
6
5
(SOCKET) 62.10002.032 - (IC)72.39040.H03 IN DIP,SMT
C C
29 A0
29 A1
29 A2
29 A3
29
29
A4
A5
ROM SIZE MAX. 512KBYTE
29 A6
29 A7
3D3V_S0
PLCC32 Socket P/N:

SSKT3262.10002.032
SSKT32 62.10005.032
2
1
SRN10KJ-5-GP
AG1-910-01
RN8
Plz put G12 close SW1
3
4
B B
1 2
PH at ICH6M GAP-OPEN
G12
SW1
16 CHK_PW# 1 5
2 6
29 MATRIXID1# 3 7
29 MATRIXID2# 4 8
SW-DIP-4-2-U2-GP
CONNECTOR
1
EC44 DY
SC1000P50V3JN-GP
2
DY Board ID 3D3V_S0
1
1
R243 R221
10KR2J-3-GP 10KR2J-3-GP
DY DY Planar ID(2,1,0)
2
Keyboard matrix ( from vendor ) PCB_VER0

16 PCB_VER0 PCB_VER1
SA: <Core Design>
A 16 PCB_VER1 A
SB:
US Jap Eur Other
-1 : Wistron Corporation
1

R245 R220 Taipei Hsien 221, Taiwan, R.O.C.
Low Bit MATRIXID1# 1 1 0 0 10KR2J-3-GP 10KR2J-3-GP
Title
DY DY BIOS ROM
2
High Bit MATRIXID2# 1 0 1 0

A3
AG1-910 01
5 4 3 2 1
Run Power
5V_S0
U13
5V_S5 PWRGD for NB and SB
DCBATOUT AG1-910-01 C42
Q11 3D3V_S0
1 2 1 S D 8
TP0610K-T1-GP 2 S D 7
R48
SCD1U16V2ZY-2GP 3 S D 6
RUN_POWER1 RUN_POWER_ON 4 G D
S
1 2 2 3 5 AG1-910-01
K
1
1
10KR2J-3-GP C46
R52 D8 AO4422-1-GP R209
1
3D3V_S0 1KR2J-1-GP
330KR2J-L1-GP
3D3V_S5
MMGZ5242BPT-GP
SCD1U50V3ZY-GP
2
U11
G
1 S D 8
2
R50 2 S D 7
3 S D 6 R208
1 2RUN_POWER2 4 G D 5 3,34 6218_PGOOD 1 2 VGATE_PWRGD 7,16
1
330KR2J-L1-GP AG1-910-01 0R0402-PAD
R51 AO4422-1-GP
AG1-910-01 1KR2J-1-GP
AG1-910-01
PM_SLP_S3 2
PWRGD to Turn on CPU_Core_Power
3 OUT
AG1-A-SA
R1
R2
Q13
CHDTC124EU-1GP
1
2
GND
IN
16,18,29,35,37 PM_SLP_S3#
5V_S5
AG1-910-01
1
R300
10KR2J-3-GP
Aux Power
2
E
16,29 RSMRST#_KBC B CH3906PT-GP 3D3V_AUX_S5

Q32
AG1-910-01
C
1
R301
10KR2J-3-GP 5V_S5 3D3V_AUX_S5 3D3V_AUX_S5
2
D29
5V_S5_G913 Rx
SC22P50V2JN-4GP
1 2
1
1
CH521S-30-GP-U C339 R298
5V_AUX_2951 16K5R2F-1-GP
2
U46 Output = 3.3V
2
D28
1 2 1 5 3D3V_G913_SET output=1.25(1+(Rx/Ry))
SHDN# SET
2 GND
CH521S-30-GP-U 3 4
IN OUT
1
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
DY C340 R299 AG1-910-01
1
C337 C342 G913CF-GP C341 C343 10KR2F-2-GP
C348 DCBATOUT C338
DUMMY-C3
1 2 SC10U10V5ZY-1GP Ry
2
SC10U10V5ZY-1GP
SC1U10V3ZY-6GP
DY
2
U47 SCD1U16V2ZY-2GP
1
C344 1 8
C349 OUTPUT INPUT
2 SENSE FEEDBACK 7
1
1
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP 3 6 <Core Design>

2
SHUTDOWN VO TAP C282 C283

4 GND 100mA SC1U50V5ZY-1-GP
DUMMY-C5
5
2
ERROR# OUTPUT
Wistron Corporation
LP2951CDR2G-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Title
RUN POWER and 3D3V_AUX_S5

A3
AG1-910 01
A B C D E
TPS5130
CPU_CORE ISL6218CV
3D3V/5V/1D05V/2D5V
VID Setting Output Signal Input Signal Output Signal
H_VID0
VID0(I / 1.05V)
6218_PGOOD
H_VID1 PGOOD(OD / 3.3V) SHUTDOWN_S5 FOR
VID1(I / 1.05V) SS_STBY1(I / 5V) 5V
TPS5130_PWRGD
4 H_VID2 SHUTDOWN_S5 FOR PGOUT(OD / 5V) 4
VID2(I / 1.05V) SS_STBY2(I / 5V) 3.3V
H_VID3 PM_SLP_S3#
VID3(I / 1.05V) SS_STBY3(I / 5V) FOR
H_VID4 Output Power 1.05V
VID4(I / 1.05V)
PM_SLP_S3#
H_VID5 STBY_LDO(I / 5V) FOR
VID5(I / 1.05V) VCC_CORE (27A) 1.8V Output Power
VCC_CORE(O)
DCBATOUT_5130 3D3V (6A)

Input Signal STBY_VREF5(I / 28V) 3D3(O)
CPUCORE_ON EN(I / 3.3V) DCBATOUT_5130

STBY_VREF3.3(I / 28V) 5V (6A)
5V(O)
PM_DPRSLPVR DRSEN(I / 3.3V)
Input Power 1D05V (5.2A)
1D05V(O)
PM_STPCPU# DSEN# (I / 3.3V) DCBATOUT
VIN (I / 28V)
3 2D5V (3.5A) 3
5V_S5 2D5V (O)
REG5V_IN(I / 5V)
Voltage Sense
5V_AUX_S5
VCC_CORE_S0 VSEN(I / 1.55V / 1.35V) 5V_AUX_S5
5V_S0
For PGOUT
Input Power
DCBATOUT VCC(I) ISL6227

1D8V/1D5V
5V_S0 VCC(I) Input Signal Output Signal
PM_SLP_S4# CPUCORE_ON
PG1
EN1 (I)
CPUCORE_ON
2 Charger_ISL6255 PG2/REF 2
PM_SLP_S3#_ICH
EN2 (I)
Input Signal Output Signal
CHG_ON#/OFF AC_IN
EN (I / 3.3V) ACPRN (O / 3.3V)
Input Power Output Power
BAT_IN#
THM (I / 3.3V) CHARGE_LED#
XTAL2/PB4 (O/5V) 1D8V_S3 (6A)
1D8V (O)
5V_S5
VCC (I)
KBC_SCL0
SCL (IO / 5V)
1D5V_S0 (6A)
KBC_SDA0 1D5V (O)
SDA (IO / 5V)
Output Power
DCBATOUT
CHG_I_PRE_SEL VCC (O)
CHLIM (IO / 5V)
BT+ Adapter
VCC (O)
PB0/MOSI/AIN0 Input Signal Output Signal
AD_OFF DC_IN+
1 (I) (O) <Core Design> 1
Input Power
DCIN (I) Wistron Corporation
Input Power Output Power 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AD_JK AD+
VCC(I) VCC(O) Title
5V_AUX_S5 Power Diagram

VCC(I) Size Document Number Rev
A3
AG1(Alviso) 01
A B C D E
A B C D E
DCBATOUT_6218
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
1
1
DCBATOUT DCBATOUT_6218 5V_S0 C148 C138 C159 C170 EC48
SCD1U50V3ZY-GP
2
2
L4
1
1 2 C129
4 SC4D7U10V5ZY-3GP 4
2
1
BLM41PG600-GP
5V_S0 R138
2
4D7R3J-L1-GP
1
1
AG1-910-01 BAT54-4-GP
2
0R0402-PAD
5
6
7
8
5
6
7
8
R126 D17
D
D
D
D
D
D
D
D
10R3J-3-GP 6217_VBAT R132
AO4422-1-GP
AO4422-1-GP
AG1-910-01 AG1-910-01 U31 U32
2
2
1
6217_VDD 2nd 2nd VCC_CORE_S0
C127 CORE_AGND
1
SCD1U50V3ZY-GP
G
S
S
S
G
S
S
S
Y Y
2
C114 C134
4
3
2
1
4
3
2
1
SC1U10V3ZY-6GP CORE_AGND SCD33U16V3ZY-GP
C111
2
SCD027U50V3KX-GP
1 2 1K21R2F-2-GPCORE_AGND U29 4K7R3F-GP
L22
2nd
R112 R137
R108 1 38 1 2
6217_DAC VDD VBAT 6217_ISEN1
1 2 1 2 2 DACOUT ISEN1 37 1 2
CORE_AGND 100KR2F-L1-GP 6217_DSV 3 36 6217_PHASE1
DSV PHASE1 L-D56UH-2-GP
1
243KR3F-GP 1 2 R113 6217_FSET 4 35 6217_UG1
0R0402-PAD 6217_PWRCH FSET UG1 6217_BOOT1
1 2 R115 5 34 R280
K
NC#5 BOOT1
1
1KR2J-1-GP 1 2 R114 6217_EN# 6 33 0R2J-GP
37 CPUCORE_ON 0R0603-PAD 6217_DRSEN EN VSSP1 6217_LG1
1 R117 2 7 32 D19 TC7
16 PM_DPRSLPVR DRSEN LG1 DY
5
6
7
8
5
6
7
8
0R0603-PAD 1 R116 2 6217_DSEN# 8 31 SSM34APT-GP SE470U2D5VDM-LGP
2
3,16 PM_STPCPU# DSEN# VDDP
D
D
D
D
D
D
D
D
AO4430-1-GP
AO4430-1-GP
H_VID0 9 30 2nd
5 H_VID0 H_VID1 10
VID0 NC#31
29 AG1-910-SB U33 U34 DY
DY
A
5 H_VID1 VID1 NC#29
1
H_VID2 11 28
3 5 H_VID2 H_VID3 VID2 NC#28 2nd 2nd C320 3
5 H_VID3
12 VID3 NC#27 27
H_VID4 13 26 SC1000P50V3JN-GP
2
5 H_VID4 VID4 NC#26
G
S
S
S
G
S
S
S
H_VID5 14 25 Y Y VCC_CORE_S0
5 H_VID5 PH 10K P.45 VID5 NC#25
15 24
4
3
2
1
4
3
2
1
3,32 6218_PGOOD 6217_EA+ PGOOD VSEN 6217_DRSV
16 EA+ DRSV 23
6217_COMP 17 22 6217_STV
6217_FB COMP STV 6217_OCSET
18 FB OCSET 21
6217_SOFT 19 20
SOFT VSS DY
1
1
1
R111 TC15 TC12 TC14 TC6

1
ST330U3VDM-1-GP
ISL6218CVZ-TGP G41 SE330U2VDM-4-GP SE470U2D5VDM-LGP SE330U2VDM-4-GP
DY
2
1K8R3F R121 C113 1 2 2nd 2nd 2nd
6K04R3F-GP SCD022U16V2KX-3GP
1 2
GAP-CLOSE
2
C112 AG1-910-01
DY
SC470P50V2KX-3GP
2
CORE_AGND CORE_AGND
1
C115 R127
DUMMY-C3 15KR3F-GP
R133 R140
R131
1 2 1 2 1 2
1 2
2
C119 54K9R3F-GP 46K4R3F-1-GP 75KR3F-GP

IMVP IV SC2200P50V2KX-2GP 12.4uA/0.87/0.5 = 28.54uA
1
1
C130
2
Load Line Slope :3mR
SC1800P50V3KX-GP
R130 C132 Rds(on) *Io = Isen * Rsen
2 2
25A*3mV/A=> 75mV 174KR3F-GP
2
SC680P50V2KX-2GP
DY (5m/2)*25A=28.54uA*Rsen
Idroop = 75mV / 6.04K = 12.4uA
SC1000P50V3JN-GP
2
1
R124 R33 = 2.18K ~ 2.15K

VCC_CORE_S0
3K57R3F-L-GP
C118
2
CORE_AGND
2
C128
1
SC1U10V3ZY-6GP
2
R125 AG1-910-01 1D05V_S0

4K7R3F-GP CORE_AGND
2
VCC_CORE_S0
AG1-910-SB
1
R146 R148 R147 R150 R149 R151
DUMMY-R2
DUMMY-R2
DUMMY-R2
DUMMY-R2
DUMMY-R2
DUMMY-R2
2
2
H_VID0
H_VID1
1. U12,U14:AO4422 84.04422.037 H_VID2
U13,U15:AO4430 84.04430.B37 H_VID3
H_VID4
1 R100:3K83R2F H_VID5
<Core Design> 1
1
1
2. U12,U14:IRF7413 84.07413.037 R265 R267 R266 R269 R268 R270
U13,U15:IRF7832-U 84.07832.037 Wistron Corporation

DUMMY-R2
DUMMY-R2
DUMMY-R2
DUMMY-R2
DUMMY-R2
DUMMY-R2
R100:2K43R2F Taipei Hsien 221, Taiwan, R.O.C.
2
2
Title
VCC_CORE
A3
AG1(Alviso) 01
A B C D E
5 4 3 2 1
AG1-SB-910
DCBATOUT_51120 G44
1 2
G43
1 2 GAP-CLOSE-PWR
DCBATOUT_51120
G47
1
GAP-CLOSE-PWR 1 2
5
6
7
8
51120_V5FILT
SC10U35V0ZY-1GP
G45 C117 C87 EC7
D
D
D
D
1 2 U10 SCD1U50V3ZY-GP GAP-CLOSE-PWR
2
AO4422-1-GP G48
GAP-CLOSE-PWR 1 2
R339
D G46 2nd D
1 2 51120_VREG5 1 2 SC10U35V0ZY-1GP GAP-CLOSE-PWR
G
S
S
S
5D1R3F-GP G50
1
GAP-CLOSE-PWR AG1-910-SB 1 2
4
3
2
1
C417 5V_PWR 5V_PWR 5V_S5
G49
SC1U10V3ZY-6GP L17 5V Iomax=5A
1 2 51120_DRVH1 2nd GAP-CLOSE-PWR
2
AG1-910-01 51120_LL1 1 2
OCP>10A G52
GAP-CLOSE-PWR 51120_GND IND-4D7UH-85-GP 1 2
C418 DCBATOUT_51120
G51
5
6
7
8
1 2 51120_LL2 1 251120_LL2_1 1 251120_VBST2 GAP-CLOSE-PWR
DCBATOUT R340 0R0603-PAD U9 G53
D
D
D
D
DY
1
SC33P50V3JN-GP
GAP-CLOSE-PWR SCD1U50V3ZY-GP 1 2
AO4702-1-GP
DY
1
R342
C419
30KR3F-2-GP
C420 2nd C421 TC3 GAP-CLOSE-PWR
51120_LL1 1 251120_LL1_1 1 251120_VBST1 SCD1U50V3ZY-GP ST220U6D3VDM-13GP G54
2
R341 0R0603-PAD 2nd 1 2
2
4 G
3 S
2 S
1 S
SCD1U50V3ZY-GP 51120_V5FILT
SANYO 220uF ESR=25mohm
51120_VREG5 51120_VFB1 GAP-CLOSE-PWR
Iripple=2.4A
SC10U10V5KX-2GP
G55
1
SC10U10V5KX-2GP
51120_VREG3 51120_COMP2 1 2 1 2
1
1
R343 0R0603-PAD 51120_DRVL1 R345
C422 C423 51120_COMP1
1 2 7K5R3F-L1-GP GAP-CLOSE-PWR
R344 0R0603-PAD DY
2
2
AG1-910-01 AG1-910-01 3D3V_S0
19
21
28
13
20
22
7
2
G56
51120_GND 51120_GND 51120_GND 1 2
VREG3
VREG5
VBST1
VBST2
V5FILT
VIN
COMP2
COMP1
0R0603-PAD GAP-CLOSE-PWR
1
C R347 R348 G57 C
1 2 51120_EN1 29 15 51120_LL2 1 2
32 S5_ENABLE EN1 LL2
1 2 51120_EN2 12 26 51120_LL1 100KR2J-1-GP
AG1-SB-910 TP24 TPAD28 R346 0R0603-PAD TPS51120_EN3 10
EN2
EN3
LL1 DY GAP-CLOSE-PWR
TP26 TPAD28 TPS51120_EN5 9 G58
DY
2
EN5 51120_PGD1
PGOOD1 30 1 2 3D3V_PWR 1 2 3D3V_S5
1 2 51120_VFB2 6 11 51120_PGD2 R3501 0R2J-GP
2
R3491 0R0603-PAD 51120_VFB1 VFB2 PGOOD2 R351 0R2J-GP DCBATOUT_51120 GAP-CLOSE-PWR
51120_V5FILT 2 3 VFB1
R352 0R0603-PAD
5V_PWR DRVL1 25 51120_DRVL1
51120_DRVL2
DY G59
AG1-910-01 1 VO1 DRVL2 16 1 2
3D3V_PWR 8 VO2 51120_DRVH1 GAP-CLOSE-PWR
DRVH1 27
51120_VREF2 4 14 51120_DRVH2 G60
VREF2 DRVH2
1 2
SKIPSEL
1
5
6
7
8
1
TONSEL
PGND1
PGND2
D
D
D
D
SC10U35V0ZY-1GP
C424 U7 C34 C30 GAP-CLOSE-PWR
GND
GND
CS1
CS2
SC1000P50V3JN-GP
AO4422-1-GP G61
2
2
U12 2nd 1 2
24
17
5
33
23
18
151120_SKIPSEL 32
31
51120_GND TPS51120RHBR-GPU1 GAP-CLOSE-PWR
G
S
S
S
SC10U35V0ZY-1GP 3D3V Iomax=5A G62
AG1-910-01 AG1-910-SB 1 2
4
3
2
1
3D3V_PWR OCP>10A
1 2 51120_VREF2 51120_DRVH2 Y L14 GAP-CLOSE-PWR
51120_V5FILT R363 51120_LL2 1 2 G63
11KR3F-GP 51120_GND 0R0603-PAD IND-2D5UH-7-GP 1 2
1 2 51120_CS1
5
6
7
8
R353 GAP-CLOSE-PWR
SC33P50V3JN-GP
AG1-910-01 U8 AG1-SB-910
D
D
D
D
B 51120_CS2 B
1 2 R355 AO4702-1-GP
1
R354 0R0603-PAD
DY
1
11KR3F-GP 2nd C427 TC2
2
R356 ST220U6D3VDM-13GP
DY
2
30K9R3F-GP
2nd
G
S
S
S
51120_GND
4
3
2
1
2
51120_VFB2 SANYO 220uF ESR=25mohm G64
51120_DRVL2 1 2
Iripple=2.4A
1
R357 GAP-CLOSE-PWR
51120_COMP1 51120_COMP2 DY 13KR3F-GP
1
R358
DY DY
2
30KR3F-2-GP R359 51120_GND
GND VREF2 FLOAT V5FILT 22KR3F-GP
DY
1
51120_GND
DY
2
C428 C429
51120_COMP1_PL
2
SC390P50V3JN-GP
SC390P50V3JN-GP
AUTOSKIP
51120_COMP2_PL
Vout=1V*(R1+R2)/R2
2
SKIPSEL AUTOSKIP /FAULTS PWM PWM

OFF
1
SC680P50V3JN-GP
CURRENT D-Cap DY
SC1000P50V3JN-GP
C431
N/A N/A DY
1
COMP MODE MODE

2
C430
2
380k/CH1 290k/CH1 220k/CH1 180k/CH1

A
TONSEL 590k/CH2 440k/CH2 330k/CH2 280k/CH2 51120_GND For TPS51120, A
<Core Design>
51120_GND
5V Vout=5V
VFB1 N/A not use ADJ. 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
Fixed Output
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
Wistron Corporation
3.3V 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VFB2 N/A not use ADJ. Fixed Output 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm. Taipei Hsien 221, Taiwan, R.O.C.
Vout=3.3V Title
EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm.
2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm. TPS51120_3D3V_5V
EN3,EN5 LDO OFF not use LDO ON VREG3 on 3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm. A3
AG1(Alviso) 01
5 4 3 2 1
5 4 3 2 1
AG1-910-SB
D 5V_S5 1D8V_S3 G65 D
1 2
SC1U10V3ZY-6GP
GAP-CLOSE-PWR
1
SC10U10V5ZY-1GP
3D3V_S0 G66
C432 C434 C433 1 2
2
AG1-910-01 GAP-CLOSE-PWR
2
G68
SC10U10V5ZY-1GP 1 2
10KR2J-3-GP
R96 GAP-CLOSE-PWR
U59
6
G67
1
1 2
VCNTL
1D05V_EN 7 5
16,18,29,32,35 1D05V_EN POK VIN 1D5V_LDO GAP-CLOSE-PWR 1D5V_S0
VIN 9
G69
1 2 5912_EN_8 8 3 1 2
16,18,29,32,35 PM_SLP_S3# R360 0R0603-PAD EN VOUT
VOUT 4
GAP-CLOSE-PWR
1
1K78R3F-GP
2 R361 C435 TC23
GND
FB
SCD01U16V3KX-LGP
AG1-910-01 ST220U2D5VBM-2GP
2
1
2
APL5912-KAC-GP 5912_FB_2 Trace Length=3cm
Trace Width=5mils
1
2KR3F-L-GP
KEMET
R362
100uF, 4V, B2 Size Trace Resistance>80mohm
C C
Iripple=1.1A, ESR=70mohm
2
AG1-910-01
Vo=0.8*(1+(R1/R2))
3D3V_S0 U37 2D5V_S0
VOUT 2
3 VIN
GND 1
1
1
B B
C296 C306 C297 C303
APL5308-25AC-1GPU
SC1U10V3ZY-6GP
DY DY
2
2
SC2D2U16V5ZY-2GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
AG1-910-SA
A <Core Design> A
Wistron Corporation
Title
1D5V/2D5V(LDO)
A3
AG1(Alviso) 01
5 4 3 2 1
A B C D E
DCBATOUT_6227
DCBATOUT DCBATOUT_6227
G70
1
1 2 C285
C52 SC10U25V6KX-1GP EC34
GAP-CLOSE-PWR SCD1U50V3ZY-GP
2
5
6
7
8
G71 6227_BOOT_2 1 2
D
D
D
D
AO4422-1-GP
1 2 5V_S5 D9
2 SCD1U50V3ZY-GP
4 GAP-CLOSE-PWR 3 U22 4
G72 C54 2nd
1 2 16227_BOOT_1
1 2 1D8V / 6A ,OCP>7.8A
G
S
S
S
AG1-910-SB
GAP-CLOSE-PWR BAW56PT-U SCD1U50V3ZY-GP
4
3
2
1
2R3J-2-GP
G73
1 2 R59 AG1-A-SA 1D8V_S3
2
GAP-CLOSE-PWR DCBATOUT_6227 1 R55 2 L21 2nd
AG1-SB-910 1 2
2R3J-2-GP IND-4D7UH-85-GP
1
R234
5
6
7
8
1
SCD01U16V2KX-3GP
10KR3F-L-GP
R75 AG1-910-SB
DY
1
5V_S5 10R3J-3-GP C63 C273
D
D
D
D
R54 SCD1U50V3ZY-GP TC9 TC11
DY
1
1 2 6227_VCC AG1-910-01 2nd R230 C291 SE220U2D5VDM-4GP
2
SC4D7U10V5ZY-3GP
ST330U3VDM-1-GP
0R2J-GP 2nd
2
1
10R3J-3-GP AO4702-1-GP
SCD1U16V2ZY-2GP
2
2
C48 U20
14
4 G
3 S
2 S
1 S
AG1-910-01 R64
2
10KR3F-L-GP
VIN
28 6 6227_BOOT1
VCC BOOT1
0R0402-PAD
1
5 6227_HDRV1
2
UGATE1
R231
6227_ILIM1 11 4 6227_SW1
6227_EN1 OCSET1 PHASE1
16,29 PM_SLP_S4# 1 2 8 EN1
3 R62 0R0402-PAD 6227_SS1 12 3
2
SOFT1 6227_LDRV1
LGATE1 2
5V_S5 3 AG1-910-01
DY PGND1
ISEN1 7 6227_ISNS1 1 R57 2
1 R71 21D8V_S3_PG 1 2 6227_PG1 15 PG1 VOUT1 9 2KR3F-L-GP
R72 0R0402-PAD 10 6227_VSEN1
10KR2J-2-GP VSEN1
ISL6227
13 DCBATOUT_6227
6227_EN2 DDR 6227_BOOT2
16,18,29,32,35 1D05V_EN 1 2 21 EN2 BOOT2 23 AG1-910-01
R65 0R0402-PAD 17 SOFT2
AG1-910-SB 6227_SS2
24 6227_HDRV2
UGATE2
1
25 6227_SW2 C278 C284
6227_PG2 PHASE2 EC35
34 CPUCORE_ON 1 2 16 PG2/REF
SC10U25V6KX-1GP
SC10U25V6KX-1GP
R73 0R0402-PAD 1 SCD1U50V3ZY-GP
2
GND 6227_LDRV2
27
SCD1U50V3ZY-GP
LGATE2
1
5
6
7
8
C57 26
PGND2
D
D
D
D
AO4422-1-GP
3D3V_S0 22 6227_ISNS2 R63 1 2 2KR3F-L-GP
R74 DY 20
ISEN2
19 6227_VSEN2
2
VOUT2 VSEN2 6227_ILIM2 U23

1 2 OCSET2 18
10KR2J-3-GP 2nd
G
S
S
S
U16
AG1-910-01 ISL6227CAZ-1-GP R68
4
3
2
1
1
78K7R3F-GP
78K7R3F-GP
C61 R66 C64 1D05V_S0 AG1-910-SB

SCD01U16V2KX-3GP SCD01U16V2KX-3GP
2
2
L20
1 2
1D05V/6A
2
2 2
IND-4D7UH-85-GP
2nd
OCP>7.8A
1
SCD01U16V2KX-3GP
C275 R229
OCP
1K74R3F-GP
TC10
5
6
7
8
1
7.8A=>R169=151K SE220U2D5VDM-4GP
2
0D9V
1
2nd AG1-910-SB
D
D
D
D
9.0A=>R169=133K R233
2
2nd 0R2J-GP
2
AO4702-1-GP DY
1
C292
2
5V_S5 U25
DY
4 G
3 S
2 S
1 S
1D8V_S3
SCD1U16V2ZY-2GP
2
1
AG1-910-01
AG1-910-01 R228
1
10KR3F-L-GP
R232
1
C250 0R0402-PAD
SC10U10V5ZY-1GP C244
2
2
SC10U10V5ZY-1GP 79.2271V.20L
2
ESR=15mohm
U36
Iripple=2.7A
10 1 DDR_VREF
VIN VDDQSNS
16,29 PM_SLP_S4# 1 2 9 S5 VLDOIN 2
R181 0R0402-PAD 8 3
GND VTT
1 2 7 S3 PGND 4
16,18,29,32,35 PM_SLP_S3# R180 0R0402-PAD 6 5
VTTREF VTTSNS
GND
1 DDR_VREF_S3 1
<Core Design>
TPS51100DGQ-1-GP
11
1
Wistron Corporation
1
C252
SCD1U16V2ZY-2GP C232 C230 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
SC10U10V5ZY-1GP SC10U10V5ZY-1GP Taipei Hsien 221, Taiwan, R.O.C.

2
Title
1D8V/1D05V/0D9V
A3
AG1(Alviso) 01
Date: Thursday, October 27, 2005 Sheet 37 of 40
A B C D E
D11 DY
2 1
SSM34PT DCBATOUT
AD+
R30
U6 U24
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
D S S D BT+
7 2 2 7
6 D S 3 D02R3720F-2-GP 3 S D 6
1
SCD015U50V3KX-GP
5 D G 4 4 G D 5
EC61 EC9
SC1U50V5ZY-1-GP
1
1
AO4411-1-GP C448 C23 SCD1U50V3ZY-GP AO4407-1-GP
SCD1U50V3ZY-GP
DY
2
2
1
AG1-A-SA
G3 G2 EC68
For EMI ID = 10A @
2
AG1-910-SB GAP-CLOSE
SCD1U50V3ZY-GP
DY
2
GAP-CLOSE
VGS = 10V
1
AG1-A-01
ISL6255_CSIN_1
1
18R3-GP
R14
ISL6255_SGATE
ISL6255_BGATE
2
SCD1U50V3ZY-GP
C22
1 2 DCBATOUT
BSS84LT1G-GP
AG1-910-01
1
AG1-910-SB
SC10U35V0ZY-GP
SC10U35V0ZY-GP
R13
SCD1U50V3ZY-GP
2R3J-2-GP
5
6
7
8
1
C18
C24
C25
1
D
D
D
D
ISL6255_CSIN
ISL6255_CSIP
AO4422-1-GP
5V_S5_G913 AG1-A-SA
2
ISL6255_VDD C20 U5
2
1 2 SCD1U50V3ZY-GP
DY
2
ISL6255_UGATE 2nd
2
G Q2 C21
G
S
S
S
SC1U50V5ZY-1-GP U2
3
ISL6255HRZ G6
S
4
3
2
1
1
AG1-910-01 G1 GAP-CLOSE
21
20
19
18
17
16
15
1
0R0402-PAD D5 GAP-CLOSE BT+
1
R91 R12 BAT54-4-GP L9
CSOP
CSIN
CSIP
SGATE
BGATE
PHASE
UGATE
100KR2J-1-GP SCD1U50V3ZY-GP CHG_PWR-2 1 2 CHG_PWR-3 1 R118 2
C19 IND-15UH-41-GP
1
R11
1 2 22 14 2nd D03R3720F-1-GP
2
CSON BOOT
1 2ISL6255_VDD
R89 2R3J-2-GP 12*12*4 Imax= 6A
AC_IN# 1 2 ISL6255_ACPRN# 23 13 C17
29 AC_IN# ACPRN VDDP ISL6255_VDDP 1 2 AG1-A-SA
0R0402-PAD
1
24 12 ISL6255_LGATE SC1U10V3ZY-6GP C239 C102 C101 C240 C241 C242
DCPRN LGATE
Near ISL6255 Pin 13 DY
5
6
7
8
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SCD1U50V3ZY-GP
2
D
D
D
D
AO4422-1-GP
25 11 ISL6255_VREF
DCIN PGND U1 DY DY DY
2nd
1
AD+ AG1-910-01 ISL6255_VDD 26 10
VDD GND R39
G
S
S
S
R6 20KR3F-GP
1 2 ISL6255_ACSET 27 9 80K6R3F-1-GP
DY
4
3
2
1
ACSET VADJ
SC1U10V3ZY-6GP
2
1
R8 AG1-A-SA
200KR3F-GP R10 28 8
15K4R3-GP DCSET ACLIM
ACSET Threshold 1.27V typ.
1
29 VADJ Cell voltage

2
ACSET > 1.29V Max. --> AC GND
1
C16
VCOMP
DETECT R9 R40 C4
ICOMP
CELLS
CHLIM
2
VREF 15K8R3F-GP 20KR3F-GP SC2700P50V3KX-1GP

Near ISL6255 VREF 4.41V/cell
2
ICM
EN
Pin 26 DY
2
ICHG : 3S2P = 3.0A/ Float 4.20V/cell
1
SC680P50V2KX-2GP AG1-A-SA
ISL6255_VDD C7 3S1P = 1.4A
1 2 IPRE_CHG = 400mA GND 3.99V/cell
AG1-910-01
100KR2J-1-GP
1 2 ISL6255_EN ISL6255_CHLIM
1
R5 ISL6255_ICM ISL6255_VREF R36 ISOURCE_MAX = (((ACLIM/VREF)*0.05+0.05)/Rsense)

1 2
DY Adaptor is 65W/19V : I_LIMIT = 2.9A ( 85% )
1
ISL6255_VDD
0R0603-PAD
R1 D
1
10KR2J-3-GP SCD01U16V2KX-3GP
R2
24K3R3F-GP
10KR2J-3-GP 24K3R3F-GP
ISL6255_VCOMP
3
R4
2
1
R35
D AG1-A-SA R3 AG1-A-SA Q4
100R2F-L1-GP-U 2N7002PT-U
1 2
3
1
0R3-0-U-GP
1
DY 3S2P_I 38
2
R24
SC6800P25V2KX-1GP
C1
Q3
DY G
2
AG1-A-SA
2
DY
2
SC100P50V2JN-3GP
2N7002PT-U
1
2
29 CHG_ON# R19
1
1
C5
C3
C2 R27 S
DY
SCD1U16V2ZY-2GP
G
2
2 1 1 2 <Core Design>
2
21K5R3F-GP
2
S ISL6255_CELLS D 1K74R3F-GP D
DY AG1-910-01
Wistron Corporation
R22 1
3
0R0603-PAD
CELLS Operate Mode

1
Q1 Q9 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

R7 Taipei Hsien 221, Taiwan, R.O.C.
2N7002PT-U
2N7002PT-U
VDD 4S 29 3S1P_I
1 1 PRE_CHG 29
G 100KR3F-GP G Title
2
CHARGER ISL6225
2
GND 3S AG1-A-SA
S S Size Document Number Rev
AG1-910-01 A3
Float 2S AG1-910-SB (Power Team) AG1(Alviso) 01
DY
A B C D E
Adaptor in to generate DCBATOUT DY

D10
PZM24NB1
2
AG1-A-01 3
1
AD+
DC1
4 AD_JK
4 4
U4
1 1 S D 8
1
2 S D 7
C6 3 S D 6 C10
2 SCD1U50V3ZY-GP AD+_2 4 G D 5 SCD1U50V3ZY-GP
2
SC1U50V5ZY-1-GP
AO4411-1-GP
1
3
C13
R37 ID = -10A/70deg
1
100KR2J-1-GP
5 Rds(ON) = 24mohm
6
MH1 SO-8
2
R2
E
DC-JACK115-GP B R1 AG1-910-SB
22.10037.C51 C
connector
1
OUT
PDTA124EU-1-GP
Q10 R38
3
AG1-A-SA 56KR3F-GP
R1
2
R2
Q5
CHDTC124EU-1GP
2
GND
IN
29 AD_OFF AG1-910-01
3 3
1
AG1-910-01
R42
1KR2J-1-GP
2
3D3V_AUX_S5
BATTERY CONNECTOR
2
D6
BAV99PT-GP-U D7
BAV99PT-GP-U BAT1
8
DY DY 1
3
2
1 2 BATA_SCL_1 3
29 BAT_SCL
1 2 R43 27R3F-GP BATA_SDA_1 4
29 BAT_SDA
29 BAT_IN# R41 27R3F-GP 5
6
BT+ 7
9
EC12 EC13
1
2 2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SYN-CON7-11-UGP
DY
1
20.80577.007
EC14 EC15 EC16 EC17 CONNECTOR
2
SC1000P50V3JN-GP
SC1000P50V3JN-GP
SCD1U50V3ZY-GP SCD1U50V3ZY-GP
2
DY
<Core Design>
1 1
Wistron Corporation
Title
AD/BATT CONN
A3
AG1(Alviso) 01
A B C D E
5 4 3 2 1
H1 H2 H3 H4 H5 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
Y Y Y Y Y Y Y Y Y Y Y Y
1
1
34.4A908.001
34.4A903.001
34.4A904.001
34.4A905.001
34.4A906.001
34.4A905.001
34.4A902.001 34.4A902.001
34.4A908.001
D H28 H29 H30 H31 H32 H33 H34
D
HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1
1
5V_S0
3D3V_S0
DCBATOUT BT+
INT_MIC 30
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
EC71 EC38 EC18 EC75 EC76 EC77 EC78 EC10 EC6 EC11 EC19 EC80 EC81 EC82 EC83 EC84
2
2
DY
AG1-910-SB AG1-910-SB
C C
K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11
1 1 1 1 1 1 1 1 1 1 1
SPRING-23-GP SPRING-23-GP SPRING-23-GP SPRING-29-GP SPRING-29-GP SPRING-14 SPRING-14 SPRING-14 SPRING-28 SPRING-28 SPRING-28
AG1-910-SB AG1-910-01
B B
AG1-910-SB
5V_S0
14
<Core Design>
4
A 5 6
Wistron Corporation
A
U3B 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
TSAHCT125PW-GP Taipei Hsien 221, Taiwan, R.O.C.
7
Title
EMI
A3
AG1(Alviso) 01
Date: Wednesday, November 02, 2005 Sheet 40 of 40
5 4 3 2 1

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AG1(Alviso) Block Diagram 2005/11/09

CLK GEN. Mobile CPU G792 Project Code:91.4G301.001

400 MHz 6,7,8,9,10

Mini-PCI SYSTEM DC/DC

Line Out OP AMP ICH6-M 802.11A/B/G 28

INT.SPKR MODEM TPS51100DGQ 37

PCB Layer Stackup USB 29 31 DCBATOUT

L6: Signal 4 BLOCK DIAGRAM

3 CFG19 CPU VTT Select 0 = 1.05V (Default)

1 R122 2 3D3V_APWR_S0 1 R105 2 3D3V_48MPWR_S0 1 R110 2 3D3V_CLKGEN_S0

AG1-A-SA PCLK_MINI_1 56 17 DREFSSCLK1 2 3 DREFSSCLK 7

FS_A SRN33J-4-GP PCIF0/ITP_EN SRC2#

11,18 SMBC_ICH CLK_PCIE_ICH#1

SC22P50V2JN-4GP 7 DREFCLK# DOT96# CPU2_ITP/SRC7

C116 XTAL_IN 50 44 CLK_CPU_BCLK1 RN12 1 4 SRN33J-5-GP-U CLK_CPU_BCLK 4

CLK_MCH_BCLK RN19 1 4 SRN49D9F-GP CLK_ICH14 EC45 1 2 SC10P50V2JN-4GP

CLK_PCIE_ICH RN9 1 4 SRN49D9F-GP CLK48_ICH EC39 1 2 SC10P50V2JN-4GP

XDP_TMS R259 1 GTLREF0 TEST1 TEST2

VCC_CORE_S0 U41D TUALA-SKT-1

AF17 VSS71 VSS168 R25

should be of equal length. B6 T26

Layout Note: B16 U22

differential probe VSS81 VSS178

C15 VSS88 VSS185 W22

C24 VSS91 VSS188 Y2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

H_D#22 H3 G12 H_A#25

H_D#33 HD32# HADSTB#1 H_VREF

H_D#34 HD33# HVREF

H_D#49 HD48# HDINV#2 H_DINV#3

H_D#63 HD62# HHITM#

11,12 M_CKE0 AP21 SM_CKE0 EXP_RXP12 T30

11,12 M_CKE1 AM21 SM_CKE1 EXP_RXP13 U34

11,12 M_CS#0 SM_CS0# THRMTRIP# PM_THRMTRIP-I# 4,15,19 LCTLB_DATA EXP_TXN0

Layout Note: AH15 AE29 1 2 DAT_DDC_EDID F22 G32

SM_OCDCOMP0 DREF_CLKP DREFCLK 3 LVBG EXP_TXN5

D37 DREFSSCLK 3 TP46 TPAD28 L_VREFL F27 M36

11,12 M_ODT3 SM_ODT3 NC3 13 GMCH_TXBCLK- LBCLKN EXP_TXN11

SMVREF0 NC7 13 GMCH_TXAOUT1- LADATAN1 EXP_TXN15

SMYSLEW AF9 A37 A34 F32

AF10 SMYSLEWOUT 13 GMCH_TXAOUT1+ A33 LADATAP1 EXP_TXP3 G36

M_A_DQ24 SADQ23 SA_DQS1# M_A_DQS#2 M_B_DQ24 SBDQ23 SB_DQS1# M_B_DQS#2

DDR SYSTEM MEMORY B

then connect to the gnd plane

Route ASSATVBG gnd from GMCH to

high speed clock.default

graphic clock.1D5V_S0 for

T29 VCC0 VCCA_TVDACA0 F17

K27 VCC26 VCCSM3 AD28

K25 VCC31 VCCSM8 AM26

K21 VCC36 VCCSM13 AG26

K20 VCC40 VCCSM17 AN25

K18 VCC47 VCCSM24 AF25

C35 VCCA_DPLLB VCCSM30 AE20

VSSA_CRTDAC VCCSM36 SC10U10V5ZY-1GP

H20 VCC_SYNC VCCSM39 AM13

VTT0 VCCSM41 C321

K12 AH13 SC10U10V5ZY-1GP

R11 VTT7 VCCSM48 AN12 2 1 2 1 2 1

Layout Notes: VSSA_CRTDAC

T10 VTT16 VCCSM57 AD11

J10 AM1 V1.8_DDR_CAP4 2 1

VTT22 VCCSM63 V1.8_DDR_CAP3