Computer Organization Architecture PDF

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Study Material with Classroom Practice Questions
Processor
Common Bus ( address, Data & Control )

Control Unit
Datapath
Arithmetic
Logic Unit
Memory
Output Input
Registers Program Data Units Units
Storage Storage
Computer Organization & Architecture
(Solutions for Classroom Practice Questions)
1. Computer Arithmetic 2. Memory Organization &

Secondary Memory
01. Ans: (a)

Sol: E = e + Bias
01. Ans: (c)
03. Ans (a) Sol: T = 200 ns
Sol: X = –14.25, S =1, e = original exponent  word frequency
E = biased Exponent, 1
= 9
 5  106 words / sec
b = biasing amount 200  10
14.25 = 1110.01  2 0
02. Ans:
= 1.11001  2 3
Sol: (a) Capacity = T  S B
e = 3, E = 3 + 127
= 512 20484096 B
= 130 
= 29 211 212 B
130 = 10000010 M = 1100100…0 (23 bits)
= 232 B = 4 GB
(b) Data Transfer rate
32 bits 1- Revolution disk covers = 211. 212
= 8 MB
1100 0001 0110 0100 00........0
Disk speed 3000 rpm = 3000 revolutions in
S=1 E=8 M = 23 bits
00...... one minute
C 1 6 4
One minute = 60 sec = 60 1000ms
C1640000H
= 60,000 ms
3000 revolutions  60,000 ms
1 revolution ?
60000m
=  20 ms
3000
20 ms  8 MB
1000 ms ?
8000 M  m
=  400 MB
20 m
Data Transfer rate = 400 MB /Sec
= 400 MBPS
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: 2 : Computer Organization & Architecture

(c) Seek time 05. Ans: (c)
Sol: The use of a cache in a computer system
3 B
increases the Average speed of memory
4 Rotational latency access
Data transfer = 16 -4 = 12 sector
512 sector
4KB 08. Ans: (b)
16
2MB
Sol: Average Latency time= ½ rotation time
Speed = 7200 rpm  120 rps
For 1 rotation = 1/120 = 8.33ms
Data transfer 512 sectors For ½ rotation = 4.166 ms
2MB 2 21
 12  29
4KB 2 09. Ans: (a)
Tfile=Tseek time+Trotational latency+Data Transfer time Sol: LIFO: Last In First Out
(512 + 12) sectors are to be covered
20 ms  2048 sectors 10. Ans: (d)
?  524 sectors Sol: Hit ratio is defined as the number of hits
Sectors requires = 5.117 ms divided by the total number of CPU
Tfile = 10 ms + 5.117 ms = 15.117 ms references to the memory (hits plus misses)
Tavg = H C + (1  H)M
03. Ans: (a) Where H = hit ratio of cache memory
Sol: ROM is used for function table with large C = time to access information in cache
size because after program; ROM content is memory
not possible to destroy and design cost is M = Miss penalty
cheap. = main memory access time
+ cache memory access time.
04. Ans: (d)
Sol: Cache memory - A special very high speed 11. Ans: (c)
memory called a cache is sometimes used to Sol: DRAM access much slower than
increase the speed of processing by making SRAM
current programs and data available to the  More bits  longer wires
CPU at a rapid rate. The cache memory is  Buffered access with two level addressing
employed in computer systems to  SRAM access latency : 2 - 3 ns
compensate for the speed deferential  DRAM access latency: 20 - 35 ns
between main memory access time and  Static RAM -10 ns
processor Logic.

: 3 : Postal Coaching Solutions

 Hard disk for personal computers boast 16. Ans: (c)
access times of about a to 15ms Sol: 212 × 8 = 4096 × 8 = 32768.
 200 times slower than average DRAM.
17. Ans: (c)
12. Ans: (d) Sol: Remain same because it is non-volatile
Sol: Cache size = 4 K word memory
One set has 4 blocks
18. Ans: (d)
Total number of blocks
 Number of sets  Sol: Hit Rate = 80%
4
TCM = 10ns, TMM= 100ns
Number of words = 26
TAvg = HTCM + (1–H)TMM
W = 6
= (0.810ns) + 0.2100ns
4K 212
Number of cache blocks   6  26 = 8ns + 20ns = 28 ns
64 2
26
Number of cache sets   16  2 4
4 3. Pipeline Organization
S=4
02. Ans: (b)

13. Ans: (a)
Sol: First task will be completed after n clocks
Sol: Access time = Seek time + Average rotation
(because there are n segments) and the
delay
remaining m-1 tasks are shipped out at the
1 rotation time = 33.3 ms
rate of one task per pipeline clock.
 Average rotation time = 16.7 ms
Therefore, n + (n1) clock periods are
Total access time = 46.7  47 ms
required to complete m tasks using an
n-segment pipeline. If all m tasks are
14. Ans: (c)
executed without any overlap, mn clock
Sol: Cache memory is used to improve the
periods are needed because each task has to
overall system performance.
pass through all n segments. Thus speed
gained by an n segment pipeline can be
15. Ans: (a)
shown as follows:
Sol: Word size = 16-bit
Speed up P(n) =
Access time = 80-ns
number of clocks required when there is no overlap
No of bytes to be transferred = 1024-B
number of clocks required when tasks are overlapped in time
= 512 Words.
mn
Total time = 512 × 80ns 96µs = 40.96 µs =
n  m 1


03. Ans: (c)  Based on the request length, the DMA
Sol: Max. stage delay = 160 s controller optimizes transfer
Buffer delay = 5 s performance between source and
destination with different external data
Pipeline clock = 165 s
by widths
T1000 = (K + n – 1) Tp clock
 165 495  02. Ans: (d)
= (4+999) * 165 =   s
 1000  Sol: The DMA is the most suitable for Hard
= 165.5 s disk.
04. Ans: (b) 03. Ans: (b)

Sol: For D1 processor, maximum Tseg = 4 ns, Sol: On receiving an interrupt from an I/O
n = 100, k = 5 device, the CPU branches off to the
Time = 104  4 ns = 416 ns interrupt service routine after completion of
the current instruction.
For D2 processor,
04. Ans: (c)
n = 100, k = 8, Tseg = 2 ns
Sol: In microprocessor based systems DMA
Time = 107  2 ns = 214 ns facility is required to increase the speed of
Hence, 202 ns time will be saved data transfer between memory and the I/O
devices.
4. I/O Organization
05. Ans: (b)
Sol: An I/O processor controls the flow of
01. Ans: (b) information between main memory and I/O
devices. It is the extension of concept of
Sol: External interrupts comes from input-output
DMA.
devices, from a timing device, from a circuit
monitoring the power supply or internal 06. Ans: (b)
from other external source Sol: For vectored hardware interrupt, the
Example: I/O devices requesting transfer of interrupting device supplies the respective
data address with additional hardware.
 A DMA controller manages the data
07. Ans: (a)
transfer Sol: In a microprocessor based system, isolated
 A DMA controller can be implemented I/O method is similar to “I/O mapped I/O”
as separated controller from the where the memory and I/O devices are
processor or integrated controller in the provided with separate address space and
processor. address decoders.


08. Ans: (b) Relative Base Addressing Mode: Effective
Sol: Internal interrupts in a microprocessor Address = PC + BR + displacement . Where
based system are initiated by error PC stands for program counter and BR
conditions (Ex. Divide by zero overflow stands for base register.
conditions). External interrupts are “The code is dependent means the option is
produced by external hardware which may direct addressing mode”.
occur at any point of time.
04. Ans: (b)
Sol: Base register addressing mode is used to
5. Instruction Set & Addressing Modes
relocate the program from one segment to
other segment.
01. Ans: (a)
Sol: 1. Direct y = z[I] 6. C Language
2. Immediate x=5
3. Index x=z+m
4. Auto k = c+ + 01. Ans: (a)
Sol: A program that translates a high-level
02. Ans: (c)
language program into a object module is
Sol: Register indirect addressing lets you
called a complier.
generate lots of different addresses when a
program is executed. Address register 02. Ans: (b)
indirect addressing is so called because it Sol: double is used to define BIG floating point
uses an address register to point at the numbers. It reserves twice the storage for
location of the operand in memory; that is, the number.
the address of an operand is obtained
indirectly via an address register. Instead of 03. Ans: (a)
telling the computer where the operand is, Sol: Characters are assigned variables by using
you tell it where the address of the operand single quotes, where strings we use double
can be found. quotes.
03. Ans: (c) 04. Ans: (c)

Sol: Relative Addressing mode: Relative Sol : #define SALES_TAX_RATE 0.0825 is a
Addressing mode is used in intra segment valid constant
branching.
Effective Address = Program Counter + 05. Ans: (c)
Displacement Sol: printf (“%d%c%f”, 23, ‘z’, 4.1);


07. Ans: (b) 13. Ans: (b)
Sol: The value of x is decremented by one after Sol: for, while and do……while are looping
the print statement. constructs but switch case is a statement.
08. Ans: (c) 14. Ans: (c)

Sol: Before entering into the loop while checks
Sol: Left side of assignment operator allows
the condition i.e., while is pre-test loop,
only one variable, not a expression
where ‘do-while’ is post test loop.
In option (b) the meaning of
a * = b gives a = a * b 15. Ans: (a)
In option (d) b = 0 is first evaluate the result Sol: The address of (&) operator is used to
is assign to ‘a’ because ‘=’ operator is right extract the address for a variable.
to left associativity.
Finally option (c) is invalid 16. Ans: (c)
Sol: The syntax int *p; is used to declare a
09. Ans: (b) pointer variable to an integer.
Sol: Except option (b) remaining all expressions
having different precedence levels but in 17. Ans: (c)
option (b) ‘*’, ‘/’ operators are having same Sol: For creating a pointer we use ‘*’ and
precedence levels, so for evaluation we address of variable we use ‘&’.
need associativity. Here associativity is ‘left
18. Ans: (c)
to right’.
Sol: We can increment the pointer value and
10. Ans: (a) comparing but we can’t divide prt + 5 is the
Sol: Option (b), (c), (d) are logical operators. pointes value 5 elements away. ++ ptr pre-
Where as option (a) is a statement. increment of pointer & that points to next
address.
11. Ans: (a)
Sol: Option (b), (c), (d) are relational operators 19. Ans: (b)
which compare the two variables and gives Sol: A variable length string can be controlled
result in the form of boolean data type i.e. by a length or a delimiter. The C language
true (or) false. uses a null to terminate variable length
Where as option (a) is assignment operators strings.
which assign the value to variable.
20. Ans: (c)
12. Ans: (d) Sol: The statement employee.name is used to
Sol: The complement of equal (= =) operator is
declare the name of the employee.
not equal (! = )


21. Ans: (b) 03. Ans: (d)
Sol: for loop iterate 10 times because every time Sol: Presence of multiple CPU’s is multiprocessor
‘i’ value getting to double, means ‘i’ OS, where as multiprogramming can be
initially 1, then 2, 4, 8, 16, 32, 64, 128, 256, possible with only one CPU.
512 finally 1024 give false value to for
loop. So total 10 times of iteration. 04. Ans: (d)
Sol: Interrupts are used for Invoking system calls,
Indicating complication of I/O, Sometimes
22. Ans: (c)
pre-empting running process from CPU.
Sol: For every ‘i’ value ‘j’ loop iterates 10 times
and ‘i’ will iterate 10 times, So 05. Ans: (c)
10 × 10 = 100 iterations possible. Sol: A processor in the context of computing a
piece of hardware that executes a set of
23. Ans: (b) instructions.
Sol: Both statements are the definitions of break
and continue respectively. 06. Ans: (d)
Sol: The basic goal of multiprogramming is to
keep the devices along with the CPU busy.
24. Ans: (b)
Sol: Loop: In computer programming, a loop is
07. Ans: (b)
a sequence of instructions that is Sol: Zombie implies the process entry still exists
continually repeated until a certain in the process table maintained by OS.
condition is reached.
08. Ans: (c)
Sol: Processes are generally swapped out from
7. Basics of Operating Systems
memory to Disk when they are decided to be
suspended.
01. Ans: (a)
09. Ans: (b)
Sol: Multi programming by definition is ability of Sol: Suppose a Processor does not have any
OS to manage multiple ready to run program Stack Pointer Register It can have
in memory. Remaining all other options are subroutine call instruction, but no nested
not correct/ Invalid. subroutine calls.
10. Ans: (d)

02. Ans: (d)
Sol: When an Interrupt occurs, an Operating
Sol: Programmers can access OS resources
System May change state of interrupted
through system call routines.. process to ‘blocked’ and schedule another
process.


8. Process Characteristics and Applications 08. Ans: (a)
Sol: If the system is non-preemptive, then if a
long process is running it will cause
01. Ans: (d) starvation to longer process.
Sol: Process gets blocked when it requires I/O or
request any resource. Remaining are done by 09. Ans: (c)
OS. Sol: Round Robin is non-priority based and does
not need any knowledge of service times of
02. Ans: (d) processes.
Sol: Block initiated by process and Ready by OS.
10. Ans: (d)
03. Ans: (a) Sol: Generally if multithreading is done at user
Sol: Whenever an interrupt occurs, while process level then the whole process gets blocked
is running on CPU, it gets preempted and otherwise only the respective thread gets
goes to ready once. blocked.
04. Ans: (a) 11. Ans: (a)

Sol: Process running in user mode has to increase Sol: CPU efficiency is a measure of useful
the PC Contents. computation over total computational work.
Total work includes the time for context
05. Ans: (b) switching.
Sol: Round Robin scheduling algorithm is
especially used for time sharing system. It is 12. Ans: (b)
similar to FCFS but preemption is added to Sol: Round Robin being preemptive, with time
switch between processes small unit of time quantum can result in reducing prolonged
called time Quantum or time slice is defined. waiting of processes and thereby improves
inter-activeness.
06. Ans: (d)
Sol: A critical region (section) is the portion of 13. Ans: (b)
program text that involves shared variables. Sol: Real time environments are constrained by
strict Deadlines. Hence priority based
07. Ans: (a) scheduling is required to challenge the
Sol: Time of submitting a request to the time at deadlines.
which initial response is generated.


14. Ans: (d) 20. Ans: (b)
Sol: Round Robin Scheduling is based on Time Sol: Total number of jobs executed per unit time
Quantum and arrival times of process. (also called throughput)is maximum in SJF.
Since shorter jobs are executed first and
more number of jobs will be executed per
15. Ans: (c)
unit time.
Sol: Cycle stealing is used for DMA operation
21. Ans: (b)
Sol: FCFS / FIFO is non-preemptive as
16. Ans: (a)
preemption takes place only after completion
Sol: Race condition implies that multiple
of the process. Remaining algorithms are
processes are contending competitively or
preemptive.
cooperatively to access critical resources.
22. Ans: (b)
17. Ans: (c) Sol: once every process got scheduled one time
Sol: Semaphores always satisfy all the conditions each (for T time units).
of synchronization requirements. All processes have now the same waiting
time = (n-1) T (n = number of processes).
Till now, the scheduling was Round Robin
18. Ans: (c)
with pre-emption at periods of T. The same
Sol: Processes are generally swapped out from
analysis can be extended for further
memory to Disk when they are decided to be
scheduling as all the processes have the
suspended. same priority = (n-1)T.
19. Ans: (c) 23. Ans: (c)

Sol: A CPU generally handles an interrupt by
Sol: RR is a pre-emptive scheduler, which is
executing an interrupt service routine by
designed especially for time-sharing
checking the interrupt register after
systems. In other words, it does not wait for
finishing the execution of the current
a process to finish or give up control. In RR,
instruction.
each process is given a time slot to run. If
the process does not finish, it will “get back 26. Ans: (c)
Sol: If the time-slice used in the round-robin
in line” and receive another time slot until it
scheduling policy is more than the maximum
has completed.
time required to execute any process, then
the policy will Degenerate to first come first
serve


27. Ans: (a) FCFS:
Sol: As given process scenario
P1 P2 P3 P4 P5
Process_id Arrival Burst Complete 0 42 49 61
10 39
time time time
P1 0 8 14 Non-Preemptive SJF
P2 0 4 10
P3 0 2 6
P3 P4 P1 P5 P2
Preparing Gantt chart for Round-Robin
0 3 10 20 32 61
scheduling, Q = 2
Round-Robin:
Complete time of processes P1, P2 and P3 as
14, 10, 6. P1 P2 P3 P4 P5 P2 P5 P2
0 10 20 23 30 40 50 52 61
P1 P2 P3 P1 P2 P1 P1
0 2 4 6 8 10 12 14 Average waiting times for FCFS, SJF and
RR are 28 ms, 13 ms and 23 ms
Turnaround time of a process respectively.
= Complete time – Arrival time.
P_id Turnaround time
P1 14
9. Memory Managements
P2 10
P3 6
14  10  6
Average turnaround time  01. Ans: (b)
3
Sol: Number of Memory Chips required =
 10 ms .
Memory Required/Chip Size; Each Row
28. Ans: (a)
having 2 chips of dimension 256×4 will get
Sol: Given scenario of the processes
memory of capacity 256 B; 128 rows each
having 2 chips will organize memory of
Process Burst time
capacity 32 KB.
P1 10
P2 29
02. Ans: (d)
P3 3
Sol: In board memory is like RAM and out board
P4 7
memory is like Hard-Disk and off-time
P5 12
storage is like magnetic tape;


03. Ans: (a) 11. Ans: (a)
Sol: The number of allocation units Sol: The formula for optimal page size is 2.S.e
= 1GB/64 KB = 214. values of S = 32 MB; e = 4B
1 bit is required for each allocation unit.
13. Ans: (c)
04. Ans: (a) Sol: Larger Pages implies less number of pages.
Sol: The size of the page = 232-(9+11)
= 212bytes = 4 KB 14. Ans: (a)
The number of pages Sol: Smaller Pages will involve less internal
= Top level pages + second level pages fragmentation.
= 220/212 (Top level pages)
+ 220(second level pages) 17. Ans: (a)
 220 = 1M Sol: Fixed partitioning technique limits or restrict
the degree of multiprogramming to the
05. Ans: (d) number of partitions.
Sol: Using Best fit the request for 120 K gets
placed in 150 K and 10 K in 30 K and 250 K 18. Ans: (a)
gets placed in 300 K; at this juncture 60 K Sol: Using the equation
can’t get placed and hence the total left over Emat = (1P) m +P*S ;
free memory is 120 K. Here m = 5 s; S = 50 ms;
1P = 0.9999 & P = 0.0001
08. Ans: (c)
Substituting in the above equation
21
Sol: L.A.S = 4K × 512 = 2  L.A = 21 bits. Emat = 10 s
19
P.A.S = 1K×512 = 2  P.A = 19 bits.
19. Ans: (b)
Sol: Due to Belady’s anomaly, sometimes page
09. Ans: (b)
fault increases with the increase in page fault
Sol: Use the equation: rate.
Emat= x(c+m) + (1x) (c+2m)
20. Ans: (b)
Sol: The Number of page faults using optimal
10. Ans: (c)
Sol: Larger pages leads to less number of pages
replacement is 11, giving a page fault rate of
and less number of entries in page table. 50%, using the equation.
Emat = P*s + (1p)*m;
Where P = 50%; m = 1 ms; s = 30 ms;


21. Ans: (a) 10. File System Implementation
Sol: Apply optimal replacement
22. Ans: (d) 01. Ans: (a)

Sol: All will not follow locality of reference. Sol: Convert the Hex value to binary stream
calculate the % of ‘0’s to the total Binary
23. Ans: (b) length of string.
Sol: High page fault rate implies thrashing which
02. Ans: (a)
can be controlled by decreasing degree of
Sol: Surface capacity = 512 * 1K * 4 KB
multiprogramming and addition of more
= 231 = 2 GB
main memory.
 Disk capacity = 32 * surface capacity
= 32×2 GB = 64 GB
24. Ans: (a)
Sol: It’s the work of addressing modes to provide
03. Ans: (d)
minimum required pages, OS has the work
Sol: All peripherals (External devices) require
to provide more pages.
device driver.
25.
05. Ans: (a)
Sol: Logical Address = 13 bits
Sol: Seek time is the dominating time in most of
Physical Address = 15 bits
the IO operations.
26. Ans: (c)

Sol: Threads refer to the execution of different 09. Ans: (d)
processes simultaneously in the CPU. Sol: Maximum file size
Virtual address space is implemented in = 8×2KB+1K×2KB+1K×1K×2KB =2.2 GB
Memory.
The File system in the way in which data in 10. Ans: (b)
a disk is organized. 40MB
Sol: Number of Blocks on Disk =  20 K
A signal is acted upon using the mechanism 2 KB
of interrupts. 1 Block can store 16 K bits;
Hence 20 K bits can be stored in 2 Blocks.
29. Ans: (a)
12. Ans: (a)
Sol: Both statements are true and statement II is
1024K
the correct explanation for statement I Sol:  256 K
4B
256 K  4 = 1024 K = 1M


13. Ans: (b) 04. Ans: (b)
Sol: Mounting: Before your computer can use Sol: The database environment has Users,
any kind of storage device (HDD, CD- Database and Database administration
ROM) your OS must make it accessible except Separate files
through the computer's file system. This
process is called mounting. 05. Ans: (b)
If mounting is automatically done by OS, Sol: In Relational model of database, data is
then it is known as implicit mounting. stored in tables
If mounting is done by user (line in Linux),
it is known as explicit mounting. 07. Ans: (a)
Sol: Data redundancy is not the feature of
database
11. Protection & Security
08. Ans: (a)

02. Ans: (c) Sol: Record stores the data items that are
Sol: The unique name in capabilities can be grouped together
reused, but only if it can be guaranteed that
no references remain to the old use of the 09. Ans: (d)
name. Sol: NULL indicates that there is no value.
10. Ans: (c)

12. Introduction to Database
Sol: Architecture of a database is viewed as
three levels
01. Ans: (c)
Sol: DBMS is a collection of program that 11. Ans: (d)
enables user to create and maintain a Sol: Tree is used to organize the records in
database. hierarchical model
02. Ans: (b)

13. Ans: (c)
Sol: Physical database design is the process of
Sol: Conceptual design involves modeling
selecting the data storage and data access
independent of the DBMS.
characteristics of the database
03. Ans: (c) 14. Ans: (d)

Sol: A database is a collection of related data Sol: DBMS helps to achieve data independence
necessary to manage an organization and centralized control of data


07. Ans: (b)
13. ER and Relational Model
Sol: When a tuple from the dominant is deleted
the related tuple from the subordinate also
01. Ans: (c) be deleted.
Sol: If two students hold joint account then
BankAccount_Num is not a candidate key 08. Ans: (b)
and will not uniquely determine other Sol:
attribute. Student Register Course
03. Ans: (b) 09. Ans: (c)

Sol: Derived attribute is an attribute that Sol: The tuples present at a particular moment is
represents a value that is derivable from called relation instance.
two or more attributes in an entity
10. Ans: (c)
04. Ans: (d) Sol: Cardinality is the number of tuples in a
Sol: On removal of row (2,4), row (5,2) and (7,2) relation instance.
must also be deleted as they depend on value
2. On removal of row (5,2), row (9,5) must 11. Ans: (b)
also be deleted as it depends on value 5. Sol: In an E-R diagram, entities are represented
by rectangles
05. Ans: (b)
Sol: Entity type - Relation 12. Ans: (c)
Key attributes - Primary key Sol: In an E-R, diagram relationship is
Composite attributes - Set of simple represented by diamond shaped box
attributes
13. Ans: (a)
Weak Entity set - Child table
Sol: Rows of a relation are called tuples
Value set - Domain
14. Ans: (a)

06. Ans: (b)
Sol: The employee salary should not be greater
Sol: Name of the dependent : Discriminator
than Rs.2000, comes under integrity
attribute
constraint
Salary of a person: Composite attribute
Telephone number : Multi valued attribute 15. Ans: (d)
Date of birth: Stored attribute Sol: Students and courses enrolled is an example
of many-to-many relationship


16. Ans: (a)
Sol: An attribute of one table matching the 5
primary key of another table, is called as ssn cid

foreign key
Professor Teachers course
17. Ans:
Sol:
1
ss ci
6
ss gi
Professor Teacher course
Professor Member of Group
Semester
Teacher semester
semid
2
ss ci
course
Professo Teacher course
ci
semester
18. Ans: (b)

3
ci Sol: Strong entities E1 and E2 are represented as
ss
separate tables, in addition to that many to
many relationship (R2) must be converted as
Professor Teaches course
separate table by having primary keys of E1
and E2 as foreign keys. One to many
semester relationship must be transferred to ‘many’
4 side table by having primary key of one side
cid
ssn as foreign key. Hence we will have
minimum of 3 tables.
Professor Teachers course
semester


19. Ans: (c)
14. Functional Dependencies
Sol:
a11 a12 a 21 a22

M:N 01. Ans: (b)
E1
Sol: From the given schema we conclude that
R12 E2
“A functionally determines B and B does
not functionally determine C’.
R13 1:N
02. Ans: (d)

E3
Sol: The FD BC → A holds good
a 31 a32
03. Ans: (d)
Sol: The FD C → B doesn’t hold over Relation
If we convert into Relational model, the R.
following relations will result.
1) E1( a11 , a12) 04. Ans: (d)
Sol: The FD BC → A holds good.
2) E2( a 21 , a22)
3) R12( a11 a 21 ) 06. Ans: (c)
Sol: Trivial FDs are satisfied by all relations in a
4) E3R13( a 31 , a32, a11)
Database
20. Ans: (b) 08. Ans: (c)

Sol: Strong entities E1 and E2 are represented as Sol: AF+ = AFDE not ACDEFG as given.
separate tables, in addition to that many to
many relationship (R2) must be converted as 09. Ans: (d)
separate table by having primary keys of E1 Sol: AB+ = {ABCDEF}
and E2 as foreign keys. One to many
10. Ans: (b)
relationship must be transferred to ‘many’
Sol: CD + from functional dependencies
side table by having primary key of one side
(FDs) = CDEAB, it includes RHS attributes
as foreign key. Hence we will have
AC so it can be derived from FDs BD+ from
minimum of 3 tables.
functional dependencies
(FDs) = BD only, RHS attributes CD are not
included in the closure hence it cannot be
derived BC + from functional dependencies


(FDs) = BCDEA, it includes RHS attributes 19.
CD, so it can be derived from FDs AC+ from Sol: In AB → C; B is redundant as A determines
functional dependencies B and in D → AC; C is redundant as D
(FDs) = ACBDE, it includes RHS attributes determines C. Therefore the minimal set:
BC so it can be derived from FDs A → BC and D → AC.
11. Ans: (b)

Sol: ACEH+ contains all the attributes of R. 15. Normalizations
12. Ans: (d)

Sol: Closure of AEH + = BEH+= DEH += A, B, 01.
C, D, E, H. If any closure includes all Sol: (1) C  D
attributes of a table then it can become CA
candidate key of the table. Closure of AEH, BC
BEH, DEH includes all attributes of table C.K: B, 2NF but not 3NF
hence they are candidate keys. (2) 2NF but not 3NF as no partial
dependency CK: BD.
13. (3) R is in 3NF but not in BCNF
Sol: CK: ACD, BCD, ECD.
D+ = {D, A} R1
R
14. Ans: (d)
{DBC} R2
Sol: ck: ABF, EBF, CBF, ADF, EDF, CDF.
16. Ans: (a) Not D.P ABC  D lost

Sol: G not covers the dependency D  E of F. (4) C.K = A
No Partial Dependency
18.  2NF
Sol: AD  CF R is in 2NF but not in BCNF & 3NF
C B Canonical set BC+ = {BCD} R1
BE = {ABC} R2
AD  C (5) AB  C
CB AB  D
Minimal set
AB  F CA
BE DB


Candidate Keys = AB, CD, BC, AD 11. Ans: (a)
R is in 3NF but not in BCNF. Sol: B  F is PFD.
C+ {C, A} R1
D+ {D, B} R2 12. Ans: (d)
{C, D} R3 Sol: 1 NF - Unique rows
Not D.P AB  CD lost. 2 NF - Partial Dependencies
BCNF - Candidate keys
02. Ans: (d) 3 NF - Transitive dependencies
Sol: Since R1  R 2   , R1 and R2 might have
two attributes each and no common 13. Ans: (b)
attribute. Any relation with 2 attributes
Sol: ACH is a key
satisfies 2 NF and 3 NF.
03. Ans: (b) 14. Ans: (d)

Sol: 1 represents Partial FD and 2 represents T.D Sol: E  G is Partial F.D.
04. Ans: (c) 15. Ans: (b)

Sol: In FD A → C, R in 1NF but not in 2NF Sol: In 2 NF every non-prime attribute is fully
dependent functionally on the candidate key
05. Ans: (a) of relational schema
Sol: In FD D → C, R is in 2NF but is in 3NF
16.
06. Ans: (a)
Sol: R1(CD)
Sol: Every binary relation is in BCNF.
R2(FG)
08. Ans: (a) R3(AF)

Sol: Relation contains PFD: B  F. R4(ABCE)
09. Ans: (b)

Sol: Relation contains TD: C  E.
10. Ans: (d)

Sol: BC  D is Transitive FD.

16. Transaction & Concurrency Control 06.

Sol: Not Conflict Serializable,
Not View Serializable,
01. Ans: (c) Recoverable, Avoids Cascading aborts,
Sol: Atomocity : Recovery Manager Not strict.
Isolation : Concurrency Control Sub system
Durability: Transaction Manager 07.
Consistency Preservation : User Sol: Conflict Serializable,
View Serializable,
02. Ans: (d) Serializable,
Sol: Every strict schedule is both recoverable Recoverable,
and cascadeless. Cascading aborts, Not strict
03. Ans: (c) 08.

Sol: Precedence graph 1 2 Sol: Conflict Serializable,
View serializable,
4 3 Serializable,
Recoverable,
04. Ans: (b)
Sol: In S1 R2(x) and W1(x) conflicts hence Cascading aborts, Not strict
T2 < T1. Also W1(y) and W2(y) conflicts
hence T1 < T2. There is no serial schedule 09.
that satisfies both T2 < T1 and T1 < T2. Sol: Not Conflict Serializable,
In S4 R2(x) and W1(x) conflicts hence Not View Serializable,
T2 < T1. Also W1(y) and W2(y) conflicts Not avoids cascading aborts, not strict,
hence T1 < T2. There is no serial schedule Recoverable, cascading aborts
that satisfies both T2 < T1 and T1 < T2
10.
05. Ans: (d) Sol: Conflict Serializable,
Sol: S1 and S2 are conflict equivalent to serial View serializable,
schedule T2, T3, T1. Serializable,
S3 is not conflict equivalent as 2RA, 3WA Recoverable,
(T2 < T3) and 3WA, 2WA (T3 < T2) are the Avoids cascading aborts,
conflict operations. There is no serial Not strict
schedule that satisfies both T2 < T3 and
T3 < T2.


11. 16.
Sol: Not Conflict Serializable, Views Sol: Conflict Serializable,
serializable through Thomas write rule, View Serializable,
Serializable, Recoverable, Avoids cascading Serializable,
aborts, Not strict Recoverable,
Avoid cascading aborts,
12.
Sol: Conflict Serializable, Strict
View Serializable,
Serializable, 17.
Recoverable, Sol: Not Conflict Serializable,
Avoids cascading aborts, View Serializable as per Thomas write rule,
Not strict Serializable,
Recoverable,
13. Cascading aborts,
Sol: Not Conflict Serializable, Not strict
Not View Serializable,
Not Serializable,
Not Recoverable,
No need cascading aborts,
Not strict
14.
Sol: Conflict Serializable,
View Serializable,
Serializable,
Not Recoverable,
No need cascading aborts,
Not strict
15.
Sol: Conflict Serializable,
View Serializable,
Serializable,
Recoverable,
Avoid cascading aborts,
Strict

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ESE | GATE | PSUs

Common Bus ( address, Data & Control )

1. Computer Arithmetic 2. Memory Organization &

01. Ans: (a)

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02. Ans: (b)

04. Ans: (b) 03. Ans: (b)

03. Ans: (c) 04. Ans: (c)

08. Ans: (c) 14. Ans: (c)

10. Ans: (d)

04. Ans: (a) 11. Ans: (a)

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19. Ans: (c) 23. Ans: (c)

22. Ans: (d) 01. Ans: (a)

26. Ans: (c)

08. Ans: (a)

10. Ans: (c)

02. Ans: (b)

03. Ans: (c) 14. Ans: (d)

03. Ans: (b) 09. Ans: (c)

14. Ans: (a)

primary key of another table, is called as ssn cid

Professor Member of Group

18. Ans: (b)

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a11 a12 a 21 a22

02. Ans: (d)

20. Ans: (b) 08. Ans: (c)

11. Ans: (b)

12. Ans: (d)

16. Ans: (a) Not D.P ABC  D lost

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03. Ans: (b) 14. Ans: (d)

04. Ans: (c) 15. Ans: (b)

08. Ans: (a) R3(AF)

09. Ans: (b)

10. Ans: (d)

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16. Transaction & Concurrency Control 06.

03. Ans: (c) 08.

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