Ad 620 | Amplifier | Operational Amplifier

a

FEATURES EASY TO USE Gain Set with One External Resistor (Gain Range 1 to 1000) Wide Power Supply Range ( 2.3 V to 18 V) Higher Performance than Three Op Amp IA Designs Available in 8-Lead DIP and SOIC Packaging Low Power, 1.3 mA max Supply Current EXCELLENT DC PERFORMANCE (“B GRADE”) 50 V max, Input Offset Voltage 0.6 V/ C max, Input Offset Drift 1.0 nA max, Input Bias Current 100 dB min Common-Mode Rejection Ratio (G = 10) LOW NOISE 9 nV/√Hz, @ 1 kHz, Input Voltage Noise 0.28 V p-p Noise (0.1 Hz to 10 Hz) EXCELLENT AC SPECIFICATIONS 120 kHz Bandwidth (G = 100) 15 s Settling Time to 0.01% APPLICATIONS Weigh Scales ECG and Medical Instrumentation Transducer Interface Data Acquisition Systems Industrial Process Controls Battery Powered and Portable Equipment PRODUCT DESCRIPTION

Low Cost, Low Power Instrumentation Amplifier AD620
CONNECTION DIAGRAM 8-Lead Plastic Mini-DIP (N), Cerdip (Q) and SOIC (R) Packages
RG –IN +IN –VS 1 2 3 4 8 RG

7 +VS 6 OUTPUT

AD620
TOP VIEW

5 REF

1000. Furthermore, the AD620 features 8-lead SOIC and DIP packaging that is smaller than discrete designs, and offers lower power (only 1.3 mA max supply current), making it a good fit for battery powered, portable (or remote) applications. The AD620, with its high accuracy of 40 ppm maximum nonlinearity, low offset voltage of 50 µV max and offset drift of 0.6 µV/°C max, is ideal for use in precision data acquisition systems, such as weigh scales and transducer interfaces. Furthermore, the low noise, low input bias current, and low power of the AD620 make it well suited for medical applications such as ECG and noninvasive blood pressure monitors. The low input bias current of 1.0 nA max is made possible with the use of Superβeta processing in the input stage. The AD620 works well as a preamplifier due to its low input voltage noise of 9 nV/√Hz at 1 kHz, 0.28 µV p-p in the 0.1 Hz to 10 Hz band, 0.1 pA/√Hz input current noise. Also, the AD620 is well suited for multiplexed applications with its settling time of 15 µs to 0.01% and its cost is low enough to enable designs with one inamp per channel.
10,000

The AD620 is a low cost, high accuracy instrumentation amplifier that requires only one external resistor to set gains of 1 to
30,000

TOTAL ERROR, PPM OF FULL SCALE

25,000

3 OP-AMP IN-AMP (3 OP-07s)

1,000

20,000

RTI VOLTAGE NOISE (0.1 – 10Hz) – V p-p

TYPICAL STANDARD BIPOLAR INPUT IN-AMP 100 G = 100 10 AD620 SUPER ETA BIPOLAR INPUT IN-AMP

15,000

AD620A
10,000 RG

5,000

1

0 0 5 10 SUPPLY CURRENT – mA 15 20

0.1 1k

10k

100k 1M SOURCE RESISTANCE –

10M

100M

Figure 1. Three Op Amp IA Designs vs. AD620

Figure 2. Total Voltage Noise vs. Source Resistance

REV. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999

1 –VS + 1.5 1.30 0.5 1. and RL = 2 k .03 0.01 0.15 0.30 0.0 1.0 2 4 1.4 +VS – 1.15 0.000 0.35 10 10 AD620B Typ Max 10.000 0.3 V to ± 18 V 80 95 110 110 5. VOSI Over Temperature Average TC Output Offset.3 8.15 0.2 –VS + 2.2 +VS – 1.5 80 100 120 120 100 120 140 140 0.30 0.15 0.1 –VS + 1.4 +VS – 1.0 2.50 40 95 10 –50 15 0.1 +VS – 1.9 –VS + 2.2 –VS + 1.5 V V V V mA –2– REV.3 +VS – 1.9 –VS + 2.5 8.70 40 95 10 –50 125 225 1.10 0.5 –VS + 1.AD620–SPECIFICATIONS Model GAIN Gain Range Gain Error2 G=1 G = 10 G = 100 G = 1000 Nonlinearity. V OSO Over Temperature Average TC Offset Referred to the Input vs. unless otherwise noted) Min 1 0.10 0.75 80 95 110 110 100 120 140 140 0.000 0.1 –VS + 1.0 0. E .4 k/R G) VOUT = ± 10 V (Typical @ +25 C.0 0. Temperature Conditions G = 1 + (49.4 +VS – 1.5 2.1 –VS + 1.3 1.2 +VS – 1.02 0.6 ± 18 +VS – 1.4 –VS + 1.1 –VS + 1.4 +VS – 1.2 +VS – 1.1 200 50 85 0.70 40 95 10 –50 30 0.4 GΩ pF GΩ pF V V V V VCM = 0 V to ± 10 V 73 93 110 110 RL = 10 kΩ.0 2.9 –VS + 2.5 3.0 1.6 –VS + 1.4 –VS + 1. RL = 10 kΩ RL = 2 kΩ G =1 Gain >1 2 10 10 VOLTAGE OFFSET Input Offset.3 V to ± 5 V VS = ± 5 V to ± 18 V 10 2 10 2 –VS + 1.5 0.4 +VS – 1.1 10 2 10 2 +VS – 1.4 +VS – 1.4 –VS + 1.10 0.2 +VS – 1.10 0.3 400 Min 1 0.3 1.40 10 10 AD620S1 Typ Max 10.3 V to ± 5 V VS = ± 5 V to ± 18 V 90 110 130 130 80 100 120 120 90 110 130 130 73 93 110 110 90 110 130 130 dB dB dB dB –VS + 1.0 1000 1500 2000 15 15 V.3 +VS – 1.4 –VS + 1.15 0.5 0.3 +VS – 1.1 –VS + 1. G = 1–1000 G = 1–100 Gain vs.9 –VS + 2.3 ± 18 +VS – 1.0 100 120 140 140 0.30 0.0 0. Supply (PSR) G=1 G = 10 G = 100 G = 1000 INPUT CURRENT Input Bias Current Over Temperature Average TC Input Offset Current Over Temperature Average TC INPUT Input Impedance Differential Common-Mode Input Voltage Range 3 Over Temperature Over Temperature Common-Mode Rejection Ratio DC to 60 Hz with I kΩ Source Imbalance G=1 G = 10 G = 100 G = 1000 OUTPUT Output Swing Over Temperature Over Temperature Short Current Circuit (Total RTI Error = V OSI + VOSO/G) VS = ± 5 V to ± 15 V VS = ± 5 V to ± 15 V VS = ± 5 V to ± 15 V VS = ± 15 V VS = ± 5 V VS = ± 5 V to ± 15 V VS = ± 5 V to ± 15 V VS = ± 2.40 AD620A Typ Max 10.0 30 0.6 ± 18 +VS – 1.2 +VS – 1.5 5.5 3.15 0.3 400 125 185 1.3 +VS – 1.03 0.0 2.5 –VS + 1.9 –VS + 2.3 10 2 10 2 +VS – 1.3 +VS – 1.3 +VS – 1. VS = Min 1 0. VS = ± 2.9 –VS + 2.2 +VS – 1.2 –VS + 1.0 1000 1500 2000 15 % % % % ppm ppm ppm/°C ppm/°C µV µV µV/°C µV µV µV µV/°C Units VOUT = –10 V to +10 V.0 dB dB dB dB nA nA pA/°C nA nA pA/°C VS = ± 2.6 500 750 1000 7.

01% 10 V Step G = 1–100 G = 1000 NOISE Voltage Noise.0 6.0 0.1 Hz to 10 Hz G=1 G = 10 G = 100–1000 Current Noise 0.9 1.2 15 150 kHz kHz kHz kHz V/µs µs µs Total RTI Noise = (e2 ni ) + (eno / G)2 9 72 3.1 ± 18 1.6 1 ± 0. E –3– .28 0. 3 One input grounded.4 100 10 20 +50 VIN+ . 0.8 0. 1 kHz Input. Specifications subject to change without notice.0 0.6 +VS – 1.6 1 ± 0.28 100 10 20 +50 13 100 9 72 13 100 9 72 13 100 nV/√Hz nV/√Hz µV p-p µV p-p µV p-p fA/√Hz pA p-p kΩ µA V f = 1 kHz 3.0 0.6 +60 –VS + 1.3 1.0 6.75 1000 800 120 12 1.3 0. e ni Output.0001 ± 2.6 VS = ± 2.6 +VS – 1.9 1.4 100 10 20 +50 3.0001 ± 2.1 –40 to +85 ± 18 1.28 0. Voltage Noise.3 0.AD620 Model Conditions Min AD620A Typ Max Min AD620B Typ Max Min AD620S1 Typ Max Units DYNAMIC RESPONSE Small Signal –3 dB Bandwidth G=1 G = 10 G = 100 G = 1000 Slew Rate Settling Time to 0.6 +60 –VS + 1.8 0.3 1.2 15 150 0. VREF = 0 +60 –VS + 1.3 0. 4 This is defined as the same supply range which is used to specify PSR.3 V to ± 18 V V mA mA °C –55 to +125 REV.6 +VS – 1.1 –40 to +85 ± 18 1. Voltage Noise.55 0.55 0.75 1000 800 120 12 1.0001 ± 2. 2 Does not include effects of external resistor R G.6 1 ± 0.1 Hz to 10 Hz REFERENCE INPUT RIN IIN Voltage Range Gain to Output POWER SUPPLY Operating Range 4 Quiescent Current Over Temperature TEMPERATURE RANGE For Specified Performance NOTES 1 See Analog Devices military data sheet for 883B tested specifications.9 1. 0. G = 1. e no RTI.55 0.3 1.75 1000 800 120 12 1.2 15 150 0.

. . . . . +300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. . . . . . –65°C to +125°C Operating Temperature Range AD620 (A. . . . . . . functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. . . . . Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. . . . . . CAUTION ESD (electrostatic discharge) sensitive device. . . . . . . . . ± VS Differential Input Voltage . . . . . . . –65°C to +150°C Storage Temperature Range (N. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. . . . . . . . . ± 18 V Internal Power Dissipation2 . . . . Indefinite Storage Temperature Range (Q) . . . . . . . . .180) 3 4 RG* –VS +IN –IN *FOR CHIP APPLICATIONS: THE PADS 1RG AND 8RG MUST BE CONNECTED IN PARALLEL TO THE EXTERNAL GAIN REGISTER RG. . . . . . . THE PADS 1RG MAY SIMPLY BE BONDED TOGETHER. . . SO = Small Outline. E . . . . . .AD620 ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . This is a stress rating only. . . . . . . .799) 1 1 2 0. . . . . permanent damage may occur on devices subjected to high energy electrostatic discharges. . . . . . . . . RG* +VS OUTPUT 8 7 6 5 REFERENCE 8 0. . . . FOR UNITY GAIN APPLICATIONS WHERE RG IS NOT REQUIRED. . . . . . .0708 (1. . . . . . . METALIZATION PHOTOGRAPH Dimensions shown in inches and (mm). . . . 650 mW Input Voltage (Common Mode) . . . . –55°C to +125°C Lead Temperature Range (Soldering 10 seconds) . . . . . . . . . . . . . . . . . . . proper ESD precautions are recommended to avoid performance degradation or loss of functionality. . . . . . . . . . . . .125 (3. . . . . . . . . . . . –40°C to +85°C AD620 (S) . . . R) . 2 Specification is for device in free air: 8-Lead Plastic Package: θJA = 95°C/W 8-Lead Cerdip Package: θJA = 110°C/W 8-Lead SOIC Package: θJA = 155°C/W ORDERING GUIDE Model AD620AN AD620BN AD620AR AD620AR-REEL AD620AR-REEL7 AD620BR AD620BR-REEL AD620BR-REEL7 AD620ACHIPS AD620SQ/883B Temperature Ranges Package Options* –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –55°C to +125°C N-8 N-8 SO-8 13" REEL 7" REEL SO-8 13" REEL 7" REEL Die Form Q-8 *N = Plastic DIP. . . . . B) . Therefore. . . . . . . . . . . . . . . . . . . DO NOT CONNECT THEM IN SERIES TO RG. . . . Although the AD620 features proprietary ESD protection circuitry. . . . Contact factory for latest dimensions.± 25 V Output Short Circuit Duration . . . . . . WARNING! ESD SENSITIVE DEVICE –4– REV. AS WELL AS THE PADS 8RG. . Q = Cerdip. . . .

5 40 INPUT BIAS CURRENT – nA PERCENTAGE OF UNITS 15 V. Typical Distribution of Input Bias Current Figure 7.0 –1. RL = 2 k . unless otherwise noted) 2. Change in Input Offset Voltage vs. Warm-Up Time 50 SAMPLE SIZE = 850 40 PERCENTAGE OF UNITS 1000 GAIN = 1 VOLTAGE NOISE – nV/ Hz 100 GAIN = 10 30 20 10 10 GAIN = 100.0 0. 1.AD620 Typical Characteristics (@ +25 C.5 –1.0 –75 –25 25 75 TEMPERATURE – C 125 175 Figure 3.5 30 1 20 10 0. Typical Distribution of Input Offset Current Figure 8. V = S 50 SAMPLE SIZE = 360 1. (G = 1–1000) REV. Typical Distribution of Input Offset Voltage Figure 6. Frequency. Temperature 50 SAMPLE SIZE = 850 40 PERCENTAGE OF UNITS 2 CHANGE IN OFFSET VOLTAGE – V 1.0 1. E –5– . Input Bias Current vs. Voltage Noise Spectral Density vs.5 –I B +IB 30 20 10 0 –80 –40 0 +40 +80 INPUT OFFSET VOLTAGE – V –2.5 0 –1200 –600 0 +600 +1200 INPUT BIAS CURRENT – pA 0 0 1 2 3 WARM-UP TIME – Minutes 4 5 Figure 4.000 GAIN = 1000 BW LIMIT 0 –400 –200 0 +200 +400 1 1 10 100 1k FREQUENCY – Hz 10k 100k INPUT OFFSET CURRENT – pA Figure 5.5 0 –0.

1 Hz to 10 Hz RTI Voltage Noise (G = 1) Figure 12.AD620–Typical Characteristics 1000 CURRENT NOISE – fA/ Hz 100 10 1 10 100 FREQUENCY – Hz 1000 Figure 9.1 TIME – 1 SEC/DIV 1 10 100 1k FREQUENCY – Hz 10k 100k 1M Figure 10b. Current Noise Spectral Density vs. Source Resistance +160 +140 +120 G = 1000 G = 100 G = 10 +100 RTI NOISE – 0. E .1 Hz to 10 Hz RTI Voltage Noise (G = 1000) Figure 13. Frequency Figure 11.000 TOTAL DRIFT FROM 25 C TO 85 C. 0. RTI. Zero to 1 kΩ Source Imbalance –6– REV. Total Drift vs.1 V/DIV CMR – dB G=1 +80 +60 +40 +20 0 0. Frequency.1 Hz to 10 Hz Current Noise.0 V/DIV 10. RTI – V RTI NOISE – 2. 0. CMR vs. 5 pA/Div 100.000 FET INPUT IN-AMP 1000 AD620A 100 TIME – 1 SEC/DIV 10 1k 10k 100k SOURCE RESISTANCE – 1M 10M Figure 10a. 0.

0 1 10 100 1k FREQUENCY – Hz 10k 100k 1M 0 5 10 SUPPLY VOLTAGE 15 Volts 20 Figure 15. RTI (G = 1–1000) Figure 17. Output Voltage Swing vs. 100.0 +0. RTI (G = 1–1000) Figure 18.1 +1.1 G=1 10 5 G = 1000 0 BW LIMIT G = 100 10k 100k FREQUENCY – Hz 1M 1 10 100 1k FREQUENCY – Hz 10k 100k 1M 1k Figure 14.1 100 1k 10k 100k FREQUENCY – Hz 1M 10M –VS +0.5 RL = 2k RL = 10k 100 GAIN – V/V 10 +1. Frequency. G = 10 REV. Supply Voltage.0 –1. G = 1 1000 +VS –0. Negative PSR vs. Input Voltage Range vs. E –7– .0 OUTPUT VOLTAGE SWING – Volts (REFERRED TO SUPPLY VOLTAGES) –0.5 –1.0 –0. Frequency.5 –VS +0. Gain vs.5 RL = 10k 1 0. Frequency Figure 19.5 160 140 120 PSR – dB 100 G = 1000 80 G = 100 60 G = 10 40 G=1 20 0.AD620 180 160 140 G = 1000 120 PSR – dB 35 G = 10.0 0 5 10 SUPPLY VOLTAGE 15 Volts 20 Figure 16. Supply Voltage. 1000 30 OUTPUT VOLTAGE – Volts p-p 25 G=1 20 15 100 80 G = 100 G = 10 60 40 20 0. Large Signal Frequency Response 180 INPUT VOLTAGE LIMIT – Volts (REFERRED TO SUPPLY VOLTAGES) +VS –0.5 +1.0 +0. Positive PSR vs.5 –1.0 –1.5 RL = 2k +1.

. ................... .. CL = 100 pF ...... ... ....... ...... ............ ... .5 mV = 001%) . . .. ... ... ... ...... E ...... RL = 2 kΩ..... ......... ........... .. ...... .......5 mV = 0.... ........ . 0 0 100 1k LOAD RESISTANCE – 10k Figure 20. . RL = 2 kΩ. Figure 22. .... Small Signal Response.... ..... G = 10.............. . . .. G = 10 (0...... . Output Voltage Swing vs....... ....... .. .... . . . ..AD620 30 OUTPUT VOLTAGE SWING – Volts p-p VS = 15V G = 10 20 . Large Signal Response and Settling Time.. ............ ... . Load Resistance Figure 23.. .... CL = 100 pF Figure 25........ ...... ..... . . ......... ..... ........... . Figure 21....................... .......... Small Signal Response......01%) Figure 24...... .......... ....... ......... ..... Large Signal Pulse Response and Settling Time G = 1 (0. ...... G = 100 (0. .. 10 ....5 mV = 0..01%) –8– REV.. .. .... . . ...... . ..... .. .... Large Signal Response and Settling Time.. ...... ........ . G = 1........

........5 mV = 0. Small Signal Pulse Response.. G = 1.... G = 100.... . . RL = 2 kΩ.... Gain.... . ..AD620 20 ...... Figure 28.. E –9– ..... ......... ..... .. .......... .... G = 1000 (0.. .01%) Figure 30.... .01% TO 0. CL = 100 pF Figure 29.... ........ .. Gain Nonlinearity... ...01% vs. RL = 10 kΩ (10 µ V = 1 ppm) REV............. Settling Time to 0. 5 0 0 5 10 15 OUTPUT STEP SIZE – Volts 20 Figure 26..... .. ... ... .............. ........ .... ..1% 10 ....... .... . ... .. 1 1 10 GAIN 100 1000 Figure 27. Step Size (G = 1) 1000 .. for a 10 V Step ... Small Signal Pulse Response..... .. 15 SETTLING TIME – s TO 0................... .......... . .. .... RL = 2 kΩ.... Large Signal Response and Settling Time......... ..... ........ ........ . ......... ....... .... ... ....... . G = 1000.. Settling Time vs......... . .. . .. .... ....... .. ......... . CL = 100 pF Figure 31a.... SETTLING TIME – s 100 10 ........ .

... .7 kΩ. C2 and the preamp transconductance) increases with programmed gain. Feedback through the Q1-A1-R1 loop and the Q2-A2-R2 loop maintains constant collector current of the input devices Q1. (b) The gain-bandwidth product (determined by C1..... ...... .. thus ensuring the high level of performance inherent in this circuit. yielding a single-ended output referred to the REF pin potential... G = 100. (c) The input voltage noise is reduced to a value of 9 nV/√Hz........ thus reducing gainrelated errors........4 kΩ G −1 –10– REV. .. ... R1 and R2. This has three important advantages: (a) Open-loop gain is boosted for increasing programmed gain... the transconductance increases asymptotically to that of the input transistors.. Q2 thereby impressing the input voltage across the external gain setting resistor RG...AD620 I1 20 A VB 20 A I2 . Gain Nonlinearity...... ... .... ....... E ..15% at G = 100) with only one resistor..... The internal gain resistors. The unity-gain subtracter A3 removes any common-mode signal... .. –VS Figure 31b......... Absolute value trimming allows the user to program gain accurately (to 0....... .... As RG is reduced for larger gains.. ... .4 kΩ +1 RG so that Figure 32.49k 8 4 3 –VS *ALL RESISTORS 1% TOLERANCE 2 1 G=1000 7 AD620 5 6 G= 49.. allowing the gain to be programmed accurately with a single external resistor.9 499 5..... The value of RG also determines the transconductance of the preamp stage.... . .... G = 1000. Monolithic construction and laser wafer trimming allow the tight matching and tracking of circuit components. are trimmed to an absolute value of 24. ... ..... .... Gain Nonlinearity.... yet offer 10× lower Input Bias Current thanks to Superβeta processing.. . .. RL = 10 kΩ (100 µ V = 10 ppm) Figure 33... determined mainly by the collector current and base resistance of the input devices.. Figure 31c. This creates a differential gain from the inputs to the A1/A2 outputs given by G = (R1 + R2)/RG + 1. . .. The gain equation is then . Settling Time Test Circuit RG = 49... The AD620 is a monolithic instrumentation amplifier based on a modification of the classic three op amp approach.. . . Simplified Schematic of AD620 THEORY OF OPERATION ... RL = 10 kΩ (1 mV = 100 ppm) 10k * INPUT 10V p-p 100k VOUT 1k 10T 10k +VS 11k 1k 100 G=1 G=100 G=10 49.. .... thus optimizing frequency response.. .. .. The input transistors Q1 and Q2 provide a single differentialpair bipolar input for high precision (Figure 33)..... A1 C1 A2 C2 10k A3 R3 400 R1 Q1 RG GAIN SENSE GAIN SENSE R2 Q2 R4 400 10k 10k +IN OUTPUT REF 10k – IN .....

In simple systems.050 14.38 µV p-p × √2)/20 mV Total Resolution Error Grand Total Error G = 100. (All errors are min/max and referred to input. This is because a three op amp type in-amp has two op amps at its inputs.791 17. Buy Table I.140 13.5 µV/°C × 2 × 60°C)/100/20 mV Total Drift Error RESOLUTION Gain Nonlinearity.5 µV/°C × √2 × 60°C)/20 mV (2.154 14.140 141.250 14.28 µV p-p/20 mV 40 ppm (0. ppm/°C Input Offset Voltage Drift. E –11– . G = 100 *0. µV Output Offset Voltage.450 17. absolute accuracy and drift errors are by far the most significant contributors to error. 100PPM/ C TRACKING SUPPLY CURRENT = 15mA MAX Figure 34.662 10. VS = ± 15 V. and at low power and price.607 10. G = 100 SUPPLY CURRENT = 1. the AD620 provides greater accuracy.000 14.02% Match × 5 V)/20 mV/100 Total Absolute Error DRIFT TO +85°C Gain Drift.757 10. an autogain/autozero cycle will remove all absolute accuracy and drift errors leaving only the resolution errors of gain nonlinearity and noise.02% RESISTOR MATCH.500 11. +10V 10k * 10k * OP07D R = 350 R = 350 10k ** RG 499 R = 350 R = 350 REFERENCE AD620A 100 ** 10k ** OP07D OP07D 10k * AD620A MONOLITHIC INSTRUMENTATION AMPLIFIER. nA CMR. Regardless of the system in which it is being used. ppm of Full Scale 40 ppm Typ 0.500 14. µV/°C (50 ppm + 10 ppm) × 60°C 1 µV/°C × 60°C/20 mV 15 µV/°C × 60°C/100/20 mV 100 ppm/°C Track × 60°C (2.310 16. 3PPM/ C TRACKING **DISCRETE 1% RESISTOR. × 5 V/20 mV “Homebrew” Circuit Calculation (150 µV × √2)/20 mV ((150 µV × 2)/100)/20 mV (6 nA × 350 Ω)/20 mV (0. Note that for the homebrew circuit. In the typical application.150 16. along with smaller size. a gain of 100 is required to amplify a bridge output of 20 mV full scale over the industrial temperature range of –40°C to +85°C. Buy: A Typical Bridge Application Error Budget The AD620 offers improved performance over “homebrew” three op amp IA designs. fewer components and 10× lower supply current.14 14.000 10. the OP07 specifications for input voltage offset and noise have been multiplied by √2. Make vs.153 10.16 ppm.127 101. Make vs.67 28.607 10. µV Input Offset Current. ppm of Full Scale AD620 Homebrew 16.558 13. thus allowing full 14-bit accuracy.150 14. The error budget table below shows how to calculate the effect various error sources have on circuit accuracy. In more complex systems with an intelligent processor.3mA MAX 10k * PRECISION BRIDGE TRANSDUCER “HOMEBREW” IN-AMP. shown in Figure 34. µV p-p 0.600 13. Buy Error Budget AD620 Circuit Calculation 125 µV/20 mV 1000 µV/100/20 mV 2 nA × 350 Ω/20 mV 110 dB→3.118 14. both contributing to the overall input error.134 REV.AD620 Make vs.1 Hz–10 Hz Voltage Noise.) Error Source ABSOLUTE ACCURACY at TA = +25°C Input Offset Voltage. µV/°C Output Offset Voltage Drift. dB Error.

+3V PATIENT/CIRCUIT PROTECTION/ISOLATION C1 R1 10k R4 1M R3 24. Small size and low cost make the AD620 especially attractive for voltage output pressure transducers.7 mA.10mA 0. Proper safeguards. The low current noise of the AD620 allows its use in ECG monitors (Figure 36) where high source resistances of 1 MΩ or higher are not uncommon.6mA MAX Figure 35. The AD620’s low power. E .9k R2 24. A Pressure Monitor Circuit which Operates on a +5 V Single Supply Pressure Measurement Medical ECG Although useful in many bridge applications such as weigh scales. Furthermore.7mA 1. Since it delivers low noise and drift.3mA MAX 0. low supply voltage requirements.25k AD620A G=7 0. The value of capacitor C1 is chosen to maintain stability of the right leg drive loop. must be added to this circuit to protect the patient from possible harm.8 mA of total supply current. A Medical ECG Monitor Circuit –12– REV. the bridge consumes only 1. Adding the AD620 and a buffered voltage divider allows the signal to be conditioned for only 3. it will also serve applications such as diagnostic noninvasive blood pressure measurement. In such a circuit. such as isolation.AD620 +5V 20k REF 3 3k 3k G=100 499 1 2 8 7 AD620B 5 4 6 10k IN 3k 3k ADC AD705 20k AGND DIGITAL DATA OUTPUT 1. the low bias currents and low current noise coupled with the low voltage noise of the AD620 improve the dynamic range for better performance. the AD620 is especially suitable for higher resistance pressure sensors powered at lower voltages where small size and low power become more significant. and space-saving 8-lead mini-DIP and SOIC package offerings make it an excellent choice for battery powered data recorders.9k RG 8.03Hz HIGH PASS FILTER G = 143 OUTPUT 1V/mV OUTPUT AMPLIFIER AD705J –3V Figure 36. Figure 35 shows a 3 kΩ pressure transducer bridge powered from +5 V.

3 Calculated Gain 2. This current less only.0 991. Note that for G = 1. The op amp buffers the reference terminal to maintain good CMR. these rectified voltages act as small dc offset errors. For input overloads beyond the supplies. by whatever impedance appears between Pins 1 and 8.998 19. which converts it to a current. This is true for all gains.4 495. and when amplifying small signals. the RG pins are unconnected (RG = ∞).00 k 499 249 100 49.AD620 Precision V-I Converter INPUT AND OUTPUT OFFSET VOLTAGE The AD620.0 199. makes a precision current source (Figure 37). The total VOS for a given gain is calculated as: Total Error RTI = input error + (output error/G) Total Error RTO = (input error × G) + output error REFERENCE TERMINAL 3 8 RG 1 AD620 5 4 –VS Vx R1 [(V IN+) – (V IN– )] G R1 2 6 R1 VIN– I L The reference terminal potential defines the zero output voltage.9 k 12. the input bias current of the op amp. and power on and off.1%–1% resistors. avoid high parasitic resistance in series with RG. with an allowable range of 2 V within the supply voltages. The output error is divided by G when referred to the input. C ≤ 150 pF.003 All instrumentation amplifiers can rectify out of band signals. For any arbitrary gain RG can be calculated by using the formula: RG = 49. and will safely withstand input overloads of up to ± 15 V or ±60 mA for several hours.8 mA.40 100.49 k 2. to minimize gain drift. The AD620 is designed to offer accurate gains using 0.4 k 5. ± 3 V) GAIN SELECTION The AD620’s gain is resistor programmed by RG.4 501. or more precisely.93 50. Circuit to Attenuate RF Interference REV. Table II. Precision Voltage-to-Current Converter (Operates on 1.4 k 5.0 1.3 k 12.49 k 2. Required Values of Gain Resistors 1% Std Table Value of RG.91 100. It provides a direct means of injecting a precise offset to the output. For longer time periods.0 0. which is particularly important since the signal source and amplifier may be powered separately. RG 1 C R –IN R +IN 3 2 8 7 6 4 C 5 Figure 38.01 k 499 249 98.984 9. the current should not exceed 6 mA (IIN ≤ VIN/400 Ω). along with another op amp and two resistors.4 kΩ G −1 To minimize gain error. Table II shows required values of RG for various gains. RF INTERFERENCE INPUT PROTECTION AD705 I L= = LOAD Figure 37. input and output errors. clamping the inputs to the supplies (using a low leakage diode such as an FD333) will reduce the required resistance. In practice.9 Calculated Gain 1. RG should have a low TC—less than 10 ppm/°C—for the best performance.61 k 1. 49. then flows out to the load. and is especially useful when the load does not share a precise ground with the rest of the system. yielding lower noise.0 199. the input errors dominate at high gains and the output errors dominate at low gains. The AD620 features 400 Ω of series thin film resistance at its inputs. E –13– .93 49. Parasitic resistance should be kept to a minimum for optimum CMR.002 4. where RC 1/(2 πf) and where f ≥ the bandwidth of the AD620. The AD620 allows direct access to the input transistor bases and emitters enabling the user to apply some first order filtering to unwanted RF signals (Figure 38).990 4. The output voltage VX of the AD620 appears across R1.61 k 1.998 19. Matching the extraneous capacitance at Pins 1 and 8 and Pins 2 and 3 helps to maintain high CMR.984 9.1% Std Table Value of RG.8 49. +VS VIN+ 7 + VX – The low errors of the AD620 are attributed to two sources. 49.

+VS – INPUT Since the AD620 output voltage is developed with respect to the potential on the reference terminal. +15V C –15V DIGITAL P. In many applications shielded cables are used to minimize noise. and differences in capacitance and resistance should be kept to a minimum between the two inputs. many data-acquisition components have separate analog and digital ground pins (Figure 41). Common-Mode Shield Driver –14– REV. thus minimizing the capacitance mismatch between the inputs. Basic Grounding Practice 100 AD548 RG 2 AD620 VOUT REFERENCE + INPUT –VS Figure 40. Figures 39 and 40 show active data guards that are configured to improve ac common-mode rejections by “bootstrapping” the capacitances of input cable shields. ANALOG P.S. E . current through ground wires and PC runs of the circuit card can cause hundreds of millivolts of error. For optimal CMR the reference terminal should be tied to a low impedance point. it can solve many grounding problems by simply tying the REF pin to the appropriate “local ground.1 F 1 F 1 F 1 F RG 100 –VS AD620 VOUT + REFERENCE AD620 AD585 S/H AD574A ADC DIGITAL DATA OUTPUT + INPUT –VS Figure 39. These specifications are usually given for a full-range input voltage change and a specified source imbalance.S. separate ground returns should be provided to minimize the current flow from the sensitive points to the system ground.AD620 COMMON-MODE REJECTION GROUNDING Instrumentation amplifiers like the AD620 offer high CMR. C +5V AD648 100 0. usually best at the ADC package as shown.1 F 0.” In order to isolate low level analog signals from a noisy digital environment. These ground returns must be tied together at some point. It would be convenient to use a single ground line. Differential Shield Driver +VS – INPUT RG 2 Figure 41. which is a measure of the change in output voltage when both inputs are changed by equal amounts. Therefore. however. and for best CMR over frequency the shield should be properly driven.

there must be a dc path from each input to ground as shown in Figure 42. Refer to the Instrumentation Amplifier Application Guide (free from Analog Devices) for more information regarding in amp applications. +VS – INPUT +VS – INPUT RG AD620 LOAD VOUT RG AD620 LOAD VOUT + INPUT –VS REFERENCE + INPUT –VS REFERENCE TO POWER SUPPLY GROUND TO POWER SUPPLY GROUND Figure 42a. Ground Returns for Bias Currents with Thermocouple Inputs RG AD620 LOAD VOUT + INPUT 100k 100k –VS REFERENCE TO POWER SUPPLY GROUND Figure 42c. therefore. or ac-coupled sources. Ground Returns for Bias Currents with AC Coupled Inputs REV.AD620 GROUND RETURNS FOR INPUT BIAS CURRENTS Input bias currents are those currents necessary to bias the input transistors of an amplifier. Ground Returns for Bias Currents with Transformer Coupled Inputs +VS – INPUT Figure 42b. E –15– . There must be a direct return path for these currents. when amplifying “floating” input sources such as transformers.

49) SEATING (1.13) MIN 8 0.0500 0.52) MAX 0.10) 0.300 (7.75) 0.81) 0.11) 0.00) 0.0138 (0.558) 0.0040 (0.33) MAX 0.95) 0.070 (1.58) 0.022 (0.005 (0.20) 0.195 (4.38) 0.29) 0.08) MAX 0.030 (0.30) 0.200 (5.41) C1599c–0–7/99 .2440 (6.25) 0.36) (2.0098 (0.1890 (4.014 (0.00) 0.100 0.80) 8 1 5 4 0.37) 0.0500 (1.070 (1.2284 (5.0192 (0.38) 0.060 (1.AD620 OUTLINE DIMENSIONS Dimensions shown in inches and (mm).055 (1.77) SEATING PLANE 0.50) x 45° 0.20) SOIC (SO-8) Package 0.0688 (1.125 (3.0160 (0.A.015 (0.220 (5.0532 (1.015 (0.0196 (0.0099 (0.25) PLANE BSC 0.204) Cerdip (Q-8) Package 0.87) 0.0075 (0.80) 0.06) MIN 0.405 (10.320 (8.19) 8° 0° 0.35) 0.160 (4.62) 0.115 (2.430 (10.54) 0.008 (0.38) 0.348 (8.0098 (0.240 (6.93) PIN 1 0.290 (7.023 (0.1497 (3.13) 0.150 (3. Plastic DIP (N-8) Package 0.100 0. 0.1968 (5.310 (7.25) 0.130 (3.015 (0.25) –16– REV.1574 (4.54) 0.008 (0.325 (8.210 (5.93) 0.280 (7.35) 0.S.356) (2.80) PIN 1 0.59) 1 4 PIN 1 0.92) 0.045 (1.18) 0.200 (5.27) 0.115 (2.4) MAX 5 0.27) 0.52) 0.78) SEATING PLANE 0.08) MIN 0.060 (1.381) 0.014 (0.76) BSC 15° 0° 0.15) BSC 0.10) 0.84) 8 5 1 4 0. E PRINTED IN U.015 (0.

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