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# 2/16/2019 Basics of Software Defined Radios and practical applications - - Unit 2 - Week 1

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Unit 2 - Week 1
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Certification exam Assignment -1
The due date for submitting this assignment has passed. Due on 2019-02-13, 23:59 IST.
Course
outline Assignment submitted on 2019-01-22, 12:22 IST

How to access 1) Which hardware component is not present in Superheterodyne transmitter? 1 point
the portal
Digital to Analog Converters
Week 1 Analog to Digital Converters
Local Oscillators
Foundation for
software
Low-Noise Amplifier
Components of Score: 1
a software
Low-Noise Amplifier
Software
defined radio 2) If measure SNR is around 74 dB in an ADC. What is bit-resolution of ADC? 1 point
architectures
Part I 16-bit
10-bit
Software
architectures 8-bit
Part II
Software
Part III
12-bit
Quiz :
3) Increase in IF frequency in Superheterodyne transceivers is related to 1 point
Assignment -1

## Solution - Increase in clock jitter.

Assignment 1 Capability of filtering the image signal.

## Week 2 Increase in constraint on DAC and ADC.

All of the above.
Week 3
Score: 1
Week 4
VIDEOS
4) In an analog quadrature modulator, frequency of input data is 30 MHz and LO frequency is 1 point
1.8 GHz. What would be frequency of signal at modulator output due to gain and phase error?

1.74 GHz
1.83 GHz
1.77 GHz
None of the above

https://onlinecourses.nptel.ac.in/noc19_ee22/unit?unit=5&assessment=41 1/3
2/16/2019 Basics of Software Defined Radios and practical applications - - Unit 2 - Week 1
Score: 1
1.77 GHz

5) In an analog quadrature modulator, frequency of input data is 30 MHz and LO frequency is 1 point
1.8 GHz. What would be frequency of signal at modulator output due to DC error?

1.8 GHz
1.86 GHz
1.83 GHz
None of the above

## No, the answer is incorrect.

Score: 0
1.8 GHz

6) In an analog quadrature modulator, frequency of input data is 30 MHz and LO frequency is 1 point
1.8 GHz. What would be frequency of output RF?

1.8 GHz
1.86 GHz
1.83 GHz
None of the above

Score: 1
1.83 GHz

## 7) What is the major advantage of Homodyne transceivers? 1 point

Error signal due to I/Q imbalance interferes with the signal of interest.
DC offset errors interefere with signal of interest
Easy to integrate on-chip
Large size as compared to other architectures.

## Yes, the answer is correct.

Score: 1
Easy to integrate on-chip

8) If the IF frequency in a transmitter is equal to 0 then the architecture of the transmitter is 1 point
called

Superheterodyne / Digital-IF
Homodyne / Direct Conversion
Superheterodyne / Direct Conversion
Homodyne / Digital-IF

## Yes, the answer is correct.

Score: 1
Homodyne / Direct Conversion

## 9) DC offset distortion cannot be removed by filtering in 1 point

Superheterodyne transceivers
Digital-IF based Homodyne architecture
Homodyne transceivers
Dual-conversion superheterodyne architecture

## No, the answer is incorrect.

Score: 0

https://onlinecourses.nptel.ac.in/noc19_ee22/unit?unit=5&assessment=41 2/3
2/16/2019 Basics of Software Defined Radios and practical applications - - Unit 2 - Week 1
Homodyne transceivers

## 10)Superheterodyne transceiver is robust to following distortion component as compared to the 1 point

homodyne transmitter?

I/Q imbalance
LO leakage
DC Offset
All of the above

## Yes, the answer is correct.

Score: 1
All of the above

11)If two frequencies (f1 > >f2) need to be transmitted using two different antennas of 1 point
length L1 and L2, then

L1=L2
L1<L2
L1>L2
None of above

Score: 1
L1<L2

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