Professional Documents
Culture Documents
Introduction to Microprocessors
GOPIKRISHNAN G
ASST. PROF. ELX & TCOM.
Course Plan
Wiki:
Father-daughter?
Uncle-niece?
Cousin?
Grandfather-grand daughter??
Control Unit…..
BOSS………….
Control and coordinates all operations according to clock
cycles.
Three Manthras of Control unit….
FETCH DECODE EXECUTE
Register Array….
Servant of ALU
Used for Quick access of temporary variables
Nearest to the heart of processor
Just like Black cats of processor…
Names are A B C D E F ………………….
A sample operation….
8085 Architecture
8085 Architecture…another
8085 IC Pin out
Interrupt Control: this unit is used to accept the external interrupts such as TRAP,
RST-7.5, RST-6.5, RST-5.5 and INTR and generates an acknowledgement signal INTA’
to acknowledge the receipt of the interrupt signal. It also generates the necessary
vector address for the vectored type interrupts.
Serial I/O control : this unit is responsible for receiving and sending the data serially
to or from the processor.
Address incrementer/Decrementer: This unit is responsible for incrementing or
decrementing the content of PC so that it points to the next instruction. The address
is then ready for demultiplexing and putting on the address bus.
Blocks Explained……
Interrupt control
As the name suggests it controls the interrupts during a process. When a
microprocessor is executing a main program and whenever an interrupt occurs,
the microprocessor shifts the control from the main program to process the
incoming request. After the request is completed, the control goes back to the
main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST
5.5, TRAP.
Status Signals……
Address Latch
What is it???
At the starting of each machine cycle, the microprocessor sends logic 1 to the ALE
pin. At this time, the multiplexed pins have the address sent by the microprocessor.
These pins are already connected by the user to a d latch and also to the data pins
of the memory.
The clock input to the D Latch is given by the ALE pin.
Now when ALE pin is 1(ie. at the first T state of every machine cycle) the d latch
starts working and the multiplexed data and address lines which have address
now store the address in the octal latch. After the ALE signal goes low, the
addresses are latched in the octal latch and are used to reference the memory.
Now data is sent by the microprocessor to the multiplexed pins and reading or
writing of data takes place as per the operation performed by the user.