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R=20190030475 2019-09-14T15:29:28+00:00Z

NASA/TP-2019-220319

Superconducting Processor

Eleanor G. Rieffel

NASA Ames Research Center

August 2019

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NASA/TP-2019-220319

Superconducting Processor

Eleanor G. Rieffel

NASA Ames Research Center

Space Administration

Moffett Field, California

August 2019

Acknowledgments

http://www.sti.nasa.gov or http://ntrs.nasa.gov

Quantum supremacy using a programmable superconducting processor

The tantalizing promise of quantum computers is that certain computational tasks might be

executed exponentially faster on a quantum processor than on a classical processor. A fundamen-

tal challenge is to build a high-fidelity processor capable of running quantum algorithms in an

exponentially large computational space. Here, we report using a processor with programmable

superconducting qubits to create quantum states on 53 qubits, occupying a state space 253 ∼ 1016 .

Measurements from repeated experiments sample the corresponding probability distribution, which

we verify using classical simulations. While our processor takes about 200 seconds to sample one

instance of the quantum circuit 1 million times, a state-of-the-art supercomputer would require

approximately 10,000 years to perform the equivalent task. This dramatic speedup relative to all

known classical algorithms provides an experimental realization of quantum supremacy on a com-

putational task and heralds the advent of a much-anticipated computing paradigm.

A COMPUTATIONAL TASK TO

In the early 1980s, Richard Feynman proposed that a DEMONSTRATE QUANTUM SUPREMACY

quantum computer would be an effective tool to solve To demonstrate quantum supremacy, we compare our

problems in physics and chemistry, as it is exponentially quantum processor against state-of-the-art classical com-

costly to simulate large quantum systems with classical puters in the task of sampling the output of a pseudo-

computers [1]. Realizing Feynman’s vision poses signifi- random quantum circuit [24–26]. Random circuits are a

cant experimental and theoretical challenges. First, can suitable choice for benchmarking since they do not pos-

a quantum system be engineered to perform a computa- sess structure and therefore allow for limited guarantees

tion in a large enough computational (Hilbert) space and of computational hardness [24, 25, 27, 28]. We design the

with low enough errors to provide a quantum speedup? circuits to entangle a set of quantum bits (qubits) by re-

Second, can we formulate a problem that is hard for a peated application of single-qubit and two-qubit logical

classical computer but easy for a quantum computer? By operations. Sampling the quantum circuit’s output pro-

computing a novel benchmark task on our superconduct- duces a set of bitstrings, e.g. {0000101, 1011100, . . . }.

ing qubit processor [2–7], we tackle both questions. Our Due to quantum interference, the probability distribution

experiment marks a milestone towards full scale quantum of the bitstrings resembles a speckled intensity pattern

computing: quantum supremacy [8]. produced by light interference in laser scatter, such that

some bitstrings are much more likely to occur than oth-

In reaching this milestone, we show that quantum ers. Classically computing this probability distribution

speedup is achievable in a real-world system and is becomes exponentially more difficult as the number of

not precluded by any hidden physical laws. Quantum qubits (width) and number of gate cycles (depth) grows.

supremacy also heralds the era of Noisy Intermediate-

We verify that the quantum processor is working prop-

Scale Quantum (NISQ) technologies. The benchmark

erly using a method called cross-entropy benchmarking

task we demonstrate has an immediate application in

(XEB) [24, 26], which compares how often each bitstring

generating certifiable random numbers [9]; other initial

is observed experimentally with its corresponding ideal

uses for this new computational capability may include

probability computed via simulation on a classical com-

optimization optimization [10–12], machine learning [13–

puter. For a given circuit, we collect the measured bit-

15], materials science and chemistry [16–18]. However,

strings {xi } and compute the linear XEB fidelity [24–

realizing the full promise of quantum computing (e.g.

26, 29], which is the mean of the simulated probabilities

Shor’s algorithm for factoring) still requires technical

of the bitstrings we measured:

leaps to engineer fault-tolerant logical qubits [19–23].

FXEB = 2n hP (xi )ii − 1 (1)

To achieve quantum supremacy, we made a number of

technical advances which also pave the way towards er- where n is the number of qubits, P (xi ) is the probability

ror correction. We developed fast, high-fidelity gates that of bitstring xi computed for the ideal quantum circuit,

can be executed simultaneously across a two-dimensional and the average is over the observed bitstrings. Intu-

qubit array. We calibrated and benchmarked the pro- itively, FXEB is correlated with how often we sample high

cessor at both the component and system level using a probability bitstrings. When there are no errors in the

powerful new tool: cross-entropy benchmarking (XEB). quantum circuit, sampling the probability distribution

Finally, we used component-level fidelities to accurately will produce FXEB = 1. On the other hand, sampling

predict the performance of the whole system, further from the uniform distribution will give hP (xi )ii = 1/2n

showing that quantum information behaves as expected and produce FXEB = 0. Values of FXEB between 0 and

when scaling to large systems.

2

a

BUILDING AND CHARACTERIZING A

HIGH-FIDELITY PROCESSOR

which consists of a two-dimensional array of 54 trans-

mon qubits, where each qubit is tunably coupled to four

nearest-neighbors, in a rectangular lattice. The connec-

tivity was chosen to be forward compatible with error-

correction using the surface code [20]. A key systems-

engineering advance of this device is achieving high-

fidelity single- and two-qubit operations, not just in iso-

lation but also while performing a realistic computation

with simultaneous gate operations on many qubits. We

discuss the highlights below; extended details can be

found in the supplementary information.

Qubit Adjustable coupler

In a superconducting circuit, conduction electrons con-

dense into a macroscopic quantum state, such that cur-

b rents and voltages behave quantum mechanically [2, 30].

Our processor uses transmon qubits [6], which can be

thought of as nonlinear superconducting resonators at 5

to 7 GHz. The qubit is encoded as the two lowest quan-

tum eigenstates of the resonant circuit. Each transmon

has two controls: a microwave drive to excite the qubit,

and a magnetic flux control to tune the frequency. Each

qubit is connected to a linear resonator used to read out

the qubit state [5]. As shown in Fig. 1, each qubit is

also connected to its neighboring qubits using a new ad-

justable coupler [31, 32]. Our coupler design allows us to

quickly tune the qubit-qubit coupling from completely

10 millimeters off to 40 MHz. Since one qubit did not function properly

the device uses 53 qubits and 86 couplers.

FIG. 1. The Sycamore processor. a, Layout of processor The processor is fabricated using aluminum for metal-

showing a rectangular array of 54 qubits (gray), each con- ization and Josephson junctions, and indium for bump-

nected to its four nearest neighbors with couplers (blue). In- bonds between two silicon wafers. The chip is wire-

operable qubit is outlined. b, Optical image of the Sycamore bonded to a superconducting circuit board and cooled

chip. to below 20 mK in a dilution refrigerator to reduce am-

bient thermal energy to well below the qubit energy.

The processor is connected through filters and attenu-

1 correspond to the probability that no error has oc- ators to room-temperature electronics, which synthesize

curred while running the circuit. The probabilities P (xi ) the control signals. The state of all qubits can be read

must be obtained from classically simulating the quan- simultaneously by using a frequency-multiplexing tech-

tum circuit, and thus computing FXEB is intractable in nique [33, 34]. We use two stages of cryogenic amplifiers

the regime of quantum supremacy. However, with certain to boost the signal, which is digitized (8 bits at 1 GS/s)

circuit simplifications, we can obtain quantitative fidelity and demultiplexed digitally at room temperature. In to-

estimates of a fully operating processor running wide and tal, we orchestrate 277 digital-to-analog converters (14

deep quantum circuits. bits at 1 GS/s) for complete control of the quantum pro-

cessor.

Our goal is to achieve a high enough FXEB for a circuit

with sufficient width and depth such that the classical We execute single-qubit gates by driving 25 ns mi-

computing cost is prohibitively large. This is a difficult crowave pulses resonant with the qubit frequency while

task because our logic gates are imperfect and the quan- the qubit-qubit coupling is turned off. The pulses

tum states we intend to create are sensitive to errors. A are shaped to minimize transitions to higher transmon

single bit or phase flip over the course of the algorithm states [35]. Gate performance varies strongly with fre-

will completely shuffle the speckle pattern and result in quency due to two-level-system (TLS) defects [36, 37],

close to 0 fidelity [24, 29]. Therefore, in order to claim stray microwave modes, coupling to control lines and

quantum supremacy we need a quantum processor that the readout resonator, residual stray coupling between

executes the program with sufficiently low error rates. qubits, flux noise, and pulse distortions. We therefore

3

a

We model this decay by [1 − e1 /(1 − 1/D2 )]m where e1 is

the Pauli error probability. The state (Hilbert) space di-

mension term, D = 2n = 2, corrects for the depolarizing

Integrated histogram, ECDF

ideal state. This procedure is similar to the more typical

technique of randomized benchmarking [21, 38, 39], but

e1 e2 e2c er

supports non-Clifford gatesets [40] and can separate out

decoherence error from coherent control error. We then

repeat the experiment with all qubits executing single-

qubit gates simultaneously (Fig. 2), which shows only a

small increase in the error probabilities, demonstrating

that our device has low microwave crosstalk.

Isolated

Simultaneous We perform two-qubit iSWAP-like entangling gates by

bringing neighboring qubits on resonance and turning on

Pauli and measurement errors a 20 MHz coupling for 12 ns, which allows the qubits to

Average error Isolated Simultaneous

swap excitations. During this time, the qubits also ex-

Single-qubit (e1) 0.15% 0.16%

perience a controlled-phase (CZ) interaction, which orig-

Two-qubit (e2) 0.36% 0.62% inates from the higher levels of the transmon. The two-

Two-qubit, cycle (e2c) 0.65% 0.93% qubit gate frequency trajectories of each pair of qubits are

Readout (er) 3.1% 3.8% optimized to mitigate the same error mechanisms consid-

b

ered in optimizing single-qubit operation frequencies.

Pauli error To characterize and benchmark the two-qubit gates,

e1 , e 2 we run two-qubit circuits with m cycles, where each cy-

cle contains a randomly chosen single-qubit gate on each

10-2 of the two qubits followed by a fixed two-qubit gate. We

learn the parameters of the two-qubit unitary (e.g. the

amount of iSWAP and CZ interaction) by using FXEB

as a cost function. After this optimization, we extract

the per-cycle error e2c from the decay of FXEB with m,

and isolate the two-qubit error e2 by subtracting the two

single-qubit errors e1 . We find an average e2 of 0.36%.

Additionally, we repeat the same procedure while simul-

taneously running two-qubit circuits for the entire array.

10-3

After updating the unitary parameters to account for ef-

fects such as dispersive shifts and crosstalk, we find an

average e2 of 0.62%.

FIG. 2. System-wide Pauli and measurement errors. a, For the full experiment, we generate quantum circuits

Integrated histogram (empirical cumulative distribution func-

using the two-qubit unitaries measured for each pair dur-

tion, ECDF) of Pauli errors (black, green, blue) and readout

errors (orange), measured on qubits in isolation (dotted lines) ing simultaneous operation, rather than a standard gate

and when operating all qubits simultaneously (solid). The for all pairs. The typical two-qubit gate is a full iSWAP

median of each distribution occurs at 0.50 on the vertical with 1/6 of a full CZ. In principle, our architecture could

axis. Average (mean) values are shown below. b, Heatmap generate unitaries with arbitrary iSWAP and CZ inter-

showing single- and two-qubit Pauli errors e1 (crosses) and e2 actions, but reliably generating a target unitary remains

(bars) positioned in the layout of the processor. Values shown an active area of research.

for all qubits operating simultaneously.

Finally, we benchmark qubit readout using standard

dispersive measurement [41]. Measurement errors aver-

aged over the 0 and 1 states are shown in Fig 2a. We have

optimize the single-qubit operation frequencies to miti- also measured the error when operating all qubits simul-

gate these error mechanisms. taneously, by randomly preparing each qubit in the 0 or

We benchmark single-qubit gate performance by using 1 state and then measuring all qubits for the probability

the XEB protocol described above, reduced to the single- of the correct result. We find that simultaneous readout

qubit level (n = 1), to measure the probability of an error incurs only a modest increase in per-qubit measurement

occurring during a single-qubit gate. On each qubit, we errors.

apply a variable number m of randomly selected gates Having found the error rates of the individual gates and

and measure FXEB averaged over many sequences; as m readout, we can model the fidelity of a quantum circuit

increases, errors accumulate and average FXEB decays. as the product of the probabilities of error-free opera-

4

a b

single-qubit gate:

25 ns

qubit

C XY control

A

two-qubit gate:

12 ns

B qubit 1

Z control

D

coupler

column

row A B C D C D A B qubit 2

Z control

time

cycle: 1 2 3 4 5 6 7 8 m

FIG. 3. Control operations for the quantum supremacy circuits. a, Example quantum circuit instance used in our

experiment.

√ √ √Every cycle includes a layer each of single- and two-qubit gates. The single-qubit gates are chosen randomly from

{ X, Y , W }. The sequence of two-qubit gates are chosen according to a tiling pattern, coupling each qubit sequentially to

its four nearest-neighbor qubits. The couplers are divided into four subsets (ABCD), each of which is executed simultaneously

across the entire array corresponding to shaded colors. Here we show an intractable sequence (repeat ABCDCDAB); we also

use different coupler subsets along with a simplifiable sequence (repeat EFGHEFGH, not shown) that can be simulated on a

classical computer. b, Waveform of control signals for single- and two-qubit gates.

tion of all gates and measurements. Our largest random feasibility. Finally, we can also run full “verification cir-

quantum circuits have 53 qubits, 1113 single-qubit gates, cuits” with the same gate counts as our supremacy cir-

430 two-qubit gates, and a measurement on each qubit, cuits, but with a different pattern for the sequence of two-

for which we predict a total fidelity of 0.2%. This fidelity qubit gates which is much easier to simulate classically

should be resolvable with a few million

√ measurements, [29]. Comparison between these variations allows track-

since the uncertainty on FXEB is 1/ Ns , where Ns is the ing of the system fidelity as we approach the supremacy

number of samples. Our model assumes that entangling regime.

larger and larger systems does not introduce additional We first check that the patch and elided versions of the

error sources beyond the errors we measure at the single- verification circuits produce the same fidelity as the full

and two-qubit level — in the next section we will see how verification circuits up to 53 qubits, as shown in Fig. 4a.

well this hypothesis holds. For each data point, we typically collect Ns = 5 × 106

total samples over ten circuit instances, where instances

FIDELITY ESTIMATION IN THE SUPREMACY differ only in the choices of single-qubit gates in each

REGIME cycle. We also show predicted FXEB values computed

The gate sequence for our pseudo-random quantum by multiplying the no-error probabilities of single- and

circuit generation is shown in Fig. 3. One cycle of the two-qubit gates and measurement [29]. Patch, elided,

algorithm consists√of applying

√ √ single-qubit gates chosen and predicted fidelities all show good agreement with

randomly from { X, Y , W } on all qubits, followed the fidelities of the corresponding full circuits, despite

by two-qubit gates on pairs of qubits. The sequences of the vast differences in computational complexity and en-

gates which form the “supremacy circuits” are designed tanglement. This gives us confidence that elided circuits

to minimize the circuit depth required to create a highly can be used to accurately estimate the fidelity of more

entangled state, which ensures computational complexity complex circuits.

and classical hardness. We proceed now to benchmark our most computa-

While we cannot compute FXEB in the supremacy tionally difficult circuits. In Fig. 4b, we show the mea-

regime, we can estimate it using three variations to re- sured FXEB for 53-qubit patch and elided versions of the

duce the complexity of the circuits. In “patch circuits”, full supremacy circuits with increasing depth. For the

we remove a slice of two-qubit gates (a small fraction largest circuit with 53 qubits and 20 cycles, we collected

of the total number of two-qubit gates), splitting the cir- Ns = 30×106 samples over 10 circuit instances, obtaining

cuit into two spatially isolated, non-interacting patches of FXEB = (2.24 ± 0.21) × 10−3 for the elided circuits. With

qubits. We then compute the total fidelity as the product 5σ confidence, we assert that the average fidelity of run-

of the patch fidelities, each of which can be easily calcu- ning these circuits on the quantum processor is greater

lated. In “elided circuits”, we remove only a fraction of than at least 0.1%. The full data for Fig. 4b should have

the initial two-qubit gates along the slice, allowing for similar fidelities, but are only archived since the simula-

entanglement between patches, which more closely mim- tion times (red numbers) take too long. It is thus in the

ics the full experiment while still maintaining simulation quantum supremacy regime.

5

100

E F G H E F G H A B C D C D A B

10-1

2 hours Classical sampling @ 𝓕Sycamore

𝓕XEB

2 weeks

XEB Fidelity,

4 years

4 years

5 hours 100 years

600 years

10 millennia

10-2 m = 14 cycles

Prediction from gate and measurement errors

Full circuit Elided circuit Patch circuit

n = 53 qubits

Prediction

Elided (±5σ error bars)

Patch

10-3

10 15 20 25 30 35 40 45 50 55 12 14 16 18 20

number of qubits, n number of cycles, m

FIG. 4. Demonstrating quantum supremacy. a, Verification of benchmarking methods. FXEB values for patch, elided,

and full verification circuits are calculated from measured bitstrings and the corresponding probabilities predicted by classical

simulation. Here, the two-qubit gates are applied in a simplifiable tiling and sequence such that the full circuits can be simulated

out to n = 53, m = 14 in a reasonable amount of time. Each data point is an average over 10 distinct quantum circuit instances

that differ in their single-qubit gates (for n = 39, 42, 43 only 2 instances were simulated). For each n, each instance is sampled

with Ns between 0.5 M and 2.5 M. The black line shows predicted FXEB based on single- and two-qubit gate and measurement

errors. The close correspondence between all four curves, despite their vast differences in complexity, justifies the use of elided

circuits to estimate fidelity in the supremacy regime. b, Estimating FXEB in the quantum supremacy regime. Here, the

two-qubit gates are applied in a non-simplifiable tiling and sequence for which it is much harder to simulate. For the largest

elided data (n = 53, m = 20, total Ns = 30 M), we find an average FXEB > 0.1% with 5σ confidence, where σ includes both

systematic and statistical uncertainties. The corresponding full circuit data, not simulated but archived, is expected to show

similarly significant fidelity. For m = 20, obtaining 1M samples on the quantum processor takes 200 seconds, while an equal

fidelity classical sampling would take 10,000 years on 1M cores, and verifying the fidelity would take millions of years.

COMPUTATIONAL COST efficient, SFA becomes exponentially more computation-

ally expensive with increasing circuit depth due to the

We simulate the quantum circuits used in the exper- exponential growth of paths with the number of gates

iment on classical computers for two purposes: verify- connecting the patches.

ing our quantum processor and benchmarking methods

by computing FXEB where possible using simplifiable To estimate the classical computational cost of the

circuits (Fig. 4a), and estimating FXEB as well as the supremacy circuits (gray numbers, Fig. 4b), we ran por-

classical cost of sampling our hardest circuits (Fig. 4b). tions of the quantum circuit simulation on both the Sum-

Up to 43 qubits, we use a Schrödinger algorithm (SA) mit supercomputer as well as on Google clusters and ex-

which simulates the evolution of the full quantum state; trapolated to the full cost. In this extrapolation, we

the Jülich supercomputer (100k cores, 250TB) runs the account for the computational cost scaling with FXEB ,

largest cases. Above this size, there is not enough RAM e.g. the 0.1% fidelity decreases the cost by 1000 [43, 44].

to store the quantum state [42]. For larger qubit num- On the Summit supercomputer, which is currently the

bers, we use a hybrid Schrödinger-Feynman algorithm most powerful in the world, we used a method inspired

(SFA) [43] running on Google data centers to compute by Feynman path-integrals that is most efficient at low

the amplitudes of individual bitstrings. This algorithm depth [44–47]. At m = 20 the tensors do not reasonably

breaks the circuit up into two patches of qubits and effi- fit in node memory, so we can only measure runtimes

ciently simulates each patch using a Schrödinger method, up to m = 14, for which we estimate that sampling 3M

before connecting them using an approach reminiscent of bitstrings with 1% fidelity would require 1 year.

6

On Google Cloud servers, we estimate that perform- tum processors have thus reached the regime of quantum

ing the same task for m = 20 with 0.1% fidelity using supremacy. We expect their computational power will

the SFA algorithm would cost 50 trillion core-hours and continue to grow at a double exponential rate: the clas-

consume 1 petawatt hour of energy. To put this in per- sical cost of simulating a quantum circuit increases expo-

spective, it took 600 seconds to sample the circuit on nentially with computational volume, and hardware im-

the quantum processor 3 million times, where sampling provements will likely follow a quantum-processor equiv-

time is limited by control hardware communications; in alent of Moore’s law [52, 53], doubling this computational

fact, the net quantum processor time is only about 30 volume every few years. To sustain the double exponen-

seconds. The bitstring samples from this largest circuit tial growth rate and to eventually offer the computational

are archived online. volume needed to run well-known quantum algorithms,

One may wonder to what extent algorithmic innova- such as the Shor or Grover algorithms [19, 54], the engi-

tion can enhance classical simulations. Our assumption, neering of quantum error correction will have to become

based on insights from complexity theory, is that the cost a focus of attention.

of this algorithmic task is exponential in n as well as m. The “Extended Church-Turing Thesis” formulated by

Indeed, simulation methods have improved steadily over Bernstein and Vazirani [55] asserts that any “reasonable”

the past few years [42–50]. We expect that lower simula- model of computation can be efficiently simulated by a

tion costs than reported here will eventually be achieved, Turing machine. Our experiment suggests that a model

but we also expect they will be consistently outpaced by of computation may now be available that violates this

hardware improvements on larger quantum processors. assertion. We have performed random quantum circuit

sampling in polynomial time with a physically realized

quantum processor (with sufficiently low error rates), yet

VERIFYING THE DIGITAL ERROR MODEL

no efficient method is known to exist for classical comput-

A key assumption underlying the theory of quantum ing machinery. As a result of these developments, quan-

error correction is that quantum state errors may be con- tum computing is transitioning from a research topic to a

sidered digitized and localized [38, 51]. Under such a dig- technology that unlocks new computational capabilities.

ital model, all errors in the evolving quantum state may We are only one creative algorithm away from valuable

be characterized by a set of localized Pauli errors (bit- near-term applications.

and/or phase-flips) interspersed into the circuit. Since

continuous amplitudes are fundamental to quantum me-

chanics, it needs to be tested whether errors in a quantum

system could be treated as discrete and probabilistic. In-

deed, our experimental observations support the validity Acknowledgments We are grateful to Eric Schmidt,

Sergey Brin, Jeff Dean, and Jay Yagnik for their executive

of this model for our processor. Our system fidelity is

sponsorship of the Google AI Quantum team, and for their

well predicted by a simple model in which the individ- continued engagement and support. We thank Peter Norvig

ually characterized fidelities of each gate are multiplied for reviewing a draft of the manuscript, and Sergey Knysh

together (Fig 4). for useful discussions. We thank Kevin Kissel, Joey Raso,

To be successfully described by a digitized error model, Davinci Yonge-Mallo, Orion Martin, and Niranjan Sridhar

a system should be low in correlated errors. We achieve for their help with simulations. We thank Gina Bortoli and

this in our experiment by choosing circuits that ran- Lily Laws for keeping our team organized. This research used

resources from the Oak Ridge Leadership Computing Facility,

domize and decorrelate errors, by optimizing control to

which is a DOE Office of Science User Facility supported un-

minimize systematic errors and leakage, and by design- der Contract DE-AC05-00OR22725. A portion of this work

ing gates that operate much faster than correlated noise was performed in the UCSB Nanofabrication Facility, an open

sources, such as 1/f flux noise [37]. Demonstrating a pre- access laboratory.

dictive uncorrelated error model up to a Hilbert space of

Author contributions The Google AI Quantum team

size 253 shows that we can build a system where quantum conceived of the experiment. The applications and algorithms

resources, such as entanglement, are not prohibitively team provided the theoretical foundation and the specifics of

fragile. the algorithm. The hardware team carried out the experiment

and collected the data. The data analysis was done jointly

with outside collaborators. All authors wrote and revised the

WHAT DOES THE FUTURE HOLD? manuscript and supplement.

Quantum processors based on superconducting qubits Competing Interests The authors declare that they have

can now perform computations in a Hilbert space of di- no competing financial interests.

mension 253 ≈ 9 × 1015 , beyond the reach of the fastest Correspondence and requests for materials should

classical supercomputers available today. To our knowl- be addressed to John M. Martinis (jmartinis@google.com).

edge, this experiment marks the first computation that

can only be performed on a quantum processor. Quan-

7

†

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