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[Parties Listed On Signature Page]

UNITED STATES DISTRICT COURT NORTHERN DISTRICT OF CALIFORNIA SAN JOSE DIVISION

RAMBUS INC., Plaintiff, v. HYNIX SEMICONDUCTOR INC., HYNIX SEMICONDUCTOR AMERICA INC., HYNIX SEMICONDUCTOR MANUFACTURING AMERICA INC., SAMSUNG ELECTRONICS CO., LTD., SAMSUNG ELECTRONICS AMERICA, INC., SAMSUNG SEMICONDUCTOR, INC., SAMSUNG AUSTIN SEMICONDUCTOR, L.P., NANYA TECHNOLOGY CORPORATION, NANYA TECHNOLOGY CORPORATION U.S.A., Defendants.

Case No. C 05-00334 RMW MANUFACTURERS’ JOINT SUPPLEMENTAL BRIEF REGARDING CLAIM CONSTRUCTION FOR THE WARE PATENTS

Hon. Ronald M. Whyte

MANUFACTURERS' SUPPLEMENTAL BRIEF REGARDING CLAIM CONSTRUCTION AND THE PARTIES’ MOTIONS FOR SUMMARY JUDGMENT

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RAMBUS INC., Plaintiff, v. SAMSUNG ELECTRONICS CO., LTD., SAMSUNG ELECTRONICS AMERICA, INC., SAMSUNG SEMICONDUCTOR, INC., SAMSUNG AUSTIN SEMICONDUCTOR, L.P., Defendants.

Case No. C 05-02298 RMW

RAMBUS INC., Plaintiff, v. MICRON TECHNOLOGY, INC. and MICRON SEMICONDUCTOR PRODUCTS, INC., Defendants.

Case No. C 06-00244 RMW

MANUFACTURERS' SUPPLEMENTAL BRIEF REGARDING CLAIM CONSTRUCTION AND THE PARTIES’ MOTIONS FOR SUMMARY JUDGMENT

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On July 25, 2008, the Court issued its Claim Construction Order For The Ware Patents And Order Denying The Manufacturers' Motion For Summary Judgment, D.I. 1985 ("Order"). In its Order, the Court requested further briefing regarding construction of the phrase "During a First/Second Half of a Clock Cycle of an External Clock Signal." Order at 22. This brief is submitted in response to the Court’s Order. The Manufacturers proposed that the phrase at issue be construed as: Only between two adjacent clock edges beginning with a rising edge of the clock signal and ending at the next falling edge of the clock signal or beginning with a falling edge of the clock signal and ending at the next rising edge. The Court recognized that the Manufacturers' construction was supported by the 1996 IEEE Dictionary definition of "clock cycle" as "one period of the [clock] signal, beginning with the rising edge of the signal and ending on the following rising edge of the signal." Order at 21. The Court, however, expressed concern as to "how to measure 'the beginning of the rising edge' of a clock signal" and requested that the parties submit additional briefing on this topic. Id. at 21-22. Neither the Manufacturers' construction, nor the IEEE Dictionary definition, define clock cycle with respect to the "beginning of" the edge of the clock signal. Rather, the cycle is defined as beginning "with" the edge of the clock signal. This is not merely an issue of semantics. As discussed further below, whether the clock cycle begins near the start of the clock signal transition, the midpoint of the transition, or some other point on the transition, is a matter of design choice and is not required to construe this claim term. See Declaration of Joseph

McAlexander in Support of the Manufacturers’ Joint Supplemental Brief Regarding Claim Construction for the Ware Patents, ¶¶ 9-12 ("McAlexander Decl."). In any given product, or prior art reference, this point will be the same for each clock transition so that the beginning and the end of a clock cycle is consistent and measurable. Indeed, the Manufacturers' noninfringement position does not rely upon the particular point on the transition at which the cycle begins. See D.I. 504 at pp. 12-15. Rather, the clock cycle simply must begin and end at a detectable, measurable, non-arbitrary and repeatable point on the clock signal, and the only possible points

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where the clock signal meets those requirements is during (or “with”) the transitions of the clock signal. McAlexander Decl., ¶¶ 9-11. To clarify this point requires a basic understanding of clocks and how they are used in a system. A clock signal transitions between a low and high state in a periodic manner. The transitions from low to high (and high to low) are known as the "edge transitions" or simply the "edges" of the clock. McAlexander Decl., ¶ 8. A clock signal can be used to provide timing information for a system because the circuits in the system that receive the clock signal are able to detect the transitions (the edges) of the clock signal. This detection is possible because the voltage levels of the clock signal are changing during the transitions and thus provide a voltage variation that is detectable, measurable, non-arbitrary and repeatable. The voltage level of the clock signal can be detected and measured along the transition of the signal, whether the transition is from a high to a low voltage or from a low to a high voltage. McAlexander Decl., ¶ 9. At all times other than during clock voltage level transitions, the voltage level of a clock is essentially above or below the detection reference voltage threshold, providing no detectable, measurable, non-arbitrary, repeatable voltage level at which a single point of reference can be detected and measured. The threshold selected must be a value that is crossed during the clock signal edge transition, but also must be a value necessarily away from both of the high and low levels to ensure that an accurate time detection will occur. McAlexander Decl., ¶ 10. For example, if a clock has a low state of 0 volts and a high state of 3 volts, the circuits can be designed to detect any value between the two voltages, such as 1V, 1.5V or another voltage point along the transition. The designer may select such a value (typically near the middle of the transition) as a reference level for the system, which will then provide a single point of reference to reliably trigger events to synchronize with the clock. The selection of one of a number of reference voltage values along the transition is simply a matter of design choice. McAlexander Decl., ¶ 11. What is important is that there are known, repeatable values to detect, which can then be used to demarcate the beginning and the end of each clock cycle. In contrast, if, as suggested by
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Rambus, a point is chosen at some arbitrary point near the high state or the low state, there would not be any distinct value to repeatably detect for the purposes of determining and defining the starting and ending points of each clock cycle. If detection is required to be made while the voltage is at a steady state level, a receiving circuit would be incapable of distinguishing where it is within the steady state level and therefore incapable of identifying the beginning or ending of the clock cycle. McAlexander Decl., ¶ 12. Another way that a detectable, measurable, non-arbitrary and repeatable reference point can be defined is at the crossing point of the transitions of a differential clock. Once again, such a point is a voltage value that occurs during the transition of the clock signal such that the cycle is measured with respect to the edge of the clock (i.e., where the voltage level of the clock signal is at the same voltage value as the voltage level of the complementary clock signal that is transitioning in the opposite direction). McAlexander Decl., ¶ 13. Data sheets, standards, and patents from the same time period as the initial Ware patent application confirm that one of ordinary skill in the art would have understood that consecutive rising edges, consecutive falling edges, or consecutive crossing points of a differential clock define the clock cycle, regardless of the fact that the transitions will never be instantaneous. McAlexander Decl., ¶ 14. For example, a 1989 data sheet for Motorola's MCM6292 SRAM specifies a clock signal with "pulse levels" of 0 volts for the low state and 3 volts for the high state. McAlexander Decl., ¶ 14, Ex. 1. The data sheet further specifies an Input Timing

Measurement Reference Level as 1.5 volts. Id. This 1.5 volt reference level is a selected voltage point along the transition that can be used to trigger events and demarcates the beginning and ending of the clock cycle as shown in the figure on page 5-28 of the data sheet. Id. Additionally, attached to the accompanying declaration of Joseph McAlexander are a number of contemporaneous U.S. Patents demonstrating that those of skill in the art consistently demarcated the beginning and ending of clock cycles using the consecutive rising edges or consecutive falling edges of a clock signal, or the crossing points of a differential clock. McAlexander Decl., ¶¶ 1619, Exs. 2-5.

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One of ordinary skill in the art would have understood that, although the start of the clock cycle must begin somewhere on the edge transition of the clock signal, the selection of a particular voltage level on the transition of a clock signal as a reference for use in demarcating the beginning and ending of the clock cycles is a matter of design choice and not mandated by the patent or anything else. Accordingly, the Manufacturers have not sought to restrict their proposed construction to require that a clock cycle begin at any particular point on the transition or edge of the clock signal, as long as the beginning is defined based on a detectable, measurable nonarbitrary and repeatable point. They also did not attempt to restrict the clock cycle to beginning with the rising edge, as defined in the IEEE Dictionary. Rather, the Manufacturers proposed the most reasonable construction supported by the intrinsic and extrinsic evidence. Rambus's

argument that the Manufacturers' construction is arbitrary because it does not mandate a particular start point along the transition of the clock signal thus is misplaced. The

Manufacturer’s proposed construction is the only proffered construction that would allow a meaningful determination of when a clock cycle begins and ends, and is consistent with both the intrinsic and the extrinsic evidence.

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Dated: August 1, 2008

WEIL, GOTSHAL & MANGES LLP By: /s/ JARED BOBROW (Bar No. 133712) Email: jared.bobrow@weil.com Attorneys for Defendants MICRON TECHNOLOGY, INC., and MICRON SEMICONDUCTOR PRODUCTS, INC. WILLIAM C. PRICE (Bar No. 108542) Email: william.price@quinnemanuel.com HAROLD A. BARZA (Bar No. 80888) Email: halbarza@quinnemanuel.com ROBERT J. BECHER (Bar No. 193431) Email: robertbecher@quinnemanuel.com QUINN EMANUEL URQUHART OLIVER & HEDGES, LLP 865 South Figueroa Street, 10th Floor Los Angeles, CA 90017 Telephone: (213) 443-3000 Facsimile: (213) 443-3100 Attorneys for Defendants MICRON TECHNOLOGY, INC. and MICRON SEMICONDUCTOR PRODUCTS, INC. By: /s/ DAVID J. HEALEY (admitted pro hac vice) Email: david.healey@weil.com ANITA E. KADALA (admitted pro hac vice) Email: anita.kadala@weil.com WEIL, GOTSHAL & MANGES LLP 700 Louisiana, Suite 1600 Houston, TX 77002 Telephone: (713) 546-5000 Facsimile: (713) 224-9511 Attorneys for Defendants SAMSUNG ELECTRONICS CO., LTD., SAMSUNG ELECTRONICS AMERICA, INC., SAMSUNG SEMICONDUCTOR, INC., and SAMSUNG AUSTIN SEMICONDUCTOR, L.P.

MANUFACTURERS’ SUPPLEMENTAL BRIEF REGARDING CLAIM CONSTRUCTION AND THE PARTIES’ MOTIONS FOR SUMMARY JUDGMENT

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MANUFACTURERS' SUPPLEMENTAL BRIEF REGARDING CLAIM CONSTRUCTION AND THE PARTIES’ MOTIONS FOR SUMMARY JUDGMENT

By: /s/ Theodore G. Brown III DANIEL J. FURNISS (Bar No. 73531) Email: djfurniss@townsend.com THEODORE G. BROWN III (Bar No. 114672) Email: tgbrown@townsend.com JORDAN TRENT JONES (Bar No. 166600) Email: jtjones@townsend.com TOWNSEND and TOWNSEND and CREW LLP 379 Lytton Avenue Palo Alto, California 94301 Telephone: (650) 326-2400 Facsimile: (650) 326-2422 KENNETH L. NISSLY (Bar No. 77589) Email: kennissly@thelen.com SUSAN van KEULEN (Bar No. 136060) Email: svankeulen@thelen.com GEOFFREY H. YOST (Bar No. 159687) Email: gyost@thelen.com THELEN REID BROWN RAYSMAN & STEINER LLP 225 West Santa Clara Street, Suite 1200 San Jose, California 95113 Telephone: (408) 292-5800 Facsimile: (408) 287-8040 KENNETH R. O’ROURKE (Bar No. 120144) Email: korourke@omm.com WALLACE A. ALLAN (Bar No. 102054) Email: tallan@omm.com O’MELVENY & MYERS LLP 400 South Hope Street, Suite 1060 Los Angeles, California 90071-2899 Telephone: (213) 430-6000 Facsimile: (213) 430-6407 Attorneys for Defendants HYNIX SEMICONDUCTOR INC., HYNIX SEMICONDUCTOR AMERICA INC., and HYNIX SEMICONDUCTOR MANUFACTURING AMERICA INC.

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MANUFACTURERS' SUPPLEMENTAL BRIEF REGARDING CLAIM CONSTRUCTION AND THE PARTIES’ MOTIONS FOR SUMMARY JUDGMENT

By: /s/ VICKIE L. FEEMAN (Bar No. 177487) Email: vfeeman@orrick.com Craig R. Kaufman ROBERT E. FREITAS (Bar No. 80948) Email: rfreitas@orrick.com CRAIG R. KAUFMAN (Bar No. 159458) Email: ckaufman@orrick.com ORRICK, HERRINGTON & SUTCLIFFE LLP 1000 Marsh Road Menlo Park, CA 94025 Telephone: (650) 614-7400 Facsimile: (650) 614-7401 Attorneys for Defendants NANYA TECHNOLOGY CORPORATION, and NANYA TECHNOLOGY CORPORATION U.S.A.

ATTESTATION CLAUSE REGARDING SIGNATURES I hereby attest that I have on file permission to sign for co-counsel indicated by a “conformed” signature (/S/) within this efiled document. /s/ Vickie Feeman Vickie L. Feeman (Bar No. 177487) Email: vfeeman@orrick.com

CASE NO. C 05 00334 RMW CASE NO. C 05 02298 RMW CASE NO. C 06 00244 RMW