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Power on self test

Power-on self-test (POST) is the common term for a computer, router or printer's pre-boot sequence. The same basic sequence is present on all computer architectures. It is the first step of the more general process called initial program load (IPL), booting, or bootstrapping. The term POST has become popular in association with and as a result of the proliferation of the PC. It can be used as a noun when referring to the code that controls the pre-boot phase or when referring to the phase itself. It can also be used as a verb when referring to the code or the system as it progresses through the pre-boot phase. Alternatively, this may be called "POSTing." For embedded systems power-on self-test (POST) refers to the testing sequence that occurs when a system is first powered on. POST is software written to initialize and configure a processor and then execute a defined series of tests to determine if the computer hardware is working properly. Any errors found during the self-test are stored or reported through auditory or visual means, for example through a series of beeps, flashing LEDs or text displayed on a display. Once the POST sequence completes, execution is handed over to the normal boot sequence which typically runs a boot loader or operating system. POST for embedded systems has been around since the earliest days of computer systems.

General internal workings
On power up, the main duties of POST are handled by the BIOS, which may hand some of these duties to other programs designed to initialize very specific peripheral devices, notably for video and SCSI initialization. These other duty-specific programs are generally known collectively as option ROMs or individually as the video BIOS, SCSI BIOS, etc. The principal duties of the main BIOS during POST are as follows:
y y y y y y y

verify the integrity of the BIOS code itself find, size, and verify system main memory discover, initialize, and catalog all system buses and devices pass control to other specialized BIOSes (if and when required) provide a user interface for system's configuration identify, organize, and select which devices are available for booting construct whatever system environment that is required by the target OS

The BIOS will begin its POST duties when the CPU is reset. The first memory location the CPU tries to execute is known as the reset vector. In the case of a hard reboot, the northbridge will direct this code fetch (request) to the BIOS located on the system flash memory. For a warm boot, the BIOS will be located in the proper place in RAM and the northbridge will direct the reset vector call to the RAM. During the POST flow of a contemporary BIOS, one of the first things a BIOS should do is determine the reason it is executing. For a cold boot, for example, it may need to execute all of its functionality. If, however, the system supports power savings or quick boot methods,

or disconnected speaker. CGA) 1 long.System board problem 1 long.Parity error in base memory (first 64 KiB block) 3 . an interface card that shows port 80 output on a small display. the main BIOS is divided into two basic sections. Continuous beep . [edit] Fundamental structure In the case of the IBM PC compatible machines. Using a logic analyzer or a dedicated POST card.Normal POST . Linux. 80. [edit] Original IBM POST beep codes y y y y y y y y y 1 short beep . or the runtime footprint. Primarily these two divisions can be distinguished in that POST code should be flushed from memory before control is passed to the target OS while the runtime code remains resident in memory. such as MSI's D-Bracket. or keyboard problem Repeating short beeps . BIOS vendors used a sequence of beeps from the motherboardattached loudspeaker to signal error codes.Power supply or system board problem or keyboard 1 long.system is OK 2 short beeps . 1 short beep . However. the BIOS must integrate a plethora of competing. The POST section.3270 keyboard card [edit] POST AMI BIOS beep codes y y y y y 1 .Power supply. and the environment POST constructs for the OS is known as the runtime code. use port 80 for I/O timing operations. however.POST error . the runtime BIOS.Enhanced Graphics Adapter (EGA) 3 long beeps . straightforward process to one that is complex and convoluted.g. the average user still knows the POST and BIOS only through its simple visible memory tests and setup screen.Processor failure .) In later years. the code displayed by such a board is often meaningless. and even mutually exclusive standards and initiatives for the matrix of hardware and OSes the PC is expected to support. system board. disconnected cpu. since some OSes. system board problem. or POST code.Memory refresh timer error 2 . e. The POST flow for the PC has developed from a very simple. is responsible for the tasks mentioned above. During POST. and simply program the devices from a preloaded system device table. This division may be a misleading oversimplification. as many Runtime functions are executed while the system is POSTing.Display adapter problem (MDA. The original IBM BIOS reported errors detected during POST by outputting a number to a fixed I/O port address. a technician could determine the origin of the problem. 3 short beeps .Base memory read/write test error 4 . 2 short beeps . Some vendors have developed proprietary variants or enhancements.Mother board timer not operational 5 .the BIOS may be able to circumvent the standard POST device discovery.error code shown on screen No beep . (Note that once an operating system is running on the computer. evolving.Power supply.

long beeps No beep No beep One long.Floppy-disk drive or adapter 700 to 799 .Cache memory test failed Reference: AMIBIOS8 Check Point and Beep Code List. or port 1700 to 1799 . two short beeps Meaning Power supply may be bad Memory failure Power supply bad Power supply bad.EGA system-board video (MCA) 3000 to 3199 .Hard drive and/or adapter 1800 to 1899 .Alternate printer adapter 1100 to 1299 .Expansion unit (XT) 2000 to 2199 . system not plugged in.8042 Gate A20 test error (cannot switch to protected mode) 7 .General exception error (processor exception interrupt error) 8 . short beeps Long continuous beep tone Steady.Keyboard 400 to 499 .System boards 200 to 299 . Video card failure [edit] IBM POST diagnostic code descriptions y y y y y y y y y y y y y y y y y y y 100 to 199 .0.Parallel printer port 1000 to 1099 .AMI BIOS ROM checksum error 10 .Synchronous communication device.Bisynchronous communication adapter 2400 to 2599 .Color/graphics display 600 to 699 .CMOS shutdown register read/write error 11 . last updated 10 June 2008 [edit] POST beep codes on CompTIA A+ Hardware Core exam These POST beep codes are covered specifically on the CompTIA A+ Core Hardware Exam: Beeps Steady.Game port 1400 to 1499 . adapter. adapter.Memory 300 to 399 .y y y y y y 6 .Internal modem . or power not turned on If everything seems to be functioning correctly there may be a problem with the 'beeper' itself.Display memory error (system video adapter) 9 .Monochrome display 500 to 599 . version 2.LAN adapter 4800 to 4999 .Asynchronous communication device.Math coprocessor 900 to 999 .Color/graphics printer 1500 to 1599 . or port 1300 to 1399 . The system will normally beep one short beep.

from A1000 to 4000 present an interesting POST sequence that prompts the user with a sequence of flashing screens of different colors (rather . the Mac will not make its startup chime. a car crash sound. EDO) 3 beeps = No RAM banks passed memory testing 4 beeps = Bad checksum for the remainder of the boot ROM 5 beeps = Bad checksum for the ROM boot block [edit] New World Macs (1999 onward) and Intel-based Macs The beep codes were revised in October 1999. [edit] New World Macs (1998-1999) When Apple introduced the iMac in 1998.3. they give these beeps:[1] y y y y y 1 beep = No RAM installed/detected 2 beeps = Incompatible RAM type installed (for example. Macs made prior to 1987 crashed with the hexadecimal string and a sad mac icon silently.Phoenix BIOS chips 7300 to 7399 . The iMac began the production of New World Macs. In the event of a fatal error. it can be a beep.MIDI adapter 11200 to 11299 .SCSI adapter 21000 to 21099 .y y y y y y 7000 to 7099 . or more." which is a sound that varies by model. the power LED would flash in cadence. on some models. [edit] Old World Macs (until 1998) Macs made after to 1987 but prior to 1998.SCSI fixed disk and controller 21500 to 21599 . load the Mac OS ROM from the hard drive. upon failing the POST.[2] and have been the same since. y y y y y 1 beep = no RAM installed 2 beeps = incompatible RAM types 3 beeps = no good banks 4 beeps = no good boot images in the boot ROM (and/or bad sys config block) 5 beeps = processor is not usable [edit] Amiga POST Amiga historical line of computers. which can be used to identify the problem.SCSI CD-ROM system [edit] Macintosh POST Apple's Macintosh computers also perform a POST after a cold boot. will immediately halt with a "death chime.5-inch disk drive 8900 to 8999 . the sound of shattering glass. On the screen will be the Sad Mac icon. as they are called. it was a radical departure from other Macs of the time. along with two hexadecimal strings. Power Macintosh G3 (Blue & White). Power Mac G4 (PCI Graphics). In the event of a fatal error. New World Macs. a short musical tone. In addition. and PowerBook G3 (FireWire). such as the iMac. PowerBook G3 (bronze keyboard).

Disables and clears all DMA and interrupts. Step 4 . Step 2 . If an error occurs. If the screen remains a light gray colors and the tests continue. [edit] Amiga Color Screens Scheme y y y y y y y Red = Bad ROM Yellow = CPU Exception Before Bootstrap Code is Loaded Green = Bad Chip RAM or fail of Agnus Chip (check seating of Agnus) Black = No CPU White = Expansion passed test successfully Grey = CPU Passed Constant White = Failure of CPU [edit] Sequence for A4000 [edit] Correct Tests Color Sequence Scheme A4000 presents just a light gray screen during its boot time (it just occurs in 2 or max 3 seconds) y y y y Light Gray = Initial hardware configuration tests passed = Initial system software tests passed) = Final initialization test passed . dark gray. the system halts. or at least max 3 seconds to turn on and boot). [edit] Sequence for all main Amiga models Almost all Amiga models present the same color sequence when turned on: Black screen.Delays beginning the tests a fraction of a second to allow the hardware to stabilize. Step 5 . If the system fails the ROM test.Turns on the screen. y Step 6 .Jumps to ROM code in diagnostic card (if found) Step 3 . the screen display turns red and the system halts. the hardware is OK. light gray color screens filling all monitor screen in a rapid sequence (Amigas taken up usually 2.than audibile beeps as in other systems) to show if various hardware POST tests were correct or else if they failed: [edit] POST Sequence of Amiga The Amiga system performs the following tests at boot: y y y y y Step 1 .Performs checksum test on ROMs.Checks the general hardware configuration.

thus can communicate with the user if a fault is found by flashing its main LED in sequence: y y y y One Blink = ROM Checksum failure Two Blinks = RAM test failed Three Blinks = Watchdog timer failed Four Blinks = A shortcut exists between two row lines or one of the seven special keys (not implemented) [edit] See also y Serial Presence Detect SPD memory hardware feature to auto-configure timings .[edit] Failed Tests Color Scheme y y y y Red = ROM Error .Reset or replace Green = CHIP RAM error (reset AGNUS and re-test) Blue = Custom Chip(s) Error Yellow = 68000 detected error before software trapped it (GURU) [edit] Amiga Keyboard LED error signals The keyboards of historical Amiga models are not proprietary as it happened in early computer ages. but more pragmadically it was based on international standard ANSI/ISO 8859-1. The keyboard itself was an intelligent device and had its own processor and 4 kilobytes of RAM for keeping a buffer of the sequence of keys that were being pressed.